Unified Coverage Report :: Module :: prim_lfsr

Module : prim_lfsr

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00			0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_lfsr_0.1/rtl/prim_lfsr.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_otp_ctrl_lfsr_timer.u_prim_double_lfsr.gen_double_lfsr[0].u_prim_lfsr	0.00			0.00
tb.dut.u_otp_ctrl_lfsr_timer.u_prim_double_lfsr.gen_double_lfsr[1].u_prim_lfsr	0.00			0.00

---

Module Instance : tb.dut.u_otp_ctrl_lfsr_timer.u_prim_double_lfsr.gen_double_lfsr[0].u_prim_lfsr

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00			0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00			0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00					u_prim_double_lfsr

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Module Instance : tb.dut.u_otp_ctrl_lfsr_timer.u_prim_double_lfsr.gen_double_lfsr[1].u_prim_lfsr

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00			0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00			0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00					u_prim_double_lfsr

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

Toggle Coverage for Module : prim_lfsr

	Total	Covered	Percent
Totals	5	0	0.00
Total Bits	166	0	0.00
Total Bits 0->1	83	0	0.00
Total Bits 1->0	83	0	0.00

Ports	5	0	0.00
Port Bits	166	0	0.00
Port Bits 0->1	83	0	0.00
Port Bits 1->0	83	0	0.00

Port Details

Name	Toggle	Toggle 1->0	Tests	Toggle 0->1	Tests	Direction
clk_i	No	No		No		INPUT
rst_ni	No	No		No		INPUT
seed_en_i	Unreachable	Unreachable		Unreachable		INPUT
seed_i[39:0]	Unreachable	Unreachable		Unreachable		INPUT
lfsr_en_i	No	No		No		INPUT
entropy_i[39:0]	No	No		No		INPUT
state_o[39:0]	No	No		No		OUTPUT

Toggle Coverage for Instance : tb.dut.u_otp_ctrl_lfsr_timer.u_prim_double_lfsr.gen_double_lfsr[0].u_prim_lfsr

Toggle Coverage for Instance : tb.dut.u_otp_ctrl_lfsr_timer.u_prim_double_lfsr.gen_double_lfsr[1].u_prim_lfsr