Unified Coverage Report :: Module :: otp_ctrl_kdi

Module : otp_ctrl_kdi

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_otp_ctrl_kdi	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.u_otp_ctrl_kdi

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00	0.00	0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
7.74	0.00	0.00	30.95		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_flash_addr_key_anchor	0.00	0.00
u_flash_data_key_anchor	0.00	0.00
u_key_out_anchor	0.00	0.00				0.00
u_prim_count_entropy	0.00			0.00
u_prim_count_seed	0.00			0.00
u_req_arb	0.00	0.00	0.00			0.00
u_sram_data_key_anchor	0.00	0.00
u_state_regs	0.00	0.00				0.00

Line Coverage for Module : otp_ctrl_kdi

	Line No.	Total	Covered	Percent
TOTAL		148	0	0.00
CONT_ASSIGN	113	1	0	0.00
CONT_ASSIGN	114	1	0	0.00
CONT_ASSIGN	115	1	0	0.00
CONT_ASSIGN	117	1	0	0.00
CONT_ASSIGN	118	1	0	0.00
CONT_ASSIGN	119	1	0	0.00
CONT_ASSIGN	148	1	0	0.00
CONT_ASSIGN	156	1	0	0.00
CONT_ASSIGN	164	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
ALWAYS	259	9	0	0.00
CONT_ASSIGN	284	1	0	0.00
CONT_ASSIGN	285	1	0	0.00
CONT_ASSIGN	286	1	0	0.00
CONT_ASSIGN	288	1	0	0.00
CONT_ASSIGN	289	1	0	0.00
CONT_ASSIGN	290	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	305	1	0	0.00
CONT_ASSIGN	354	1	0	0.00
ALWAYS	357	88	0	0.00
ALWAYS	573	3	0	0.00
ALWAYS	576	7	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
113	0	1
114	0	1
115	0	1
117	0	1
118	0	1
119	0	1
148	0	1
156	0	1
164	0	1
175	0	4
176	0	4
177	0	4
259	0	1
260	0	1
261	0	1
262	0	1
263	0	1
			==> MISSING_ELSE
265	0	1
266	0	1
			==> MISSING_ELSE
268	0	1
269	0	1
			==> MISSING_ELSE
284	0	1
285	0	1
286	0	1
288	0	1
289	0	1
290	0	1
293	0	4
294	0	4
295	0	4
305	0	1
354	0	1
357	0	1
360	0	1
363	0	1
364	0	1
365	0	1
366	0	1
373	0	1
376	0	1
377	0	1
378	0	1
379	0	1
382	0	1
383	0	1
384	0	1
385	0	1
387	0	1
390	0	1
392	0	1
396	0	1
397	0	1
			==> MISSING_ELSE
403	0	1
404	0	1
405	0	1
406	0	1
			==> MISSING_ELSE
412	0	1
413	0	1
415	0	1
416	0	1
417	0	1
			==> MISSING_ELSE
423	0	1
424	0	1
426	0	1
427	0	1
428	0	1
430	0	1
431	0	1
434	0	1
			==> MISSING_ELSE
438	0	1
439	0	1
			==> MISSING_ELSE
445	0	1
446	0	1
447	0	1
448	0	1
450	0	1
451	0	1
452	0	1
455	0	1
			==> MISSING_ELSE
462	0	1
463	0	1
464	0	1
467	0	1
468	0	1
469	0	1
470	0	1
471	0	1
			==> MISSING_ELSE
474	0	1
475	0	1
			==> MISSING_ELSE
481	0	1
482	0	1
483	0	1
484	0	1
485	0	1
			==> MISSING_ELSE
493	0	1
494	0	1
495	0	1
497	0	1
498	0	1
501	0	1
502	0	1
505	0	1
509	0	1
511	0	1
513	0	1
514	0	1
517	0	1
			==> MISSING_ELSE
526	0	1
527	0	1
528	0	1
530	0	1
531	0	1
532	0	1
535	0	1
			==> MISSING_ELSE
542	0	1
543	0	1
548	0	1
562	0	1
564	0	1
565	0	1
			==> MISSING_ELSE
573	0	3
576	0	1
577	0	1
578	0	1
579	0	1
581	0	1
582	0	1
583	0	1

---

Cond Coverage for Module : otp_ctrl_kdi

	Total	Covered	Percent
Conditions	18	0	0.00
Logical	18	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       305
 EXPRESSION ((data_sel == EntropyData) ? nonce_out_q[entropy_cnt[0]] : (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0))
             ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       305
 SUB-EXPRESSION (data_sel == EntropyData)
                ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       305
 SUB-EXPRESSION (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0)
                 ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       373
 EXPRESSION (edn_req_q & ((~edn_ack_i)))
             ----1----   -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       416
 EXPRESSION (scrmbl_mtx_gnt_i && scrmbl_ready_i)
             --------1-------    -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       450
 EXPRESSION (entropy_cnt == 2'b1)
            ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       497
 EXPRESSION (seed_cnt == 2'b1)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       530
 EXPRESSION (entropy_cnt == req_bundle.nonce_size)
            -------------------1------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

---

FSM Coverage for Module : otp_ctrl_kdi

Summary for FSM :: state_q

	Total	Covered	Percent
States	11	0	0.00	(Not included in score)
Transitions	24	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
DigClrSt	404	Not Covered
DigEntropySt	451	Not Covered
DigFinSt	434	Not Covered
DigLoadSt	417	Not Covered
DigWaitSt	485	Not Covered
ErrorSt	564	Not Covered
FetchEntropySt	431	Not Covered
FetchNonceSt	514	Not Covered
FinishSt	517	Not Covered
IdleSt	397	Not Covered
ResetSt	395	Not Covered

transitions	Line No.	Covered	Tests
DigClrSt->DigLoadSt	417	Not Covered
DigClrSt->ErrorSt	564	Not Covered
DigEntropySt->DigFinSt	470	Not Covered
DigEntropySt->ErrorSt	564	Not Covered
DigFinSt->DigWaitSt	485	Not Covered
DigFinSt->ErrorSt	564	Not Covered
DigLoadSt->DigFinSt	434	Not Covered
DigLoadSt->ErrorSt	564	Not Covered
DigLoadSt->FetchEntropySt	431	Not Covered
DigWaitSt->DigClrSt	505	Not Covered
DigWaitSt->DigLoadSt	502	Not Covered
DigWaitSt->ErrorSt	564	Not Covered
DigWaitSt->FetchNonceSt	514	Not Covered
DigWaitSt->FinishSt	517	Not Covered
FetchEntropySt->DigEntropySt	451	Not Covered
FetchEntropySt->ErrorSt	564	Not Covered
FetchNonceSt->ErrorSt	564	Not Covered
FetchNonceSt->FinishSt	531	Not Covered
FinishSt->ErrorSt	564	Not Covered
FinishSt->IdleSt	542	Not Covered
IdleSt->DigClrSt	404	Not Covered
IdleSt->ErrorSt	564	Not Covered
ResetSt->ErrorSt	564	Not Covered
ResetSt->IdleSt	397	Not Covered

---

Branch Coverage for Module : otp_ctrl_kdi

	Line No.	Total	Covered	Percent
Branches		46	0	0.00
TERNARY	305	3	0	0.00
IF	262	2	0	0.00
IF	265	2	0	0.00
IF	268	2	0	0.00
CASE	392	31	0	0.00
IF	562	2	0	0.00
IF	573	2	0	0.00
IF	576	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	305	((data_sel == EntropyData)) ? 
-2-:	305	(req_bundle.seed_valid) ? 

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	262	if (key_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	265	if (nonce_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	268	if (seed_valid_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	392	case (state_q)
-2-:	396	if (kdi_en_i)
-3-:	403	if (req_valid)
-4-:	416	if ((scrmbl_mtx_gnt_i && scrmbl_ready_i))
-5-:	426	if (seed_cnt[0])
-6-:	428	if (scrmbl_ready_i)
-7-:	430	if (req_bundle.ingest_entropy)
-8-:	438	if (scrmbl_ready_i)
-9-:	447	if (edn_ack_i)
-10-:	450	if ((entropy_cnt == 2'b1))
-11-:	467	if (entropy_cnt[0])
-12-:	469	if (scrmbl_ready_i)
-13-:	474	if (scrmbl_ready_i)
-14-:	484	if (scrmbl_ready_i)
-15-:	494	if (scrmbl_valid_i)
-16-:	497	if ((seed_cnt == 2'b1))
-17-:	501	if (req_bundle.chained_digest)
-18-:	513	if (req_bundle.fetch_nonce)
-19-:	527	if (edn_ack_i)
-20-:	530	if ((entropy_cnt == req_bundle.nonce_size))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	Status	Tests
ResetSt	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ResetSt	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	1	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	0	-	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	1	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	0	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	1	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	0	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
FinishSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ErrorSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	562	if (((lc_ctrl_pkg::lc_tx_test_true_loose(escalate_en_i) || seed_cnt_err) || entropy_cnt_err))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	573	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	576	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

Line Coverage for Instance : tb.dut.u_otp_ctrl_kdi

	Line No.	Total	Covered	Percent
TOTAL		147	0	0.00
CONT_ASSIGN	113	1	0	0.00
CONT_ASSIGN	114	1	0	0.00
CONT_ASSIGN	115	1	0	0.00
CONT_ASSIGN	117	1	0	0.00
CONT_ASSIGN	118	1	0	0.00
CONT_ASSIGN	119	1	0	0.00
CONT_ASSIGN	148	1	0	0.00
CONT_ASSIGN	156	1	0	0.00
CONT_ASSIGN	164	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	175	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	176	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
CONT_ASSIGN	177	1	0	0.00
ALWAYS	259	9	0	0.00
CONT_ASSIGN	284	1	0	0.00
CONT_ASSIGN	285	1	0	0.00
CONT_ASSIGN	286	1	0	0.00
CONT_ASSIGN	288	1	0	0.00
CONT_ASSIGN	289	1	0	0.00
CONT_ASSIGN	290	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	305	1	0	0.00
CONT_ASSIGN	354	1	0	0.00
ALWAYS	357	87	0	0.00
ALWAYS	573	3	0	0.00
ALWAYS	576	7	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
113	0	1
114	0	1
115	0	1
117	0	1
118	0	1
119	0	1
148	0	1
156	0	1
164	0	1
175	0	4
176	0	4
177	0	4
259	0	1
260	0	1
261	0	1
262	0	1
263	0	1
			==> MISSING_ELSE
265	0	1
266	0	1
			==> MISSING_ELSE
268	0	1
269	0	1
			==> MISSING_ELSE
284	0	1
285	0	1
286	0	1
288	0	1
289	0	1
290	0	1
293	0	4
294	0	4
295	0	4
305	0	1
354	0	1
357	0	1
360	0	1
363	0	1
364	0	1
365	0	1
366	0	1
373	0	1
376	0	1
377	0	1
378	0	1
379	0	1
382	0	1
383	0	1
384	0	1
385	0	1
387	0	1
390	0	1
392	0	1
396	0	1
397	0	1
			==> MISSING_ELSE
403	0	1
404	0	1
405	0	1
406	0	1
			==> MISSING_ELSE
412	0	1
413	0	1
415	0	1
416	0	1
417	0	1
			==> MISSING_ELSE
423	0	1
424	0	1
426	0	1
427	0	1
428	0	1
430	0	1
431	0	1
434	0	1
			==> MISSING_ELSE
438	0	1
439	0	1
			==> MISSING_ELSE
445	0	1
446	0	1
447	0	1
448	0	1
450	0	1
451	0	1
452	0	1
455	0	1
			==> MISSING_ELSE
462	0	1
463	0	1
464	0	1
467	0	1
468	0	1
469	0	1
470	0	1
471	0	1
			==> MISSING_ELSE
474	0	1
475	0	1
			==> MISSING_ELSE
481	0	1
482	0	1
483	0	1
484	0	1
485	0	1
			==> MISSING_ELSE
493	0	1
494	0	1
495	0	1
497	0	1
498	0	1
501	0	1
502		excluded
			Exclude Annotation: VC_COV_UNR
505	0	1
509	0	1
511	0	1
513	0	1
514	0	1
517	0	1
			==> MISSING_ELSE
526	0	1
527	0	1
528	0	1
530	0	1
531	0	1
532	0	1
535	0	1
			==> MISSING_ELSE
542	0	1
543	0	1
548	0	1
562	0	1
564	0	1
565	0	1
			==> MISSING_ELSE
573	0	3
576	0	1
577	0	1
578	0	1
579	0	1
581	0	1
582	0	1
583	0	1

---

Cond Coverage for Instance : tb.dut.u_otp_ctrl_kdi

	Total	Covered	Percent
Conditions	17	0	0.00
Logical	17	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       305
 EXPRESSION ((data_sel == EntropyData) ? nonce_out_q[entropy_cnt[0]] : (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0))
             ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       305
 SUB-EXPRESSION (data_sel == EntropyData)
                ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       305
 SUB-EXPRESSION (req_bundle.seed_valid ? req_bundle.seed[seed_cnt] : '0)
                 ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       373
 EXPRESSION (edn_req_q & ((~edn_ack_i)))
             ----1----   -------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       416
 EXPRESSION (scrmbl_mtx_gnt_i && scrmbl_ready_i)
             --------1-------    -------2------

-1-	-2-	Status	Tests	Exclude Annotation
0	1	Excluded		VC_COV_UNR
1	0	Not Covered
1	1	Not Covered

 LINE       450
 EXPRESSION (entropy_cnt == 2'b1)
            ----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       497
 EXPRESSION (seed_cnt == 2'b1)
            ---------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       530
 EXPRESSION (entropy_cnt == req_bundle.nonce_size)
            -------------------1------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

---

FSM Coverage for Instance : tb.dut.u_otp_ctrl_kdi

Summary for FSM :: state_q

	Total	Covered	Percent
States	11	0	0.00	(Not included in score)
Transitions	22	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: state_q

---

states	Line No.	Covered	Tests
DigClrSt	404	Not Covered
DigEntropySt	451	Not Covered
DigFinSt	434	Not Covered
DigLoadSt	417	Not Covered
DigWaitSt	485	Not Covered
ErrorSt	564	Not Covered
FetchEntropySt	431	Not Covered
FetchNonceSt	514	Not Covered
FinishSt	517	Not Covered
IdleSt	397	Not Covered
ResetSt	395	Not Covered

transitions	Line No.	Covered	Tests	Exclude Annotation
DigClrSt->DigLoadSt	417	Not Covered
DigClrSt->ErrorSt	564	Not Covered
DigEntropySt->DigFinSt	470	Not Covered
DigEntropySt->ErrorSt	564	Not Covered
DigFinSt->DigWaitSt	485	Not Covered
DigFinSt->ErrorSt	564	Not Covered
DigLoadSt->DigFinSt	434	Not Covered
DigLoadSt->ErrorSt	564	Not Covered
DigLoadSt->FetchEntropySt	431	Not Covered
DigWaitSt->DigClrSt	505	Not Covered
DigWaitSt->DigLoadSt	502	Excluded		VC_COV_UNR
DigWaitSt->ErrorSt	564	Not Covered
DigWaitSt->FetchNonceSt	514	Not Covered
DigWaitSt->FinishSt	517	Excluded
FetchEntropySt->DigEntropySt	451	Not Covered
FetchEntropySt->ErrorSt	564	Not Covered
FetchNonceSt->ErrorSt	564	Not Covered
FetchNonceSt->FinishSt	531	Not Covered
FinishSt->ErrorSt	564	Not Covered
FinishSt->IdleSt	542	Not Covered
IdleSt->DigClrSt	404	Not Covered
IdleSt->ErrorSt	564	Not Covered
ResetSt->ErrorSt	564	Not Covered
ResetSt->IdleSt	397	Not Covered

---

Branch Coverage for Instance : tb.dut.u_otp_ctrl_kdi

	Line No.	Total	Covered	Percent
Branches		45	0	0.00
TERNARY	305	3	0	0.00
IF	262	2	0	0.00
IF	265	2	0	0.00
IF	268	2	0	0.00
CASE	392	30	0	0.00
IF	562	2	0	0.00
IF	573	2	0	0.00
IF	576	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv' or '../src/lowrisc_ip_otp_ctrl_1.0/rtl/otp_ctrl_kdi.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	305	((data_sel == EntropyData)) ? 
-2-:	305	(req_bundle.seed_valid) ? 

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	262	if (key_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	265	if (nonce_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	268	if (seed_valid_reg_en)

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	392	case (state_q)
-2-:	396	if (kdi_en_i)
-3-:	403	if (req_valid)
-4-:	416	if ((scrmbl_mtx_gnt_i && scrmbl_ready_i))
-5-:	426	if (seed_cnt[0])
-6-:	428	if (scrmbl_ready_i)
-7-:	430	if (req_bundle.ingest_entropy)
-8-:	438	if (scrmbl_ready_i)
-9-:	447	if (edn_ack_i)
-10-:	450	if ((entropy_cnt == 2'b1))
-11-:	467	if (entropy_cnt[0])
-12-:	469	if (scrmbl_ready_i)
-13-:	474	if (scrmbl_ready_i)
-14-:	484	if (scrmbl_ready_i)
-15-:	494	if (scrmbl_valid_i)
-16-:	497	if ((seed_cnt == 2'b1))
-17-:	501	if (req_bundle.chained_digest)
-18-:	513	if (req_bundle.fetch_nonce)
-19-:	527	if (edn_ack_i)
-20-:	530	if ((entropy_cnt == req_bundle.nonce_size))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	-13-	-14-	-15-	-16-	-17-	-18-	-19-	-20-	Status	Tests	Exclude Annotation
ResetSt	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ResetSt	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
IdleSt	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigClrSt	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	1	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	1	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigLoadSt	-	-	-	0	-	-	0	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	-	-	Not Covered
FetchEntropySt	-	-	-	-	-	-	-	0	-	-	-	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	1	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	1	0	-	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	1	-	-	-	-	-	-	-	Not Covered
DigEntropySt	-	-	-	-	-	-	-	-	-	0	-	0	-	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	1	-	-	-	-	-	-	Not Covered
DigFinSt	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	1	-	-	-	Excluded		VC_COV_UNR
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	0	-	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	1	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	-	0	-	-	Not Covered
DigWaitSt	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	-	-	-	-	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	1	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	1	0	Not Covered
FetchNonceSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	0	-	Not Covered
FinishSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
ErrorSt	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	562	if (((lc_ctrl_pkg::lc_tx_test_true_loose(escalate_en_i) || seed_cnt_err) || entropy_cnt_err))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	573	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	576	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered