Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
94.91 93.58 96.65 95.54 91.81 97.35 96.23 93.21


Total tests in report: 1282
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
68.78 68.78 88.48 88.48 82.17 82.17 53.63 53.63 46.27 46.27 85.89 85.89 89.51 89.51 35.53 35.53 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.2978187800
73.24 4.46 90.50 2.02 84.19 2.02 60.79 7.16 54.22 7.95 89.02 3.13 89.98 0.47 43.96 8.43 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.72436872
76.35 3.11 90.76 0.26 87.04 2.85 69.41 8.62 55.66 1.45 89.65 0.63 90.32 0.34 51.61 7.65 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all.260636896
79.14 2.79 91.17 0.41 91.36 4.32 72.40 2.98 57.59 1.93 91.38 1.73 90.92 0.61 59.19 7.58 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all_with_rand_reset.150118233
81.02 1.88 91.35 0.18 92.23 0.87 75.70 3.31 62.41 4.82 91.77 0.39 90.99 0.07 62.69 3.50 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.1714963979
82.47 1.45 91.35 0.00 92.71 0.47 80.55 4.85 62.41 0.00 92.20 0.43 90.99 0.00 67.05 4.36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.567232513
83.62 1.15 91.38 0.03 93.21 0.50 84.00 3.45 62.65 0.24 92.49 0.29 90.99 0.00 70.62 3.57 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all.404699216
84.56 0.94 91.61 0.23 93.91 0.70 85.16 1.16 65.54 2.89 93.02 0.53 91.12 0.13 71.55 0.93 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.4109538576
85.41 0.85 91.87 0.26 94.58 0.67 85.72 0.56 65.54 0.00 94.90 1.88 93.41 2.29 71.84 0.29 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_sec_cm.1825097664
86.22 0.81 91.91 0.03 94.71 0.12 88.16 2.44 66.75 1.20 94.99 0.10 93.54 0.13 73.48 1.64 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.2217781994
86.99 0.77 92.06 0.15 94.86 0.15 88.24 0.08 71.08 4.34 95.28 0.29 93.75 0.20 73.70 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/152.otp_ctrl_init_fail.301516986
87.53 0.54 92.10 0.05 94.91 0.05 88.60 0.36 71.81 0.72 95.38 0.10 93.75 0.00 76.20 2.50 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.2628203163
87.94 0.41 92.10 0.00 94.96 0.05 90.04 1.43 71.81 0.00 95.38 0.00 93.75 0.00 77.56 1.36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.2482162481
88.33 0.39 92.19 0.08 95.03 0.07 90.91 0.87 73.25 1.45 95.57 0.19 93.75 0.00 77.63 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.1058880124
88.69 0.36 92.20 0.02 95.25 0.22 90.91 0.00 73.25 0.00 95.62 0.05 94.01 0.27 79.56 1.93 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_intg_err.2783527891
89.04 0.35 92.25 0.05 95.28 0.02 90.91 0.00 75.42 2.17 95.71 0.10 94.08 0.07 79.63 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.2812706769
89.38 0.33 92.25 0.00 95.30 0.02 91.65 0.74 76.14 0.72 95.71 0.00 94.08 0.00 80.49 0.86 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all.1698427990
89.69 0.31 92.25 0.00 95.38 0.07 91.65 0.00 76.14 0.00 95.76 0.05 94.08 0.00 82.56 2.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all_with_rand_reset.816881140
89.97 0.28 92.25 0.00 95.40 0.02 92.49 0.84 76.39 0.24 95.76 0.00 94.08 0.00 83.42 0.86 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.3929431595
90.22 0.25 92.32 0.07 95.45 0.05 92.49 0.00 77.83 1.45 95.91 0.14 94.08 0.00 83.49 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_init_fail.3922025996
90.46 0.24 92.47 0.15 95.45 0.00 92.65 0.16 78.55 0.72 96.05 0.14 94.22 0.13 83.85 0.36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.2324406714
90.69 0.23 92.56 0.10 95.50 0.05 92.96 0.31 79.04 0.48 96.15 0.10 94.22 0.00 84.42 0.57 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.2123691444
90.91 0.22 92.56 0.00 95.50 0.00 93.06 0.09 80.24 1.20 96.15 0.00 94.22 0.00 84.63 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_stress_all.2674242725
91.12 0.21 92.56 0.00 95.50 0.00 93.06 0.00 80.24 0.00 96.15 0.00 95.70 1.48 84.63 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_hw_reset.636582484
91.30 0.18 92.65 0.08 95.55 0.05 93.06 0.00 81.20 0.96 96.29 0.14 95.70 0.00 84.63 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/216.otp_ctrl_init_fail.3932986466
91.47 0.17 92.83 0.18 95.83 0.27 93.18 0.12 81.20 0.00 96.29 0.00 95.70 0.00 85.28 0.64 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.2465974310
91.62 0.15 92.83 0.00 95.83 0.00 93.74 0.56 81.20 0.00 96.29 0.00 95.70 0.00 85.78 0.50 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.2456505084
91.77 0.15 92.83 0.00 95.83 0.00 93.85 0.11 81.69 0.48 96.29 0.00 95.70 0.00 86.20 0.43 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_stress_all.2057542707
91.90 0.13 92.88 0.05 95.85 0.02 93.89 0.04 82.17 0.48 96.34 0.05 95.76 0.07 86.42 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.3278884830
92.03 0.13 92.93 0.05 95.88 0.02 93.89 0.00 82.89 0.72 96.39 0.05 95.76 0.00 86.49 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_init_fail.2702003268
92.16 0.13 92.97 0.05 95.90 0.02 94.13 0.24 83.37 0.48 96.44 0.05 95.76 0.00 86.56 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.2023206103
92.29 0.13 93.01 0.03 95.95 0.05 94.13 0.00 84.10 0.72 96.53 0.10 95.76 0.00 86.56 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/113.otp_ctrl_init_fail.548593865
92.41 0.12 93.06 0.05 95.95 0.00 94.13 0.00 84.34 0.24 96.58 0.05 95.83 0.07 86.99 0.43 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_macro_errs.316450604
92.53 0.12 93.09 0.03 95.95 0.00 94.15 0.02 85.06 0.72 96.63 0.05 95.83 0.00 86.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.1159258341
92.64 0.11 93.09 0.00 96.15 0.20 94.15 0.00 85.30 0.24 96.63 0.00 95.83 0.00 87.35 0.36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_stress_all_with_rand_reset.2292987024
92.75 0.11 93.09 0.00 96.20 0.05 94.15 0.00 85.30 0.00 96.63 0.00 95.83 0.00 88.06 0.71 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/61.otp_ctrl_stress_all_with_rand_reset.2987783625
92.85 0.10 93.14 0.05 96.23 0.02 94.19 0.04 85.78 0.48 96.68 0.05 95.83 0.00 88.13 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.1992142736
92.96 0.10 93.14 0.00 96.23 0.00 94.20 0.01 86.27 0.48 96.68 0.00 95.83 0.00 88.35 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_stress_all.2916896156
93.05 0.10 93.19 0.05 96.25 0.02 94.21 0.01 86.75 0.48 96.73 0.05 95.83 0.00 88.42 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_init_fail.3622820753
93.15 0.10 93.19 0.00 96.25 0.00 94.47 0.26 86.75 0.00 96.73 0.00 95.83 0.00 88.85 0.43 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.2367436600
93.25 0.10 93.24 0.05 96.28 0.02 94.47 0.00 87.23 0.48 96.77 0.05 95.83 0.00 88.92 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_init_fail.4032303001
93.34 0.10 93.24 0.00 96.30 0.02 94.47 0.00 87.23 0.00 96.77 0.00 95.83 0.00 89.56 0.64 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_intg_err.519909209
93.44 0.10 93.35 0.11 96.33 0.02 94.47 0.00 87.47 0.24 96.92 0.14 95.83 0.00 89.71 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_check_fail.1344226604
93.52 0.08 93.35 0.00 96.35 0.02 94.49 0.03 87.71 0.24 96.92 0.00 95.83 0.00 89.99 0.29 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_stress_all.321689155
93.59 0.07 93.35 0.00 96.35 0.00 94.49 0.00 88.19 0.48 96.92 0.00 95.83 0.00 89.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_lc_esc.2851354685
93.66 0.07 93.35 0.00 96.35 0.00 94.60 0.11 88.19 0.00 96.92 0.00 95.83 0.00 90.35 0.36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_stress_all.4004873351
93.72 0.06 93.35 0.00 96.35 0.00 94.69 0.09 88.19 0.00 96.92 0.00 95.83 0.00 90.71 0.36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.363409884
93.78 0.06 93.37 0.02 96.38 0.02 94.69 0.00 88.43 0.24 96.97 0.05 95.83 0.00 90.78 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_check_fail.2313809897
93.83 0.05 93.37 0.00 96.38 0.00 94.69 0.00 88.67 0.24 96.97 0.00 95.83 0.00 90.92 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.2375114786
93.89 0.05 93.37 0.00 96.38 0.00 94.86 0.16 88.67 0.00 96.97 0.00 95.83 0.00 91.14 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.4214500018
93.94 0.05 93.40 0.03 96.38 0.00 94.88 0.03 88.92 0.24 97.01 0.05 95.83 0.00 91.14 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/211.otp_ctrl_init_fail.2335970843
93.98 0.05 93.40 0.00 96.38 0.00 95.01 0.12 88.92 0.00 97.01 0.00 95.90 0.07 91.28 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.690278408
94.03 0.05 93.43 0.03 96.38 0.00 95.01 0.01 89.16 0.24 97.06 0.05 95.90 0.00 91.28 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.613793141
94.08 0.05 93.43 0.00 96.38 0.00 95.02 0.01 89.40 0.24 97.06 0.00 95.90 0.00 91.35 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_macro_errs.2656508141
94.11 0.04 93.43 0.00 96.40 0.02 95.02 0.00 89.64 0.24 97.06 0.00 95.90 0.00 91.35 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_stress_all.1196331148
94.15 0.04 93.43 0.00 96.43 0.02 95.02 0.00 89.88 0.24 97.06 0.00 95.90 0.00 91.35 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_parallel_lc_esc.3598889121
94.19 0.04 93.43 0.00 96.45 0.02 95.02 0.00 90.12 0.24 97.06 0.00 95.90 0.00 91.35 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_stress_all_with_rand_reset.2004838395
94.23 0.03 93.43 0.00 96.45 0.00 95.05 0.03 90.12 0.00 97.06 0.00 95.90 0.00 91.57 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_key_req.2711625909
94.26 0.03 93.43 0.00 96.45 0.00 95.05 0.00 90.36 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/128.otp_ctrl_parallel_lc_esc.2492048864
94.29 0.03 93.43 0.00 96.45 0.00 95.05 0.00 90.60 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/131.otp_ctrl_parallel_lc_esc.3950242865
94.33 0.03 93.43 0.00 96.45 0.00 95.05 0.00 90.84 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/150.otp_ctrl_parallel_lc_esc.2023633971
94.36 0.03 93.43 0.00 96.45 0.00 95.05 0.00 91.08 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_parallel_lc_esc.3605380054
94.40 0.03 93.43 0.00 96.45 0.00 95.05 0.00 91.33 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.2456962378
94.43 0.03 93.43 0.00 96.45 0.00 95.05 0.00 91.57 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/262.otp_ctrl_init_fail.3797007121
94.47 0.03 93.43 0.00 96.45 0.00 95.05 0.00 91.81 0.24 97.06 0.00 95.90 0.00 91.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_parallel_lc_esc.1214103208
94.50 0.03 93.43 0.00 96.48 0.02 95.05 0.00 91.81 0.00 97.06 0.00 95.97 0.07 91.71 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_rw.4271699394
94.53 0.03 93.43 0.00 96.48 0.00 95.05 0.00 91.81 0.00 97.06 0.00 95.97 0.00 91.92 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_intg_err.657635312
94.56 0.03 93.43 0.00 96.48 0.00 95.05 0.00 91.81 0.00 97.06 0.00 95.97 0.00 92.14 0.21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_regwen.3360174016
94.59 0.03 93.43 0.00 96.48 0.00 95.12 0.07 91.81 0.00 97.06 0.00 95.97 0.00 92.28 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.376046373
94.62 0.03 93.43 0.00 96.53 0.05 95.12 0.00 91.81 0.00 97.06 0.00 96.03 0.07 92.35 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_stress_all_with_rand_reset.887387350
94.65 0.03 93.43 0.00 96.53 0.00 95.23 0.11 91.81 0.00 97.06 0.00 96.03 0.00 92.42 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.2090837532
94.67 0.02 93.45 0.02 96.55 0.02 95.23 0.00 91.81 0.00 97.11 0.05 96.03 0.00 92.49 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_check_fail.2650136683
94.69 0.02 93.45 0.00 96.55 0.00 95.24 0.01 91.81 0.00 97.11 0.00 96.03 0.00 92.64 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_key_req.3701398279
94.71 0.02 93.45 0.00 96.55 0.00 95.24 0.00 91.81 0.00 97.11 0.00 96.03 0.00 92.78 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_regwen.449066854
94.73 0.02 93.45 0.00 96.55 0.00 95.24 0.00 91.81 0.00 97.11 0.00 96.10 0.07 92.85 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_stress_all_with_rand_reset.1890654780
94.75 0.02 93.45 0.00 96.55 0.00 95.24 0.00 91.81 0.00 97.11 0.00 96.23 0.13 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_rw.4133891306
94.76 0.01 93.45 0.00 96.58 0.02 95.24 0.00 91.81 0.00 97.11 0.00 96.23 0.00 92.92 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_stress_all.2210426693
94.78 0.01 93.45 0.00 96.58 0.00 95.26 0.02 91.81 0.00 97.11 0.00 96.23 0.00 92.99 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all.2572501336
94.79 0.01 93.48 0.03 96.58 0.00 95.26 0.00 91.81 0.00 97.16 0.05 96.23 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/104.otp_ctrl_init_fail.682076282
94.80 0.01 93.52 0.03 96.58 0.00 95.26 0.00 91.81 0.00 97.21 0.05 96.23 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/109.otp_ctrl_init_fail.1644814587
94.81 0.01 93.55 0.03 96.58 0.00 95.26 0.00 91.81 0.00 97.26 0.05 96.23 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/115.otp_ctrl_init_fail.848187702
94.82 0.01 93.58 0.03 96.58 0.00 95.26 0.00 91.81 0.00 97.30 0.05 96.23 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/135.otp_ctrl_init_fail.1802592418
94.83 0.01 93.58 0.00 96.58 0.00 95.34 0.08 91.81 0.00 97.30 0.00 96.23 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.1541696719
94.84 0.01 93.58 0.00 96.65 0.07 95.34 0.00 91.81 0.00 97.30 0.00 96.23 0.00 92.99 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_stress_all.3621250044
94.86 0.01 93.58 0.00 96.65 0.00 95.34 0.00 91.81 0.00 97.30 0.00 96.23 0.00 93.07 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_regwen.2603162685
94.87 0.01 93.58 0.00 96.65 0.00 95.34 0.00 91.81 0.00 97.30 0.00 96.23 0.00 93.14 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_parallel_lc_req.849948499
94.88 0.01 93.58 0.00 96.65 0.00 95.34 0.00 91.81 0.00 97.30 0.00 96.23 0.00 93.21 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_dai_lock.1413273328
94.88 0.01 93.58 0.00 96.65 0.00 95.40 0.06 91.81 0.00 97.30 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.3578383630
94.89 0.01 93.58 0.00 96.65 0.00 95.46 0.06 91.81 0.00 97.30 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.645340244
94.90 0.01 93.58 0.00 96.65 0.00 95.46 0.00 91.81 0.00 97.35 0.05 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.2661089642
94.90 0.01 93.58 0.00 96.65 0.00 95.49 0.03 91.81 0.00 97.35 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.1880358859
94.91 0.01 93.58 0.00 96.65 0.00 95.51 0.02 91.81 0.00 97.35 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.2728661408
94.91 0.01 93.58 0.00 96.65 0.00 95.53 0.01 91.81 0.00 97.35 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.4229644306
94.91 0.01 93.58 0.00 96.65 0.00 95.54 0.01 91.81 0.00 97.35 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.400624390
94.91 0.01 93.58 0.00 96.65 0.00 95.54 0.01 91.81 0.00 97.35 0.00 96.23 0.00 93.21 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.837096764

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_aliasing.1623744907
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_bit_bash.934465277
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_csr_rw.12425272
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_intr_test.1315663681
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_partial_access.1490165002
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_mem_walk.700479555
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_same_csr_outstanding.647601963
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_errors.3676889988
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/0.otp_ctrl_tl_intg_err.2975076072
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_aliasing.3048172088
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_bit_bash.2154944558
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_hw_reset.3848155094
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_csr_mem_rw_with_rand_reset.3326040041
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_intr_test.3496902173
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_partial_access.2991946008
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_mem_walk.2116631101
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_same_csr_outstanding.2440784398
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/1.otp_ctrl_tl_errors.2549659389
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_mem_rw_with_rand_reset.3702644241
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_csr_rw.1867649809
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_intr_test.3934907463
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_same_csr_outstanding.2557359742
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_errors.2659113762
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/10.otp_ctrl_tl_intg_err.1349384131
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_mem_rw_with_rand_reset.337702730
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_csr_rw.2386754644
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_intr_test.33376793
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_same_csr_outstanding.1228690331
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_errors.3029835005
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/11.otp_ctrl_tl_intg_err.707793046
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_mem_rw_with_rand_reset.1095885341
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_csr_rw.4208298773
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_intr_test.3924382127
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_same_csr_outstanding.1365555064
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_errors.556351260
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/12.otp_ctrl_tl_intg_err.3665616174
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_mem_rw_with_rand_reset.2758198128
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_csr_rw.648767760
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_intr_test.3248650638
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_same_csr_outstanding.2182562041
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_errors.3879579861
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/13.otp_ctrl_tl_intg_err.436032626
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_mem_rw_with_rand_reset.2499889058
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_csr_rw.925503432
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_intr_test.831231670
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_same_csr_outstanding.2618841368
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_errors.3681178952
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/14.otp_ctrl_tl_intg_err.1175463762
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_mem_rw_with_rand_reset.291478958
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_csr_rw.2822786139
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_intr_test.266291919
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_same_csr_outstanding.811319390
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_errors.3388011839
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/15.otp_ctrl_tl_intg_err.3905076885
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_mem_rw_with_rand_reset.3371183918
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_csr_rw.4038836176
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_intr_test.3395359890
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_same_csr_outstanding.170697077
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_errors.780147278
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/16.otp_ctrl_tl_intg_err.845217140
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_mem_rw_with_rand_reset.192754563
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_csr_rw.2216649683
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_intr_test.474294353
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_same_csr_outstanding.3849968984
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/17.otp_ctrl_tl_errors.1389355288
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_csr_rw.46073996
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_intr_test.626681500
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_same_csr_outstanding.315561763
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_errors.3298456755
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/18.otp_ctrl_tl_intg_err.3964914916
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_mem_rw_with_rand_reset.1100740930
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_csr_rw.2224985591
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_intr_test.2292628727
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_same_csr_outstanding.1832867406
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_errors.1484219309
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/19.otp_ctrl_tl_intg_err.1372277746
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_aliasing.173244757
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_bit_bash.3683534413
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_hw_reset.2320888187
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_mem_rw_with_rand_reset.1935433931
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_csr_rw.1972101107
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_intr_test.4068626699
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_partial_access.3158119204
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_mem_walk.3971603764
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_same_csr_outstanding.709911616
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_errors.2396114086
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/2.otp_ctrl_tl_intg_err.1898124054
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/20.otp_ctrl_intr_test.2876030301
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/21.otp_ctrl_intr_test.3621108651
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/22.otp_ctrl_intr_test.3441132336
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/23.otp_ctrl_intr_test.3230132535
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/24.otp_ctrl_intr_test.2365686110
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/25.otp_ctrl_intr_test.449023553
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/26.otp_ctrl_intr_test.1441367910
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/27.otp_ctrl_intr_test.1340020934
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/28.otp_ctrl_intr_test.3610529064
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/29.otp_ctrl_intr_test.1708017585
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_aliasing.789568861
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_bit_bash.2741849152
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_hw_reset.4076880877
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_csr_mem_rw_with_rand_reset.3697314021
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_intr_test.111507310
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_partial_access.1809088399
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_mem_walk.1334903589
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_same_csr_outstanding.357493443
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/3.otp_ctrl_tl_errors.3496783678
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/30.otp_ctrl_intr_test.1968794412
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/31.otp_ctrl_intr_test.1950867366
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/32.otp_ctrl_intr_test.2824869473
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/33.otp_ctrl_intr_test.1466582154
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/34.otp_ctrl_intr_test.3880886372
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/35.otp_ctrl_intr_test.2237576056
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/36.otp_ctrl_intr_test.4015386369
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/37.otp_ctrl_intr_test.3463867837
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/38.otp_ctrl_intr_test.1735094142
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/39.otp_ctrl_intr_test.911350869
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_aliasing.3884206125
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_bit_bash.387994380
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_hw_reset.4154039998
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_mem_rw_with_rand_reset.3028365159
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_csr_rw.3084859618
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_intr_test.2065165453
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_partial_access.235806321
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_mem_walk.2479795112
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_same_csr_outstanding.1747606228
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_errors.2845230500
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/4.otp_ctrl_tl_intg_err.3302669604
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/40.otp_ctrl_intr_test.3593666074
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/41.otp_ctrl_intr_test.478246647
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/42.otp_ctrl_intr_test.3691575155
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/43.otp_ctrl_intr_test.3961964028
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/44.otp_ctrl_intr_test.3719675218
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/45.otp_ctrl_intr_test.877211566
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/46.otp_ctrl_intr_test.1462020787
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/47.otp_ctrl_intr_test.3287091988
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/48.otp_ctrl_intr_test.2434985816
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/49.otp_ctrl_intr_test.26012392
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_mem_rw_with_rand_reset.2512448910
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_csr_rw.24917625
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_intr_test.3634113477
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_same_csr_outstanding.2899459326
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_errors.551107664
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/5.otp_ctrl_tl_intg_err.3058361844
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_mem_rw_with_rand_reset.1090622988
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_csr_rw.3332959793
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_intr_test.2947304814
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_same_csr_outstanding.1254358769
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_errors.1722580790
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/6.otp_ctrl_tl_intg_err.851904511
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_mem_rw_with_rand_reset.425026689
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_csr_rw.3915751343
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_intr_test.3124687590
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_same_csr_outstanding.1549485701
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_errors.1264848411
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/7.otp_ctrl_tl_intg_err.2762447521
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_mem_rw_with_rand_reset.3280946968
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_csr_rw.571887446
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_intr_test.3017033650
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_same_csr_outstanding.3888100135
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_errors.3393570510
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/8.otp_ctrl_tl_intg_err.3212248737
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_mem_rw_with_rand_reset.266169359
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_csr_rw.1073127956
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_intr_test.672755633
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_same_csr_outstanding.1939642743
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_errors.487495246
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/cover_reg_top/9.otp_ctrl_tl_intg_err.737131879
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.5854794
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.2401142362
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.3713677302
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.1538482603
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.297050431
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.1472632888
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_sec_cm.2522478789
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.4254000995
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.184484031
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.4060944888
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.1955423015
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.3505419020
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.3702655077
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.1323792962
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.2496385867
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.915960895
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.209105264
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.3887180682
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.3900571515
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3859081642
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.1849045647
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.2551108032
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.3375350890
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.3173555644
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.2287482686
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.4216224171
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.3485211536
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.1076408863
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.883956159
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.3972406333
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.1155168507
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.1444917556
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.724571883
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/100.otp_ctrl_init_fail.1711520117
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/100.otp_ctrl_parallel_lc_esc.1755080659
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/101.otp_ctrl_init_fail.2828588861
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/101.otp_ctrl_parallel_lc_esc.74736279
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/102.otp_ctrl_init_fail.1655935766
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/102.otp_ctrl_parallel_lc_esc.1958988864
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/103.otp_ctrl_init_fail.379996756
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/103.otp_ctrl_parallel_lc_esc.3350081981
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/104.otp_ctrl_parallel_lc_esc.818691766
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/105.otp_ctrl_init_fail.51196117
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/105.otp_ctrl_parallel_lc_esc.2687709752
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/106.otp_ctrl_init_fail.3798757698
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/106.otp_ctrl_parallel_lc_esc.1517129483
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/107.otp_ctrl_init_fail.313806192
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/107.otp_ctrl_parallel_lc_esc.407719957
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/108.otp_ctrl_init_fail.4147153289
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/108.otp_ctrl_parallel_lc_esc.3548881940
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/109.otp_ctrl_parallel_lc_esc.2072346326
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.2611688709
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.2879849265
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.4254063597
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.3169959380
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.1427054163
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.1183069461
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.447299535
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.2137582317
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_regwen.3969250957
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.2745936321
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all.3630092624
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.1682559373
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/110.otp_ctrl_init_fail.952405458
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/110.otp_ctrl_parallel_lc_esc.2886284988
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/111.otp_ctrl_init_fail.3750937696
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/111.otp_ctrl_parallel_lc_esc.1573191856
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/112.otp_ctrl_init_fail.606700694
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/112.otp_ctrl_parallel_lc_esc.1270501612
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/113.otp_ctrl_parallel_lc_esc.741998770
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/114.otp_ctrl_init_fail.3375337296
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/114.otp_ctrl_parallel_lc_esc.2537763838
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/115.otp_ctrl_parallel_lc_esc.1184975018
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/116.otp_ctrl_init_fail.1184854096
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/116.otp_ctrl_parallel_lc_esc.4291920188
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/117.otp_ctrl_init_fail.3011171072
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/117.otp_ctrl_parallel_lc_esc.900051088
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/118.otp_ctrl_init_fail.3234211093
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/118.otp_ctrl_parallel_lc_esc.3265427118
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/119.otp_ctrl_init_fail.1859783404
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/119.otp_ctrl_parallel_lc_esc.2127877402
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.2720303969
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.4286366848
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.3579125675
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.2391186024
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.373797981
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.585253220
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.3783518886
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.1324807734
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.1390202347
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.575135745
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all_with_rand_reset.2869047034
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.1462564184
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/120.otp_ctrl_init_fail.1906364913
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/120.otp_ctrl_parallel_lc_esc.621600696
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/121.otp_ctrl_init_fail.2749087163
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/121.otp_ctrl_parallel_lc_esc.285439419
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/122.otp_ctrl_init_fail.1774122517
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/122.otp_ctrl_parallel_lc_esc.4213373078
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/123.otp_ctrl_init_fail.2864773859
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/123.otp_ctrl_parallel_lc_esc.759515990
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/124.otp_ctrl_init_fail.1982194325
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/124.otp_ctrl_parallel_lc_esc.1594148161
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/125.otp_ctrl_init_fail.2879617821
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/125.otp_ctrl_parallel_lc_esc.4145656442
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/126.otp_ctrl_init_fail.1688193466
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/126.otp_ctrl_parallel_lc_esc.3880472946
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/127.otp_ctrl_init_fail.531854604
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/127.otp_ctrl_parallel_lc_esc.1043466276
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/128.otp_ctrl_init_fail.2329549677
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/129.otp_ctrl_init_fail.2895124658
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/129.otp_ctrl_parallel_lc_esc.1620148489
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.4134842687
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_check_fail.223787160
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.1040389622
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.3689174052
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.1226660260
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_macro_errs.2080665664
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.2739643759
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.529616788
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.3524552463
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.3209048881
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.2936099150
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_stress_all.1941329202
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_test_access.4290886343
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/130.otp_ctrl_init_fail.3946200615
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/130.otp_ctrl_parallel_lc_esc.3603060414
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/131.otp_ctrl_init_fail.3675508156
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/132.otp_ctrl_init_fail.1053509354
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/132.otp_ctrl_parallel_lc_esc.2913223957
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/133.otp_ctrl_init_fail.1620432302
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/133.otp_ctrl_parallel_lc_esc.1851680456
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/134.otp_ctrl_init_fail.1840918109
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/134.otp_ctrl_parallel_lc_esc.2918385147
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/135.otp_ctrl_parallel_lc_esc.4221568787
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/136.otp_ctrl_init_fail.1339566601
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/136.otp_ctrl_parallel_lc_esc.3922627777
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/137.otp_ctrl_init_fail.1876178328
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/137.otp_ctrl_parallel_lc_esc.1493715805
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/138.otp_ctrl_init_fail.3395503635
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/138.otp_ctrl_parallel_lc_esc.2792875454
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/139.otp_ctrl_init_fail.1406266267
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/139.otp_ctrl_parallel_lc_esc.1263544474
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.313650373
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.4157727880
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.2267655717
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_lock.395849590
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.869635647
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.239973939
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.1413970302
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.2147253882
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.2680029927
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.2812094431
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.1546368258
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_stress_all.1288623344
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_test_access.1389161463
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/140.otp_ctrl_init_fail.2197689467
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/140.otp_ctrl_parallel_lc_esc.1159593412
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/141.otp_ctrl_init_fail.3124118334
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/141.otp_ctrl_parallel_lc_esc.745547647
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/142.otp_ctrl_init_fail.964345448
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/142.otp_ctrl_parallel_lc_esc.1481781547
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/143.otp_ctrl_init_fail.2191544998
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/143.otp_ctrl_parallel_lc_esc.1093728774
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/144.otp_ctrl_init_fail.2149410176
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/144.otp_ctrl_parallel_lc_esc.1106394706
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/145.otp_ctrl_init_fail.814430160
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/145.otp_ctrl_parallel_lc_esc.2234185535
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/146.otp_ctrl_init_fail.3173789535
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/146.otp_ctrl_parallel_lc_esc.2234401151
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/147.otp_ctrl_init_fail.2341927379
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/147.otp_ctrl_parallel_lc_esc.3932348382
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/148.otp_ctrl_init_fail.4091957040
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/148.otp_ctrl_parallel_lc_esc.3984944996
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/149.otp_ctrl_init_fail.1367362535
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/149.otp_ctrl_parallel_lc_esc.1245923648
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.1382739384
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.1267221397
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.4051044332
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.1483390895
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.2118183515
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.3673808732
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.1515353062
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.1014184366
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.1274558934
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.3845491657
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.1704423016
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_stress_all.3990953457
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_stress_all_with_rand_reset.2267292610
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_test_access.557995509
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/150.otp_ctrl_init_fail.305842842
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/151.otp_ctrl_init_fail.391269754
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/151.otp_ctrl_parallel_lc_esc.1678920707
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/152.otp_ctrl_parallel_lc_esc.3018913962
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/153.otp_ctrl_init_fail.1769957306
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/153.otp_ctrl_parallel_lc_esc.3642333903
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/154.otp_ctrl_init_fail.736722417
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/154.otp_ctrl_parallel_lc_esc.2081665083
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/155.otp_ctrl_init_fail.199240846
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/155.otp_ctrl_parallel_lc_esc.980571589
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/156.otp_ctrl_init_fail.3285464051
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/156.otp_ctrl_parallel_lc_esc.54640851
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/157.otp_ctrl_init_fail.4142035120
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/157.otp_ctrl_parallel_lc_esc.1171773427
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/158.otp_ctrl_init_fail.3901285963
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/158.otp_ctrl_parallel_lc_esc.230117238
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/159.otp_ctrl_init_fail.3073153500
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/159.otp_ctrl_parallel_lc_esc.4129755579
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.189224195
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_check_fail.3820126212
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_errs.1190541868
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.4291396186
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.2251408216
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_macro_errs.2594494504
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.2869640129
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.3825360344
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.2294279725
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.3038358693
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.3352526313
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_test_access.3045079287
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/160.otp_ctrl_init_fail.1194784557
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/160.otp_ctrl_parallel_lc_esc.2854353564
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/161.otp_ctrl_init_fail.678474321
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/161.otp_ctrl_parallel_lc_esc.938232212
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/162.otp_ctrl_init_fail.3204708447
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/162.otp_ctrl_parallel_lc_esc.1587248435
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/163.otp_ctrl_init_fail.916506894
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/163.otp_ctrl_parallel_lc_esc.304650354
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/164.otp_ctrl_init_fail.208970898
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/164.otp_ctrl_parallel_lc_esc.341193081
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/165.otp_ctrl_init_fail.2485324398
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/165.otp_ctrl_parallel_lc_esc.3775892170
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/166.otp_ctrl_init_fail.1679497508
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/166.otp_ctrl_parallel_lc_esc.1926827890
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/167.otp_ctrl_init_fail.4223076203
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/167.otp_ctrl_parallel_lc_esc.3471670348
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/168.otp_ctrl_init_fail.3151379066
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/168.otp_ctrl_parallel_lc_esc.3884612650
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/169.otp_ctrl_init_fail.3012405755
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/169.otp_ctrl_parallel_lc_esc.809339734
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.3621107303
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_errs.3948499458
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_lock.2685516976
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.1944952012
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_macro_errs.307652362
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.4155852958
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.2344312303
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_req.2916552671
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.2189282151
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_smoke.2822698796
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_test_access.4139200007
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/170.otp_ctrl_init_fail.248751837
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/170.otp_ctrl_parallel_lc_esc.104115810
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/171.otp_ctrl_init_fail.2704949968
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/171.otp_ctrl_parallel_lc_esc.640958419
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/172.otp_ctrl_init_fail.249029735
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/172.otp_ctrl_parallel_lc_esc.2210994522
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/173.otp_ctrl_init_fail.3781729105
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/173.otp_ctrl_parallel_lc_esc.1787495950
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/174.otp_ctrl_init_fail.307998180
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/174.otp_ctrl_parallel_lc_esc.4093410866
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/175.otp_ctrl_init_fail.2768669464
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/175.otp_ctrl_parallel_lc_esc.103242502
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/176.otp_ctrl_init_fail.3154155902
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/176.otp_ctrl_parallel_lc_esc.3948917655
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/177.otp_ctrl_init_fail.2285207319
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/177.otp_ctrl_parallel_lc_esc.1880421162
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/178.otp_ctrl_init_fail.234609900
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/178.otp_ctrl_parallel_lc_esc.1477995632
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/179.otp_ctrl_init_fail.1158672685
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/179.otp_ctrl_parallel_lc_esc.2044525949
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_alert_test.3955146103
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_check_fail.2040763925
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_errs.2242576236
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_lock.139552394
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.2530711693
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_macro_errs.3804271211
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_key_req.240744697
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_esc.3935135250
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_req.1704669168
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_regwen.1082763091
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.3946910438
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_stress_all.3410705597
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_test_access.219342417
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/180.otp_ctrl_init_fail.3124283751
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/180.otp_ctrl_parallel_lc_esc.1921398516
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/181.otp_ctrl_init_fail.3671527143
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/181.otp_ctrl_parallel_lc_esc.540658386
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/182.otp_ctrl_init_fail.3111779365
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/182.otp_ctrl_parallel_lc_esc.3701033135
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/183.otp_ctrl_parallel_lc_esc.278825920
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/184.otp_ctrl_init_fail.589398628
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/184.otp_ctrl_parallel_lc_esc.2492584370
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/185.otp_ctrl_init_fail.2056864759
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/185.otp_ctrl_parallel_lc_esc.2823195306
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/186.otp_ctrl_init_fail.3569537872
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/187.otp_ctrl_init_fail.1698358059
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/187.otp_ctrl_parallel_lc_esc.3216789880
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_init_fail.4168171811
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/188.otp_ctrl_parallel_lc_esc.1202416565
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_init_fail.3463466662
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/189.otp_ctrl_parallel_lc_esc.274296147
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_alert_test.1031095144
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_check_fail.1951938236
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_dai_errs.2058154104
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_dai_lock.4209776724
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.3888838554
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_key_req.1411207603
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_esc.3057442481
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_parallel_lc_req.2988987312
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_regwen.1834198163
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_smoke.526135763
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_test_access.299171320
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_init_fail.4063893277
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/190.otp_ctrl_parallel_lc_esc.3999069787
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/191.otp_ctrl_init_fail.3262259524
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/191.otp_ctrl_parallel_lc_esc.4011992614
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_init_fail.1401680529
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/192.otp_ctrl_parallel_lc_esc.3835946058
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_init_fail.3243730427
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/193.otp_ctrl_parallel_lc_esc.1874085014
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_init_fail.3341941722
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/194.otp_ctrl_parallel_lc_esc.1843369476
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_init_fail.1249146024
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/195.otp_ctrl_parallel_lc_esc.1941333547
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_init_fail.2225469384
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/196.otp_ctrl_parallel_lc_esc.160219169
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_init_fail.2962712900
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/197.otp_ctrl_parallel_lc_esc.1328217270
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_init_fail.3037599951
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/198.otp_ctrl_parallel_lc_esc.2912034236
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_init_fail.118583694
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/199.otp_ctrl_parallel_lc_esc.1177379229
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.484709000
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.961832628
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.1613975193
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3436359516
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.2754565559
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.2759633148
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.1791657476
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_sec_cm.3317932356
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.918164444
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_alert_test.2987619621
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_check_fail.1944510433
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_dai_errs.1821612463
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_dai_lock.3042071263
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_init_fail.1478733294
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_lc_esc.1252654311
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_parallel_lc_req.2304514623
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_smoke.2158009396
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_stress_all.584953078
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/20.otp_ctrl_test_access.2745983682
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/200.otp_ctrl_init_fail.2790778186
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/201.otp_ctrl_init_fail.2593667276
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/202.otp_ctrl_init_fail.3163578199
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/203.otp_ctrl_init_fail.500840879
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/204.otp_ctrl_init_fail.4238413056
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/205.otp_ctrl_init_fail.504631765
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/206.otp_ctrl_init_fail.449620455
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/207.otp_ctrl_init_fail.1569168921
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/208.otp_ctrl_init_fail.3411397698
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/209.otp_ctrl_init_fail.4213073007
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_alert_test.2084018527
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_check_fail.2315464680
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_dai_errs.1939145939
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_dai_lock.1421158692
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_init_fail.574808459
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_macro_errs.3590997273
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_parallel_key_req.1507983930
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_parallel_lc_esc.1052399132
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_parallel_lc_req.317422080
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_regwen.2856011444
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_smoke.2140178330
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_stress_all.3103126388
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/21.otp_ctrl_test_access.2873024748
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/210.otp_ctrl_init_fail.3183101313
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/212.otp_ctrl_init_fail.1507929894
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/213.otp_ctrl_init_fail.152506965
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/214.otp_ctrl_init_fail.393255874
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/215.otp_ctrl_init_fail.3271794158
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/217.otp_ctrl_init_fail.1845019793
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/218.otp_ctrl_init_fail.2692868756
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/219.otp_ctrl_init_fail.884782948
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_alert_test.4153206120
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_check_fail.335730417
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_dai_errs.1059127481
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_dai_lock.2410945838
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_macro_errs.3652374101
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_key_req.3923764598
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_lc_esc.3156533125
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_parallel_lc_req.2717065704
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_regwen.775677025
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_smoke.498027518
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_stress_all.3798523739
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_stress_all_with_rand_reset.3236646602
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/22.otp_ctrl_test_access.181108749
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/220.otp_ctrl_init_fail.3419602807
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/221.otp_ctrl_init_fail.2390091526
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/222.otp_ctrl_init_fail.4049392185
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/223.otp_ctrl_init_fail.3858896778
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/224.otp_ctrl_init_fail.327067425
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/225.otp_ctrl_init_fail.774212776
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/226.otp_ctrl_init_fail.3322226727
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/227.otp_ctrl_init_fail.1996870933
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/228.otp_ctrl_init_fail.2327901637
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/229.otp_ctrl_init_fail.3826713981
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_alert_test.838380764
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_check_fail.3204703618
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_dai_errs.2656423278
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_dai_lock.2580490614
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_init_fail.1146499194
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_macro_errs.2281105864
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_parallel_key_req.2568086047
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_parallel_lc_esc.1250712575
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_smoke.3128442136
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_stress_all.2437723176
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/23.otp_ctrl_test_access.2906503925
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/230.otp_ctrl_init_fail.3363393330
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/231.otp_ctrl_init_fail.3220961601
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/232.otp_ctrl_init_fail.1713327428
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/233.otp_ctrl_init_fail.3471096762
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/234.otp_ctrl_init_fail.424660733
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/235.otp_ctrl_init_fail.1233836259
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/236.otp_ctrl_init_fail.2051654017
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/237.otp_ctrl_init_fail.3243917640
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/238.otp_ctrl_init_fail.2945154494
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/239.otp_ctrl_init_fail.3853113059
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_alert_test.1836184565
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_check_fail.2475839651
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_dai_errs.689211035
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_dai_lock.2187522213
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_macro_errs.2708553214
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_parallel_key_req.3457870667
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_parallel_lc_esc.2802608745
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_parallel_lc_req.244788566
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_regwen.3505462536
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_smoke.386782150
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_stress_all.2037041750
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/24.otp_ctrl_test_access.4200482607
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/240.otp_ctrl_init_fail.486560115
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/241.otp_ctrl_init_fail.2126154960
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/242.otp_ctrl_init_fail.3759789788
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/243.otp_ctrl_init_fail.3857138314
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/244.otp_ctrl_init_fail.3998553338
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/245.otp_ctrl_init_fail.1262264851
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/246.otp_ctrl_init_fail.2906217627
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/247.otp_ctrl_init_fail.3768880419
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/248.otp_ctrl_init_fail.1788105661
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/249.otp_ctrl_init_fail.925093372
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_alert_test.2834373567
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_check_fail.1764050798
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_dai_errs.3033177354
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_dai_lock.2405816726
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_init_fail.3712557633
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_macro_errs.2387927438
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_parallel_key_req.1894750975
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_parallel_lc_esc.1984965667
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_parallel_lc_req.2186493707
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_regwen.2912896020
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_smoke.3500785011
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_stress_all.1956426892
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/25.otp_ctrl_test_access.1566384903
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/250.otp_ctrl_init_fail.2749017402
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/251.otp_ctrl_init_fail.3918065791
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/252.otp_ctrl_init_fail.2616614238
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/253.otp_ctrl_init_fail.1833499010
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/254.otp_ctrl_init_fail.817314449
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/255.otp_ctrl_init_fail.1367094630
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/256.otp_ctrl_init_fail.3368519279
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/257.otp_ctrl_init_fail.828539130
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/258.otp_ctrl_init_fail.2353426672
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/259.otp_ctrl_init_fail.1856953260
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_alert_test.2557473986
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_check_fail.3956816730
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_dai_errs.562706529
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_dai_lock.2151647794
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_init_fail.3491642251
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_macro_errs.107725498
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_parallel_key_req.1766369003
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_parallel_lc_esc.3941978298
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_parallel_lc_req.2731087033
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_regwen.844823611
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_smoke.519076006
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_stress_all.3800007509
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_stress_all_with_rand_reset.533467619
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/26.otp_ctrl_test_access.1810829068
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/260.otp_ctrl_init_fail.3293903610
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/261.otp_ctrl_init_fail.2778097365
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/263.otp_ctrl_init_fail.1236933745
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/264.otp_ctrl_init_fail.2364201227
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/265.otp_ctrl_init_fail.972618086
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/266.otp_ctrl_init_fail.3649698973
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/267.otp_ctrl_init_fail.317189554
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/268.otp_ctrl_init_fail.760668965
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/269.otp_ctrl_init_fail.352456779
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_alert_test.1460816707
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_check_fail.2392375511
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_dai_errs.3003486687
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_dai_lock.3051645361
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_init_fail.4179529060
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_macro_errs.3199257094
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_key_req.2048101765
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_lc_esc.1743902996
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_parallel_lc_req.1704271101
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_regwen.3509984139
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_smoke.720385893
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_stress_all_with_rand_reset.3358313192
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/27.otp_ctrl_test_access.1321431360
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/270.otp_ctrl_init_fail.4116525991
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/271.otp_ctrl_init_fail.3284802234
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/272.otp_ctrl_init_fail.4005441778
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/273.otp_ctrl_init_fail.499620455
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/274.otp_ctrl_init_fail.3306194338
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/275.otp_ctrl_init_fail.1714771756
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/276.otp_ctrl_init_fail.1588503692
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/277.otp_ctrl_init_fail.4050232019
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/278.otp_ctrl_init_fail.3957070444
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/279.otp_ctrl_init_fail.4117427436
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_alert_test.2194829328
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_check_fail.3858590644
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_dai_errs.4002612963
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_dai_lock.1815598380
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_init_fail.3416230681
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_macro_errs.2066926901
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_key_req.2432280146
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_parallel_lc_req.3359461959
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_regwen.2302592056
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_smoke.3294590625
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_stress_all.4096095985
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/28.otp_ctrl_test_access.4123638229
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/280.otp_ctrl_init_fail.2525886520
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/281.otp_ctrl_init_fail.3514550557
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/282.otp_ctrl_init_fail.2357907283
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/283.otp_ctrl_init_fail.562415322
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/284.otp_ctrl_init_fail.4210376299
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/285.otp_ctrl_init_fail.1524300212
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/286.otp_ctrl_init_fail.2738889042
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/287.otp_ctrl_init_fail.1409551583
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/288.otp_ctrl_init_fail.1005869174
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/289.otp_ctrl_init_fail.2630458906
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_alert_test.3389935881
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_check_fail.3793861542
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_dai_errs.2285575183
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_dai_lock.3878938997
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_init_fail.994235060
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_macro_errs.3460705442
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_parallel_key_req.1760662625
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_parallel_lc_esc.498122066
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_parallel_lc_req.1778130485
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_regwen.1661055115
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_smoke.2335702526
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_stress_all.1629223322
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/29.otp_ctrl_test_access.3660111115
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/290.otp_ctrl_init_fail.644791512
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/291.otp_ctrl_init_fail.3108006795
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/292.otp_ctrl_init_fail.4058209302
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/293.otp_ctrl_init_fail.3244971493
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/294.otp_ctrl_init_fail.1179939441
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/295.otp_ctrl_init_fail.3385639600
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/296.otp_ctrl_init_fail.2107899267
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/297.otp_ctrl_init_fail.3649901789
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/298.otp_ctrl_init_fail.250638520
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/299.otp_ctrl_init_fail.394813461
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.1559038842
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.2344309429
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.924673182
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.665890343
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.4078373419
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.172938415
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.3931263914
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.3020184928
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.3964081283
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.3543243293
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_sec_cm.1529913790
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.1762145402
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.1907995765
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_alert_test.3785511993
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_check_fail.1089917880
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_dai_errs.1349361084
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_dai_lock.35146453
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_init_fail.2725944027
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_macro_errs.543507363
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_parallel_key_req.1843800950
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_parallel_lc_esc.3426465974
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_parallel_lc_req.1467667482
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_regwen.167178184
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_smoke.108374528
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_stress_all.1720074136
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_stress_all_with_rand_reset.2383638982
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/30.otp_ctrl_test_access.1007818590
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_alert_test.304370772
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_check_fail.3510454471
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_dai_errs.1266018038
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_dai_lock.223099358
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_init_fail.3580233856
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_macro_errs.502388282
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_parallel_key_req.1136410819
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_parallel_lc_esc.1314919241
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_parallel_lc_req.478821211
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_regwen.2064450135
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_smoke.3847720532
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_stress_all.1060629572
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_stress_all_with_rand_reset.831065402
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/31.otp_ctrl_test_access.632767888
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_alert_test.1138995062
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_check_fail.2467856264
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_dai_errs.461820444
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_dai_lock.3383822560
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_init_fail.1698215559
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_macro_errs.2591704022
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_parallel_key_req.1947325257
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_parallel_lc_esc.4153428682
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_parallel_lc_req.3436014273
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_regwen.1988160644
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_smoke.254752086
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_stress_all.1822681409
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/32.otp_ctrl_test_access.3503483311
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_alert_test.456822688
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_check_fail.3294146848
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_dai_errs.2886673517
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_dai_lock.1272317588
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_init_fail.2921791216
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_macro_errs.2809855301
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_parallel_key_req.2412213511
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_parallel_lc_esc.2791644670
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_parallel_lc_req.3445646494
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_regwen.716596059
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_smoke.1966933424
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_stress_all.1112458551
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/33.otp_ctrl_test_access.2900021789
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_alert_test.2904238140
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_dai_errs.2665361188
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_dai_lock.3808650353
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_init_fail.3751200958
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_macro_errs.2340584225
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_key_req.1321277754
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_lc_esc.638415832
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_parallel_lc_req.4099295744
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_regwen.2546345384
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_smoke.3152930113
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_stress_all.3717016929
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/34.otp_ctrl_test_access.2537664595
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_alert_test.2944237958
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_check_fail.923638644
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_dai_errs.654068819
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_dai_lock.3650754429
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_init_fail.722394456
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_macro_errs.848180707
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_parallel_key_req.1833152906
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_parallel_lc_esc.607782051
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_parallel_lc_req.234848251
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_regwen.997726055
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_smoke.3868734452
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_stress_all.2688818636
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/35.otp_ctrl_test_access.780902152
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_alert_test.1255134225
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_check_fail.147308749
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_dai_errs.3515561673
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_dai_lock.526469417
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_init_fail.3131823402
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_macro_errs.1001154755
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_parallel_key_req.467598764
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_parallel_lc_esc.120421568
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_parallel_lc_req.1746632958
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_smoke.1504160759
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_stress_all.108595026
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/36.otp_ctrl_test_access.69652761
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_alert_test.2014852467
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_check_fail.2698421902
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_dai_errs.2938169047
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_dai_lock.1700161232
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_init_fail.3510503621
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_macro_errs.3627047779
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_parallel_key_req.280009841
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_parallel_lc_esc.4277694111
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_parallel_lc_req.1501141679
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_regwen.267647821
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_smoke.3181944145
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_stress_all.2947262543
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/37.otp_ctrl_test_access.2855587439
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_alert_test.1177223071
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_check_fail.1763553194
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_dai_errs.1688069867
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_init_fail.1451621772
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_macro_errs.1306217404
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_parallel_key_req.1106249970
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_parallel_lc_esc.383941809
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_parallel_lc_req.4240705498
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_regwen.17093229
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_smoke.4016179701
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_stress_all.2771812478
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/38.otp_ctrl_test_access.2697579715
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_alert_test.2759175412
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_check_fail.3239607384
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_dai_errs.236494675
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_dai_lock.1238537821
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_init_fail.2170828888
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_macro_errs.2032574824
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_parallel_key_req.2146967655
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_parallel_lc_esc.3478103055
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_parallel_lc_req.2580552075
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_regwen.509522301
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_smoke.3053305780
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_stress_all.865291918
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/39.otp_ctrl_test_access.328050495
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.28791024
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.654776067
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.3563425312
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.3272697190
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.1283086191
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.3390584364
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.4191924421
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.1694601972
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.931994057
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.2907630548
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.3377094380
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.3588692687
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_alert_test.82640961
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_check_fail.1923247326
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_dai_errs.901090422
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_dai_lock.1861975822
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_init_fail.1595771637
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_macro_errs.275844286
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_parallel_key_req.2245219230
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_parallel_lc_esc.141871939
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_parallel_lc_req.348351898
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_regwen.1246811949
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_smoke.1885862357
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_stress_all.1570212553
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_stress_all_with_rand_reset.1667564511
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/40.otp_ctrl_test_access.2754896147
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_alert_test.1947371396
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_check_fail.297934829
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_dai_errs.2087039190
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_dai_lock.638181219
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_init_fail.2686831645
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_macro_errs.639387584
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_parallel_key_req.1294102585
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_parallel_lc_esc.112352875
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_parallel_lc_req.2732441781
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_regwen.4009041747
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_smoke.563351556
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_stress_all.3474622827
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/41.otp_ctrl_test_access.1695723221
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_alert_test.852185508
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_check_fail.2193536004
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_dai_errs.1902931220
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_dai_lock.1610413358
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_init_fail.4236702796
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_macro_errs.3348295140
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_parallel_key_req.2042008821
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_parallel_lc_req.54394487
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_regwen.739152081
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_smoke.2223979049
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/42.otp_ctrl_test_access.2441238810
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_alert_test.1224469546
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_check_fail.3798003463
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_dai_errs.4103841607
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_dai_lock.3944989886
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_init_fail.849211684
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_macro_errs.3785514017
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_parallel_key_req.1980308813
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_parallel_lc_esc.4225268416
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_parallel_lc_req.906451035
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_regwen.426551652
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_smoke.4236435566
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_stress_all.4030568334
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_stress_all_with_rand_reset.767478915
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/43.otp_ctrl_test_access.852309122
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_alert_test.2307394957
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_check_fail.2994820801
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_dai_errs.2127412102
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_dai_lock.1597095796
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_init_fail.896009304
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_macro_errs.948741770
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_key_req.1498540571
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_lc_esc.3775159804
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_parallel_lc_req.780890365
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_regwen.948087636
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_smoke.1820980839
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_stress_all.2754526115
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/44.otp_ctrl_test_access.3095534947
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_alert_test.2175538951
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_dai_errs.4204728029
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_dai_lock.1657948871
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_macro_errs.562265170
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_parallel_key_req.3546302101
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_parallel_lc_esc.1677106417
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_parallel_lc_req.4025647200
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_regwen.4057517482
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_smoke.4228378859
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_stress_all.1787890793
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/45.otp_ctrl_test_access.509653941
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_alert_test.1185940194
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_check_fail.384850782
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_dai_errs.2482377765
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_dai_lock.3295917732
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_init_fail.1372119788
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_macro_errs.387559959
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_parallel_key_req.2035264847
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_parallel_lc_esc.56380586
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_parallel_lc_req.283197961
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_regwen.2345623676
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_smoke.599435232
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_stress_all.2984451078
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/46.otp_ctrl_test_access.1199518318
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_alert_test.129890011
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_check_fail.3427253120
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_dai_errs.1487603422
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_dai_lock.1971521370
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_init_fail.941283895
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_macro_errs.2037867299
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_parallel_key_req.836819436
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_parallel_lc_esc.2190870256
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_parallel_lc_req.1245211812
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_regwen.2921551562
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_smoke.3403880360
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/47.otp_ctrl_test_access.578513533
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_alert_test.1303793282
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_check_fail.1398420315
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_dai_errs.301450676
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_dai_lock.1247929772
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_init_fail.3462469513
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_macro_errs.816099002
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_parallel_key_req.2972799192
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_parallel_lc_esc.2409310499
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_parallel_lc_req.3483643928
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_regwen.2469020892
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_smoke.1604630922
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_stress_all.3718069450
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/48.otp_ctrl_test_access.1025538078
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_alert_test.2029060812
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_check_fail.115221649
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_dai_errs.3025555231
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_dai_lock.311161595
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_init_fail.1842217293
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_macro_errs.259130843
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_parallel_key_req.3857310281
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_parallel_lc_esc.1473711242
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_parallel_lc_req.1929565715
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_regwen.4199663128
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_smoke.4045636621
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_stress_all.4090062446
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/49.otp_ctrl_test_access.2386414730
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.3127323567
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.2340520442
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.3384646459
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.3132815862
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.3159106257
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.57703128
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.3885808547
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.430532254
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.2700465931
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.1260191869
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.817333400
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_init_fail.3471403426
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_parallel_lc_esc.4197766609
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/50.otp_ctrl_stress_all_with_rand_reset.1667748663
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/51.otp_ctrl_init_fail.2302202446
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/51.otp_ctrl_parallel_lc_esc.3611499483
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/51.otp_ctrl_stress_all_with_rand_reset.107478132
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/52.otp_ctrl_init_fail.864765249
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/52.otp_ctrl_parallel_lc_esc.277982406
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_init_fail.3165831572
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/53.otp_ctrl_parallel_lc_esc.2063836014
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/54.otp_ctrl_init_fail.1479155380
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/54.otp_ctrl_parallel_lc_esc.2814767647
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/54.otp_ctrl_stress_all_with_rand_reset.225343971
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/55.otp_ctrl_init_fail.1702033907
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/55.otp_ctrl_parallel_lc_esc.1008032576
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/55.otp_ctrl_stress_all_with_rand_reset.172061133
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/56.otp_ctrl_init_fail.2792487477
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/56.otp_ctrl_parallel_lc_esc.855121550
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/56.otp_ctrl_stress_all_with_rand_reset.2095721876
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/57.otp_ctrl_init_fail.172431201
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/57.otp_ctrl_parallel_lc_esc.877631490
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/57.otp_ctrl_stress_all_with_rand_reset.247719918
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_init_fail.4268163591
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_parallel_lc_esc.3811270091
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/58.otp_ctrl_stress_all_with_rand_reset.2739154099
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/59.otp_ctrl_init_fail.1075948396
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/59.otp_ctrl_parallel_lc_esc.129519611
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.2389814648
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.1047424133
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.1459470942
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.3054416851
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.2576055863
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.2244327258
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.2334351747
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.2637694580
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.2696370826
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all_with_rand_reset.2314000204
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.2943620303
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/60.otp_ctrl_init_fail.4065990651
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/60.otp_ctrl_parallel_lc_esc.1864309572
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/61.otp_ctrl_init_fail.586885439
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/61.otp_ctrl_parallel_lc_esc.237175516
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/62.otp_ctrl_init_fail.1065302142
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/62.otp_ctrl_parallel_lc_esc.2723702969
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/63.otp_ctrl_init_fail.1931743414
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/63.otp_ctrl_parallel_lc_esc.1360439804
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/63.otp_ctrl_stress_all_with_rand_reset.239821160
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_init_fail.2682171203
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/64.otp_ctrl_stress_all_with_rand_reset.2915451650
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/65.otp_ctrl_init_fail.3921681451
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/65.otp_ctrl_parallel_lc_esc.2793039816
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/65.otp_ctrl_stress_all_with_rand_reset.969783744
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_init_fail.3735366128
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/66.otp_ctrl_parallel_lc_esc.1992445141
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/67.otp_ctrl_init_fail.3516864944
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/67.otp_ctrl_parallel_lc_esc.577058904
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_init_fail.3289808280
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/68.otp_ctrl_parallel_lc_esc.2208604277
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/69.otp_ctrl_init_fail.3690457725
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/69.otp_ctrl_parallel_lc_esc.2709996214
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.944348941
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.3806519862
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.1295325664
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.2633252144
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.2774462957
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.1338371929
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.570412326
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.3287660185
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.2829865316
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.3221465030
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2947736349
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/70.otp_ctrl_init_fail.1536446637
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/70.otp_ctrl_parallel_lc_esc.780521074
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/71.otp_ctrl_init_fail.3756763793
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/71.otp_ctrl_parallel_lc_esc.3976678985
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/72.otp_ctrl_init_fail.4017298275
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/72.otp_ctrl_parallel_lc_esc.2106863704
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/72.otp_ctrl_stress_all_with_rand_reset.3211471282
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/73.otp_ctrl_init_fail.3287102572
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/73.otp_ctrl_parallel_lc_esc.2471271947
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/73.otp_ctrl_stress_all_with_rand_reset.1471238255
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/74.otp_ctrl_init_fail.2283204033
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/74.otp_ctrl_parallel_lc_esc.1984945895
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/74.otp_ctrl_stress_all_with_rand_reset.1306055817
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/75.otp_ctrl_init_fail.329810456
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/75.otp_ctrl_parallel_lc_esc.3902936785
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/76.otp_ctrl_init_fail.3186119310
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/76.otp_ctrl_parallel_lc_esc.1752403318
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/77.otp_ctrl_init_fail.447167241
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/77.otp_ctrl_parallel_lc_esc.1484258521
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_init_fail.148665042
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_parallel_lc_esc.21572030
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/78.otp_ctrl_stress_all_with_rand_reset.3202608794
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_init_fail.2310557351
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_parallel_lc_esc.1951786572
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/79.otp_ctrl_stress_all_with_rand_reset.4287830057
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.1462471332
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.533566096
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.129998025
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.610286375
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.330736790
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.3965964224
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.1775837285
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.171068650
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.812140414
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.57730299
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_init_fail.3384320964
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_parallel_lc_esc.1860632260
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/80.otp_ctrl_stress_all_with_rand_reset.544545093
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_init_fail.1720221170
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/81.otp_ctrl_parallel_lc_esc.3520157378
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_init_fail.1041168175
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/82.otp_ctrl_parallel_lc_esc.1293553121
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_init_fail.988731018
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_parallel_lc_esc.911441363
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/83.otp_ctrl_stress_all_with_rand_reset.2950045817
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_init_fail.230977590
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_parallel_lc_esc.3168418921
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/84.otp_ctrl_stress_all_with_rand_reset.1952815508
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_init_fail.401991308
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/85.otp_ctrl_parallel_lc_esc.3948558628
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_init_fail.1567091471
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/86.otp_ctrl_parallel_lc_esc.4174092162
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_init_fail.2685769203
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_parallel_lc_esc.3357993012
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/87.otp_ctrl_stress_all_with_rand_reset.1605212498
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_init_fail.29113692
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/88.otp_ctrl_parallel_lc_esc.2419912462
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_init_fail.991492114
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/89.otp_ctrl_parallel_lc_esc.2034776875
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.3521221091
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.2310681593
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.2575299333
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.53408613
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.4023770642
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.2563876915
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.829721524
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.1055823320
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.1331886395
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.2717859630
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.944905870
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_init_fail.87517216
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_parallel_lc_esc.2228469514
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/90.otp_ctrl_stress_all_with_rand_reset.1740173678
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_init_fail.3180946685
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/91.otp_ctrl_parallel_lc_esc.1752813317
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_init_fail.604730362
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/92.otp_ctrl_parallel_lc_esc.2321737099
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_init_fail.4100517749
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/93.otp_ctrl_parallel_lc_esc.2853846538
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_init_fail.3170860612
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/94.otp_ctrl_parallel_lc_esc.3370106966
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_init_fail.463972171
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/95.otp_ctrl_parallel_lc_esc.2715237983
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_init_fail.2014637600
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_parallel_lc_esc.3853411589
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/96.otp_ctrl_stress_all_with_rand_reset.2082121896
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_init_fail.2613966137
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_parallel_lc_esc.538355780
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/97.otp_ctrl_stress_all_with_rand_reset.4174256912
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_init_fail.645883816
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/98.otp_ctrl_parallel_lc_esc.4053577564
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_init_fail.2922230675
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_parallel_lc_esc.3453807530
/workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/99.otp_ctrl_stress_all_with_rand_reset.2768228972



Total test records in report: 1282
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_wake_up.2661089642 Oct 03 06:28:54 AM UTC 24 Oct 03 06:28:58 AM UTC 24 192262978 ps
T2 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_init_fail.1159258341 Oct 03 06:28:56 AM UTC 24 Oct 03 06:29:01 AM UTC 24 187675044 ps
T3 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_smoke.4254000995 Oct 03 06:28:54 AM UTC 24 Oct 03 06:29:05 AM UTC 24 1030577161 ps
T4 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_check_fail.5854794 Oct 03 06:28:56 AM UTC 24 Oct 03 06:29:09 AM UTC 24 405238536 ps
T6 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_esc.4109538576 Oct 03 06:28:56 AM UTC 24 Oct 03 06:29:09 AM UTC 24 470637176 ps
T7 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_alert_test.2465974310 Oct 03 06:29:07 AM UTC 24 Oct 03 06:29:10 AM UTC 24 567089384 ps
T22 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_low_freq_read.1538482603 Oct 03 06:28:54 AM UTC 24 Oct 03 06:29:11 AM UTC 24 3022549622 ps
T5 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_test_access.2978187800 Oct 03 06:29:01 AM UTC 24 Oct 03 06:29:12 AM UTC 24 302232964 ps
T23 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_init_fail.1323792962 Oct 03 06:29:09 AM UTC 24 Oct 03 06:29:14 AM UTC 24 150474455 ps
T24 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_regwen.2090837532 Oct 03 06:28:59 AM UTC 24 Oct 03 06:29:14 AM UTC 24 2742711901 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_smoke.3859081642 Oct 03 06:29:09 AM UTC 24 Oct 03 06:29:16 AM UTC 24 3000018987 ps
T15 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_lock.3713677302 Oct 03 06:28:56 AM UTC 24 Oct 03 06:29:19 AM UTC 24 2225021958 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_dai_errs.2401142362 Oct 03 06:28:56 AM UTC 24 Oct 03 06:29:20 AM UTC 24 988533784 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_lock.3702655077 Oct 03 06:29:12 AM UTC 24 Oct 03 06:29:21 AM UTC 24 931129078 ps
T119 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_regwen.3887180682 Oct 03 06:29:18 AM UTC 24 Oct 03 06:29:22 AM UTC 24 364892200 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_esc.915960895 Oct 03 06:29:11 AM UTC 24 Oct 03 06:29:23 AM UTC 24 336057515 ps
T25 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_stress_all.184484031 Oct 03 06:29:02 AM UTC 24 Oct 03 06:29:23 AM UTC 24 3749393093 ps
T8 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_alert_test.4060944888 Oct 03 06:29:24 AM UTC 24 Oct 03 06:29:28 AM UTC 24 97535714 ps
T120 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_partition_walk.1472632888 Oct 03 06:28:54 AM UTC 24 Oct 03 06:29:31 AM UTC 24 5085690396 ps
T85 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_lc_req.297050431 Oct 03 06:28:56 AM UTC 24 Oct 03 06:29:31 AM UTC 24 6782017546 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_macro_errs.72436872 Oct 03 06:28:57 AM UTC 24 Oct 03 06:29:32 AM UTC 24 911275952 ps
T125 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_macro_errs.2496385867 Oct 03 06:29:15 AM UTC 24 Oct 03 06:29:34 AM UTC 24 3167166056 ps
T128 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_init_fail.613793141 Oct 03 06:29:27 AM UTC 24 Oct 03 06:29:35 AM UTC 24 472045082 ps
T88 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_lc_req.209105264 Oct 03 06:29:11 AM UTC 24 Oct 03 06:29:38 AM UTC 24 1118800329 ps
T126 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_smoke.1541696719 Oct 03 06:29:25 AM UTC 24 Oct 03 06:29:38 AM UTC 24 313443623 ps
T9 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_test_access.2551108032 Oct 03 06:29:20 AM UTC 24 Oct 03 06:29:40 AM UTC 24 2716703718 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all.1849045647 Oct 03 06:29:23 AM UTC 24 Oct 03 06:29:41 AM UTC 24 908789607 ps
T115 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_parallel_key_req.2482162481 Oct 03 06:29:16 AM UTC 24 Oct 03 06:29:41 AM UTC 24 1474379138 ps
T93 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_background_chks.961832628 Oct 03 06:29:29 AM UTC 24 Oct 03 06:29:44 AM UTC 24 491837063 ps
T10 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_stress_all.260636896 Oct 03 06:30:02 AM UTC 24 Oct 03 06:30:43 AM UTC 24 1128586172 ps
T94 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_background_chks.1955423015 Oct 03 06:29:09 AM UTC 24 Oct 03 06:29:45 AM UTC 24 3183879257 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_check_fail.2123691444 Oct 03 06:29:14 AM UTC 24 Oct 03 06:29:48 AM UTC 24 4290899280 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_req.2759633148 Oct 03 06:29:32 AM UTC 24 Oct 03 06:29:49 AM UTC 24 908568243 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_alert_test.484709000 Oct 03 06:29:46 AM UTC 24 Oct 03 06:29:50 AM UTC 24 43442444 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_regwen.1791657476 Oct 03 06:29:43 AM UTC 24 Oct 03 06:29:53 AM UTC 24 2069570231 ps
T97 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_lc_esc.2456962378 Oct 03 06:29:33 AM UTC 24 Oct 03 06:29:54 AM UTC 24 1156607803 ps
T26 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_dai_errs.3505419020 Oct 03 06:29:13 AM UTC 24 Oct 03 06:29:56 AM UTC 24 4319569806 ps
T130 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_init_fail.4078373419 Oct 03 06:29:50 AM UTC 24 Oct 03 06:29:57 AM UTC 24 207379633 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_check_fail.645340244 Oct 03 06:29:36 AM UTC 24 Oct 03 06:29:57 AM UTC 24 858444989 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_smoke.1762145402 Oct 03 06:29:50 AM UTC 24 Oct 03 06:29:59 AM UTC 24 314530501 ps
T117 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_background_chks.2217781994 Oct 03 06:28:56 AM UTC 24 Oct 03 06:30:00 AM UTC 24 3069174880 ps
T122 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_test_access.918164444 Oct 03 06:29:43 AM UTC 24 Oct 03 06:30:00 AM UTC 24 4204205206 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_lock.2456505084 Oct 03 06:29:34 AM UTC 24 Oct 03 06:30:04 AM UTC 24 1542345080 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_esc.3020184928 Oct 03 06:29:52 AM UTC 24 Oct 03 06:30:04 AM UTC 24 1083812906 ps
T124 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_background_chks.400624390 Oct 03 06:30:09 AM UTC 24 Oct 03 06:30:41 AM UTC 24 937900728 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_macro_errs.3436359516 Oct 03 06:29:40 AM UTC 24 Oct 03 06:30:06 AM UTC 24 14198377597 ps
T27 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_dai_errs.1613975193 Oct 03 06:29:35 AM UTC 24 Oct 03 06:30:07 AM UTC 24 3597005067 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_alert_test.1559038842 Oct 03 06:30:05 AM UTC 24 Oct 03 06:30:09 AM UTC 24 96844399 ps
T118 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_lc_req.3964081283 Oct 03 06:29:52 AM UTC 24 Oct 03 06:30:11 AM UTC 24 482007005 ps
T282 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_regwen.3543243293 Oct 03 06:29:59 AM UTC 24 Oct 03 06:30:13 AM UTC 24 501007179 ps
T139 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_parallel_key_req.2754565559 Oct 03 06:29:40 AM UTC 24 Oct 03 06:30:13 AM UTC 24 3077086430 ps
T58 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_init_fail.2023206103 Oct 03 06:30:07 AM UTC 24 Oct 03 06:30:14 AM UTC 24 271380780 ps
T140 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_background_chks.2344309429 Oct 03 06:29:50 AM UTC 24 Oct 03 06:30:14 AM UTC 24 2091776406 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_smoke.2907630548 Oct 03 06:30:07 AM UTC 24 Oct 03 06:30:15 AM UTC 24 320380303 ps
T201 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_parallel_key_req.2367436600 Oct 03 06:28:59 AM UTC 24 Oct 03 06:30:15 AM UTC 24 23255484078 ps
T478 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_check_fail.654776067 Oct 03 06:30:16 AM UTC 24 Oct 03 06:30:23 AM UTC 24 158082045 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_req.1694601972 Oct 03 06:30:10 AM UTC 24 Oct 03 06:30:23 AM UTC 24 278125412 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_macro_errs.172938415 Oct 03 06:29:57 AM UTC 24 Oct 03 06:30:23 AM UTC 24 778942319 ps
T228 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_parallel_key_req.3931263914 Oct 03 06:29:59 AM UTC 24 Oct 03 06:30:24 AM UTC 24 4680580608 ps
T252 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_errs.924673182 Oct 03 06:29:54 AM UTC 24 Oct 03 06:30:26 AM UTC 24 823555031 ps
T401 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_regwen.931994057 Oct 03 06:30:16 AM UTC 24 Oct 03 06:30:26 AM UTC 24 307027524 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_lc_esc.4191924421 Oct 03 06:30:10 AM UTC 24 Oct 03 06:30:26 AM UTC 24 413880618 ps
T479 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_alert_test.28791024 Oct 03 06:30:25 AM UTC 24 Oct 03 06:30:29 AM UTC 24 120269223 ps
T253 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_macro_errs.1283086191 Oct 03 06:30:16 AM UTC 24 Oct 03 06:30:29 AM UTC 24 1211693996 ps
T34 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_check_fail.1714963979 Oct 03 06:29:56 AM UTC 24 Oct 03 06:30:33 AM UTC 24 2374087908 ps
T148 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_test_access.3588692687 Oct 03 06:30:16 AM UTC 24 Oct 03 06:30:33 AM UTC 24 1554483006 ps
T144 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_parallel_key_req.3390584364 Oct 03 06:30:16 AM UTC 24 Oct 03 06:30:36 AM UTC 24 703436601 ps
T145 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_dai_lock.665890343 Oct 03 06:29:52 AM UTC 24 Oct 03 06:30:37 AM UTC 24 3770331833 ps
T49 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_init_fail.1992142736 Oct 03 06:30:28 AM UTC 24 Oct 03 06:30:38 AM UTC 24 1708473127 ps
T259 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_smoke.817333400 Oct 03 06:30:25 AM UTC 24 Oct 03 06:30:41 AM UTC 24 628181349 ps
T403 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_regwen.1260191869 Oct 03 06:30:39 AM UTC 24 Oct 03 06:30:45 AM UTC 24 149598239 ps
T237 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_esc.430532254 Oct 03 06:30:30 AM UTC 24 Oct 03 06:30:45 AM UTC 24 793173740 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_alert_test.3127323567 Oct 03 06:30:45 AM UTC 24 Oct 03 06:30:49 AM UTC 24 99940248 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_lock.3272697190 Oct 03 06:30:12 AM UTC 24 Oct 03 06:30:51 AM UTC 24 6187733133 ps
T229 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_background_chks.2340520442 Oct 03 06:30:28 AM UTC 24 Oct 03 06:30:52 AM UTC 24 1891737042 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_init_fail.3054416851 Oct 03 06:30:46 AM UTC 24 Oct 03 06:30:53 AM UTC 24 174048490 ps
T389 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_macro_errs.57703128 Oct 03 06:30:37 AM UTC 24 Oct 03 06:30:54 AM UTC 24 794971825 ps
T415 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_key_req.3885808547 Oct 03 06:30:39 AM UTC 24 Oct 03 06:30:59 AM UTC 24 1057205753 ps
T480 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_smoke.2696370826 Oct 03 06:30:46 AM UTC 24 Oct 03 06:31:00 AM UTC 24 894363920 ps
T202 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_lock.3159106257 Oct 03 06:30:30 AM UTC 24 Oct 03 06:31:02 AM UTC 24 2052557194 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/3.otp_ctrl_test_access.1907995765 Oct 03 06:30:00 AM UTC 24 Oct 03 06:31:02 AM UTC 24 2094626072 ps
T142 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_background_chks.1880358859 Oct 03 06:30:50 AM UTC 24 Oct 03 06:31:05 AM UTC 24 579341157 ps
T203 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_stress_all.567232513 Oct 03 06:29:43 AM UTC 24 Oct 03 06:31:07 AM UTC 24 8421054008 ps
T209 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_dai_errs.3563425312 Oct 03 06:30:14 AM UTC 24 Oct 03 06:31:07 AM UTC 24 4290328234 ps
T37 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_check_fail.3384646459 Oct 03 06:30:36 AM UTC 24 Oct 03 06:31:09 AM UTC 24 1420646247 ps
T422 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_lock.1459470942 Oct 03 06:30:54 AM UTC 24 Oct 03 06:31:09 AM UTC 24 461630740 ps
T385 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_dai_errs.3132815862 Oct 03 06:30:36 AM UTC 24 Oct 03 06:31:10 AM UTC 24 1127469501 ps
T11 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all_with_rand_reset.3377094380 Oct 03 06:30:18 AM UTC 24 Oct 03 06:31:10 AM UTC 24 1813182329 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_key_req.1183069461 Oct 03 06:32:29 AM UTC 24 Oct 03 06:32:47 AM UTC 24 4074103862 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_test_access.2943620303 Oct 03 06:31:02 AM UTC 24 Oct 03 06:31:11 AM UTC 24 236412760 ps
T300 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_alert_test.2389814648 Oct 03 06:31:09 AM UTC 24 Oct 03 06:31:12 AM UTC 24 635183317 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_regwen.2637694580 Oct 03 06:31:01 AM UTC 24 Oct 03 06:31:12 AM UTC 24 3448717311 ps
T306 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_key_req.2244327258 Oct 03 06:31:00 AM UTC 24 Oct 03 06:31:13 AM UTC 24 425269670 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_parallel_lc_req.2700465931 Oct 03 06:30:28 AM UTC 24 Oct 03 06:31:15 AM UTC 24 10724248833 ps
T207 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_macro_errs.2576055863 Oct 03 06:31:00 AM UTC 24 Oct 03 06:31:15 AM UTC 24 317640209 ps
T141 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_esc.2334351747 Oct 03 06:30:54 AM UTC 24 Oct 03 06:31:16 AM UTC 24 592189255 ps
T225 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_test_access.2728661408 Oct 03 06:30:41 AM UTC 24 Oct 03 06:31:17 AM UTC 24 1403923134 ps
T61 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_init_fail.1058880124 Oct 03 06:31:11 AM UTC 24 Oct 03 06:31:18 AM UTC 24 216160341 ps
T481 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_smoke.3221465030 Oct 03 06:31:09 AM UTC 24 Oct 03 06:31:18 AM UTC 24 528008079 ps
T482 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_alert_test.944348941 Oct 03 06:31:19 AM UTC 24 Oct 03 06:31:23 AM UTC 24 910498158 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_req.2829865316 Oct 03 06:31:14 AM UTC 24 Oct 03 06:31:24 AM UTC 24 924881102 ps
T383 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_errs.2633252144 Oct 03 06:31:14 AM UTC 24 Oct 03 06:31:24 AM UTC 24 236717594 ps
T483 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_smoke.812140414 Oct 03 06:31:19 AM UTC 24 Oct 03 06:31:26 AM UTC 24 153950844 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_lc_esc.3287660185 Oct 03 06:31:14 AM UTC 24 Oct 03 06:31:27 AM UTC 24 629181757 ps
T226 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_parallel_lc_req.4214500018 Oct 03 06:30:54 AM UTC 24 Oct 03 06:31:28 AM UTC 24 1300987981 ps
T214 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_macro_errs.1338371929 Oct 03 06:31:14 AM UTC 24 Oct 03 06:31:28 AM UTC 24 465923739 ps
T164 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_init_fail.3965964224 Oct 03 06:31:25 AM UTC 24 Oct 03 06:31:31 AM UTC 24 107392393 ps
T143 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_background_chks.3806519862 Oct 03 06:31:11 AM UTC 24 Oct 03 06:31:32 AM UTC 24 3210368719 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_test_access.2947736349 Oct 03 06:31:17 AM UTC 24 Oct 03 06:31:33 AM UTC 24 1794560751 ps
T484 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_check_fail.129998025 Oct 03 06:31:29 AM UTC 24 Oct 03 06:31:34 AM UTC 24 96457498 ps
T374 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_regwen.363409884 Oct 03 06:31:17 AM UTC 24 Oct 03 06:31:36 AM UTC 24 1123993983 ps
T213 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_esc.2375114786 Oct 03 06:31:27 AM UTC 24 Oct 03 06:31:38 AM UTC 24 498486595 ps
T38 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_check_fail.1295325664 Oct 03 06:31:14 AM UTC 24 Oct 03 06:31:38 AM UTC 24 1869005546 ps
T485 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_dai_lock.2774462957 Oct 03 06:31:14 AM UTC 24 Oct 03 06:31:38 AM UTC 24 2389084654 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_alert_test.1462471332 Oct 03 06:31:38 AM UTC 24 Oct 03 06:31:43 AM UTC 24 135306284 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_init_fail.2812706769 Oct 03 06:31:40 AM UTC 24 Oct 03 06:31:46 AM UTC 24 108314028 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_lc_req.1775837285 Oct 03 06:31:25 AM UTC 24 Oct 03 06:31:49 AM UTC 24 2875413115 ps
T194 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_smoke.2717859630 Oct 03 06:31:39 AM UTC 24 Oct 03 06:31:52 AM UTC 24 264713082 ps
T195 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_regwen.171068650 Oct 03 06:31:35 AM UTC 24 Oct 03 06:31:54 AM UTC 24 1088245865 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_parallel_key_req.4229644306 Oct 03 06:31:34 AM UTC 24 Oct 03 06:31:56 AM UTC 24 1264598188 ps
T197 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_esc.1055823320 Oct 03 06:31:50 AM UTC 24 Oct 03 06:31:59 AM UTC 24 342585191 ps
T198 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_lock.4023770642 Oct 03 06:31:53 AM UTC 24 Oct 03 06:32:00 AM UTC 24 301097727 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_lc_req.3578383630 Oct 03 06:31:47 AM UTC 24 Oct 03 06:32:01 AM UTC 24 363493604 ps
T200 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_background_chks.533566096 Oct 03 06:31:25 AM UTC 24 Oct 03 06:32:02 AM UTC 24 3598569859 ps
T12 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_stress_all_with_rand_reset.150118233 Oct 03 06:29:22 AM UTC 24 Oct 03 06:32:06 AM UTC 24 3755827755 ps
T486 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_errs.610286375 Oct 03 06:31:29 AM UTC 24 Oct 03 06:32:06 AM UTC 24 1327556450 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_parallel_key_req.570412326 Oct 03 06:31:14 AM UTC 24 Oct 03 06:32:07 AM UTC 24 4394927916 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_macro_errs.2324406714 Oct 03 06:31:34 AM UTC 24 Oct 03 06:32:07 AM UTC 24 3568735599 ps
T218 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_test_access.944905870 Oct 03 06:32:01 AM UTC 24 Oct 03 06:32:07 AM UTC 24 371349391 ps
T219 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_test_access.57730299 Oct 03 06:31:35 AM UTC 24 Oct 03 06:32:08 AM UTC 24 2577199800 ps
T220 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_background_chks.2310681593 Oct 03 06:31:44 AM UTC 24 Oct 03 06:32:10 AM UTC 24 4035838362 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_alert_test.3521221091 Oct 03 06:32:07 AM UTC 24 Oct 03 06:32:10 AM UTC 24 160777382 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_macro_errs.2563876915 Oct 03 06:32:00 AM UTC 24 Oct 03 06:32:11 AM UTC 24 261918421 ps
T222 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_regwen.1331886395 Oct 03 06:32:01 AM UTC 24 Oct 03 06:32:17 AM UTC 24 442415040 ps
T223 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_dai_errs.53408613 Oct 03 06:31:56 AM UTC 24 Oct 03 06:32:19 AM UTC 24 603442270 ps
T186 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_init_fail.3485211536 Oct 03 06:32:10 AM UTC 24 Oct 03 06:32:20 AM UTC 24 1797963043 ps
T224 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_macro_errs.1076408863 Oct 03 06:32:11 AM UTC 24 Oct 03 06:32:20 AM UTC 24 828466946 ps
T19 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/0.otp_ctrl_sec_cm.2522478789 Oct 03 06:29:03 AM UTC 24 Oct 03 06:32:21 AM UTC 24 17241048376 ps
T227 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/5.otp_ctrl_stress_all.3929431595 Oct 03 06:30:43 AM UTC 24 Oct 03 06:32:21 AM UTC 24 13174570724 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_smoke.724571883 Oct 03 06:32:07 AM UTC 24 Oct 03 06:32:22 AM UTC 24 525961790 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_regwen.1444917556 Oct 03 06:32:12 AM UTC 24 Oct 03 06:32:22 AM UTC 24 301022519 ps
T82 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_check_fail.3278884830 Oct 03 06:30:58 AM UTC 24 Oct 03 06:32:23 AM UTC 24 12098274880 ps
T105 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_dai_lock.330736790 Oct 03 06:31:27 AM UTC 24 Oct 03 06:32:24 AM UTC 24 7937492309 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_alert_test.3375350890 Oct 03 06:32:20 AM UTC 24 Oct 03 06:32:24 AM UTC 24 110863486 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_esc.3972406333 Oct 03 06:32:10 AM UTC 24 Oct 03 06:32:27 AM UTC 24 1861104362 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_check_fail.3173555644 Oct 03 06:32:11 AM UTC 24 Oct 03 06:32:28 AM UTC 24 1428735609 ps
T109 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_parallel_key_req.829721524 Oct 03 06:32:00 AM UTC 24 Oct 03 06:32:28 AM UTC 24 806650962 ps
T110 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_dai_errs.1047424133 Oct 03 06:30:55 AM UTC 24 Oct 03 06:32:29 AM UTC 24 22504607897 ps
T111 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_lc_req.1155168507 Oct 03 06:32:10 AM UTC 24 Oct 03 06:32:29 AM UTC 24 665482837 ps
T112 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_init_fail.3169959380 Oct 03 06:32:26 AM UTC 24 Oct 03 06:32:33 AM UTC 24 152104619 ps
T113 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_check_fail.837096764 Oct 03 06:32:26 AM UTC 24 Oct 03 06:32:34 AM UTC 24 2433404866 ps
T487 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_smoke.2745936321 Oct 03 06:32:20 AM UTC 24 Oct 03 06:32:34 AM UTC 24 949273813 ps
T390 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_macro_errs.1427054163 Oct 03 06:32:26 AM UTC 24 Oct 03 06:32:36 AM UTC 24 551099550 ps
T488 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_alert_test.2611688709 Oct 03 06:32:32 AM UTC 24 Oct 03 06:32:36 AM UTC 24 48524209 ps
T435 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_test_access.376046373 Oct 03 06:32:12 AM UTC 24 Oct 03 06:32:37 AM UTC 24 1466923235 ps
T489 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_regwen.3969250957 Oct 03 06:32:29 AM UTC 24 Oct 03 06:32:39 AM UTC 24 706681210 ps
T419 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_lock.4216224171 Oct 03 06:32:10 AM UTC 24 Oct 03 06:32:39 AM UTC 24 720946956 ps
T187 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_init_fail.373797981 Oct 03 06:32:35 AM UTC 24 Oct 03 06:32:41 AM UTC 24 392997626 ps
T455 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/9.otp_ctrl_check_fail.2575299333 Oct 03 06:31:57 AM UTC 24 Oct 03 06:32:41 AM UTC 24 9370453332 ps
T134 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_esc.447299535 Oct 03 06:32:26 AM UTC 24 Oct 03 06:32:43 AM UTC 24 486995424 ps
T380 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_esc.3783518886 Oct 03 06:32:36 AM UTC 24 Oct 03 06:32:43 AM UTC 24 522620338 ps
T13 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/6.otp_ctrl_stress_all_with_rand_reset.2314000204 Oct 03 06:31:04 AM UTC 24 Oct 03 06:32:47 AM UTC 24 33322333873 ps
T418 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_parallel_key_req.883956159 Oct 03 06:32:12 AM UTC 24 Oct 03 06:32:48 AM UTC 24 3963296855 ps
T490 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_smoke.575135745 Oct 03 06:32:33 AM UTC 24 Oct 03 06:32:50 AM UTC 24 314292418 ps
T491 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_alert_test.2720303969 Oct 03 06:32:47 AM UTC 24 Oct 03 06:32:54 AM UTC 24 570617123 ps
T492 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_regwen.1390202347 Oct 03 06:32:43 AM UTC 24 Oct 03 06:32:54 AM UTC 24 2085083369 ps
T266 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_parallel_lc_req.1324807734 Oct 03 06:32:36 AM UTC 24 Oct 03 06:32:57 AM UTC 24 1152497319 ps
T493 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_test_access.1462564184 Oct 03 06:32:43 AM UTC 24 Oct 03 06:32:58 AM UTC 24 865443974 ps
T421 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_lock.4254063597 Oct 03 06:32:26 AM UTC 24 Oct 03 06:32:58 AM UTC 24 1439592719 ps
T494 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_smoke.2936099150 Oct 03 06:32:49 AM UTC 24 Oct 03 06:32:59 AM UTC 24 364171588 ps
T495 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_parallel_lc_req.2137582317 Oct 03 06:32:26 AM UTC 24 Oct 03 06:32:59 AM UTC 24 1537661249 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_init_fail.1226660260 Oct 03 06:32:49 AM UTC 24 Oct 03 06:32:59 AM UTC 24 1590660678 ps
T496 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_stress_all.3630092624 Oct 03 06:32:31 AM UTC 24 Oct 03 06:33:00 AM UTC 24 2331054544 ps
T256 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/8.otp_ctrl_stress_all.690278408 Oct 03 06:31:37 AM UTC 24 Oct 03 06:33:01 AM UTC 24 10258437138 ps
T20 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/2.otp_ctrl_sec_cm.3317932356 Oct 03 06:29:43 AM UTC 24 Oct 03 06:33:02 AM UTC 24 10506463309 ps
T367 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_test_access.1682559373 Oct 03 06:32:29 AM UTC 24 Oct 03 06:33:03 AM UTC 24 2040105331 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_lock.2391186024 Oct 03 06:32:37 AM UTC 24 Oct 03 06:33:04 AM UTC 24 998699635 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_esc.529616788 Oct 03 06:32:51 AM UTC 24 Oct 03 06:33:06 AM UTC 24 460098625 ps
T369 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_check_fail.4286366848 Oct 03 06:32:39 AM UTC 24 Oct 03 06:33:06 AM UTC 24 900518686 ps
T370 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_alert_test.4134842687 Oct 03 06:33:03 AM UTC 24 Oct 03 06:33:07 AM UTC 24 71047471 ps
T371 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_lc_req.3524552463 Oct 03 06:32:49 AM UTC 24 Oct 03 06:33:08 AM UTC 24 2108667670 ps
T372 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/11.otp_ctrl_dai_errs.2879849265 Oct 03 06:32:26 AM UTC 24 Oct 03 06:33:08 AM UTC 24 5323802597 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/10.otp_ctrl_dai_errs.2287482686 Oct 03 06:32:11 AM UTC 24 Oct 03 06:33:08 AM UTC 24 20578226921 ps
T497 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_smoke.1546368258 Oct 03 06:33:03 AM UTC 24 Oct 03 06:33:10 AM UTC 24 583975359 ps
T59 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_init_fail.869635647 Oct 03 06:33:05 AM UTC 24 Oct 03 06:33:10 AM UTC 24 301219646 ps
T498 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_dai_errs.3579125675 Oct 03 06:32:39 AM UTC 24 Oct 03 06:33:11 AM UTC 24 1929407512 ps
T76 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_check_fail.223787160 Oct 03 06:33:00 AM UTC 24 Oct 03 06:33:12 AM UTC 24 313152011 ps
T21 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/1.otp_ctrl_sec_cm.3900571515 Oct 03 06:29:23 AM UTC 24 Oct 03 06:33:12 AM UTC 24 37292194891 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/7.otp_ctrl_stress_all.404699216 Oct 03 06:31:19 AM UTC 24 Oct 03 06:33:13 AM UTC 24 5567774622 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_esc.2147253882 Oct 03 06:33:06 AM UTC 24 Oct 03 06:33:14 AM UTC 24 852154066 ps
T402 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_regwen.3209048881 Oct 03 06:33:00 AM UTC 24 Oct 03 06:33:16 AM UTC 24 1113950024 ps
T499 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_lock.3689174052 Oct 03 06:32:55 AM UTC 24 Oct 03 06:33:16 AM UTC 24 1274479385 ps
T500 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_alert_test.313650373 Oct 03 06:33:13 AM UTC 24 Oct 03 06:33:16 AM UTC 24 51493627 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_dai_errs.1040389622 Oct 03 06:32:55 AM UTC 24 Oct 03 06:33:18 AM UTC 24 1020358103 ps
T468 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_parallel_key_req.2739643759 Oct 03 06:33:00 AM UTC 24 Oct 03 06:33:19 AM UTC 24 987757288 ps
T257 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_stress_all.2628203163 Oct 03 06:30:23 AM UTC 24 Oct 03 06:33:22 AM UTC 24 113104055239 ps
T210 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_macro_errs.239973939 Oct 03 06:33:10 AM UTC 24 Oct 03 06:33:22 AM UTC 24 1065914901 ps
T420 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/13.otp_ctrl_test_access.4290886343 Oct 03 06:33:00 AM UTC 24 Oct 03 06:33:23 AM UTC 24 841502499 ps
T67 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_check_fail.4157727880 Oct 03 06:33:08 AM UTC 24 Oct 03 06:33:23 AM UTC 24 620289784 ps
T129 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_init_fail.2118183515 Oct 03 06:33:17 AM UTC 24 Oct 03 06:33:23 AM UTC 24 518997553 ps
T286 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_esc.1014184366 Oct 03 06:33:17 AM UTC 24 Oct 03 06:33:23 AM UTC 24 277716740 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_smoke.1704423016 Oct 03 06:33:17 AM UTC 24 Oct 03 06:33:24 AM UTC 24 958397302 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_lock.1483390895 Oct 03 06:33:17 AM UTC 24 Oct 03 06:33:26 AM UTC 24 2130398254 ps
T404 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_regwen.2812094431 Oct 03 06:33:10 AM UTC 24 Oct 03 06:33:27 AM UTC 24 837111528 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_alert_test.1382739384 Oct 03 06:33:26 AM UTC 24 Oct 03 06:33:30 AM UTC 24 177085756 ps
T505 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_key_req.1413970302 Oct 03 06:33:10 AM UTC 24 Oct 03 06:33:30 AM UTC 24 996526389 ps
T506 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_smoke.3352526313 Oct 03 06:33:26 AM UTC 24 Oct 03 06:33:31 AM UTC 24 253656682 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/4.otp_ctrl_sec_cm.1825097664 Oct 03 06:30:25 AM UTC 24 Oct 03 06:33:32 AM UTC 24 21983891891 ps
T507 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_key_req.1515353062 Oct 03 06:33:25 AM UTC 24 Oct 03 06:33:33 AM UTC 24 2622330427 ps
T508 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_regwen.3845491657 Oct 03 06:33:26 AM UTC 24 Oct 03 06:33:34 AM UTC 24 629453254 ps
T211 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_init_fail.2251408216 Oct 03 06:33:27 AM UTC 24 Oct 03 06:33:34 AM UTC 24 103888748 ps
T430 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_lock.395849590 Oct 03 06:33:08 AM UTC 24 Oct 03 06:33:36 AM UTC 24 1978161988 ps
T65 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_check_fail.3820126212 Oct 03 06:33:32 AM UTC 24 Oct 03 06:33:38 AM UTC 24 435464870 ps
T384 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_dai_errs.4051044332 Oct 03 06:33:17 AM UTC 24 Oct 03 06:33:38 AM UTC 24 307980731 ps
T66 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_check_fail.1267221397 Oct 03 06:33:19 AM UTC 24 Oct 03 06:33:40 AM UTC 24 3394707800 ps
T509 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_req.2294279725 Oct 03 06:33:29 AM UTC 24 Oct 03 06:33:40 AM UTC 24 235286159 ps
T510 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_parallel_lc_req.2680029927 Oct 03 06:33:05 AM UTC 24 Oct 03 06:33:40 AM UTC 24 10249828131 ps
T16 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_stress_all_with_rand_reset.2869047034 Oct 03 06:32:44 AM UTC 24 Oct 03 06:33:41 AM UTC 24 13520200783 ps
T156 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/12.otp_ctrl_macro_errs.585253220 Oct 03 06:32:41 AM UTC 24 Oct 03 06:34:09 AM UTC 24 9768057850 ps
T343 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_regwen.3038358693 Oct 03 06:33:34 AM UTC 24 Oct 03 06:33:42 AM UTC 24 131272860 ps
T344 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_key_req.2869640129 Oct 03 06:33:34 AM UTC 24 Oct 03 06:33:43 AM UTC 24 218260047 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_parallel_lc_req.1274558934 Oct 03 06:33:17 AM UTC 24 Oct 03 06:33:43 AM UTC 24 1922446745 ps
T346 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_key_req.4155852958 Oct 03 06:33:45 AM UTC 24 Oct 03 06:34:10 AM UTC 24 6746932239 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_alert_test.189224195 Oct 03 06:33:39 AM UTC 24 Oct 03 06:33:43 AM UTC 24 98076470 ps
T348 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_test_access.3045079287 Oct 03 06:33:36 AM UTC 24 Oct 03 06:33:46 AM UTC 24 906014542 ps
T349 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_test_access.1389161463 Oct 03 06:33:12 AM UTC 24 Oct 03 06:33:48 AM UTC 24 1667133783 ps
T52 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_init_fail.1944952012 Oct 03 06:33:41 AM UTC 24 Oct 03 06:33:48 AM UTC 24 103938631 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_lock.4291396186 Oct 03 06:33:30 AM UTC 24 Oct 03 06:33:50 AM UTC 24 716886783 ps
T157 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_macro_errs.3673808732 Oct 03 06:33:20 AM UTC 24 Oct 03 06:33:51 AM UTC 24 7652465782 ps
T511 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_alert_test.3621107303 Oct 03 06:33:51 AM UTC 24 Oct 03 06:33:54 AM UTC 24 53901404 ps
T407 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_regwen.2189282151 Oct 03 06:33:46 AM UTC 24 Oct 03 06:33:55 AM UTC 24 465406665 ps
T512 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_smoke.2822698796 Oct 03 06:33:41 AM UTC 24 Oct 03 06:33:56 AM UTC 24 806779077 ps
T513 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/14.otp_ctrl_dai_errs.2267655717 Oct 03 06:33:08 AM UTC 24 Oct 03 06:34:00 AM UTC 24 11658863425 ps
T376 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_parallel_lc_esc.2344312303 Oct 03 06:33:45 AM UTC 24 Oct 03 06:34:00 AM UTC 24 1586126276 ps
T514 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_errs.3948499458 Oct 03 06:33:45 AM UTC 24 Oct 03 06:34:02 AM UTC 24 1393515689 ps
T469 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/15.otp_ctrl_test_access.557995509 Oct 03 06:33:26 AM UTC 24 Oct 03 06:34:02 AM UTC 24 5062316523 ps
T515 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_smoke.3946910438 Oct 03 06:33:52 AM UTC 24 Oct 03 06:34:05 AM UTC 24 857035768 ps
T60 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_init_fail.2530711693 Oct 03 06:33:57 AM UTC 24 Oct 03 06:34:05 AM UTC 24 163371801 ps
T516 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_dai_lock.2685516976 Oct 03 06:33:45 AM UTC 24 Oct 03 06:34:05 AM UTC 24 8263959152 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_parallel_lc_esc.3825360344 Oct 03 06:33:29 AM UTC 24 Oct 03 06:34:06 AM UTC 24 10593097987 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_lock.139552394 Oct 03 06:33:58 AM UTC 24 Oct 03 06:34:07 AM UTC 24 723392939 ps
T386 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/16.otp_ctrl_dai_errs.1190541868 Oct 03 06:33:32 AM UTC 24 Oct 03 06:34:07 AM UTC 24 947429075 ps
T68 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_check_fail.2040763925 Oct 03 06:34:01 AM UTC 24 Oct 03 06:34:14 AM UTC 24 1183855870 ps
T412 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_parallel_lc_esc.3935135250 Oct 03 06:33:57 AM UTC 24 Oct 03 06:34:08 AM UTC 24 318820646 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_smoke.526135763 Oct 03 06:34:11 AM UTC 24 Oct 03 06:34:31 AM UTC 24 5408641927 ps
T519 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_macro_errs.307652362 Oct 03 06:33:45 AM UTC 24 Oct 03 06:34:10 AM UTC 24 830941163 ps
T35 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/17.otp_ctrl_check_fail.2650136683 Oct 03 06:33:45 AM UTC 24 Oct 03 06:34:11 AM UTC 24 674221994 ps
T520 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_alert_test.3955146103 Oct 03 06:34:10 AM UTC 24 Oct 03 06:34:14 AM UTC 24 112138195 ps
T381 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/18.otp_ctrl_dai_errs.2242576236 Oct 03 06:34:01 AM UTC 24 Oct 03 06:34:16 AM UTC 24 244304214 ps
T44 /workspaces/repo/scratch/os_regression_2024_10_02/otp_ctrl-sim-vcs/coverage/default/19.otp_ctrl_init_fail.3888838554 Oct 03 06:34:11 AM UTC 24 Oct 03 06:34:16 AM UTC 24 414082733 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%