Assertions
dashboard | hierarchy | modlist | groups | tests | asserts

Assertions by Category
ASSERTPROPERTIESSEQUENCES
Total2700
Category 02700


Assertions by Severity
ASSERTPROPERTIESSEQUENCES
Total2700
Severity 02700


Summary for Assertions
NUMBERPERCENT
Total Number27100.00
Uncovered414.81
Success2385.19
Failure00.00
Incomplete518.52
Without Attempts00.00


Detail Report for Assertions

Assertions Uncovered:
ASSERTIONSCATEGORYSEVERITYATTEMPTSREAL SUCCESSESFAILURESINCOMPLETESRC
prim_esc_tb.i_esc_receiver.EscCntWrap_A 009733000
prim_esc_tb.i_esc_sender.PingCheck_A 0097330020
prim_esc_tb.i_esc_sender.SigIntCheck1_A 0097330020
prim_esc_tb.i_esc_sender.SigIntCheck2_A 0097330020

Assertions Success:
ASSERTIONSCATEGORYSEVERITYATTEMPTSREAL SUCCESSESFAILURESINCOMPLETESRC
prim_esc_tb.i_esc_receiver.DiffEncCheck_A 009733511700
prim_esc_tb.i_esc_receiver.EscCntEsc_A 0097332000
prim_esc_tb.i_esc_receiver.EscEnCheck_A 00973334700
prim_esc_tb.i_esc_receiver.EscEnKnownO_A 009733521700
prim_esc_tb.i_esc_receiver.EscRespCheck_A 009733367020
prim_esc_tb.i_esc_receiver.PingRespCheck_A 00973351020
prim_esc_tb.i_esc_receiver.RespPKnownO_A 009733521700
prim_esc_tb.i_esc_receiver.SigIntCheck0_A 0097334000
prim_esc_tb.i_esc_receiver.SigIntCheck1_A 0097334000
prim_esc_tb.i_esc_receiver.SigIntCheck2_A 0097334000
prim_esc_tb.i_esc_sender.DiffEncCheck_A 009733521700
prim_esc_tb.i_esc_sender.EscCheck_A 00973339600
prim_esc_tb.i_esc_sender.EscPKnownO_A 009733521700
prim_esc_tb.i_esc_sender.EscPingCheck_A 0097333200
prim_esc_tb.i_esc_sender.IntegFailKnownO_A 009733521700
prim_esc_tb.i_esc_sender.PingOkKnownO_A 009733521700
prim_esc_tb.i_esc_sender.SigIntBackCheck_A 0097339900
prim_esc_tb.i_esc_sender.SigIntCheck0_A 0097334200
prim_esc_tb.i_esc_sender.SigIntCheck3_A 0097335700
prim_esc_tb.i_esc_sender.StateEscRespHiBackCheck_A 00973324000
prim_esc_tb.i_esc_sender.StateEscRespHiCheck_A 00973316900
prim_esc_tb.i_esc_sender.StateEscRespLoBackCheck_A 00973319500
prim_esc_tb.i_esc_sender.StateEscRespLoCheck_A 00973318700

Assertions Incomplete:
ASSERTIONSCATEGORYSEVERITYATTEMPTSREAL SUCCESSESFAILURESINCOMPLETESRC
prim_esc_tb.i_esc_receiver.EscRespCheck_A 009733367020
prim_esc_tb.i_esc_receiver.PingRespCheck_A 00973351020
prim_esc_tb.i_esc_sender.PingCheck_A 0097330020
prim_esc_tb.i_esc_sender.SigIntCheck1_A 0097330020
prim_esc_tb.i_esc_sender.SigIntCheck2_A 0097330020

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%