Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.51 96.89 92.28 97.68 100.00 98.62 98.05 99.06


Total tests in report: 458
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
63.73 63.73 92.22 92.22 74.30 74.30 46.65 46.65 40.00 40.00 90.00 90.00 93.55 93.55 9.37 9.37 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_smoke.603321760
76.51 12.78 92.58 0.36 80.90 6.60 58.00 11.34 40.00 0.00 91.72 1.72 95.05 1.50 77.28 67.92 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all_with_rand_reset.3282156973
82.34 5.84 93.54 0.96 82.44 1.54 71.04 13.04 60.00 20.00 95.17 3.45 95.50 0.45 78.69 1.41 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_kmac_err_chk.3012744340
85.85 3.51 93.66 0.12 85.11 2.67 71.04 0.00 80.00 20.00 95.86 0.69 95.65 0.15 79.63 0.94 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_corrupt_sig_fatal_chk.3861036741
88.44 2.59 93.66 0.00 87.50 2.39 84.68 13.64 80.00 0.00 95.86 0.00 95.65 0.00 81.73 2.11 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_stress_all.426089749
90.22 1.78 93.66 0.00 88.06 0.56 88.61 3.92 86.67 6.67 96.21 0.34 95.65 0.00 82.67 0.94 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_kmac_err_chk.3323959499
91.86 1.64 96.65 2.99 89.75 1.69 89.18 0.57 86.67 0.00 97.24 1.03 95.95 0.30 87.59 4.92 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_stress_all_with_rand_reset.2980804805
93.31 1.45 96.89 0.24 90.87 1.12 89.28 0.10 93.33 6.67 98.28 1.03 96.25 0.30 88.29 0.70 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_sec_cm.174543797
94.27 0.95 96.89 0.00 90.87 0.00 89.28 0.00 100.00 6.67 98.28 0.00 96.25 0.00 88.29 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/12.rom_ctrl_corrupt_sig_fatal_chk.638133077
95.20 0.93 96.89 0.00 91.29 0.42 89.28 0.00 100.00 0.00 98.28 0.00 96.25 0.00 94.38 6.09 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/5.rom_ctrl_tl_intg_err.1794858214
95.86 0.67 96.89 0.00 91.29 0.00 93.33 4.05 100.00 0.00 98.28 0.00 96.40 0.15 94.85 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_stress_all.1715150636
96.25 0.39 96.89 0.00 91.29 0.00 94.20 0.87 100.00 0.00 98.28 0.00 96.40 0.00 96.72 1.87 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all_with_rand_reset.2720840283
96.48 0.22 96.89 0.00 91.29 0.00 95.78 1.57 100.00 0.00 98.28 0.00 96.40 0.00 96.72 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_stress_all.3879632279
96.65 0.17 96.89 0.00 91.85 0.56 96.18 0.40 100.00 0.00 98.28 0.00 96.40 0.00 96.96 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_alert_test.2614621082
96.82 0.17 96.89 0.00 91.99 0.14 96.18 0.00 100.00 0.00 98.28 0.00 97.45 1.05 96.96 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_hw_reset.2269988467
96.95 0.13 96.89 0.00 91.99 0.00 96.18 0.00 100.00 0.00 98.28 0.00 97.45 0.00 97.89 0.94 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/19.rom_ctrl_tl_intg_err.942539406
97.07 0.12 96.89 0.00 92.13 0.14 96.53 0.35 100.00 0.00 98.62 0.34 97.45 0.00 97.89 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/11.rom_ctrl_kmac_err_chk.3885911190
97.16 0.08 96.89 0.00 92.13 0.00 97.10 0.57 100.00 0.00 98.62 0.00 97.45 0.00 97.89 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all.130091792
97.23 0.08 96.89 0.00 92.13 0.00 97.10 0.00 100.00 0.00 98.62 0.00 97.75 0.30 98.13 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_passthru_mem_tl_intg_err.3069261809
97.30 0.07 96.89 0.00 92.13 0.00 97.10 0.00 100.00 0.00 98.62 0.00 97.75 0.00 98.59 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_tl_intg_err.3843039379
97.34 0.04 96.89 0.00 92.13 0.00 97.23 0.12 100.00 0.00 98.62 0.00 97.90 0.15 98.59 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_stress_all.1512626405
97.37 0.03 96.89 0.00 92.13 0.00 97.23 0.00 100.00 0.00 98.62 0.00 97.90 0.00 98.83 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_tl_intg_err.3741493123
97.41 0.03 96.89 0.00 92.13 0.00 97.23 0.00 100.00 0.00 98.62 0.00 97.90 0.00 99.06 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_passthru_mem_tl_intg_err.4045198227
97.43 0.03 96.89 0.00 92.13 0.00 97.43 0.20 100.00 0.00 98.62 0.00 97.90 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_stress_all.131796503
97.46 0.02 96.89 0.00 92.13 0.00 97.58 0.15 100.00 0.00 98.62 0.00 97.90 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_alert_test.3095780699
97.48 0.02 96.89 0.00 92.13 0.00 97.58 0.00 100.00 0.00 98.62 0.00 98.05 0.15 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/29.rom_ctrl_max_throughput_chk.247541042
97.50 0.02 96.89 0.00 92.28 0.14 97.58 0.00 100.00 0.00 98.62 0.00 98.05 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_stress_all_with_rand_reset.1839299365
97.51 0.01 96.89 0.00 92.28 0.00 97.65 0.07 100.00 0.00 98.62 0.00 98.05 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_stress_all.3442492505
97.51 0.01 96.89 0.00 92.28 0.00 97.68 0.02 100.00 0.00 98.62 0.00 98.05 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all.1311918984


Tests that do not contribute to grading

Name
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_aliasing.280431117
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_bit_bash.1031219459
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_mem_rw_with_rand_reset.3265989292
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_rw.482069976
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_mem_partial_access.3542817503
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_mem_walk.3378848592
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_same_csr_outstanding.2693592925
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_tl_errors.3137369577
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_tl_intg_err.3125863544
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_aliasing.2655616455
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_bit_bash.1176610439
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_hw_reset.2218068720
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_mem_rw_with_rand_reset.158064103
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_rw.1638162395
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_mem_partial_access.4035920630
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_mem_walk.944070323
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_passthru_mem_tl_intg_err.4024562982
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_same_csr_outstanding.1666761895
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_tl_errors.2205980949
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_tl_intg_err.2955840267
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_csr_mem_rw_with_rand_reset.1572512549
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_csr_rw.1214501911
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_passthru_mem_tl_intg_err.1549000922
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_same_csr_outstanding.483576556
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_tl_errors.2446597202
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_tl_intg_err.2625860874
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_csr_mem_rw_with_rand_reset.3059879631
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_csr_rw.361550379
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_passthru_mem_tl_intg_err.125083600
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_same_csr_outstanding.2345372024
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_tl_errors.2226720085
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_csr_mem_rw_with_rand_reset.1465476743
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_csr_rw.2529420591
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_passthru_mem_tl_intg_err.866399700
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_same_csr_outstanding.2899646196
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_tl_errors.740411038
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_tl_intg_err.2684931503
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_csr_mem_rw_with_rand_reset.2686078803
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_csr_rw.984722851
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_same_csr_outstanding.3908389392
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_tl_errors.2422727265
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_tl_intg_err.2083746767
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_csr_mem_rw_with_rand_reset.3431553123
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_csr_rw.4208576597
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_passthru_mem_tl_intg_err.1943458851
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_same_csr_outstanding.1494888091
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_tl_errors.2721814846
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_csr_mem_rw_with_rand_reset.3017936686
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_csr_rw.421376111
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_passthru_mem_tl_intg_err.1630283369
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_same_csr_outstanding.4129941208
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_tl_errors.895217523
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_tl_intg_err.2664225745
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_csr_mem_rw_with_rand_reset.1623471455
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_csr_rw.2789486969
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_passthru_mem_tl_intg_err.4155226173
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_same_csr_outstanding.3948750017
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_alert_test.1687439393
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all_with_rand_reset.3967453544




Total test records in report: 458
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_alert_test.2614621082 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:29 AM UTC 24 953324043 ps
T2 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_alert_test.4134881550 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:29 AM UTC 24 249806224 ps
T3 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_smoke.4022393577 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:29 AM UTC 24 225523575 ps
T4 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_smoke.603321760 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:29 AM UTC 24 876171362 ps
T5 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_smoke.2570485517 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:30 AM UTC 24 726860915 ps
T6 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/15.rom_ctrl_max_throughput_chk.1636339428 Aug 21 08:09:03 AM UTC 24 Aug 21 08:09:20 AM UTC 24 1291326089 ps
T7 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_max_throughput_chk.2399863717 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:30 AM UTC 24 190039409 ps
T8 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_max_throughput_chk.4241711538 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:31 AM UTC 24 675992310 ps
T9 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_max_throughput_chk.3406712005 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:31 AM UTC 24 1078714077 ps
T10 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_max_throughput_chk.1331978324 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:34 AM UTC 24 308136961 ps
T24 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_alert_test.153183540 Aug 21 08:08:28 AM UTC 24 Aug 21 08:08:37 AM UTC 24 175023014 ps
T11 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_kmac_err_chk.3012744340 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:37 AM UTC 24 342643441 ps
T48 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_alert_test.2390499596 Aug 21 08:08:28 AM UTC 24 Aug 21 08:08:37 AM UTC 24 689229921 ps
T49 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_alert_test.3095780699 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:39 AM UTC 24 989772792 ps
T22 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_smoke.1692753066 Aug 21 08:08:28 AM UTC 24 Aug 21 08:08:39 AM UTC 24 177810507 ps
T23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_max_throughput_chk.4220067633 Aug 21 08:08:28 AM UTC 24 Aug 21 08:08:40 AM UTC 24 267413999 ps
T12 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_kmac_err_chk.3323959499 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:40 AM UTC 24 495897833 ps
T58 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_smoke.922980922 Aug 21 08:08:28 AM UTC 24 Aug 21 08:08:41 AM UTC 24 1016885535 ps
T13 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all.1311918984 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:41 AM UTC 24 540584277 ps
T21 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_smoke.605323260 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:43 AM UTC 24 337143421 ps
T59 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_max_throughput_chk.3541379987 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:43 AM UTC 24 185089636 ps
T31 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_kmac_err_chk.3640539889 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:48 AM UTC 24 893318203 ps
T82 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_alert_test.1722782575 Aug 21 08:08:40 AM UTC 24 Aug 21 08:08:49 AM UTC 24 174621018 ps
T53 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_kmac_err_chk.392207306 Aug 21 08:08:28 AM UTC 24 Aug 21 08:08:49 AM UTC 24 1979924909 ps
T14 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_stress_all_with_rand_reset.2980804805 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:50 AM UTC 24 3603766749 ps
T74 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_alert_test.797250690 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:50 AM UTC 24 1034101550 ps
T75 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_alert_test.1137488396 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:50 AM UTC 24 249416015 ps
T76 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_smoke.4292133929 Aug 21 08:08:31 AM UTC 24 Aug 21 08:08:51 AM UTC 24 1164488230 ps
T32 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_stress_all.1715150636 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:52 AM UTC 24 3221936984 ps
T36 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/14.rom_ctrl_kmac_err_chk.4181479613 Aug 21 08:09:01 AM UTC 24 Aug 21 08:09:21 AM UTC 24 691327365 ps
T77 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_alert_test.1687439393 Aug 21 08:08:30 AM UTC 24 Aug 21 08:08:52 AM UTC 24 256599670 ps
T54 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_kmac_err_chk.107309646 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:53 AM UTC 24 1580303292 ps
T78 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_smoke.2729678611 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:53 AM UTC 24 791742395 ps
T33 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_stress_all.426089749 Aug 21 08:08:19 AM UTC 24 Aug 21 08:08:54 AM UTC 24 792079582 ps
T17 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_smoke.3714195855 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:54 AM UTC 24 1067524537 ps
T161 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_max_throughput_chk.2077409312 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:55 AM UTC 24 948013742 ps
T153 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_max_throughput_chk.48352180 Aug 21 08:08:36 AM UTC 24 Aug 21 08:08:55 AM UTC 24 1080303276 ps
T134 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_stress_all.92960165 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:56 AM UTC 24 1122686771 ps
T83 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all.2721593193 Aug 21 08:08:31 AM UTC 24 Aug 21 08:08:56 AM UTC 24 4816574680 ps
T167 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_alert_test.1559925038 Aug 21 08:08:44 AM UTC 24 Aug 21 08:08:56 AM UTC 24 663474455 ps
T34 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all.130091792 Aug 21 08:08:29 AM UTC 24 Aug 21 08:08:58 AM UTC 24 5918788758 ps
T154 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_alert_test.1350214709 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:59 AM UTC 24 1028156341 ps
T135 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_max_throughput_chk.690780140 Aug 21 08:08:23 AM UTC 24 Aug 21 08:08:59 AM UTC 24 363239355 ps
T136 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_max_throughput_chk.186696241 Aug 21 08:08:30 AM UTC 24 Aug 21 08:09:00 AM UTC 24 629441268 ps
T173 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/11.rom_ctrl_alert_test.1977856677 Aug 21 08:08:50 AM UTC 24 Aug 21 08:09:00 AM UTC 24 171986588 ps
T55 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_kmac_err_chk.3432353694 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:02 AM UTC 24 1144231258 ps
T162 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_max_throughput_chk.1098911183 Aug 21 08:08:42 AM UTC 24 Aug 21 08:09:02 AM UTC 24 1056217047 ps
T56 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_kmac_err_chk.3262582561 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:03 AM UTC 24 1974973837 ps
T96 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_smoke.3347601976 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:03 AM UTC 24 5198235371 ps
T84 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_stress_all.1512626405 Aug 21 08:08:40 AM UTC 24 Aug 21 08:09:03 AM UTC 24 536441904 ps
T174 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/11.rom_ctrl_max_throughput_chk.177289214 Aug 21 08:08:50 AM UTC 24 Aug 21 08:09:03 AM UTC 24 613076152 ps
T35 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_kmac_err_chk.954244569 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:04 AM UTC 24 534541068 ps
T57 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_kmac_err_chk.1650172292 Aug 21 08:08:42 AM UTC 24 Aug 21 08:09:05 AM UTC 24 991759608 ps
T175 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_kmac_err_chk.2081002341 Aug 21 08:08:38 AM UTC 24 Aug 21 08:09:05 AM UTC 24 994079291 ps
T97 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_stress_all.2167436398 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:08 AM UTC 24 1085698300 ps
T176 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/12.rom_ctrl_max_throughput_chk.263318013 Aug 21 08:08:52 AM UTC 24 Aug 21 08:09:09 AM UTC 24 267094990 ps
T177 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/12.rom_ctrl_alert_test.862426292 Aug 21 08:08:55 AM UTC 24 Aug 21 08:09:10 AM UTC 24 252392343 ps
T178 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/13.rom_ctrl_max_throughput_chk.1444427482 Aug 21 08:08:55 AM UTC 24 Aug 21 08:09:10 AM UTC 24 1069546982 ps
T172 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_stress_all.3879632279 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:11 AM UTC 24 1119404253 ps
T179 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/13.rom_ctrl_alert_test.457204470 Aug 21 08:08:59 AM UTC 24 Aug 21 08:09:12 AM UTC 24 332727578 ps
T168 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/14.rom_ctrl_alert_test.3918502174 Aug 21 08:09:01 AM UTC 24 Aug 21 08:09:12 AM UTC 24 496444126 ps
T180 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/14.rom_ctrl_max_throughput_chk.1449980459 Aug 21 08:08:59 AM UTC 24 Aug 21 08:09:14 AM UTC 24 504582621 ps
T61 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/11.rom_ctrl_kmac_err_chk.3885911190 Aug 21 08:08:50 AM UTC 24 Aug 21 08:09:15 AM UTC 24 2465133727 ps
T98 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_stress_all.131796503 Aug 21 08:08:23 AM UTC 24 Aug 21 08:09:16 AM UTC 24 2430997383 ps
T15 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all_with_rand_reset.3282156973 Aug 21 08:08:30 AM UTC 24 Aug 21 08:09:16 AM UTC 24 2573037644 ps
T181 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_kmac_err_chk.667263562 Aug 21 08:08:30 AM UTC 24 Aug 21 08:09:16 AM UTC 24 619547176 ps
T182 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/15.rom_ctrl_alert_test.370214450 Aug 21 08:09:06 AM UTC 24 Aug 21 08:09:18 AM UTC 24 945209510 ps
T183 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/13.rom_ctrl_kmac_err_chk.3951982055 Aug 21 08:08:57 AM UTC 24 Aug 21 08:09:19 AM UTC 24 333243527 ps
T165 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_stress_all.3442492505 Aug 21 08:08:28 AM UTC 24 Aug 21 08:09:19 AM UTC 24 1600401438 ps
T184 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/16.rom_ctrl_alert_test.2113584108 Aug 21 08:09:12 AM UTC 24 Aug 21 08:09:22 AM UTC 24 169018598 ps
T185 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/16.rom_ctrl_stress_all.3657766047 Aug 21 08:09:06 AM UTC 24 Aug 21 08:09:24 AM UTC 24 296362326 ps
T99 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/14.rom_ctrl_stress_all.1236962230 Aug 21 08:08:59 AM UTC 24 Aug 21 08:09:24 AM UTC 24 4599813177 ps
T186 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/16.rom_ctrl_max_throughput_chk.1473280842 Aug 21 08:09:06 AM UTC 24 Aug 21 08:09:26 AM UTC 24 281195512 ps
T187 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/17.rom_ctrl_max_throughput_chk.334924449 Aug 21 08:09:12 AM UTC 24 Aug 21 08:09:28 AM UTC 24 356805278 ps
T163 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/17.rom_ctrl_alert_test.2931341107 Aug 21 08:09:16 AM UTC 24 Aug 21 08:09:28 AM UTC 24 506378985 ps
T100 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/11.rom_ctrl_stress_all.3524205074 Aug 21 08:08:44 AM UTC 24 Aug 21 08:09:29 AM UTC 24 573427208 ps
T188 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/12.rom_ctrl_kmac_err_chk.945037210 Aug 21 08:08:53 AM UTC 24 Aug 21 08:09:31 AM UTC 24 4034294789 ps
T62 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/12.rom_ctrl_stress_all.469386617 Aug 21 08:08:52 AM UTC 24 Aug 21 08:09:33 AM UTC 24 1858120182 ps
T189 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/15.rom_ctrl_kmac_err_chk.739477946 Aug 21 08:09:04 AM UTC 24 Aug 21 08:09:34 AM UTC 24 566312680 ps
T190 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_max_throughput_chk.1864822093 Aug 21 08:09:19 AM UTC 24 Aug 21 08:09:35 AM UTC 24 411142863 ps
T28 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_sec_cm.174543797 Aug 21 08:08:23 AM UTC 24 Aug 21 08:10:54 AM UTC 24 634362093 ps
T39 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_alert_test.4082040973 Aug 21 08:09:21 AM UTC 24 Aug 21 08:09:36 AM UTC 24 356180372 ps
T40 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/17.rom_ctrl_kmac_err_chk.2305794241 Aug 21 08:09:14 AM UTC 24 Aug 21 08:09:39 AM UTC 24 2063168837 ps
T41 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/19.rom_ctrl_alert_test.425680859 Aug 21 08:09:27 AM UTC 24 Aug 21 08:09:40 AM UTC 24 346675659 ps
T42 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/19.rom_ctrl_stress_all.1924354215 Aug 21 08:09:21 AM UTC 24 Aug 21 08:09:40 AM UTC 24 295671682 ps
T43 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/31.rom_ctrl_kmac_err_chk.2384085829 Aug 21 08:11:11 AM UTC 24 Aug 21 08:11:40 AM UTC 24 2749522799 ps
T44 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/19.rom_ctrl_max_throughput_chk.2080259322 Aug 21 08:09:23 AM UTC 24 Aug 21 08:09:41 AM UTC 24 2019752032 ps
T45 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/13.rom_ctrl_stress_all.2874224097 Aug 21 08:08:55 AM UTC 24 Aug 21 08:09:42 AM UTC 24 376101480 ps
T46 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/15.rom_ctrl_stress_all.1644477491 Aug 21 08:09:03 AM UTC 24 Aug 21 08:09:43 AM UTC 24 527574725 ps
T47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_stress_all.2769997817 Aug 21 08:09:16 AM UTC 24 Aug 21 08:09:44 AM UTC 24 1462553123 ps
T191 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_kmac_err_chk.4270565996 Aug 21 08:09:19 AM UTC 24 Aug 21 08:09:45 AM UTC 24 505547395 ps
T192 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/16.rom_ctrl_kmac_err_chk.2822250563 Aug 21 08:09:08 AM UTC 24 Aug 21 08:09:45 AM UTC 24 9417121694 ps
T193 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/20.rom_ctrl_max_throughput_chk.2601431321 Aug 21 08:09:29 AM UTC 24 Aug 21 08:09:46 AM UTC 24 261674053 ps
T170 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/20.rom_ctrl_alert_test.3747119732 Aug 21 08:09:35 AM UTC 24 Aug 21 08:09:47 AM UTC 24 1032284519 ps
T194 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/21.rom_ctrl_max_throughput_chk.2487026027 Aug 21 08:09:37 AM UTC 24 Aug 21 08:09:50 AM UTC 24 187426772 ps
T64 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/19.rom_ctrl_kmac_err_chk.1838442917 Aug 21 08:09:25 AM UTC 24 Aug 21 08:09:51 AM UTC 24 332401624 ps
T169 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/21.rom_ctrl_alert_test.434708003 Aug 21 08:09:41 AM UTC 24 Aug 21 08:09:51 AM UTC 24 172731907 ps
T171 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/22.rom_ctrl_alert_test.2542910687 Aug 21 08:09:46 AM UTC 24 Aug 21 08:09:56 AM UTC 24 175633689 ps
T195 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/20.rom_ctrl_kmac_err_chk.3687834692 Aug 21 08:09:32 AM UTC 24 Aug 21 08:09:58 AM UTC 24 664972959 ps
T196 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/22.rom_ctrl_max_throughput_chk.3367859178 Aug 21 08:09:42 AM UTC 24 Aug 21 08:09:59 AM UTC 24 535399271 ps
T164 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/17.rom_ctrl_stress_all.372383304 Aug 21 08:09:12 AM UTC 24 Aug 21 08:10:03 AM UTC 24 3239004660 ps
T197 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/21.rom_ctrl_kmac_err_chk.762601324 Aug 21 08:09:40 AM UTC 24 Aug 21 08:10:04 AM UTC 24 2061181852 ps
T198 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/23.rom_ctrl_max_throughput_chk.3441744508 Aug 21 08:09:46 AM UTC 24 Aug 21 08:10:08 AM UTC 24 1031702677 ps
T166 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/22.rom_ctrl_kmac_err_chk.3284909092 Aug 21 08:09:43 AM UTC 24 Aug 21 08:10:09 AM UTC 24 519764922 ps
T16 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/20.rom_ctrl_stress_all_with_rand_reset.2314068945 Aug 21 08:09:34 AM UTC 24 Aug 21 08:10:10 AM UTC 24 1109746901 ps
T18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all_with_rand_reset.2720840283 Aug 21 08:08:19 AM UTC 24 Aug 21 08:10:12 AM UTC 24 2517071556 ps
T199 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/24.rom_ctrl_max_throughput_chk.510866722 Aug 21 08:09:59 AM UTC 24 Aug 21 08:10:12 AM UTC 24 259261146 ps
T200 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/23.rom_ctrl_kmac_err_chk.3575688785 Aug 21 08:09:50 AM UTC 24 Aug 21 08:10:13 AM UTC 24 344190011 ps
T201 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/21.rom_ctrl_stress_all.4134148065 Aug 21 08:09:37 AM UTC 24 Aug 21 08:10:14 AM UTC 24 755619416 ps
T202 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/24.rom_ctrl_stress_all.1570700083 Aug 21 08:09:57 AM UTC 24 Aug 21 08:10:15 AM UTC 24 1132983718 ps
T68 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/19.rom_ctrl_stress_all_with_rand_reset.1763725956 Aug 21 08:09:25 AM UTC 24 Aug 21 08:10:15 AM UTC 24 3792220458 ps
T203 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/23.rom_ctrl_alert_test.531853677 Aug 21 08:09:53 AM UTC 24 Aug 21 08:10:16 AM UTC 24 4092161085 ps
T204 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/20.rom_ctrl_stress_all.1440959642 Aug 21 08:09:29 AM UTC 24 Aug 21 08:10:16 AM UTC 24 1545411578 ps
T205 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/24.rom_ctrl_alert_test.912992397 Aug 21 08:10:09 AM UTC 24 Aug 21 08:10:22 AM UTC 24 168992479 ps
T69 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/22.rom_ctrl_stress_all_with_rand_reset.1900866071 Aug 21 08:09:45 AM UTC 24 Aug 21 08:10:25 AM UTC 24 929326193 ps
T206 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/24.rom_ctrl_kmac_err_chk.2354640445 Aug 21 08:10:04 AM UTC 24 Aug 21 08:10:26 AM UTC 24 339732197 ps
T207 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/25.rom_ctrl_stress_all.3865235703 Aug 21 08:10:10 AM UTC 24 Aug 21 08:10:26 AM UTC 24 846191723 ps
T208 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/25.rom_ctrl_max_throughput_chk.3108232132 Aug 21 08:10:10 AM UTC 24 Aug 21 08:10:27 AM UTC 24 181330716 ps
T209 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/23.rom_ctrl_stress_all.708982916 Aug 21 08:09:46 AM UTC 24 Aug 21 08:10:28 AM UTC 24 380401314 ps
T70 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/14.rom_ctrl_stress_all_with_rand_reset.1569740916 Aug 21 08:09:01 AM UTC 24 Aug 21 08:10:28 AM UTC 24 5674569795 ps
T210 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/25.rom_ctrl_alert_test.3045686515 Aug 21 08:10:15 AM UTC 24 Aug 21 08:10:30 AM UTC 24 1127083345 ps
T25 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_corrupt_sig_fatal_chk.2183273190 Aug 21 08:08:23 AM UTC 24 Aug 21 08:10:31 AM UTC 24 14222583685 ps
T211 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/26.rom_ctrl_max_throughput_chk.2324907347 Aug 21 08:10:16 AM UTC 24 Aug 21 08:10:33 AM UTC 24 485696643 ps
T212 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/26.rom_ctrl_stress_all.728636741 Aug 21 08:10:15 AM UTC 24 Aug 21 08:10:36 AM UTC 24 1164714872 ps
T213 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/25.rom_ctrl_kmac_err_chk.1057092885 Aug 21 08:10:13 AM UTC 24 Aug 21 08:10:37 AM UTC 24 1376239839 ps
T214 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/26.rom_ctrl_alert_test.249621565 Aug 21 08:10:26 AM UTC 24 Aug 21 08:10:39 AM UTC 24 690596730 ps
T215 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/27.rom_ctrl_max_throughput_chk.3273933612 Aug 21 08:10:27 AM UTC 24 Aug 21 08:10:41 AM UTC 24 178354148 ps
T216 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/26.rom_ctrl_kmac_err_chk.1186149709 Aug 21 08:10:17 AM UTC 24 Aug 21 08:10:42 AM UTC 24 519312746 ps
T217 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/27.rom_ctrl_alert_test.3865258102 Aug 21 08:10:31 AM UTC 24 Aug 21 08:10:43 AM UTC 24 174653971 ps
T218 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/22.rom_ctrl_stress_all.3320873626 Aug 21 08:09:42 AM UTC 24 Aug 21 08:10:44 AM UTC 24 6121798239 ps
T71 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_stress_all_with_rand_reset.446990418 Aug 21 08:08:23 AM UTC 24 Aug 21 08:10:48 AM UTC 24 10020629881 ps
T219 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/28.rom_ctrl_stress_all.3149359112 Aug 21 08:10:31 AM UTC 24 Aug 21 08:10:49 AM UTC 24 796385985 ps
T220 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/28.rom_ctrl_max_throughput_chk.2806757786 Aug 21 08:10:34 AM UTC 24 Aug 21 08:10:54 AM UTC 24 284978139 ps
T72 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/15.rom_ctrl_stress_all_with_rand_reset.2557674780 Aug 21 08:09:04 AM UTC 24 Aug 21 08:10:54 AM UTC 24 2289355781 ps
T73 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/24.rom_ctrl_stress_all_with_rand_reset.1207920454 Aug 21 08:10:05 AM UTC 24 Aug 21 08:10:56 AM UTC 24 2746399128 ps
T221 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/28.rom_ctrl_alert_test.4122203642 Aug 21 08:10:41 AM UTC 24 Aug 21 08:10:57 AM UTC 24 518039458 ps
T114 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/29.rom_ctrl_max_throughput_chk.247541042 Aug 21 08:10:44 AM UTC 24 Aug 21 08:11:01 AM UTC 24 1701989496 ps
T115 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/28.rom_ctrl_kmac_err_chk.2482593769 Aug 21 08:10:37 AM UTC 24 Aug 21 08:11:01 AM UTC 24 9904096520 ps
T116 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/27.rom_ctrl_stress_all.4136470098 Aug 21 08:10:27 AM UTC 24 Aug 21 08:11:01 AM UTC 24 6614049192 ps
T117 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_stress_all_with_rand_reset.163729034 Aug 21 08:08:28 AM UTC 24 Aug 21 08:11:06 AM UTC 24 4079630286 ps
T118 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/29.rom_ctrl_alert_test.858255019 Aug 21 08:10:55 AM UTC 24 Aug 21 08:11:10 AM UTC 24 260861868 ps
T119 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/29.rom_ctrl_kmac_err_chk.2474932032 Aug 21 08:10:49 AM UTC 24 Aug 21 08:11:10 AM UTC 24 481798868 ps
T120 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/30.rom_ctrl_max_throughput_chk.660401987 Aug 21 08:10:55 AM UTC 24 Aug 21 08:11:14 AM UTC 24 321870249 ps
T121 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/30.rom_ctrl_alert_test.2059320521 Aug 21 08:11:01 AM UTC 24 Aug 21 08:11:16 AM UTC 24 255212981 ps
T122 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/27.rom_ctrl_kmac_err_chk.3860630119 Aug 21 08:10:29 AM UTC 24 Aug 21 08:11:21 AM UTC 24 4099010473 ps
T123 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/30.rom_ctrl_kmac_err_chk.71865173 Aug 21 08:10:58 AM UTC 24 Aug 21 08:11:23 AM UTC 24 1981872441 ps
T26 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_corrupt_sig_fatal_chk.4199031209 Aug 21 08:08:23 AM UTC 24 Aug 21 08:11:24 AM UTC 24 5666857651 ps
T222 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/31.rom_ctrl_max_throughput_chk.3020866912 Aug 21 08:11:07 AM UTC 24 Aug 21 08:11:24 AM UTC 24 221168937 ps
T223 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/31.rom_ctrl_alert_test.3586270272 Aug 21 08:11:17 AM UTC 24 Aug 21 08:11:28 AM UTC 24 174490497 ps
T224 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all_with_rand_reset.3967453544 Aug 21 08:08:38 AM UTC 24 Aug 21 08:11:28 AM UTC 24 7607802718 ps
T225 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/29.rom_ctrl_stress_all.1008986182 Aug 21 08:10:44 AM UTC 24 Aug 21 08:11:29 AM UTC 24 2349495495 ps
T27 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/13.rom_ctrl_corrupt_sig_fatal_chk.3765463554 Aug 21 08:08:57 AM UTC 24 Aug 21 08:11:29 AM UTC 24 2411617904 ps
T19 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_stress_all_with_rand_reset.1839299365 Aug 21 08:09:21 AM UTC 24 Aug 21 08:11:31 AM UTC 24 25016620802 ps
T50 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/9.rom_ctrl_corrupt_sig_fatal_chk.126447152 Aug 21 08:08:38 AM UTC 24 Aug 21 08:11:31 AM UTC 24 11186841187 ps
T226 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/30.rom_ctrl_stress_all.2707244228 Aug 21 08:10:55 AM UTC 24 Aug 21 08:11:31 AM UTC 24 2072572604 ps
T227 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/31.rom_ctrl_stress_all.2161724378 Aug 21 08:11:02 AM UTC 24 Aug 21 08:11:37 AM UTC 24 347715224 ps
T228 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_stress_all_with_rand_reset.1218268303 Aug 21 08:08:19 AM UTC 24 Aug 21 08:11:38 AM UTC 24 29380964471 ps
T29 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/4.rom_ctrl_sec_cm.1108321573 Aug 21 08:08:23 AM UTC 24 Aug 21 08:12:21 AM UTC 24 1684169067 ps
T229 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/32.rom_ctrl_max_throughput_chk.2381156456 Aug 21 08:11:24 AM UTC 24 Aug 21 08:11:43 AM UTC 24 3982225126 ps
T230 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/32.rom_ctrl_alert_test.3091686957 Aug 21 08:11:29 AM UTC 24 Aug 21 08:11:43 AM UTC 24 1904646656 ps
T231 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/45.rom_ctrl_max_throughput_chk.476451821 Aug 21 08:13:12 AM UTC 24 Aug 21 08:13:26 AM UTC 24 187362619 ps
T232 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/33.rom_ctrl_max_throughput_chk.1894488072 Aug 21 08:11:30 AM UTC 24 Aug 21 08:11:45 AM UTC 24 365766644 ps
T233 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/32.rom_ctrl_stress_all.2778990841 Aug 21 08:11:22 AM UTC 24 Aug 21 08:11:46 AM UTC 24 1360662646 ps
T155 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/23.rom_ctrl_stress_all_with_rand_reset.2715219551 Aug 21 08:09:52 AM UTC 24 Aug 21 08:11:49 AM UTC 24 22986849484 ps
T234 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/33.rom_ctrl_stress_all.4078228687 Aug 21 08:11:30 AM UTC 24 Aug 21 08:11:53 AM UTC 24 3265438350 ps
T235 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/34.rom_ctrl_max_throughput_chk.3887641493 Aug 21 08:11:41 AM UTC 24 Aug 21 08:11:53 AM UTC 24 1168678107 ps
T236 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/33.rom_ctrl_alert_test.3364659014 Aug 21 08:11:39 AM UTC 24 Aug 21 08:11:54 AM UTC 24 486968468 ps
T237 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/33.rom_ctrl_kmac_err_chk.2354109307 Aug 21 08:11:31 AM UTC 24 Aug 21 08:11:55 AM UTC 24 350829317 ps
T238 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/34.rom_ctrl_alert_test.4242200184 Aug 21 08:11:47 AM UTC 24 Aug 21 08:11:57 AM UTC 24 248866649 ps
T158 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/13.rom_ctrl_stress_all_with_rand_reset.234946057 Aug 21 08:08:57 AM UTC 24 Aug 21 08:11:58 AM UTC 24 13910171097 ps
T239 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/32.rom_ctrl_kmac_err_chk.1083885202 Aug 21 08:11:25 AM UTC 24 Aug 21 08:11:59 AM UTC 24 2147156854 ps
T63 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/5.rom_ctrl_stress_all_with_rand_reset.3892730387 Aug 21 08:08:23 AM UTC 24 Aug 21 08:11:59 AM UTC 24 41894355867 ps
T240 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/34.rom_ctrl_kmac_err_chk.371952618 Aug 21 08:11:45 AM UTC 24 Aug 21 08:12:07 AM UTC 24 661248657 ps
T241 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/11.rom_ctrl_stress_all_with_rand_reset.3489329968 Aug 21 08:08:50 AM UTC 24 Aug 21 08:12:09 AM UTC 24 5040322128 ps
T242 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/34.rom_ctrl_stress_all.625135553 Aug 21 08:11:39 AM UTC 24 Aug 21 08:12:09 AM UTC 24 1054516088 ps
T243 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_stress_all_with_rand_reset.3054689122 Aug 21 08:08:42 AM UTC 24 Aug 21 08:12:10 AM UTC 24 13333604680 ps
T60 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/10.rom_ctrl_corrupt_sig_fatal_chk.3994884752 Aug 21 08:08:42 AM UTC 24 Aug 21 08:12:11 AM UTC 24 3260273829 ps
T244 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/35.rom_ctrl_alert_test.2137283278 Aug 21 08:11:57 AM UTC 24 Aug 21 08:12:11 AM UTC 24 494183219 ps
T245 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/35.rom_ctrl_stress_all.2344018867 Aug 21 08:11:50 AM UTC 24 Aug 21 08:12:13 AM UTC 24 1206952583 ps
T246 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/21.rom_ctrl_stress_all_with_rand_reset.2554754554 Aug 21 08:09:41 AM UTC 24 Aug 21 08:12:13 AM UTC 24 13945536849 ps
T247 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/36.rom_ctrl_max_throughput_chk.2374970696 Aug 21 08:11:59 AM UTC 24 Aug 21 08:12:16 AM UTC 24 490867762 ps
T248 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/35.rom_ctrl_kmac_err_chk.3590059864 Aug 21 08:11:55 AM UTC 24 Aug 21 08:12:17 AM UTC 24 1979836999 ps
T249 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/35.rom_ctrl_max_throughput_chk.4027757790 Aug 21 08:11:53 AM UTC 24 Aug 21 08:12:17 AM UTC 24 4503803912 ps
T250 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/27.rom_ctrl_stress_all_with_rand_reset.4283071637 Aug 21 08:10:29 AM UTC 24 Aug 21 08:12:19 AM UTC 24 8368465279 ps
T251 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/12.rom_ctrl_stress_all_with_rand_reset.551759843 Aug 21 08:08:55 AM UTC 24 Aug 21 08:12:21 AM UTC 24 8391701697 ps
T252 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/36.rom_ctrl_alert_test.474618856 Aug 21 08:12:11 AM UTC 24 Aug 21 08:12:23 AM UTC 24 617727050 ps
T253 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/37.rom_ctrl_max_throughput_chk.1612915343 Aug 21 08:12:12 AM UTC 24 Aug 21 08:12:24 AM UTC 24 622968086 ps
T254 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/24.rom_ctrl_corrupt_sig_fatal_chk.4093509026 Aug 21 08:10:00 AM UTC 24 Aug 21 08:12:24 AM UTC 24 1981637692 ps
T255 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/37.rom_ctrl_alert_test.3581459739 Aug 21 08:12:14 AM UTC 24 Aug 21 08:12:27 AM UTC 24 261004575 ps
T51 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/3.rom_ctrl_corrupt_sig_fatal_chk.800587375 Aug 21 08:08:23 AM UTC 24 Aug 21 08:12:29 AM UTC 24 15516101552 ps
T256 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/38.rom_ctrl_stress_all.3383765123 Aug 21 08:12:16 AM UTC 24 Aug 21 08:12:30 AM UTC 24 479137571 ps
T30 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_sec_cm.2963547882 Aug 21 08:08:19 AM UTC 24 Aug 21 08:12:30 AM UTC 24 725040099 ps
T257 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/34.rom_ctrl_stress_all_with_rand_reset.52602628 Aug 21 08:11:46 AM UTC 24 Aug 21 08:12:31 AM UTC 24 2193944897 ps
T258 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/38.rom_ctrl_alert_test.3884509634 Aug 21 08:12:22 AM UTC 24 Aug 21 08:12:33 AM UTC 24 377426949 ps
T259 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/37.rom_ctrl_stress_all.4060314955 Aug 21 08:12:11 AM UTC 24 Aug 21 08:12:34 AM UTC 24 545178298 ps
T260 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/36.rom_ctrl_kmac_err_chk.790729700 Aug 21 08:12:08 AM UTC 24 Aug 21 08:12:34 AM UTC 24 8222602310 ps
T261 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/38.rom_ctrl_max_throughput_chk.3118438964 Aug 21 08:12:17 AM UTC 24 Aug 21 08:12:37 AM UTC 24 265905733 ps
T156 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/30.rom_ctrl_stress_all_with_rand_reset.1276141198 Aug 21 08:11:01 AM UTC 24 Aug 21 08:12:39 AM UTC 24 2372191675 ps
T262 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/39.rom_ctrl_max_throughput_chk.2511981170 Aug 21 08:12:24 AM UTC 24 Aug 21 08:12:40 AM UTC 24 698779883 ps
T263 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/36.rom_ctrl_stress_all.1854982824 Aug 21 08:11:59 AM UTC 24 Aug 21 08:12:42 AM UTC 24 3220697174 ps
T264 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/28.rom_ctrl_stress_all_with_rand_reset.3684001452 Aug 21 08:10:39 AM UTC 24 Aug 21 08:12:42 AM UTC 24 7757667801 ps
T265 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/16.rom_ctrl_stress_all_with_rand_reset.1369945363 Aug 21 08:09:10 AM UTC 24 Aug 21 08:12:42 AM UTC 24 21044463434 ps
T266 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/39.rom_ctrl_alert_test.892808175 Aug 21 08:12:31 AM UTC 24 Aug 21 08:12:44 AM UTC 24 661037903 ps
T267 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/40.rom_ctrl_max_throughput_chk.336680855 Aug 21 08:12:32 AM UTC 24 Aug 21 08:12:44 AM UTC 24 273746039 ps
T268 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/37.rom_ctrl_kmac_err_chk.319036656 Aug 21 08:12:14 AM UTC 24 Aug 21 08:12:44 AM UTC 24 722469765 ps
T37 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/0.rom_ctrl_sec_cm.3958174355 Aug 21 08:08:19 AM UTC 24 Aug 21 08:12:45 AM UTC 24 1479503734 ps
T269 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/40.rom_ctrl_alert_test.1693379539 Aug 21 08:12:38 AM UTC 24 Aug 21 08:12:49 AM UTC 24 689829727 ps
T270 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/38.rom_ctrl_kmac_err_chk.2831157 Aug 21 08:12:20 AM UTC 24 Aug 21 08:12:53 AM UTC 24 8237429450 ps
T52 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/1.rom_ctrl_corrupt_sig_fatal_chk.3861036741 Aug 21 08:08:19 AM UTC 24 Aug 21 08:12:54 AM UTC 24 4485525350 ps
T271 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/39.rom_ctrl_kmac_err_chk.715697357 Aug 21 08:12:28 AM UTC 24 Aug 21 08:12:55 AM UTC 24 1981025918 ps
T272 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/40.rom_ctrl_stress_all.569297059 Aug 21 08:12:31 AM UTC 24 Aug 21 08:12:57 AM UTC 24 844768211 ps
T273 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/41.rom_ctrl_alert_test.3652231889 Aug 21 08:12:45 AM UTC 24 Aug 21 08:12:57 AM UTC 24 689187560 ps
T274 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/40.rom_ctrl_kmac_err_chk.1723536311 Aug 21 08:12:34 AM UTC 24 Aug 21 08:13:00 AM UTC 24 1322873712 ps
T275 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/41.rom_ctrl_max_throughput_chk.2758716418 Aug 21 08:12:41 AM UTC 24 Aug 21 08:13:00 AM UTC 24 1072249029 ps
T276 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/42.rom_ctrl_max_throughput_chk.3860657406 Aug 21 08:12:45 AM UTC 24 Aug 21 08:13:02 AM UTC 24 278492934 ps
T277 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/43.rom_ctrl_kmac_err_chk.2343860191 Aug 21 08:13:00 AM UTC 24 Aug 21 08:13:26 AM UTC 24 630033568 ps
T278 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/41.rom_ctrl_stress_all.1860286074 Aug 21 08:12:40 AM UTC 24 Aug 21 08:13:03 AM UTC 24 379186103 ps
T38 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/2.rom_ctrl_sec_cm.2823032177 Aug 21 08:08:19 AM UTC 24 Aug 21 08:13:08 AM UTC 24 503752531 ps
T65 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_corrupt_sig_fatal_chk.3734403968 Aug 21 08:08:23 AM UTC 24 Aug 21 08:13:08 AM UTC 24 9437780018 ps
T279 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/8.rom_ctrl_corrupt_sig_fatal_chk.344493237 Aug 21 08:08:30 AM UTC 24 Aug 21 08:13:09 AM UTC 24 3331166851 ps
T280 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/42.rom_ctrl_kmac_err_chk.4036513203 Aug 21 08:12:50 AM UTC 24 Aug 21 08:13:10 AM UTC 24 665079561 ps
T281 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/39.rom_ctrl_stress_all.917101093 Aug 21 08:12:23 AM UTC 24 Aug 21 08:13:10 AM UTC 24 3787459806 ps
T152 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/16.rom_ctrl_corrupt_sig_fatal_chk.1265303113 Aug 21 08:09:06 AM UTC 24 Aug 21 08:13:10 AM UTC 24 14690402077 ps
T282 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/42.rom_ctrl_alert_test.507015195 Aug 21 08:12:55 AM UTC 24 Aug 21 08:13:11 AM UTC 24 260819756 ps
T283 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/43.rom_ctrl_max_throughput_chk.1648333507 Aug 21 08:12:57 AM UTC 24 Aug 21 08:13:14 AM UTC 24 183272958 ps
T284 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/25.rom_ctrl_stress_all_with_rand_reset.3481974000 Aug 21 08:10:14 AM UTC 24 Aug 21 08:13:15 AM UTC 24 16314825875 ps
T285 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/29.rom_ctrl_corrupt_sig_fatal_chk.4180543720 Aug 21 08:10:46 AM UTC 24 Aug 21 08:13:15 AM UTC 24 18483192601 ps
T286 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/43.rom_ctrl_alert_test.799282657 Aug 21 08:13:03 AM UTC 24 Aug 21 08:13:16 AM UTC 24 552497174 ps
T287 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/18.rom_ctrl_corrupt_sig_fatal_chk.1416670811 Aug 21 08:09:19 AM UTC 24 Aug 21 08:13:18 AM UTC 24 6742452734 ps
T288 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/41.rom_ctrl_kmac_err_chk.2100778671 Aug 21 08:12:43 AM UTC 24 Aug 21 08:13:21 AM UTC 24 8198696559 ps
T289 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/44.rom_ctrl_alert_test.3310814839 Aug 21 08:13:11 AM UTC 24 Aug 21 08:13:23 AM UTC 24 664275923 ps
T290 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/44.rom_ctrl_stress_all.3862345087 Aug 21 08:13:03 AM UTC 24 Aug 21 08:13:24 AM UTC 24 1142619874 ps
T291 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/44.rom_ctrl_max_throughput_chk.3691637603 Aug 21 08:13:08 AM UTC 24 Aug 21 08:13:25 AM UTC 24 715998861 ps
T292 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/45.rom_ctrl_alert_test.875449797 Aug 21 08:13:17 AM UTC 24 Aug 21 08:13:26 AM UTC 24 168009421 ps
T293 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/42.rom_ctrl_stress_all.1561801620 Aug 21 08:12:45 AM UTC 24 Aug 21 08:13:28 AM UTC 24 5455553509 ps
T66 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.640052220 Aug 21 08:08:28 AM UTC 24 Aug 21 08:13:32 AM UTC 24 5249290679 ps
T294 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/26.rom_ctrl_stress_all_with_rand_reset.1802588256 Aug 21 08:10:23 AM UTC 24 Aug 21 08:13:35 AM UTC 24 15011944014 ps
T295 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/45.rom_ctrl_stress_all.2353940626 Aug 21 08:13:12 AM UTC 24 Aug 21 08:13:39 AM UTC 24 266826830 ps
T159 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/40.rom_ctrl_stress_all_with_rand_reset.2050167268 Aug 21 08:12:35 AM UTC 24 Aug 21 08:13:39 AM UTC 24 2574699395 ps
T296 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/44.rom_ctrl_kmac_err_chk.3387404470 Aug 21 08:13:10 AM UTC 24 Aug 21 08:13:39 AM UTC 24 353575121 ps
T297 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/46.rom_ctrl_max_throughput_chk.2589670835 Aug 21 08:13:22 AM UTC 24 Aug 21 08:13:40 AM UTC 24 644916891 ps
T298 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/46.rom_ctrl_alert_test.4247819213 Aug 21 08:13:26 AM UTC 24 Aug 21 08:13:42 AM UTC 24 857425958 ps
T299 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/41.rom_ctrl_stress_all_with_rand_reset.2564759844 Aug 21 08:12:43 AM UTC 24 Aug 21 08:13:44 AM UTC 24 4242628946 ps
T300 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/46.rom_ctrl_stress_all.4216819584 Aug 21 08:13:19 AM UTC 24 Aug 21 08:13:45 AM UTC 24 1840965305 ps
T301 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/47.rom_ctrl_max_throughput_chk.1004865568 Aug 21 08:13:27 AM UTC 24 Aug 21 08:13:45 AM UTC 24 263602457 ps
T302 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/17.rom_ctrl_stress_all_with_rand_reset.1077924011 Aug 21 08:09:16 AM UTC 24 Aug 21 08:13:45 AM UTC 24 3570712381 ps
T303 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/6.rom_ctrl_stress_all_with_rand_reset.222207599 Aug 21 08:08:23 AM UTC 24 Aug 21 08:13:46 AM UTC 24 8816170532 ps
T304 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/19.rom_ctrl_corrupt_sig_fatal_chk.2375740780 Aug 21 08:09:23 AM UTC 24 Aug 21 08:13:47 AM UTC 24 9013706606 ps
T305 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/45.rom_ctrl_kmac_err_chk.2128919732 Aug 21 08:13:16 AM UTC 24 Aug 21 08:13:49 AM UTC 24 4008103030 ps
T306 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_64kB-sim-vcs/coverage/default/47.rom_ctrl_stress_all.1202131200 Aug 21 08:13:27 AM UTC 24 Aug 21 08:13:49 AM UTC 24 5381624468 ps
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