Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
74.27 90.58 76.10 86.17 58.97 77.00 98.42 32.67


Total tests in report: 281
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
53.23 53.23 82.18 82.18 49.73 49.73 31.33 31.33 48.72 48.72 64.83 64.83 91.97 91.97 3.82 3.82 /workspace/coverage/default/26.rv_dm_stress_all.2849283705
60.14 6.92 84.69 2.52 56.87 7.14 69.10 37.77 48.72 0.00 65.33 0.50 92.08 0.11 4.21 0.40 /workspace/coverage/default/3.rv_dm_sec_cm.828500794
64.92 4.77 84.99 0.30 60.99 4.12 72.18 3.08 53.85 5.13 67.00 1.67 93.14 1.06 22.26 18.04 /workspace/coverage/cover_reg_top/18.rv_dm_tap_fsm_rand_reset.2382238438
67.71 2.80 88.02 3.02 67.45 6.46 72.94 0.76 57.69 3.85 72.17 5.17 93.14 0.00 22.58 0.32 /workspace/coverage/default/40.rv_dm_stress_all.2887565235
69.57 1.85 89.83 1.81 71.70 4.26 75.66 2.72 57.69 0.00 74.17 2.00 94.61 1.48 23.29 0.72 /workspace/coverage/default/16.rv_dm_alert_test.4209472581
71.29 1.72 90.13 0.30 74.31 2.61 75.94 0.28 57.69 0.00 75.00 0.83 94.61 0.00 31.32 8.03 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.4287087625
72.23 0.94 90.13 0.00 75.00 0.69 79.78 3.84 57.69 0.00 75.17 0.17 96.20 1.58 31.64 0.32 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.2982630904
72.48 0.25 90.28 0.15 75.00 0.00 79.94 0.16 58.97 1.28 75.33 0.17 96.20 0.00 31.64 0.00 /workspace/coverage/default/48.rv_dm_stress_all.2276899217
72.69 0.21 90.28 0.00 75.00 0.00 81.37 1.44 58.97 0.00 75.33 0.00 96.20 0.00 31.64 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.712580732
72.89 0.20 90.28 0.00 75.00 0.00 82.45 1.08 58.97 0.00 75.33 0.00 96.20 0.00 31.96 0.32 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.1965606960
73.07 0.18 90.28 0.00 75.00 0.00 82.45 0.00 58.97 0.00 75.33 0.00 97.47 1.27 31.96 0.00 /workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.3946815282
73.24 0.17 90.28 0.00 75.27 0.27 82.93 0.48 58.97 0.00 75.33 0.00 97.68 0.21 32.19 0.24 /workspace/coverage/cover_reg_top/22.rv_dm_tap_fsm_rand_reset.2831757818
73.37 0.13 90.38 0.10 75.41 0.14 82.93 0.00 58.97 0.00 76.00 0.67 97.68 0.00 32.19 0.00 /workspace/coverage/default/1.rv_dm_rom_read_access.2936907982
73.48 0.11 90.38 0.00 75.55 0.14 83.57 0.64 58.97 0.00 76.00 0.00 97.68 0.00 32.19 0.00 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.100635400
73.58 0.10 90.38 0.00 75.82 0.27 83.69 0.12 58.97 0.00 76.33 0.33 97.68 0.00 32.19 0.00 /workspace/coverage/default/42.rv_dm_stress_all.2816385799
73.68 0.10 90.38 0.00 75.82 0.00 83.77 0.08 58.97 0.00 76.33 0.00 98.31 0.63 32.19 0.00 /workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.1422114798
73.77 0.09 90.38 0.00 75.82 0.00 84.29 0.52 58.97 0.00 76.33 0.00 98.31 0.00 32.27 0.08 /workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.1756225101
73.84 0.07 90.38 0.00 75.82 0.00 84.81 0.52 58.97 0.00 76.33 0.00 98.31 0.00 32.27 0.00 /workspace/coverage/cover_reg_top/2.rv_dm_tap_fsm_rand_reset.1051351362
73.91 0.06 90.48 0.10 75.82 0.00 84.81 0.00 58.97 0.00 76.67 0.33 98.31 0.00 32.27 0.00 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.1174382436
73.96 0.06 90.48 0.00 75.82 0.00 85.13 0.32 58.97 0.00 76.67 0.00 98.31 0.00 32.35 0.08 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3190429137
74.01 0.05 90.53 0.05 75.82 0.00 85.17 0.04 58.97 0.00 76.83 0.17 98.31 0.00 32.43 0.08 /workspace/coverage/default/18.rv_dm_alert_test.3754677858
74.05 0.04 90.53 0.00 75.96 0.14 85.29 0.12 58.97 0.00 76.83 0.00 98.31 0.00 32.43 0.00 /workspace/coverage/cover_reg_top/16.rv_dm_tap_fsm_rand_reset.1341039650
74.08 0.03 90.53 0.00 75.96 0.00 85.53 0.24 58.97 0.00 76.83 0.00 98.31 0.00 32.43 0.00 /workspace/coverage/cover_reg_top/6.rv_dm_tap_fsm_rand_reset.951787863
74.12 0.03 90.53 0.00 75.96 0.00 85.53 0.00 58.97 0.00 76.83 0.00 98.31 0.00 32.67 0.24 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.1435817892
74.15 0.03 90.53 0.00 76.10 0.14 85.61 0.08 58.97 0.00 76.83 0.00 98.31 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/17.rv_dm_tap_fsm_rand_reset.3521961484
74.18 0.03 90.58 0.05 76.10 0.00 85.61 0.00 58.97 0.00 77.00 0.17 98.31 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.1849162829
74.20 0.02 90.58 0.00 76.10 0.00 85.73 0.12 58.97 0.00 77.00 0.00 98.31 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.1561996670
74.21 0.02 90.58 0.00 76.10 0.00 85.73 0.00 58.97 0.00 77.00 0.00 98.42 0.11 32.67 0.00 /workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.3834015916
74.22 0.01 90.58 0.00 76.10 0.00 85.81 0.08 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.1130923652
74.23 0.01 90.58 0.00 76.10 0.00 85.89 0.08 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.3667880273
74.25 0.01 90.58 0.00 76.10 0.00 85.97 0.08 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/30.rv_dm_tap_fsm_rand_reset.1329146296
74.26 0.01 90.58 0.00 76.10 0.00 86.05 0.08 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/33.rv_dm_tap_fsm_rand_reset.399227646
74.26 0.01 90.58 0.00 76.10 0.00 86.09 0.04 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2848335168
74.27 0.01 90.58 0.00 76.10 0.00 86.13 0.04 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.1139706547
74.27 0.01 90.58 0.00 76.10 0.00 86.17 0.04 58.97 0.00 77.00 0.00 98.42 0.00 32.67 0.00 /workspace/coverage/default/0.rv_dm_alert_test.173610641

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.2137610672
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.3523621812
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.4246556748
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.3430648833
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.2250524227
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.3578672531
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.687637401
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.680833894
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.114469233
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.1379302586
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.2093541113
/workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.3520328320
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.3054735202
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.767278166
/workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.1676785211
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.2570770388
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.3606128772
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.4201184721
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.374864918
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.2088546071
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.1745442605
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.851969702
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.175366072
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.1433494651
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.1771663764
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.2649341028
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.1144183399
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.2805315615
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.3855064386
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2965680917
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.3682585988
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.440806140
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.1659355604
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.1454814999
/workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.4091275919
/workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.3287874611
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.3641068572
/workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.1786471770
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.913820618
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.371489346
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.2525598453
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.3147025359
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.620002561
/workspace/coverage/cover_reg_top/11.rv_dm_tap_fsm_rand_reset.130971556
/workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.2927874063
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.2175148267
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2389310463
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.3240687330
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.2365963349
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.2944170358
/workspace/coverage/cover_reg_top/12.rv_dm_tap_fsm_rand_reset.3331385832
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.87963102
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.40896823
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.940461357
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.2444002628
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.3418608423
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.3581766734
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.2527415694
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.824730771
/workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.734712785
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.1301409255
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.1825126257
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.231193449
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.155826714
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.1358149502
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1416811222
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.2463461339
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.4269878987
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.972460999
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.1468767190
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.2886268704
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.771769266
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.1943896164
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.1928878580
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.2897710360
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.1101477513
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.2347228590
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.595079024
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.1060924769
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.2341327974
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.3408183162
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.2273529506
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.1698875245
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.3866503990
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.1154997639
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.2377248512
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.913650270
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.844190386
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.161182846
/workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.2922105727
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.4170366566
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.3386083044
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.459649462
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.3309581658
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.440970048
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.506018877
/workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.1493839718
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.758080944
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.1634573156
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.2562491904
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.3177007412
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.1829084449
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.279291476
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.3476041727
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.2648219286
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.3607502232
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.789732064
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.3002568210
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.1950623600
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.3682239349
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.2333857151
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.2452940274
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.1969592465
/workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.1760662098
/workspace/coverage/cover_reg_top/23.rv_dm_tap_fsm_rand_reset.3627419423
/workspace/coverage/cover_reg_top/26.rv_dm_tap_fsm_rand_reset.3136747755
/workspace/coverage/cover_reg_top/27.rv_dm_tap_fsm_rand_reset.2634863680
/workspace/coverage/cover_reg_top/28.rv_dm_tap_fsm_rand_reset.2978141022
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.2559764545
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.1231053167
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.3817226216
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.2635224542
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.1933576719
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.3437480250
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.319251788
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.1227541101
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.1695393315
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.4163075742
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.538713903
/workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.4052935823
/workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.3361757359
/workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.897383230
/workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.4219742295
/workspace/coverage/cover_reg_top/37.rv_dm_tap_fsm_rand_reset.1497113946
/workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.730090323
/workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.3162372337
/workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.3367839721
/workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.3058425551
/workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.2792950165
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.3402047318
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.180888793
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.330818360
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.1655522352
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.3646242870
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.3406454261
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.1064138406
/workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.1532073899
/workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3956100858
/workspace/coverage/cover_reg_top/4.rv_dm_same_csr_outstanding.281795516
/workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.877381116
/workspace/coverage/cover_reg_top/4.rv_dm_tl_intg_err.329118951
/workspace/coverage/cover_reg_top/5.rv_dm_csr_mem_rw_with_rand_reset.3185059527
/workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.3616142775
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.433270639
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.4210504391
/workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.3425786714
/workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.3582349674
/workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.1944513147
/workspace/coverage/cover_reg_top/6.rv_dm_csr_rw.1509771324
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.975556697
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.268035570
/workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.936526542
/workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.1439555902
/workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.2974731779
/workspace/coverage/cover_reg_top/7.rv_dm_csr_mem_rw_with_rand_reset.3330280044
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.2917389512
/workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.2271192692
/workspace/coverage/cover_reg_top/7.rv_dm_tap_fsm_rand_reset.146055772
/workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.1988016850
/workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.2252266552
/workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3685531568
/workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.3133124050
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.679456851
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.1047914286
/workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.3280167380
/workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.2269170036
/workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.3555971166
/workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.1762378772
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.138744180
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.1827935064
/workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.264209452
/workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.1119929767
/workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.398605460
/workspace/coverage/default/0.rv_dm_jtag_dtm_idle_hint.2085763368
/workspace/coverage/default/0.rv_dm_rom_read_access.2846264590
/workspace/coverage/default/0.rv_dm_sec_cm.2770823818
/workspace/coverage/default/0.rv_dm_smoke.310467147
/workspace/coverage/default/1.rv_dm_alert_test.1751793199
/workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.792649618
/workspace/coverage/default/1.rv_dm_sec_cm.79789007
/workspace/coverage/default/1.rv_dm_smoke.3172795613
/workspace/coverage/default/10.rv_dm_alert_test.1621275092
/workspace/coverage/default/10.rv_dm_stress_all.4083213254
/workspace/coverage/default/11.rv_dm_alert_test.3030482471
/workspace/coverage/default/12.rv_dm_alert_test.3777808356
/workspace/coverage/default/13.rv_dm_alert_test.1338939377
/workspace/coverage/default/14.rv_dm_alert_test.483733805
/workspace/coverage/default/14.rv_dm_stress_all.4146288252
/workspace/coverage/default/15.rv_dm_alert_test.1027514857
/workspace/coverage/default/17.rv_dm_alert_test.1425203537
/workspace/coverage/default/19.rv_dm_alert_test.590072548
/workspace/coverage/default/2.rv_dm_alert_test.2355149213
/workspace/coverage/default/2.rv_dm_sec_cm.869883075
/workspace/coverage/default/20.rv_dm_alert_test.2102836087
/workspace/coverage/default/21.rv_dm_alert_test.3196334037
/workspace/coverage/default/21.rv_dm_stress_all.1116329017
/workspace/coverage/default/22.rv_dm_alert_test.1517334360
/workspace/coverage/default/23.rv_dm_alert_test.3612333771
/workspace/coverage/default/24.rv_dm_alert_test.284650890
/workspace/coverage/default/25.rv_dm_alert_test.1341935184
/workspace/coverage/default/26.rv_dm_alert_test.2554250039
/workspace/coverage/default/27.rv_dm_alert_test.2668291742
/workspace/coverage/default/28.rv_dm_alert_test.2617092867
/workspace/coverage/default/28.rv_dm_stress_all.3938703663
/workspace/coverage/default/29.rv_dm_alert_test.1932307291
/workspace/coverage/default/29.rv_dm_stress_all.3665100474
/workspace/coverage/default/3.rv_dm_alert_test.1497316247
/workspace/coverage/default/30.rv_dm_alert_test.476379670
/workspace/coverage/default/31.rv_dm_alert_test.1978843855
/workspace/coverage/default/32.rv_dm_alert_test.781249593
/workspace/coverage/default/33.rv_dm_alert_test.1556736023
/workspace/coverage/default/34.rv_dm_alert_test.2064266321
/workspace/coverage/default/35.rv_dm_alert_test.2238757631
/workspace/coverage/default/36.rv_dm_alert_test.1080989097
/workspace/coverage/default/37.rv_dm_alert_test.2992327531
/workspace/coverage/default/38.rv_dm_alert_test.1038061355
/workspace/coverage/default/39.rv_dm_alert_test.1609092877
/workspace/coverage/default/4.rv_dm_alert_test.732295839
/workspace/coverage/default/4.rv_dm_sec_cm.4154085446
/workspace/coverage/default/40.rv_dm_alert_test.4199230538
/workspace/coverage/default/41.rv_dm_alert_test.4082141893
/workspace/coverage/default/42.rv_dm_alert_test.3212994189
/workspace/coverage/default/43.rv_dm_alert_test.3735888622
/workspace/coverage/default/44.rv_dm_alert_test.227437926
/workspace/coverage/default/45.rv_dm_alert_test.3948124115
/workspace/coverage/default/45.rv_dm_stress_all.2547226830
/workspace/coverage/default/46.rv_dm_alert_test.3460701562
/workspace/coverage/default/47.rv_dm_alert_test.975537193
/workspace/coverage/default/48.rv_dm_alert_test.1799207636
/workspace/coverage/default/49.rv_dm_alert_test.1487587254
/workspace/coverage/default/5.rv_dm_alert_test.2767871024
/workspace/coverage/default/5.rv_dm_stress_all.729380241
/workspace/coverage/default/6.rv_dm_alert_test.2437374839
/workspace/coverage/default/7.rv_dm_alert_test.1426095234
/workspace/coverage/default/8.rv_dm_alert_test.3796573662
/workspace/coverage/default/9.rv_dm_alert_test.3383981045



Total test records in report: 281
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/11.rv_dm_alert_test.3030482471 May 23 03:31:20 PM PDT 24 May 23 03:31:23 PM PDT 24 64991236 ps
T2 /workspace/coverage/default/1.rv_dm_alert_test.1751793199 May 23 03:30:45 PM PDT 24 May 23 03:30:48 PM PDT 24 104019989 ps
T3 /workspace/coverage/default/24.rv_dm_alert_test.284650890 May 23 03:31:43 PM PDT 24 May 23 03:31:48 PM PDT 24 56055370 ps
T4 /workspace/coverage/default/3.rv_dm_alert_test.1497316247 May 23 03:30:51 PM PDT 24 May 23 03:30:54 PM PDT 24 27039422 ps
T21 /workspace/coverage/default/18.rv_dm_alert_test.3754677858 May 23 03:31:44 PM PDT 24 May 23 03:31:49 PM PDT 24 23794380 ps
T5 /workspace/coverage/default/26.rv_dm_stress_all.2849283705 May 23 03:31:44 PM PDT 24 May 23 03:31:55 PM PDT 24 3257249167 ps
T22 /workspace/coverage/default/16.rv_dm_alert_test.4209472581 May 23 03:31:23 PM PDT 24 May 23 03:31:27 PM PDT 24 59038860 ps
T23 /workspace/coverage/default/27.rv_dm_alert_test.2668291742 May 23 03:31:41 PM PDT 24 May 23 03:31:45 PM PDT 24 22949913 ps
T24 /workspace/coverage/default/3.rv_dm_sec_cm.828500794 May 23 03:30:47 PM PDT 24 May 23 03:30:51 PM PDT 24 875279040 ps
T25 /workspace/coverage/default/35.rv_dm_alert_test.2238757631 May 23 03:31:48 PM PDT 24 May 23 03:31:53 PM PDT 24 58350521 ps
T60 /workspace/coverage/default/19.rv_dm_alert_test.590072548 May 23 03:31:41 PM PDT 24 May 23 03:31:45 PM PDT 24 17688162 ps
T54 /workspace/coverage/default/26.rv_dm_alert_test.2554250039 May 23 03:31:40 PM PDT 24 May 23 03:31:43 PM PDT 24 40998960 ps
T38 /workspace/coverage/default/0.rv_dm_alert_test.173610641 May 23 03:30:37 PM PDT 24 May 23 03:30:40 PM PDT 24 20192093 ps
T19 /workspace/coverage/default/9.rv_dm_alert_test.3383981045 May 23 03:31:22 PM PDT 24 May 23 03:31:25 PM PDT 24 22741609 ps
T50 /workspace/coverage/default/49.rv_dm_alert_test.1487587254 May 23 03:31:52 PM PDT 24 May 23 03:31:54 PM PDT 24 56878089 ps
T36 /workspace/coverage/default/6.rv_dm_alert_test.2437374839 May 23 03:30:59 PM PDT 24 May 23 03:31:03 PM PDT 24 103757207 ps
T15 /workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.792649618 May 23 03:30:53 PM PDT 24 May 23 03:30:55 PM PDT 24 152179230 ps
T61 /workspace/coverage/default/37.rv_dm_alert_test.2992327531 May 23 03:31:43 PM PDT 24 May 23 03:31:47 PM PDT 24 53150362 ps
T140 /workspace/coverage/default/45.rv_dm_alert_test.3948124115 May 23 03:31:48 PM PDT 24 May 23 03:31:52 PM PDT 24 18529250 ps
T40 /workspace/coverage/default/12.rv_dm_alert_test.3777808356 May 23 03:31:25 PM PDT 24 May 23 03:31:29 PM PDT 24 19535404 ps
T37 /workspace/coverage/default/4.rv_dm_alert_test.732295839 May 23 03:30:58 PM PDT 24 May 23 03:31:02 PM PDT 24 29206702 ps
T53 /workspace/coverage/default/44.rv_dm_alert_test.227437926 May 23 03:31:46 PM PDT 24 May 23 03:31:51 PM PDT 24 30313844 ps
T39 /workspace/coverage/default/38.rv_dm_alert_test.1038061355 May 23 03:31:45 PM PDT 24 May 23 03:31:50 PM PDT 24 28670119 ps
T10 /workspace/coverage/default/1.rv_dm_smoke.3172795613 May 23 03:30:34 PM PDT 24 May 23 03:30:38 PM PDT 24 649705956 ps
T136 /workspace/coverage/default/15.rv_dm_alert_test.1027514857 May 23 03:31:24 PM PDT 24 May 23 03:31:28 PM PDT 24 38278907 ps
T52 /workspace/coverage/default/36.rv_dm_alert_test.1080989097 May 23 03:31:43 PM PDT 24 May 23 03:31:48 PM PDT 24 30417670 ps
T51 /workspace/coverage/default/7.rv_dm_alert_test.1426095234 May 23 03:30:57 PM PDT 24 May 23 03:31:00 PM PDT 24 26510383 ps
T142 /workspace/coverage/default/40.rv_dm_alert_test.4199230538 May 23 03:31:45 PM PDT 24 May 23 03:31:50 PM PDT 24 51932490 ps
T143 /workspace/coverage/default/14.rv_dm_alert_test.483733805 May 23 03:31:22 PM PDT 24 May 23 03:31:25 PM PDT 24 40364004 ps
T72 /workspace/coverage/default/13.rv_dm_alert_test.1338939377 May 23 03:31:20 PM PDT 24 May 23 03:31:22 PM PDT 24 16950452 ps
T56 /workspace/coverage/default/5.rv_dm_alert_test.2767871024 May 23 03:30:58 PM PDT 24 May 23 03:31:03 PM PDT 24 41757526 ps
T137 /workspace/coverage/default/17.rv_dm_alert_test.1425203537 May 23 03:31:24 PM PDT 24 May 23 03:31:27 PM PDT 24 57338241 ps
T144 /workspace/coverage/default/25.rv_dm_alert_test.1341935184 May 23 03:31:40 PM PDT 24 May 23 03:31:42 PM PDT 24 37223394 ps
T57 /workspace/coverage/default/22.rv_dm_alert_test.1517334360 May 23 03:31:42 PM PDT 24 May 23 03:31:47 PM PDT 24 32614204 ps
T125 /workspace/coverage/default/20.rv_dm_alert_test.2102836087 May 23 03:31:42 PM PDT 24 May 23 03:31:46 PM PDT 24 43386979 ps
T131 /workspace/coverage/default/28.rv_dm_alert_test.2617092867 May 23 03:31:44 PM PDT 24 May 23 03:31:49 PM PDT 24 83442842 ps
T127 /workspace/coverage/default/43.rv_dm_alert_test.3735888622 May 23 03:31:47 PM PDT 24 May 23 03:31:52 PM PDT 24 35206178 ps
T128 /workspace/coverage/default/29.rv_dm_alert_test.1932307291 May 23 03:31:41 PM PDT 24 May 23 03:31:44 PM PDT 24 19338407 ps
T133 /workspace/coverage/default/33.rv_dm_alert_test.1556736023 May 23 03:31:45 PM PDT 24 May 23 03:31:50 PM PDT 24 26171826 ps
T11 /workspace/coverage/default/0.rv_dm_smoke.310467147 May 23 03:30:34 PM PDT 24 May 23 03:30:41 PM PDT 24 882747496 ps
T9 /workspace/coverage/default/28.rv_dm_stress_all.3938703663 May 23 03:31:42 PM PDT 24 May 23 03:31:52 PM PDT 24 1883776491 ps
T139 /workspace/coverage/default/47.rv_dm_alert_test.975537193 May 23 03:31:46 PM PDT 24 May 23 03:31:51 PM PDT 24 18863716 ps
T129 /workspace/coverage/default/23.rv_dm_alert_test.3612333771 May 23 03:31:41 PM PDT 24 May 23 03:31:44 PM PDT 24 40527739 ps
T145 /workspace/coverage/default/8.rv_dm_alert_test.3796573662 May 23 03:31:20 PM PDT 24 May 23 03:31:22 PM PDT 24 47951105 ps
T141 /workspace/coverage/default/32.rv_dm_alert_test.781249593 May 23 03:31:43 PM PDT 24 May 23 03:31:47 PM PDT 24 68568943 ps
T6 /workspace/coverage/default/14.rv_dm_stress_all.4146288252 May 23 03:31:23 PM PDT 24 May 23 03:31:39 PM PDT 24 3582369582 ps
T26 /workspace/coverage/default/0.rv_dm_sec_cm.2770823818 May 23 03:30:33 PM PDT 24 May 23 03:30:37 PM PDT 24 560720265 ps
T55 /workspace/coverage/default/41.rv_dm_alert_test.4082141893 May 23 03:31:47 PM PDT 24 May 23 03:31:51 PM PDT 24 37248019 ps
T27 /workspace/coverage/default/1.rv_dm_sec_cm.79789007 May 23 03:30:45 PM PDT 24 May 23 03:30:48 PM PDT 24 163947789 ps
T17 /workspace/coverage/default/1.rv_dm_rom_read_access.2936907982 May 23 03:30:48 PM PDT 24 May 23 03:30:52 PM PDT 24 51308836 ps
T126 /workspace/coverage/default/31.rv_dm_alert_test.1978843855 May 23 03:31:43 PM PDT 24 May 23 03:31:48 PM PDT 24 22322544 ps
T132 /workspace/coverage/default/34.rv_dm_alert_test.2064266321 May 23 03:31:42 PM PDT 24 May 23 03:31:47 PM PDT 24 178695707 ps
T7 /workspace/coverage/default/21.rv_dm_stress_all.1116329017 May 23 03:31:42 PM PDT 24 May 23 03:31:50 PM PDT 24 3722221589 ps
T138 /workspace/coverage/default/21.rv_dm_alert_test.3196334037 May 23 03:31:42 PM PDT 24 May 23 03:31:47 PM PDT 24 30789749 ps
T20 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.1174382436 May 23 03:30:33 PM PDT 24 May 23 03:30:36 PM PDT 24 122296777 ps
T146 /workspace/coverage/default/10.rv_dm_alert_test.1621275092 May 23 03:31:21 PM PDT 24 May 23 03:31:24 PM PDT 24 14575431 ps
T147 /workspace/coverage/default/46.rv_dm_alert_test.3460701562 May 23 03:31:48 PM PDT 24 May 23 03:31:52 PM PDT 24 27582941 ps
T148 /workspace/coverage/default/48.rv_dm_alert_test.1799207636 May 23 03:32:05 PM PDT 24 May 23 03:32:08 PM PDT 24 15689776 ps
T16 /workspace/coverage/default/45.rv_dm_stress_all.2547226830 May 23 03:31:47 PM PDT 24 May 23 03:31:55 PM PDT 24 1987929503 ps
T58 /workspace/coverage/default/4.rv_dm_sec_cm.4154085446 May 23 03:30:57 PM PDT 24 May 23 03:31:01 PM PDT 24 621186551 ps
T31 /workspace/coverage/default/0.rv_dm_jtag_dtm_idle_hint.2085763368 May 23 03:30:37 PM PDT 24 May 23 03:30:40 PM PDT 24 38579829 ps
T112 /workspace/coverage/default/2.rv_dm_alert_test.2355149213 May 23 03:30:46 PM PDT 24 May 23 03:30:50 PM PDT 24 51830206 ps
T14 /workspace/coverage/default/10.rv_dm_stress_all.4083213254 May 23 03:31:23 PM PDT 24 May 23 03:31:31 PM PDT 24 2313005940 ps
T8 /workspace/coverage/default/42.rv_dm_stress_all.2816385799 May 23 03:31:46 PM PDT 24 May 23 03:32:09 PM PDT 24 11908131338 ps
T149 /workspace/coverage/default/30.rv_dm_alert_test.476379670 May 23 03:31:42 PM PDT 24 May 23 03:31:46 PM PDT 24 54701993 ps
T12 /workspace/coverage/default/40.rv_dm_stress_all.2887565235 May 23 03:31:48 PM PDT 24 May 23 03:31:58 PM PDT 24 3094380182 ps
T76 /workspace/coverage/default/5.rv_dm_stress_all.729380241 May 23 03:30:57 PM PDT 24 May 23 03:31:04 PM PDT 24 2259950065 ps
T13 /workspace/coverage/default/48.rv_dm_stress_all.2276899217 May 23 03:31:48 PM PDT 24 May 23 03:32:05 PM PDT 24 8014857650 ps
T124 /workspace/coverage/default/29.rv_dm_stress_all.3665100474 May 23 03:31:45 PM PDT 24 May 23 03:31:56 PM PDT 24 6920191184 ps
T135 /workspace/coverage/default/42.rv_dm_alert_test.3212994189 May 23 03:31:46 PM PDT 24 May 23 03:31:50 PM PDT 24 51396048 ps
T59 /workspace/coverage/default/2.rv_dm_sec_cm.869883075 May 23 03:30:48 PM PDT 24 May 23 03:30:52 PM PDT 24 365898017 ps
T18 /workspace/coverage/default/0.rv_dm_rom_read_access.2846264590 May 23 03:30:33 PM PDT 24 May 23 03:30:37 PM PDT 24 68291864 ps
T107 /workspace/coverage/default/39.rv_dm_alert_test.1609092877 May 23 03:31:45 PM PDT 24 May 23 03:31:49 PM PDT 24 18787069 ps
T73 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.1695393315 May 23 03:35:28 PM PDT 24 May 23 03:35:35 PM PDT 24 661293452 ps
T74 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.1468767190 May 23 03:35:49 PM PDT 24 May 23 03:35:54 PM PDT 24 22631603 ps
T75 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.3147025359 May 23 03:35:43 PM PDT 24 May 23 03:35:48 PM PDT 24 145543808 ps
T33 /workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.3641068572 May 23 03:35:42 PM PDT 24 May 23 03:35:48 PM PDT 24 41604751 ps
T150 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.1698875245 May 23 03:35:51 PM PDT 24 May 23 03:35:56 PM PDT 24 23917288 ps
T151 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.1433494651 May 23 03:35:29 PM PDT 24 May 23 03:35:35 PM PDT 24 1161828842 ps
T35 /workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.3425786714 May 23 03:35:44 PM PDT 24 May 23 03:35:55 PM PDT 24 159910225 ps
T45 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.1745442605 May 23 03:35:28 PM PDT 24 May 23 03:36:33 PM PDT 24 39532767478 ps
T34 /workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.1119929767 May 23 03:35:42 PM PDT 24 May 23 03:35:50 PM PDT 24 118104724 ps
T152 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.680833894 May 23 03:35:13 PM PDT 24 May 23 03:35:20 PM PDT 24 78706178 ps
T28 /workspace/coverage/cover_reg_top/18.rv_dm_tap_fsm_rand_reset.2382238438 May 23 03:35:56 PM PDT 24 May 23 03:36:49 PM PDT 24 15929682179 ps
T153 /workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3956100858 May 23 03:35:44 PM PDT 24 May 23 03:35:50 PM PDT 24 79400181 ps
T48 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.433270639 May 23 03:35:44 PM PDT 24 May 23 03:35:50 PM PDT 24 882893452 ps
T32 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.4287087625 May 23 03:35:41 PM PDT 24 May 23 03:35:58 PM PDT 24 519459597 ps
T81 /workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.3855064386 May 23 03:35:25 PM PDT 24 May 23 03:35:35 PM PDT 24 3162664049 ps
T82 /workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.1358149502 May 23 03:35:50 PM PDT 24 May 23 03:36:02 PM PDT 24 547708310 ps
T83 /workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.1928878580 May 23 03:35:54 PM PDT 24 May 23 03:36:00 PM PDT 24 204118268 ps
T69 /workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.3817226216 May 23 03:35:29 PM PDT 24 May 23 03:35:35 PM PDT 24 186152058 ps
T29 /workspace/coverage/cover_reg_top/12.rv_dm_tap_fsm_rand_reset.3331385832 May 23 03:35:48 PM PDT 24 May 23 03:36:37 PM PDT 24 14340343122 ps
T30 /workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.3287874611 May 23 03:35:44 PM PDT 24 May 23 03:36:02 PM PDT 24 15897434475 ps
T77 /workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.913820618 May 23 03:35:45 PM PDT 24 May 23 03:35:52 PM PDT 24 81783749 ps
T154 /workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.155826714 May 23 03:35:44 PM PDT 24 May 23 03:35:50 PM PDT 24 42754668 ps
T78 /workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.1988016850 May 23 03:35:43 PM PDT 24 May 23 03:35:49 PM PDT 24 72993244 ps
T79 /workspace/coverage/cover_reg_top/7.rv_dm_csr_mem_rw_with_rand_reset.3330280044 May 23 03:35:42 PM PDT 24 May 23 03:35:50 PM PDT 24 2476609298 ps
T84 /workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.1762378772 May 23 03:35:42 PM PDT 24 May 23 03:35:48 PM PDT 24 80043876 ps
T71 /workspace/coverage/cover_reg_top/33.rv_dm_tap_fsm_rand_reset.399227646 May 23 03:35:57 PM PDT 24 May 23 03:36:19 PM PDT 24 7182194429 ps
T155 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.1047914286 May 23 03:35:42 PM PDT 24 May 23 03:35:47 PM PDT 24 36276977 ps
T49 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.3240687330 May 23 03:35:41 PM PDT 24 May 23 03:35:44 PM PDT 24 622161914 ps
T85 /workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.2347228590 May 23 03:35:49 PM PDT 24 May 23 03:36:02 PM PDT 24 3392183412 ps
T156 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.330818360 May 23 03:35:34 PM PDT 24 May 23 03:35:39 PM PDT 24 457649493 ps
T86 /workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.1422114798 May 23 03:35:54 PM PDT 24 May 23 03:36:06 PM PDT 24 619002884 ps
T80 /workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.1130923652 May 23 03:35:25 PM PDT 24 May 23 03:35:38 PM PDT 24 1221918491 ps
T157 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.3402047318 May 23 03:35:28 PM PDT 24 May 23 03:35:43 PM PDT 24 3308823216 ps
T87 /workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.2886268704 May 23 03:35:41 PM PDT 24 May 23 03:35:49 PM PDT 24 304668014 ps
T89 /workspace/coverage/cover_reg_top/22.rv_dm_tap_fsm_rand_reset.2831757818 May 23 03:35:56 PM PDT 24 May 23 03:36:18 PM PDT 24 8924119718 ps
T88 /workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.440970048 May 23 03:35:55 PM PDT 24 May 23 03:36:03 PM PDT 24 127319720 ps
T111 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3190429137 May 23 03:35:47 PM PDT 24 May 23 03:36:01 PM PDT 24 742560418 ps
T130 /workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.3582349674 May 23 03:35:44 PM PDT 24 May 23 03:35:51 PM PDT 24 161818478 ps
T134 /workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.940461357 May 23 03:35:48 PM PDT 24 May 23 03:35:56 PM PDT 24 688075482 ps
T113 /workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.2974731779 May 23 03:35:42 PM PDT 24 May 23 03:35:56 PM PDT 24 2088864102 ps
T158 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.459649462 May 23 03:35:58 PM PDT 24 May 23 03:36:14 PM PDT 24 2698639241 ps
T104 /workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.3280167380 May 23 03:35:41 PM PDT 24 May 23 03:35:46 PM PDT 24 300978930 ps
T159 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.2897710360 May 23 03:35:43 PM PDT 24 May 23 03:35:49 PM PDT 24 2712653180 ps
T160 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.1771663764 May 23 03:35:27 PM PDT 24 May 23 03:35:32 PM PDT 24 64705512 ps
T161 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.1849162829 May 23 03:35:07 PM PDT 24 May 23 03:35:15 PM PDT 24 2662169185 ps
T162 /workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1416811222 May 23 03:35:49 PM PDT 24 May 23 03:35:57 PM PDT 24 228212049 ps
T46 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.712580732 May 23 03:35:09 PM PDT 24 May 23 03:35:27 PM PDT 24 12800715603 ps
T105 /workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.620002561 May 23 03:35:45 PM PDT 24 May 23 03:35:58 PM PDT 24 408845808 ps
T115 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.1435817892 May 23 03:35:29 PM PDT 24 May 23 03:35:51 PM PDT 24 3072347357 ps
T116 /workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.1060924769 May 23 03:35:54 PM PDT 24 May 23 03:36:17 PM PDT 24 1484356417 ps
T163 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.3646242870 May 23 03:35:29 PM PDT 24 May 23 03:35:34 PM PDT 24 1746183809 ps
T90 /workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.1829084449 May 23 03:35:29 PM PDT 24 May 23 03:35:34 PM PDT 24 56648690 ps
T164 /workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.3361757359 May 23 03:35:27 PM PDT 24 May 23 03:35:32 PM PDT 24 29251305 ps
T165 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.3607502232 May 23 03:35:26 PM PDT 24 May 23 03:35:30 PM PDT 24 136005370 ps
T64 /workspace/coverage/cover_reg_top/17.rv_dm_tap_fsm_rand_reset.3521961484 May 23 03:35:42 PM PDT 24 May 23 03:36:06 PM PDT 24 9755008119 ps
T166 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.2250524227 May 23 03:35:13 PM PDT 24 May 23 03:36:05 PM PDT 24 10357046924 ps
T120 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.1493839718 May 23 03:35:54 PM PDT 24 May 23 03:36:18 PM PDT 24 3433346964 ps
T167 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.1655522352 May 23 03:35:29 PM PDT 24 May 23 03:35:33 PM PDT 24 105993889 ps
T168 /workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.1301409255 May 23 03:35:45 PM PDT 24 May 23 03:35:53 PM PDT 24 618614071 ps
T169 /workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.1944513147 May 23 03:35:39 PM PDT 24 May 23 03:35:45 PM PDT 24 1904075365 ps
T170 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.687637401 May 23 03:35:10 PM PDT 24 May 23 03:35:17 PM PDT 24 36099657 ps
T41 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.3437480250 May 23 03:35:28 PM PDT 24 May 23 03:35:33 PM PDT 24 927485328 ps
T171 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.679456851 May 23 03:35:43 PM PDT 24 May 23 03:35:50 PM PDT 24 590770756 ps
T172 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.913650270 May 23 03:35:57 PM PDT 24 May 23 03:36:07 PM PDT 24 946420546 ps
T173 /workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.506018877 May 23 03:35:55 PM PDT 24 May 23 03:36:05 PM PDT 24 201263444 ps
T108 /workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.1154997639 May 23 03:35:57 PM PDT 24 May 23 03:36:06 PM PDT 24 188148790 ps
T91 /workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.2562491904 May 23 03:35:29 PM PDT 24 May 23 03:35:35 PM PDT 24 217732339 ps
T109 /workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.2175148267 May 23 03:35:41 PM PDT 24 May 23 03:35:45 PM PDT 24 88234829 ps
T92 /workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.3946815282 May 23 03:35:43 PM PDT 24 May 23 03:35:50 PM PDT 24 54640317 ps
T117 /workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.2269170036 May 23 03:35:40 PM PDT 24 May 23 03:35:50 PM PDT 24 636510006 ps
T174 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.1454814999 May 23 03:35:43 PM PDT 24 May 23 03:35:48 PM PDT 24 38446642 ps
T110 /workspace/coverage/cover_reg_top/26.rv_dm_tap_fsm_rand_reset.3136747755 May 23 03:35:57 PM PDT 24 May 23 03:36:30 PM PDT 24 7466086207 ps
T175 /workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.3058425551 May 23 03:35:44 PM PDT 24 May 23 03:35:54 PM PDT 24 1391654954 ps
T176 /workspace/coverage/cover_reg_top/30.rv_dm_tap_fsm_rand_reset.1329146296 May 23 03:35:54 PM PDT 24 May 23 03:36:12 PM PDT 24 12127484632 ps
T106 /workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.264209452 May 23 03:35:44 PM PDT 24 May 23 03:35:55 PM PDT 24 286645177 ps
T177 /workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.2333857151 May 23 03:35:27 PM PDT 24 May 23 03:35:31 PM PDT 24 18345613 ps
T123 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.734712785 May 23 03:35:48 PM PDT 24 May 23 03:36:11 PM PDT 24 13053764199 ps
T47 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.1933576719 May 23 03:35:27 PM PDT 24 May 23 03:36:06 PM PDT 24 8341223711 ps
T178 /workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.161182846 May 23 03:35:57 PM PDT 24 May 23 03:36:07 PM PDT 24 505517325 ps
T97 /workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.374864918 May 23 03:35:24 PM PDT 24 May 23 03:35:27 PM PDT 24 73744433 ps
T70 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.1965606960 May 23 03:35:49 PM PDT 24 May 23 03:36:13 PM PDT 24 1804930244 ps
T179 /workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.2452940274 May 23 03:35:29 PM PDT 24 May 23 03:35:36 PM PDT 24 313908276 ps
T66 /workspace/coverage/cover_reg_top/6.rv_dm_tap_fsm_rand_reset.951787863 May 23 03:35:41 PM PDT 24 May 23 03:36:06 PM PDT 24 20793120153 ps
T180 /workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.3367839721 May 23 03:35:43 PM PDT 24 May 23 03:35:48 PM PDT 24 183003616 ps
T181 /workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.2805315615 May 23 03:35:29 PM PDT 24 May 23 03:35:33 PM PDT 24 21510190 ps
T67 /workspace/coverage/cover_reg_top/2.rv_dm_tap_fsm_rand_reset.1051351362 May 23 03:35:27 PM PDT 24 May 23 03:36:06 PM PDT 24 10827853263 ps
T182 /workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.3162372337 May 23 03:35:42 PM PDT 24 May 23 03:36:52 PM PDT 24 4908460114 ps
T183 /workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.1532073899 May 23 03:35:43 PM PDT 24 May 23 03:35:48 PM PDT 24 43732922 ps
T184 /workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.771769266 May 23 03:35:50 PM PDT 24 May 23 03:35:59 PM PDT 24 168099721 ps
T121 /workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.1760662098 May 23 03:35:26 PM PDT 24 May 23 03:35:39 PM PDT 24 1495334694 ps
T65 /workspace/coverage/cover_reg_top/16.rv_dm_tap_fsm_rand_reset.1341039650 May 23 03:35:50 PM PDT 24 May 23 03:36:20 PM PDT 24 7381954365 ps
T185 /workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.138744180 May 23 03:35:45 PM PDT 24 May 23 03:35:51 PM PDT 24 401693609 ps
T186 /workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.3682585988 May 23 03:35:39 PM PDT 24 May 23 03:35:44 PM PDT 24 1789901864 ps
T187 /workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.231193449 May 23 03:35:49 PM PDT 24 May 23 03:35:55 PM PDT 24 463130012 ps
T118 /workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.40896823 May 23 03:35:47 PM PDT 24 May 23 03:36:01 PM PDT 24 454181105 ps
T98 /workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.3616142775 May 23 03:35:43 PM PDT 24 May 23 03:35:50 PM PDT 24 168725122 ps
T188 /workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.877381116 May 23 03:35:32 PM PDT 24 May 23 03:35:39 PM PDT 24 159745483 ps
T189 /workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2389310463 May 23 03:35:44 PM PDT 24 May 23 03:35:51 PM PDT 24 78454650 ps
T99 /workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.1676785211 May 23 03:35:27 PM PDT 24 May 23 03:36:44 PM PDT 24 3515263805 ps
T44 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.2982630904 May 23 03:35:26 PM PDT 24 May 23 03:35:30 PM PDT 24 712003332 ps
T102 /workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.1634573156 May 23 03:35:34 PM PDT 24 May 23 03:36:15 PM PDT 24 7642603596 ps
T190 /workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.440806140 May 23 03:35:41 PM PDT 24 May 23 03:35:45 PM PDT 24 300037502 ps
T191 /workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.1827935064 May 23 03:35:43 PM PDT 24 May 23 03:35:48 PM PDT 24 28323228 ps
T192 /workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.2271192692 May 23 03:35:42 PM PDT 24 May 23 03:35:50 PM PDT 24 516897002 ps
T93 /workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.2559764545 May 23 03:35:27 PM PDT 24 May 23 03:36:45 PM PDT 24 3400996145 ps
T193 /workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.4246556748 May 23 03:35:26 PM PDT 24 May 23 03:35:36 PM PDT 24 1695417082 ps
T194 /workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.3177007412 May 23 03:35:28 PM PDT 24 May 23 03:35:38 PM PDT 24 4250461219 ps
T195 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.319251788 May 23 03:35:27 PM PDT 24 May 23 03:35:32 PM PDT 24 424513254 ps
T196 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.1659355604 May 23 03:35:42 PM PDT 24 May 23 03:35:46 PM PDT 24 815123074 ps
T197 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.3309581658 May 23 03:36:00 PM PDT 24 May 23 03:36:06 PM PDT 24 44435109 ps
T198 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.4163075742 May 23 03:35:26 PM PDT 24 May 23 03:35:30 PM PDT 24 41086899 ps
T199 /workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.2463461339 May 23 03:35:51 PM PDT 24 May 23 03:35:57 PM PDT 24 115522506 ps
T94 /workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.730090323 May 23 03:35:31 PM PDT 24 May 23 03:36:49 PM PDT 24 7971164007 ps
T95 /workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.2944170358 May 23 03:35:39 PM PDT 24 May 23 03:35:47 PM PDT 24 233146159 ps
T200 /workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.3682239349 May 23 03:35:25 PM PDT 24 May 23 03:35:28 PM PDT 24 53825111 ps
T201 /workspace/coverage/cover_reg_top/37.rv_dm_tap_fsm_rand_reset.1497113946 May 23 03:35:57 PM PDT 24 May 23 03:36:17 PM PDT 24 14310754490 ps
T202 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.371489346 May 23 03:35:45 PM PDT 24 May 23 03:35:53 PM PDT 24 408549093 ps
T203 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.2365963349 May 23 03:35:42 PM PDT 24 May 23 03:35:45 PM PDT 24 61013371 ps
T103 /workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.1231053167 May 23 03:35:31 PM PDT 24 May 23 03:36:46 PM PDT 24 19624383065 ps
T204 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.538713903 May 23 03:35:32 PM PDT 24 May 23 03:35:36 PM PDT 24 201990004 ps
T205 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.2635224542 May 23 03:35:27 PM PDT 24 May 23 03:35:53 PM PDT 24 4957039858 ps
T206 /workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.3408183162 May 23 03:35:44 PM PDT 24 May 23 03:35:51 PM PDT 24 163733118 ps
T207 /workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3685531568 May 23 03:35:44 PM PDT 24 May 23 03:35:52 PM PDT 24 65315592 ps
T208 /workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.897383230 May 23 03:35:34 PM PDT 24 May 23 03:35:40 PM PDT 24 93349532 ps
T96 /workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.2377248512 May 23 03:35:57 PM PDT 24 May 23 03:36:05 PM PDT 24 310460306 ps
T209 /workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2965680917 May 23 03:35:26 PM PDT 24 May 23 03:35:33 PM PDT 24 76194559 ps
T210 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.1227541101 May 23 03:35:34 PM PDT 24 May 23 03:35:38 PM PDT 24 99641235 ps
T100 /workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.3523621812 May 23 03:35:08 PM PDT 24 May 23 03:35:15 PM PDT 24 115815036 ps
T211 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.279291476 May 23 03:35:26 PM PDT 24 May 23 03:35:51 PM PDT 24 4973966942 ps
T212 /workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.2527415694 May 23 03:35:45 PM PDT 24 May 23 03:35:53 PM PDT 24 222786042 ps
T213 /workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.1144183399 May 23 03:35:25 PM PDT 24 May 23 03:35:28 PM PDT 24 232739230 ps
T214 /workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.4219742295 May 23 03:35:29 PM PDT 24 May 23 03:35:35 PM PDT 24 228473709 ps
T215 /workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.2570770388 May 23 03:35:25 PM PDT 24 May 23 03:36:19 PM PDT 24 2811723599 ps
T114 /workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.824730771 May 23 03:35:44 PM PDT 24 May 23 03:35:52 PM PDT 24 585228307 ps
T216 /workspace/coverage/cover_reg_top/23.rv_dm_tap_fsm_rand_reset.3627419423 May 23 03:35:57 PM PDT 24 May 23 03:36:31 PM PDT 24 26584536375 ps
T217 /workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.3133124050 May 23 03:35:39 PM PDT 24 May 23 03:35:43 PM PDT 24 639328840 ps
T218 /workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.1439555902 May 23 03:35:39 PM PDT 24 May 23 03:35:46 PM PDT 24 945394860 ps
T219 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.1101477513 May 23 03:35:44 PM PDT 24 May 23 03:35:50 PM PDT 24 39016145 ps
T119 /workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.398605460 May 23 03:35:39 PM PDT 24 May 23 03:36:00 PM PDT 24 2208102086 ps
T220 /workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.1969592465 May 23 03:35:34 PM PDT 24 May 23 03:35:42 PM PDT 24 214448896 ps
T101 /workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.3834015916 May 23 03:35:32 PM PDT 24 May 23 03:35:36 PM PDT 24 58308898 ps
T221 /workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.4201184721 May 23 03:35:32 PM PDT 24 May 23 03:35:37 PM PDT 24 136432851 ps
T222 /workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.3667880273 May 23 03:35:28 PM PDT 24 May 23 03:35:35 PM PDT 24 2779529920 ps
T223 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.972460999 May 23 03:35:51 PM PDT 24 May 23 03:35:56 PM PDT 24 1510030608 ps
T224 /workspace/coverage/cover_reg_top/11.rv_dm_tap_fsm_rand_reset.130971556 May 23 03:35:45 PM PDT 24 May 23 03:36:22 PM PDT 24 30783840330 ps
T225 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.4210504391 May 23 03:35:42 PM PDT 24 May 23 03:35:46 PM PDT 24 103089524 ps
T226 /workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.4170366566 May 23 03:35:56 PM PDT 24 May 23 03:36:09 PM PDT 24 2045893591 ps
T227 /workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.1379302586 May 23 03:35:11 PM PDT 24 May 23 03:35:18 PM PDT 24 34093855 ps
T228 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.3002568210 May 23 03:35:25 PM PDT 24 May 23 03:35:27 PM PDT 24 170670541 ps
T42 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2848335168 May 23 03:35:29 PM PDT 24 May 23 03:35:36 PM PDT 24 2006682828 ps
T229 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.975556697 May 23 03:35:41 PM PDT 24 May 23 03:35:43 PM PDT 24 182069702 ps
T230 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.851969702 May 23 03:35:27 PM PDT 24 May 23 03:35:33 PM PDT 24 879412768 ps
T231 /workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.3555971166 May 23 03:35:43 PM PDT 24 May 23 03:35:51 PM PDT 24 467467433 ps
T232 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.1064138406 May 23 03:35:32 PM PDT 24 May 23 03:35:35 PM PDT 24 70111489 ps
T233 /workspace/coverage/cover_reg_top/5.rv_dm_csr_mem_rw_with_rand_reset.3185059527 May 23 03:35:43 PM PDT 24 May 23 03:35:55 PM PDT 24 3585005294 ps
T234 /workspace/coverage/cover_reg_top/6.rv_dm_csr_rw.1509771324 May 23 03:35:42 PM PDT 24 May 23 03:35:48 PM PDT 24 426854988 ps
T235 /workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.595079024 May 23 03:35:49 PM PDT 24 May 23 03:35:59 PM PDT 24 1160873996 ps
T236 /workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.3606128772 May 23 03:35:24 PM PDT 24 May 23 03:35:28 PM PDT 24 121903357 ps
T43 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.100635400 May 23 03:35:28 PM PDT 24 May 23 03:35:35 PM PDT 24 1351877538 ps
T237 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.4091275919 May 23 03:35:44 PM PDT 24 May 23 03:35:53 PM PDT 24 413922069 ps
T238 /workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.3386083044 May 23 03:35:54 PM PDT 24 May 23 03:36:00 PM PDT 24 124184441 ps
T239 /workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.3520328320 May 23 03:35:09 PM PDT 24 May 23 03:35:17 PM PDT 24 201702898 ps
T240 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.175366072 May 23 03:35:26 PM PDT 24 May 23 03:35:29 PM PDT 24 99608539 ps
T241 /workspace/coverage/cover_reg_top/4.rv_dm_same_csr_outstanding.281795516 May 23 03:35:44 PM PDT 24 May 23 03:35:56 PM PDT 24 535074369 ps
T242 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.2137610672 May 23 03:35:09 PM PDT 24 May 23 03:35:40 PM PDT 24 4123168721 ps
T243 /workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.1825126257 May 23 03:35:50 PM PDT 24 May 23 03:35:56 PM PDT 24 203307986 ps
T122 /workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.2922105727 May 23 03:35:55 PM PDT 24 May 23 03:36:20 PM PDT 24 882719818 ps
T244 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.3581766734 May 23 03:35:44 PM PDT 24 May 23 03:35:50 PM PDT 24 61235029 ps
T245 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.1950623600 May 23 03:35:27 PM PDT 24 May 23 03:35:31 PM PDT 24 66212409 ps
T246 /workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.4269878987 May 23 03:35:50 PM PDT 24 May 23 03:35:56 PM PDT 24 86398285 ps
T247 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.2525598453 May 23 03:35:43 PM PDT 24 May 23 03:35:49 PM PDT 24 178135223 ps
T248 /workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.4052935823 May 23 03:35:27 PM PDT 24 May 23 03:35:32 PM PDT 24 24455699 ps
T63 /workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.1756225101 May 23 03:35:43 PM PDT 24 May 23 03:36:05 PM PDT 24 1916514393 ps
T62 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.1561996670 May 23 03:35:08 PM PDT 24 May 23 03:35:15 PM PDT 24 506839937 ps
T249 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.2273529506 May 23 03:35:50 PM PDT 24 May 23 03:35:56 PM PDT 24 214159066 ps
T250 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.268035570 May 23 03:35:41 PM PDT 24 May 23 03:35:44 PM PDT 24 115384320 ps
T251 /workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.2444002628 May 23 03:35:45 PM PDT 24 May 23 03:35:52 PM PDT 24 98855035 ps
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