SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.rv_dm_regs_csr_assert | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
91.35 | 100.00 | 76.60 | 92.63 | 100.00 | 87.50 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
TlulOOBAddrErr_A | 135474538 | 146396 | 0 | 0 |
late_debug_enable_rd_A | 135474538 | 9433 | 0 | 0 |
late_debug_enable_regwen_rd_A | 135474538 | 7938 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 135474538 | 146396 | 0 | 0 |
T58 | 123314 | 21 | 0 | 0 |
T59 | 652897 | 5 | 0 | 0 |
T60 | 19783 | 47 | 0 | 0 |
T61 | 6815 | 171 | 0 | 0 |
T62 | 31589 | 566 | 0 | 0 |
T82 | 19440 | 416 | 0 | 0 |
T83 | 8786 | 62 | 0 | 0 |
T85 | 11643 | 240 | 0 | 0 |
T86 | 126712 | 48 | 0 | 0 |
T87 | 79658 | 3 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 135474538 | 9433 | 0 | 0 |
T58 | 123314 | 10 | 0 | 0 |
T59 | 652897 | 88 | 0 | 0 |
T63 | 17313 | 6 | 0 | 0 |
T64 | 42769 | 6 | 0 | 0 |
T82 | 19440 | 201 | 0 | 0 |
T94 | 10300 | 4 | 0 | 0 |
T124 | 137695 | 75 | 0 | 0 |
T125 | 48532 | 15 | 0 | 0 |
T126 | 244361 | 454 | 0 | 0 |
T127 | 159954 | 78 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 135474538 | 7938 | 0 | 0 |
T58 | 123314 | 12 | 0 | 0 |
T59 | 652897 | 115 | 0 | 0 |
T63 | 17313 | 6 | 0 | 0 |
T64 | 42769 | 20 | 0 | 0 |
T82 | 19440 | 157 | 0 | 0 |
T94 | 10300 | 14 | 0 | 0 |
T124 | 137695 | 67 | 0 | 0 |
T125 | 48532 | 29 | 0 | 0 |
T126 | 244361 | 449 | 0 | 0 |
T127 | 159954 | 72 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |