Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	966110	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	1280314	1		T2	3		T4	3		T5	14

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	708173	1		T2	6		T4	8		T5	6
values[0x0]	466244	1		T2	4		T5	11		T6	5
values[0x1]	1072007	1		T2	5		T4	1		T5	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	436769	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	1809655	1		T2	6		T4	5		T5	15

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	8828	1		T15	522		T9	243		T19	783
valid_sources[0x01]	8699	1		T15	481		T9	188		T19	783
valid_sources[0x02]	9123	1		T15	510		T9	360		T19	822
valid_sources[0x03]	8959	1		T6	1		T15	466		T9	250
valid_sources[0x04]	8171	1		T15	503		T9	246		T19	757
valid_sources[0x05]	8455	1		T15	476		T138	1		T9	276
valid_sources[0x06]	8641	1		T5	3		T15	509		T9	176
valid_sources[0x07]	8998	1		T15	488		T9	164		T19	776
valid_sources[0x08]	8645	1		T6	1		T15	502		T9	203
valid_sources[0x09]	8550	1		T31	2		T15	554		T9	228
valid_sources[0x0a]	8440	1		T15	507		T9	194		T19	751
valid_sources[0x0b]	8729	1		T15	464		T9	196		T19	808
valid_sources[0x0c]	8652	1		T15	522		T9	153		T19	763
valid_sources[0x0d]	8858	1		T6	1		T120	2		T15	499
valid_sources[0x0e]	8619	1		T15	483		T9	269		T19	842
valid_sources[0x0f]	9005	1		T15	556		T9	157		T19	840
valid_sources[0x10]	9131	1		T120	3		T15	484		T9	190
valid_sources[0x11]	10423	1		T15	498		T9	311		T19	818
valid_sources[0x12]	8763	1		T120	1		T15	460		T9	236
valid_sources[0x13]	8289	1		T120	1		T15	537		T9	265
valid_sources[0x14]	9306	1		T15	524		T9	214		T19	838
valid_sources[0x15]	8842	1		T15	491		T9	175		T19	760
valid_sources[0x16]	9119	1		T15	442		T9	167		T19	759
valid_sources[0x17]	8850	1		T15	478		T9	295		T19	801
valid_sources[0x18]	8910	1		T15	481		T9	359		T19	772
valid_sources[0x19]	8724	1		T15	461		T9	361		T19	811
valid_sources[0x1a]	8418	1		T15	508		T9	261		T19	831
valid_sources[0x1b]	8815	1		T15	528		T9	120		T19	794
valid_sources[0x1c]	9007	1		T15	493		T9	201		T19	753
valid_sources[0x1d]	9451	1		T15	451		T9	165		T19	839
valid_sources[0x1e]	8698	1		T15	551		T9	309		T19	807
valid_sources[0x1f]	8334	1		T15	470		T9	178		T19	770
valid_sources[0x20]	8439	1		T15	493		T9	198		T19	760
valid_sources[0x21]	8050	1		T34	6		T15	500		T9	140
valid_sources[0x22]	8183	1		T26	2		T15	567		T9	178
valid_sources[0x23]	8902	1		T26	1		T15	549		T9	273
valid_sources[0x24]	8578	1		T15	458		T9	242		T19	731
valid_sources[0x25]	8651	1		T15	515		T9	190		T19	782
valid_sources[0x26]	8753	1		T15	456		T9	279		T19	860
valid_sources[0x27]	8480	1		T6	1		T15	495		T9	311
valid_sources[0x28]	8779	1		T15	512		T9	203		T19	850
valid_sources[0x29]	9143	1		T15	533		T9	185		T19	787
valid_sources[0x2a]	8864	1		T15	461		T9	274		T19	803
valid_sources[0x2b]	8930	1		T120	1		T15	515		T9	344
valid_sources[0x2c]	8032	1		T31	1		T15	460		T9	195
valid_sources[0x2d]	8240	1		T120	1		T15	449		T9	187
valid_sources[0x2e]	8949	1		T15	491		T9	259		T19	793
valid_sources[0x2f]	8517	1		T15	528		T9	274		T19	818
valid_sources[0x30]	8374	1		T15	483		T9	198		T19	726
valid_sources[0x31]	11214	1		T15	473		T9	195		T19	755
valid_sources[0x32]	9017	1		T15	522		T9	277		T19	754
valid_sources[0x33]	8480	1		T6	2		T15	499		T9	221
valid_sources[0x34]	8337	1		T120	1		T15	450		T9	196
valid_sources[0x35]	9078	1		T15	484		T9	266		T19	836
valid_sources[0x36]	8457	1		T15	505		T9	377		T19	773
valid_sources[0x37]	8717	1		T8	20		T15	506		T9	255
valid_sources[0x38]	8439	1		T26	1		T15	547		T9	137
valid_sources[0x39]	8451	1		T15	466		T9	220		T19	807
valid_sources[0x3a]	8859	1		T15	462		T9	122		T19	821
valid_sources[0x3b]	9199	1		T15	463		T9	180		T19	876
valid_sources[0x3c]	8982	1		T120	1		T15	518		T9	216
valid_sources[0x3d]	8706	1		T120	2		T15	490		T9	259
valid_sources[0x3e]	8938	1		T15	508		T9	277		T19	798
valid_sources[0x3f]	8617	1		T15	498		T9	181		T19	849
valid_sources[0x40]	9134	1		T15	532		T9	219		T19	798
valid_sources[0x41]	8692	1		T15	490		T9	126		T19	800
valid_sources[0x42]	8485	1		T15	535		T9	198		T19	742
valid_sources[0x43]	8444	1		T15	485		T9	193		T19	762
valid_sources[0x44]	8577	1		T15	485		T9	222		T19	796
valid_sources[0x45]	9315	1		T15	486		T9	210		T19	808
valid_sources[0x46]	8634	1		T31	1		T15	537		T9	182
valid_sources[0x47]	8991	1		T15	499		T9	291		T19	774
valid_sources[0x48]	9020	1		T15	463		T9	201		T19	773
valid_sources[0x49]	8872	1		T15	501		T9	219		T19	814
valid_sources[0x4a]	9100	1		T15	496		T9	428		T19	801
valid_sources[0x4b]	10351	1		T31	1		T15	483		T9	204
valid_sources[0x4c]	8858	1		T15	493		T9	151		T19	826
valid_sources[0x4d]	8738	1		T31	1		T15	480		T9	198
valid_sources[0x4e]	8757	1		T120	1		T15	504		T9	207
valid_sources[0x4f]	8974	1		T120	1		T15	477		T9	185
valid_sources[0x50]	8628	1		T15	491		T9	257		T19	836
valid_sources[0x51]	8683	1		T15	463		T9	208		T19	813
valid_sources[0x52]	9199	1		T26	2		T15	537		T138	3
valid_sources[0x53]	8561	1		T31	1		T15	532		T9	216
valid_sources[0x54]	8630	1		T15	525		T9	177		T19	792
valid_sources[0x55]	8357	1		T15	505		T9	200		T19	759
valid_sources[0x56]	8595	1		T15	487		T9	325		T19	782
valid_sources[0x57]	8341	1		T15	477		T9	282		T19	794
valid_sources[0x58]	8359	1		T15	532		T9	205		T19	801
valid_sources[0x59]	8766	1		T15	456		T9	349		T19	803
valid_sources[0x5a]	8152	1		T15	510		T138	1		T9	187
valid_sources[0x5b]	8363	1		T15	488		T9	197		T19	812
valid_sources[0x5c]	9216	1		T31	1		T120	1		T15	476
valid_sources[0x5d]	8858	1		T26	2		T15	501		T9	304
valid_sources[0x5e]	8869	1		T15	437		T9	185		T19	831
valid_sources[0x5f]	9056	1		T15	459		T53	1		T138	1
valid_sources[0x60]	8618	1		T120	1		T15	517		T9	202
valid_sources[0x61]	8072	1		T15	492		T9	261		T19	768
valid_sources[0x62]	8338	1		T15	486		T9	222		T19	841
valid_sources[0x63]	9183	1		T15	535		T9	212		T19	815
valid_sources[0x64]	9004	1		T15	504		T9	144		T19	798
valid_sources[0x65]	8632	1		T120	1		T15	505		T9	186
valid_sources[0x66]	8982	1		T15	504		T9	300		T19	762
valid_sources[0x67]	8758	1		T15	470		T9	206		T19	825
valid_sources[0x68]	8926	1		T15	492		T9	227		T19	773
valid_sources[0x69]	8158	1		T15	499		T9	137		T19	718
valid_sources[0x6a]	8663	1		T6	1		T26	4		T15	522
valid_sources[0x6b]	9507	1		T15	534		T9	190		T19	818
valid_sources[0x6c]	8473	1		T15	504		T9	302		T19	874
valid_sources[0x6d]	8784	1		T15	514		T9	372		T19	820
valid_sources[0x6e]	8415	1		T15	504		T138	1		T9	216
valid_sources[0x6f]	8848	1		T120	1		T15	523		T9	237
valid_sources[0x70]	8809	1		T15	507		T9	257		T19	780
valid_sources[0x71]	8494	1		T15	463		T9	201		T19	796
valid_sources[0x72]	8803	1		T15	473		T9	278		T19	766
valid_sources[0x73]	8510	1		T25	24		T120	1		T15	493
valid_sources[0x74]	8272	1		T15	462		T9	234		T19	823
valid_sources[0x75]	8785	1		T15	486		T9	304		T19	812
valid_sources[0x76]	8648	1		T120	2		T15	454		T9	153
valid_sources[0x77]	9011	1		T4	5		T15	486		T9	288
valid_sources[0x78]	10084	1		T15	512		T9	328		T19	811
valid_sources[0x79]	9199	1		T15	506		T9	273		T19	772
valid_sources[0x7a]	8818	1		T15	513		T9	187		T19	817
valid_sources[0x7b]	9167	1		T15	550		T138	1		T9	204
valid_sources[0x7c]	9820	1		T15	528		T138	1		T9	181
valid_sources[0x7d]	9643	1		T15	467		T9	168		T19	754
valid_sources[0x7e]	8944	1		T15	464		T9	430		T19	754
valid_sources[0x7f]	8216	1		T15	491		T9	108		T19	806
valid_sources[0x80]	9185	1		T15	523		T9	185		T19	811

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

482819

1

T2

2

T4

3

T5

5

values[0x0]

all_enables

biggest_size

398742

1

T2

1

T5

7

T6

3

values[0x1]

all_enables

biggest_size

398753

1

T5

2

T25

1

T8

1

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	45339	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_enables	996090	1		T1	1		T2	7		T3	1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	267522	1		T15	22279		T9	10139		T19	37012
values[0x0]	376885	1		T2	4		T3	1		T39	6
values[0x1]	397022	1		T1	1		T2	3		T7	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	24202	Excluded

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
biggest_size	1017227	1		T1	1		T2	7		T3	1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4141	1		T15	398		T9	125		T19	583
valid_sources[0x01]	4045	1		T47	3		T15	94		T9	168
valid_sources[0x02]	3923	1		T42	1		T15	159		T53	1
valid_sources[0x03]	3931	1		T49	1		T66	1		T15	248
valid_sources[0x04]	4261	1		T15	549		T9	163		T19	623
valid_sources[0x05]	3683	1		T15	306		T9	157		T19	530
valid_sources[0x06]	4199	1		T47	1		T15	493		T76	2
valid_sources[0x07]	3723	1		T49	1		T15	156		T172	9
valid_sources[0x08]	3978	1		T15	248		T9	142		T19	637
valid_sources[0x09]	3980	1		T15	393		T9	139		T19	556
valid_sources[0x0a]	4287	1		T42	1		T14	1		T15	475
valid_sources[0x0b]	4881	1		T173	1		T15	347		T174	1
valid_sources[0x0c]	3813	1		T15	276		T175	2		T9	156
valid_sources[0x0d]	4111	1		T15	383		T9	162		T19	626
valid_sources[0x0e]	3623	1		T15	128		T9	158		T19	529
valid_sources[0x0f]	4225	1		T25	1		T173	1		T176	1
valid_sources[0x10]	3910	1		T15	208		T9	159		T19	607
valid_sources[0x11]	3717	1		T29	1		T15	40		T9	167
valid_sources[0x12]	4513	1		T15	954		T9	136		T19	587
valid_sources[0x13]	4151	1		T15	412		T75	1		T9	163
valid_sources[0x14]	4528	1		T15	679		T9	174		T19	514
valid_sources[0x15]	4233	1		T15	199		T9	141		T19	591
valid_sources[0x16]	4297	1		T15	484		T9	129		T19	620
valid_sources[0x17]	4692	1		T177	3		T15	830		T9	136
valid_sources[0x18]	4339	1		T178	1		T173	1		T15	429
valid_sources[0x19]	3804	1		T49	1		T173	1		T15	166
valid_sources[0x1a]	3972	1		T15	219		T9	145		T19	540
valid_sources[0x1b]	3810	1		T15	179		T9	164		T19	522
valid_sources[0x1c]	3984	1		T15	316		T78	1		T138	1
valid_sources[0x1d]	4225	1		T15	417		T9	165		T19	577
valid_sources[0x1e]	4207	1		T15	622		T9	150		T19	527
valid_sources[0x1f]	4181	1		T15	416		T9	125		T19	604
valid_sources[0x20]	3824	1		T65	1		T15	22		T9	150
valid_sources[0x21]	4080	1		T15	230		T9	168		T19	612
valid_sources[0x22]	4083	1		T15	348		T9	165		T19	536
valid_sources[0x23]	4319	1		T15	485		T9	162		T19	591
valid_sources[0x24]	4253	1		T15	242		T16	2		T179	2
valid_sources[0x25]	3638	1		T15	132		T9	163		T19	527
valid_sources[0x26]	4164	1		T15	279		T78	1		T9	155
valid_sources[0x27]	4101	1		T5	2		T15	413		T9	187
valid_sources[0x28]	4041	1		T173	1		T15	560		T9	180
valid_sources[0x29]	3636	1		T15	77		T9	168		T19	596
valid_sources[0x2a]	4165	1		T42	1		T15	254		T9	132
valid_sources[0x2b]	3960	1		T15	195		T75	1		T9	155
valid_sources[0x2c]	4149	1		T177	2		T15	526		T76	2
valid_sources[0x2d]	3755	1		T15	223		T74	1		T9	143
valid_sources[0x2e]	4181	1		T51	4		T48	1		T15	472
valid_sources[0x2f]	3856	1		T154	1		T15	206		T9	161
valid_sources[0x30]	4480	1		T15	884		T9	163		T19	549
valid_sources[0x31]	3867	1		T15	187		T179	5		T9	151
valid_sources[0x32]	4240	1		T51	1		T15	442		T9	166
valid_sources[0x33]	4580	1		T15	816		T9	162		T19	594
valid_sources[0x34]	4548	1		T15	652		T9	162		T19	584
valid_sources[0x35]	3799	1		T42	1		T15	189		T9	147
valid_sources[0x36]	4142	1		T31	2		T173	1		T15	7
valid_sources[0x37]	3743	1		T15	170		T9	144		T19	572
valid_sources[0x38]	4445	1		T6	3		T15	698		T9	134
valid_sources[0x39]	4627	1		T15	866		T9	147		T19	633
valid_sources[0x3a]	3918	1		T173	1		T15	269		T75	1
valid_sources[0x3b]	4103	1		T15	466		T9	154		T19	594
valid_sources[0x3c]	4106	1		T15	487		T9	152		T19	524
valid_sources[0x3d]	4382	1		T15	447		T9	144		T19	546
valid_sources[0x3e]	4274	1		T180	1		T15	645		T9	168
valid_sources[0x3f]	3797	1		T25	1		T15	83		T9	132
valid_sources[0x40]	3903	1		T15	168		T9	129		T19	540
valid_sources[0x41]	3808	1		T15	139		T79	1		T9	160
valid_sources[0x42]	3644	1		T15	105		T9	166		T19	581
valid_sources[0x43]	4265	1		T15	473		T9	161		T19	550
valid_sources[0x44]	3686	1		T15	252		T9	139		T19	561
valid_sources[0x45]	4089	1		T31	1		T173	1		T15	359
valid_sources[0x46]	4102	1		T15	552		T9	141		T19	581
valid_sources[0x47]	4614	1		T173	1		T15	650		T9	150
valid_sources[0x48]	3729	1		T15	76		T9	159		T19	540
valid_sources[0x49]	4347	1		T15	507		T9	162		T19	573
valid_sources[0x4a]	4253	1		T15	582		T9	120		T19	584
valid_sources[0x4b]	4082	1		T2	1		T15	210		T9	194
valid_sources[0x4c]	3479	1		T15	91		T9	179		T19	474
valid_sources[0x4d]	4043	1		T5	1		T31	2		T181	1
valid_sources[0x4e]	4625	1		T15	768		T9	167		T19	513
valid_sources[0x4f]	4107	1		T15	323		T9	138		T19	596
valid_sources[0x50]	3595	1		T66	1		T180	2		T15	46
valid_sources[0x51]	4153	1		T15	514		T9	148		T19	678
valid_sources[0x52]	4200	1		T182	1		T15	451		T9	178
valid_sources[0x53]	4299	1		T173	1		T15	654		T67	1
valid_sources[0x54]	4048	1		T42	1		T119	7		T15	400
valid_sources[0x55]	4147	1		T15	504		T67	1		T9	172
valid_sources[0x56]	4444	1		T15	676		T9	155		T19	565
valid_sources[0x57]	4072	1		T177	1		T15	310		T9	171
valid_sources[0x58]	3908	1		T177	5		T15	253		T9	144
valid_sources[0x59]	3765	1		T47	1		T15	149		T138	2
valid_sources[0x5a]	4056	1		T15	315		T9	149		T19	568
valid_sources[0x5b]	4472	1		T6	1		T15	547		T9	162
valid_sources[0x5c]	3688	1		T15	31		T74	1		T9	123
valid_sources[0x5d]	4112	1		T1	1		T6	1		T15	384
valid_sources[0x5e]	3931	1		T15	269		T9	153		T19	608
valid_sources[0x5f]	4000	1		T7	1		T34	1		T15	276
valid_sources[0x60]	3682	1		T15	111		T9	149		T19	546
valid_sources[0x61]	4811	1		T15	641		T183	1		T9	135
valid_sources[0x62]	4137	1		T15	474		T78	1		T9	177
valid_sources[0x63]	3824	1		T15	148		T9	141		T19	593
valid_sources[0x64]	4197	1		T51	1		T15	526		T16	2
valid_sources[0x65]	4295	1		T35	1		T49	1		T15	532
valid_sources[0x66]	4109	1		T15	252		T9	161		T19	596
valid_sources[0x67]	4032	1		T15	131		T9	175		T19	589
valid_sources[0x68]	4253	1		T25	1		T173	1		T15	350
valid_sources[0x69]	3816	1		T42	1		T15	28		T9	153
valid_sources[0x6a]	4123	1		T6	1		T15	287		T74	1
valid_sources[0x6b]	3893	1		T173	1		T182	2		T15	127
valid_sources[0x6c]	3758	1		T15	374		T9	161		T19	551
valid_sources[0x6d]	3769	1		T15	135		T9	150		T19	574
valid_sources[0x6e]	3861	1		T42	1		T15	14		T9	165
valid_sources[0x6f]	3979	1		T120	4		T15	181		T9	137
valid_sources[0x70]	3968	1		T39	1		T42	1		T25	1
valid_sources[0x71]	4404	1		T15	843		T9	157		T19	492
valid_sources[0x72]	3659	1		T15	175		T9	167		T19	568
valid_sources[0x73]	4059	1		T15	410		T184	1		T9	141
valid_sources[0x74]	4065	1		T26	2		T15	114		T9	158
valid_sources[0x75]	4074	1		T144	1		T15	151		T9	153
valid_sources[0x76]	4884	1		T15	1124		T9	154		T19	610
valid_sources[0x77]	4034	1		T42	1		T15	404		T9	150
valid_sources[0x78]	3931	1		T15	290		T9	179		T19	517
valid_sources[0x79]	4092	1		T15	461		T9	145		T19	575
valid_sources[0x7a]	3848	1		T15	272		T174	1		T9	131
valid_sources[0x7b]	3706	1		T15	144		T9	135		T19	469
valid_sources[0x7c]	3885	1		T15	306		T185	1		T9	147
valid_sources[0x7d]	3672	1		T2	1		T6	1		T15	210
valid_sources[0x7e]	4464	1		T15	652		T9	147		T19	615
valid_sources[0x7f]	3779	1		T15	251		T9	159		T19	519
valid_sources[0x80]	4446	1		T15	639		T9	171		T19	552

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

250214

1

T15

20921

T9

9547

T19

34992

values[0x0]

all_enables

biggest_size

373063

1

T2

4

T3

1

T39

3

values[0x1]

all_enables

biggest_size

372813

1

T1

1

T2

3

T7

1