Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
83.34 95.72 83.72 89.91 75.00 88.00 98.21 52.77


Total tests in report: 443
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
59.07 59.07 88.58 88.58 59.31 59.31 37.57 37.57 57.50 57.50 71.50 71.50 93.48 93.48 5.55 5.55 /workspace/coverage/default/24.rv_dm_stress_all.455478977
70.64 11.57 90.09 1.51 71.17 11.86 60.71 23.13 57.50 0.00 76.67 5.17 94.53 1.05 43.80 38.25 /workspace/coverage/default/5.rv_dm_stress_all_with_rand_reset.902239750
78.17 7.53 93.76 3.67 77.10 5.93 84.70 24.00 67.50 10.00 83.50 6.83 96.00 1.47 44.63 0.83 /workspace/coverage/default/5.rv_dm_autoincr_sba_tl_access.1409220803
79.41 1.24 93.81 0.05 77.38 0.28 84.70 0.00 75.00 7.50 84.00 0.50 96.00 0.00 44.98 0.35 /workspace/coverage/default/0.rv_dm_tap_fsm.1947676702
80.41 1.00 94.22 0.40 79.17 1.79 88.47 3.77 75.00 0.00 85.00 1.00 96.00 0.00 44.98 0.00 /workspace/coverage/default/3.rv_dm_stress_all_with_rand_reset.2229953745
81.28 0.87 94.32 0.10 80.69 1.52 88.80 0.33 75.00 0.00 85.50 0.50 96.21 0.21 48.41 3.42 /workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.3314159440
81.53 0.26 94.32 0.00 81.10 0.41 89.50 0.70 75.00 0.00 85.50 0.00 96.32 0.11 49.00 0.59 /workspace/coverage/default/2.rv_dm_sec_cm.589041470
81.73 0.20 94.77 0.45 81.52 0.41 89.58 0.08 75.00 0.00 85.83 0.33 96.32 0.00 49.11 0.12 /workspace/coverage/default/0.rv_dm_abstractcmd_status.366464835
81.91 0.17 95.07 0.30 81.93 0.41 89.58 0.00 75.00 0.00 86.33 0.50 96.32 0.00 49.11 0.00 /workspace/coverage/default/1.rv_dm_sba_debug_disabled.4177919544
82.07 0.17 95.07 0.00 81.93 0.00 89.58 0.00 75.00 0.00 86.33 0.00 97.48 1.16 49.11 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.424723239
82.21 0.13 95.22 0.15 82.07 0.14 89.58 0.00 75.00 0.00 86.50 0.17 97.48 0.00 49.59 0.47 /workspace/coverage/default/22.rv_dm_stress_all.224304767
82.32 0.11 95.37 0.15 82.21 0.14 89.58 0.00 75.00 0.00 87.00 0.50 97.48 0.00 49.59 0.00 /workspace/coverage/default/0.rv_dm_cmderr_exception.1604574952
82.42 0.10 95.37 0.00 82.21 0.00 89.83 0.25 75.00 0.00 87.00 0.00 97.48 0.00 50.06 0.47 /workspace/coverage/default/14.rv_dm_autoincr_sba_tl_access.1640322701
82.52 0.10 95.52 0.15 82.34 0.14 89.83 0.00 75.00 0.00 87.17 0.17 97.48 0.00 50.30 0.24 /workspace/coverage/default/23.rv_dm_stress_all.1097795137
82.61 0.09 95.52 0.00 82.90 0.55 89.91 0.08 75.00 0.00 87.17 0.00 97.48 0.00 50.30 0.00 /workspace/coverage/default/1.rv_dm_alert_test.1718781905
82.70 0.09 95.57 0.05 83.31 0.41 89.91 0.00 75.00 0.00 87.33 0.17 97.48 0.00 50.30 0.00 /workspace/coverage/default/0.rv_dm_dmi_failed_op.107052835
82.77 0.08 95.57 0.00 83.31 0.00 89.91 0.00 75.00 0.00 87.33 0.00 98.00 0.53 50.30 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.3558550899
82.85 0.07 95.62 0.05 83.45 0.14 89.91 0.00 75.00 0.00 87.67 0.33 98.00 0.00 50.30 0.00 /workspace/coverage/default/0.rv_dm_rom_read_access.3016321499
82.92 0.07 95.62 0.00 83.45 0.00 89.91 0.00 75.00 0.00 87.67 0.00 98.00 0.00 50.77 0.47 /workspace/coverage/default/2.rv_dm_autoincr_sba_tl_access.3046262336
82.97 0.05 95.67 0.05 83.59 0.14 89.91 0.00 75.00 0.00 87.83 0.17 98.00 0.00 50.77 0.00 /workspace/coverage/default/0.rv_dm_hartsel_warl.1866346696
83.02 0.05 95.67 0.00 83.59 0.00 89.91 0.00 75.00 0.00 87.83 0.00 98.00 0.00 51.12 0.35 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.852837336
83.05 0.04 95.67 0.00 83.72 0.14 89.91 0.00 75.00 0.00 87.83 0.00 98.00 0.00 51.24 0.12 /workspace/coverage/default/0.rv_dm_cmderr_halt_resume.1672910983
83.09 0.03 95.67 0.00 83.72 0.00 89.91 0.00 75.00 0.00 87.83 0.00 98.00 0.00 51.48 0.24 /workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.4191193069
83.12 0.03 95.67 0.00 83.72 0.00 89.91 0.00 75.00 0.00 87.83 0.00 98.00 0.00 51.71 0.24 /workspace/coverage/default/14.rv_dm_stress_all.3345907109
83.16 0.03 95.67 0.00 83.72 0.00 89.91 0.00 75.00 0.00 87.83 0.00 98.00 0.00 51.95 0.24 /workspace/coverage/default/15.rv_dm_autoincr_sba_tl_access.1735357821
83.19 0.03 95.72 0.05 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.17 98.00 0.00 51.95 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.3830869300
83.22 0.03 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.21 51.95 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.2730303748
83.23 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.07 0.12 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.2364234601
83.25 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.18 0.12 /workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.1837992821
83.27 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.30 0.12 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.3587411254
83.28 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.42 0.12 /workspace/coverage/default/0.rv_dm_jtag_dtm_idle_hint.2619862955
83.30 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.54 0.12 /workspace/coverage/default/1.rv_dm_smoke.3458286272
83.32 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.66 0.12 /workspace/coverage/default/12.rv_dm_delayed_resp_sba_tl_access.2848102269
83.34 0.02 95.72 0.00 83.72 0.00 89.91 0.00 75.00 0.00 88.00 0.00 98.21 0.00 52.77 0.12 /workspace/coverage/default/29.rv_dm_stress_all.927839011

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.475316242
/workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.3595605876
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.1950769614
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.3460002469
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.802789771
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.1428603928
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.3776756021
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.3628943961
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.2026548191
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.2163586898
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.3006502158
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.1757259657
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.689479813
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.3156916245
/workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.2347126662
/workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.97192714
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.2516296196
/workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.369162485
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.1861238883
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.2451365783
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.2264723894
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.3704203
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.2043185996
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.1671211250
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.2926906233
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.2304745541
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.3525277199
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.3105636177
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.1696143875
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.563642401
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.1580360234
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.3329724843
/workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.298613286
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.2779894093
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.398609371
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_bit_bash.2497840449
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.873293695
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.1323702031
/workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.3353322750
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.2207975144
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.1840360422
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.4250777037
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_bit_bash.965776128
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.3251564339
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.216006400
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.3969492139
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.1189780432
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.1075722400
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2548176663
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_bit_bash.1858248275
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.2507173698
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.331486468
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.2507050547
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.4043607814
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.600449777
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.862125221
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.1413127484
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_bit_bash.2866054179
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.2054514694
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.1321606834
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.3013030453
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.1893589701
/workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.1623117566
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.137865702
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_bit_bash.461320356
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.1854667490
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.4066658868
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.3003066422
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1995043906
/workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.374551155
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.2181835128
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.1195812793
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_bit_bash.400147483
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.1443591146
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.3187990592
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.3612490759
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.1082315291
/workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.2637275798
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.314894553
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.2899814495
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_bit_bash.2088599933
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.3254880919
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.3836940782
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.2480306267
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.794990335
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.937650107
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.254972535
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.3074614638
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_bit_bash.4280064502
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.4166489765
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.723764905
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.179212069
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.1764433351
/workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.409912263
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.512479438
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.827585093
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_bit_bash.3487441784
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.848036293
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.3098709255
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.1744692376
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.3210876624
/workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.3969942373
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.3396551741
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.3731310581
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_bit_bash.40743608
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.2349655314
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.2837185078
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.1075402516
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.4192169651
/workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.2847327196
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.292919017
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.3815579623
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.395320767
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.1648309457
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.1691318947
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.2675906421
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.3103008853
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.2709907639
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.4026587092
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.763850040
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.1205769466
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.367634833
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.2756938393
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.4078030234
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.3552788295
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.1369621204
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.2423890813
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.2591744499
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.2602072530
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.2121296842
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.3588957588
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.3522486961
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.4255019912
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.1032652484
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.3974386159
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.2691928181
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.3848400378
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.1934594372
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1435623734
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.2562898551
/workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.3888617588
/workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.1214087407
/workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.1419020485
/workspace/coverage/cover_reg_top/3.rv_dm_tap_fsm_rand_reset.3120295418
/workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.220490054
/workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.887974345
/workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.2748995452
/workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.1386458898
/workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.3268780903
/workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.3458386134
/workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.1469416729
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.2466685391
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.121015283
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.2450402820
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.2105161790
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.1265578789
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Total test records in report: 443
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/9.rv_dm_sba_tl_access.1720994125 Jul 28 05:00:58 PM PDT 24 Jul 28 05:01:04 PM PDT 24 930167441 ps
T2 /workspace/coverage/default/31.rv_dm_alert_test.3046060810 Jul 28 05:01:13 PM PDT 24 Jul 28 05:01:14 PM PDT 24 41913350 ps
T8 /workspace/coverage/default/0.rv_dm_sba_debug_disabled.532194878 Jul 28 05:01:01 PM PDT 24 Jul 28 05:01:08 PM PDT 24 5491308216 ps
T4 /workspace/coverage/default/0.rv_dm_cmderr_exception.1604574952 Jul 28 05:01:02 PM PDT 24 Jul 28 05:01:04 PM PDT 24 765745055 ps
T3 /workspace/coverage/default/11.rv_dm_delayed_resp_sba_tl_access.3940622068 Jul 28 05:01:00 PM PDT 24 Jul 28 05:01:08 PM PDT 24 3237171644 ps
T35 /workspace/coverage/default/16.rv_dm_delayed_resp_sba_tl_access.1403925095 Jul 28 05:01:07 PM PDT 24 Jul 28 05:01:25 PM PDT 24 6500922708 ps
T22 /workspace/coverage/default/10.rv_dm_bad_sba_tl_access.1113062718 Jul 28 05:01:06 PM PDT 24 Jul 28 05:01:09 PM PDT 24 1544207994 ps
T36 /workspace/coverage/default/4.rv_dm_sec_cm.2131616022 Jul 28 05:01:07 PM PDT 24 Jul 28 05:01:09 PM PDT 24 619590157 ps
T9 /workspace/coverage/default/1.rv_dm_dataaddr_rw_access.3186913156 Jul 28 05:01:04 PM PDT 24 Jul 28 05:01:05 PM PDT 24 66942846 ps
T5 /workspace/coverage/default/24.rv_dm_stress_all.455478977 Jul 28 05:01:07 PM PDT 24 Jul 28 05:01:17 PM PDT 24 6481195327 ps
T25 /workspace/coverage/default/1.rv_dm_smoke.3458286272 Jul 28 05:00:58 PM PDT 24 Jul 28 05:01:00 PM PDT 24 610661377 ps
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T230 /workspace/coverage/default/9.rv_dm_autoincr_sba_tl_access.17207117 Jul 28 05:01:09 PM PDT 24 Jul 28 05:01:47 PM PDT 24 62203881171 ps
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T18 /workspace/coverage/default/8.rv_dm_stress_all_with_rand_reset.1097368172 Jul 28 05:01:04 PM PDT 24 Jul 28 05:07:52 PM PDT 24 28737451994 ps
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T142 /workspace/coverage/default/0.rv_dm_bad_sba_tl_access.3929681821 Jul 28 05:01:10 PM PDT 24 Jul 28 05:01:16 PM PDT 24 1908298394 ps
T234 /workspace/coverage/default/6.rv_dm_delayed_resp_sba_tl_access.2778310703 Jul 28 05:01:01 PM PDT 24 Jul 28 05:01:04 PM PDT 24 1108116539 ps
T235 /workspace/coverage/default/7.rv_dm_delayed_resp_sba_tl_access.3780501137 Jul 28 05:01:12 PM PDT 24 Jul 28 05:01:23 PM PDT 24 1680040315 ps
T236 /workspace/coverage/default/0.rv_dm_alert_test.2241250490 Jul 28 05:01:12 PM PDT 24 Jul 28 05:01:13 PM PDT 24 139614181 ps
T237 /workspace/coverage/default/18.rv_dm_stress_all.3957656750 Jul 28 05:01:18 PM PDT 24 Jul 28 05:01:33 PM PDT 24 4784325305 ps
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T239 /workspace/coverage/default/10.rv_dm_alert_test.1846286846 Jul 28 05:01:16 PM PDT 24 Jul 28 05:01:16 PM PDT 24 103799115 ps
T39 /workspace/coverage/default/1.rv_dm_abstractcmd_status.3825236526 Jul 28 05:00:55 PM PDT 24 Jul 28 05:00:56 PM PDT 24 161024894 ps
T240 /workspace/coverage/default/15.rv_dm_bad_sba_tl_access.4284548986 Jul 28 05:01:23 PM PDT 24 Jul 28 05:01:25 PM PDT 24 1484609421 ps
T134 /workspace/coverage/default/29.rv_dm_stress_all.927839011 Jul 28 05:01:17 PM PDT 24 Jul 28 05:01:26 PM PDT 24 6725386632 ps
T52 /workspace/coverage/default/0.rv_dm_sec_cm.4052492447 Jul 28 05:00:56 PM PDT 24 Jul 28 05:00:58 PM PDT 24 658066210 ps
T241 /workspace/coverage/default/6.rv_dm_sba_tl_access.2224803056 Jul 28 05:01:02 PM PDT 24 Jul 28 05:01:07 PM PDT 24 3666330628 ps
T242 /workspace/coverage/default/31.rv_dm_stress_all.3510403319 Jul 28 05:01:37 PM PDT 24 Jul 28 05:01:44 PM PDT 24 4316354363 ps
T243 /workspace/coverage/default/0.rv_dm_cmderr_not_supported.3720363063 Jul 28 05:01:09 PM PDT 24 Jul 28 05:01:10 PM PDT 24 184841692 ps
T244 /workspace/coverage/default/11.rv_dm_bad_sba_tl_access.1846707119 Jul 28 05:01:14 PM PDT 24 Jul 28 05:01:21 PM PDT 24 7959459167 ps
T13 /workspace/coverage/default/16.rv_dm_stress_all.708714922 Jul 28 05:01:20 PM PDT 24 Jul 28 05:01:24 PM PDT 24 11011688812 ps
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T246 /workspace/coverage/default/18.rv_dm_alert_test.912493419 Jul 28 05:01:10 PM PDT 24 Jul 28 05:01:11 PM PDT 24 43007050 ps
T147 /workspace/coverage/default/8.rv_dm_autoincr_sba_tl_access.1045167732 Jul 28 05:01:10 PM PDT 24 Jul 28 05:02:16 PM PDT 24 113611622161 ps
T247 /workspace/coverage/default/47.rv_dm_alert_test.2105676712 Jul 28 05:01:15 PM PDT 24 Jul 28 05:01:16 PM PDT 24 172518746 ps
T248 /workspace/coverage/default/1.rv_dm_mem_tl_access_halted.4239519084 Jul 28 05:01:16 PM PDT 24 Jul 28 05:01:17 PM PDT 24 505256688 ps
T249 /workspace/coverage/default/0.rv_dm_halt_resume_whereto.1155389671 Jul 28 05:00:51 PM PDT 24 Jul 28 05:00:53 PM PDT 24 1586014200 ps
T135 /workspace/coverage/default/4.rv_dm_autoincr_sba_tl_access.3321899928 Jul 28 05:01:04 PM PDT 24 Jul 28 05:01:13 PM PDT 24 27531424329 ps
T128 /workspace/coverage/default/22.rv_dm_stress_all.224304767 Jul 28 05:01:17 PM PDT 24 Jul 28 05:01:21 PM PDT 24 3947548080 ps
T250 /workspace/coverage/default/46.rv_dm_stress_all.754888344 Jul 28 05:01:14 PM PDT 24 Jul 28 05:01:18 PM PDT 24 3669064024 ps
T251 /workspace/coverage/default/0.rv_dm_jtag_dmi_dm_inactive.1769345372 Jul 28 05:01:04 PM PDT 24 Jul 28 05:01:05 PM PDT 24 854025067 ps
T252 /workspace/coverage/default/10.rv_dm_autoincr_sba_tl_access.2077461043 Jul 28 05:01:03 PM PDT 24 Jul 28 05:02:06 PM PDT 24 46348522254 ps
T144 /workspace/coverage/default/34.rv_dm_stress_all.3058579360 Jul 28 05:01:24 PM PDT 24 Jul 28 05:01:28 PM PDT 24 3496523388 ps
T253 /workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.653338612 Jul 28 05:01:13 PM PDT 24 Jul 28 05:01:14 PM PDT 24 154987278 ps
T254 /workspace/coverage/default/14.rv_dm_delayed_resp_sba_tl_access.1639266991 Jul 28 05:01:07 PM PDT 24 Jul 28 05:01:20 PM PDT 24 7291488052 ps
T255 /workspace/coverage/default/36.rv_dm_stress_all.1110316090 Jul 28 05:01:33 PM PDT 24 Jul 28 05:01:46 PM PDT 24 9490379523 ps
T256 /workspace/coverage/default/4.rv_dm_sba_tl_access.668317171 Jul 28 05:01:31 PM PDT 24 Jul 28 05:01:34 PM PDT 24 1841795962 ps
T130 /workspace/coverage/default/13.rv_dm_bad_sba_tl_access.2275620715 Jul 28 05:01:05 PM PDT 24 Jul 28 05:01:09 PM PDT 24 5910209972 ps
T257 /workspace/coverage/default/19.rv_dm_bad_sba_tl_access.2476469031 Jul 28 05:01:25 PM PDT 24 Jul 28 05:01:29 PM PDT 24 5075906265 ps
T258 /workspace/coverage/default/1.rv_dm_cmderr_busy.1744521497 Jul 28 05:00:52 PM PDT 24 Jul 28 05:00:54 PM PDT 24 272872404 ps
T259 /workspace/coverage/default/34.rv_dm_alert_test.1607096352 Jul 28 05:01:27 PM PDT 24 Jul 28 05:01:28 PM PDT 24 33050213 ps
T260 /workspace/coverage/default/42.rv_dm_alert_test.913583958 Jul 28 05:01:27 PM PDT 24 Jul 28 05:01:28 PM PDT 24 35813996 ps
T261 /workspace/coverage/default/11.rv_dm_sba_tl_access.2939355020 Jul 28 05:01:14 PM PDT 24 Jul 28 05:01:20 PM PDT 24 5839125621 ps
T262 /workspace/coverage/default/1.rv_dm_sba_tl_access.651124828 Jul 28 05:01:02 PM PDT 24 Jul 28 05:01:06 PM PDT 24 1263000396 ps
T263 /workspace/coverage/default/16.rv_dm_autoincr_sba_tl_access.811560787 Jul 28 05:01:32 PM PDT 24 Jul 28 05:01:37 PM PDT 24 5888923158 ps
T264 /workspace/coverage/default/11.rv_dm_alert_test.1455374630 Jul 28 05:01:11 PM PDT 24 Jul 28 05:01:12 PM PDT 24 71469912 ps
T265 /workspace/coverage/default/0.rv_dm_jtag_dtm_hard_reset.1020037157 Jul 28 05:00:58 PM PDT 24 Jul 28 05:01:05 PM PDT 24 2278897740 ps
T266 /workspace/coverage/default/17.rv_dm_alert_test.743241964 Jul 28 05:01:19 PM PDT 24 Jul 28 05:01:20 PM PDT 24 87489011 ps
T267 /workspace/coverage/default/15.rv_dm_sba_tl_access.582619018 Jul 28 05:01:20 PM PDT 24 Jul 28 05:01:23 PM PDT 24 7341320339 ps
T268 /workspace/coverage/default/35.rv_dm_stress_all.3629216444 Jul 28 05:01:12 PM PDT 24 Jul 28 05:01:22 PM PDT 24 7716490576 ps
T269 /workspace/coverage/default/39.rv_dm_stress_all.4251855004 Jul 28 05:01:21 PM PDT 24 Jul 28 05:01:34 PM PDT 24 8579118105 ps
T270 /workspace/coverage/default/38.rv_dm_stress_all.1423611812 Jul 28 05:01:42 PM PDT 24 Jul 28 05:02:08 PM PDT 24 8768529311 ps
T271 /workspace/coverage/default/0.rv_dm_delayed_resp_sba_tl_access.2569438824 Jul 28 05:01:09 PM PDT 24 Jul 28 05:01:26 PM PDT 24 9719500525 ps
T272 /workspace/coverage/default/17.rv_dm_autoincr_sba_tl_access.3021868455 Jul 28 05:01:16 PM PDT 24 Jul 28 05:01:57 PM PDT 24 41854880858 ps
T273 /workspace/coverage/default/1.rv_dm_autoincr_sba_tl_access.2298291841 Jul 28 05:00:58 PM PDT 24 Jul 28 05:05:45 PM PDT 24 105532457498 ps
T145 /workspace/coverage/default/14.rv_dm_stress_all.3345907109 Jul 28 05:01:24 PM PDT 24 Jul 28 05:01:29 PM PDT 24 2772625426 ps
T274 /workspace/coverage/default/7.rv_dm_sba_tl_access.3692900162 Jul 28 05:01:20 PM PDT 24 Jul 28 05:01:36 PM PDT 24 5695513049 ps
T275 /workspace/coverage/default/3.rv_dm_autoincr_sba_tl_access.3524802009 Jul 28 05:01:00 PM PDT 24 Jul 28 05:01:11 PM PDT 24 9118123893 ps
T276 /workspace/coverage/default/3.rv_dm_sba_tl_access.1510161329 Jul 28 05:01:06 PM PDT 24 Jul 28 05:01:12 PM PDT 24 1947181647 ps
T277 /workspace/coverage/default/1.rv_dm_jtag_dmi_debug_disabled.2839749662 Jul 28 05:00:59 PM PDT 24 Jul 28 05:01:00 PM PDT 24 307775258 ps
T53 /workspace/coverage/default/0.rv_dm_tap_fsm.1947676702 Jul 28 05:00:57 PM PDT 24 Jul 28 05:01:05 PM PDT 24 8727435193 ps
T278 /workspace/coverage/default/13.rv_dm_sba_tl_access.3076820084 Jul 28 05:01:17 PM PDT 24 Jul 28 05:01:21 PM PDT 24 1684177098 ps
T279 /workspace/coverage/default/14.rv_dm_bad_sba_tl_access.4067250226 Jul 28 05:01:25 PM PDT 24 Jul 28 05:01:30 PM PDT 24 5673360730 ps
T21 /workspace/coverage/default/13.rv_dm_stress_all.657163565 Jul 28 05:01:14 PM PDT 24 Jul 28 05:01:21 PM PDT 24 4745788929 ps
T133 /workspace/coverage/default/7.rv_dm_bad_sba_tl_access.1795766462 Jul 28 05:01:06 PM PDT 24 Jul 28 05:01:25 PM PDT 24 4826914395 ps
T34 /workspace/coverage/default/0.rv_dm_rom_read_access.3016321499 Jul 28 05:01:02 PM PDT 24 Jul 28 05:01:03 PM PDT 24 91941850 ps
T280 /workspace/coverage/default/2.rv_dm_bad_sba_tl_access.3708823 Jul 28 05:01:06 PM PDT 24 Jul 28 05:01:08 PM PDT 24 1474350462 ps
T281 /workspace/coverage/default/4.rv_dm_delayed_resp_sba_tl_access.3438713693 Jul 28 05:01:15 PM PDT 24 Jul 28 05:01:46 PM PDT 24 10697341834 ps
T282 /workspace/coverage/default/6.rv_dm_autoincr_sba_tl_access.3896864577 Jul 28 05:01:05 PM PDT 24 Jul 28 05:01:20 PM PDT 24 4392521099 ps
T283 /workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3205086456 Jul 28 05:00:38 PM PDT 24 Jul 28 05:00:39 PM PDT 24 45632144 ps
T64 /workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.3314159440 Jul 28 05:00:50 PM PDT 24 Jul 28 05:01:12 PM PDT 24 6008225711 ps
T284 /workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.2838906405 Jul 28 05:00:43 PM PDT 24 Jul 28 05:00:43 PM PDT 24 132772257 ps
T285 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_bit_bash.2866054179 Jul 28 05:01:02 PM PDT 24 Jul 28 05:01:24 PM PDT 24 39035772612 ps
T72 /workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.691726890 Jul 28 05:00:49 PM PDT 24 Jul 28 05:00:55 PM PDT 24 594238816 ps
T65 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.374551155 Jul 28 05:00:58 PM PDT 24 Jul 28 05:01:09 PM PDT 24 1569641156 ps
T286 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_bit_bash.3487441784 Jul 28 05:00:55 PM PDT 24 Jul 28 05:01:02 PM PDT 24 3094582216 ps
T287 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.3254880919 Jul 28 05:01:18 PM PDT 24 Jul 28 05:01:22 PM PDT 24 2211451380 ps
T288 /workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.1854667490 Jul 28 05:00:43 PM PDT 24 Jul 28 05:00:48 PM PDT 24 2913413137 ps
T289 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.2043185996 Jul 28 05:00:29 PM PDT 24 Jul 28 05:00:53 PM PDT 24 9004167233 ps
T290 /workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.563642401 Jul 28 05:00:18 PM PDT 24 Jul 28 05:00:19 PM PDT 24 111696396 ps
T82 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.409912263 Jul 28 05:00:42 PM PDT 24 Jul 28 05:00:54 PM PDT 24 4268493624 ps
T66 /workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.2255280576 Jul 28 05:00:49 PM PDT 24 Jul 28 05:01:24 PM PDT 24 6564454890 ps
T67 /workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.937650107 Jul 28 05:00:47 PM PDT 24 Jul 28 05:00:58 PM PDT 24 877914155 ps
T83 /workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3644464605 Jul 28 05:00:57 PM PDT 24 Jul 28 05:01:02 PM PDT 24 346908019 ps
T291 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.3103008853 Jul 28 05:00:32 PM PDT 24 Jul 28 05:00:41 PM PDT 24 11150612175 ps
T84 /workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.1995043906 Jul 28 05:00:41 PM PDT 24 Jul 28 05:00:44 PM PDT 24 59569075 ps
T73 /workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.802789771 Jul 28 05:00:14 PM PDT 24 Jul 28 05:00:17 PM PDT 24 215432200 ps
T74 /workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.395320767 Jul 28 05:00:39 PM PDT 24 Jul 28 05:00:42 PM PDT 24 224175616 ps
T54 /workspace/coverage/cover_reg_top/7.rv_dm_tap_fsm_rand_reset.2097156909 Jul 28 05:00:42 PM PDT 24 Jul 28 05:04:55 PM PDT 24 51404516867 ps
T292 /workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.1189780432 Jul 28 05:00:46 PM PDT 24 Jul 28 05:00:50 PM PDT 24 166075904 ps
T293 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_bit_bash.2497840449 Jul 28 05:00:40 PM PDT 24 Jul 28 05:00:49 PM PDT 24 19978978665 ps
T294 /workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.689479813 Jul 28 05:00:19 PM PDT 24 Jul 28 05:00:20 PM PDT 24 87634248 ps
T75 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.4250777037 Jul 28 05:00:47 PM PDT 24 Jul 28 05:00:48 PM PDT 24 227724886 ps
T56 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.1321606834 Jul 28 05:00:43 PM PDT 24 Jul 28 05:00:44 PM PDT 24 226064228 ps
T57 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.3830869300 Jul 28 05:00:26 PM PDT 24 Jul 28 05:00:28 PM PDT 24 1156546581 ps
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