Unified Coverage Report :: Module :: spi_cmdparse

Module : spi_cmdparse

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_cmdparse	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.u_cmdparse

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
19.21	0.00	0.00	76.82		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : spi_cmdparse

	Line No.	Total	Covered	Percent
TOTAL		104	0	0.00
CONT_ASSIGN	74	1	0	0.00
ALWAYS	79	3	0	0.00
CONT_ASSIGN	145	1	0	0.00
CONT_ASSIGN	149	1	0	0.00
ALWAYS	174	4	0	0.00
CONT_ASSIGN	183	1	0	0.00
CONT_ASSIGN	185	1	0	0.00
CONT_ASSIGN	187	1	0	0.00
CONT_ASSIGN	189	1	0	0.00
CONT_ASSIGN	191	1	0	0.00
CONT_ASSIGN	193	1	0	0.00
ALWAYS	197	4	0	0.00
ALWAYS	216	6	0	0.00
ALWAYS	230	7	0	0.00
CONT_ASSIGN	249	1	0	0.00
CONT_ASSIGN	250	1	0	0.00
ALWAYS	259	5	0	0.00
CONT_ASSIGN	274	1	0	0.00
ALWAYS	278	11	0	0.00
CONT_ASSIGN	293	1	0	0.00
CONT_ASSIGN	294	1	0	0.00
CONT_ASSIGN	295	1	0	0.00
ALWAYS	298	4	0	0.00
ALWAYS	306	45	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
74	0	1
79	0	1
80	0	1
81	0	1
145	0	1
149	0	1
174	0	1
175	0	1
176	0	1
178	0	1
			==> MISSING_ELSE
183	0	1
185	0	1
187	0	1
189	0	1
191	0	1
193	0	1
197	0	1
198	0	1
199	0	1
200	0	1
			==> MISSING_ELSE
216	0	1
217	0	1
222	0	1
223	0	1
224	0	1
225	0	1
			==> MISSING_ELSE
230	0	1
235	0	1
236	0	1
237	0	1
238	0	1
239	0	1
240	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
249	0	1
250	0	1
259	0	1
264	0	1
266	0	1
267	0	1
268	0	1
			==> MISSING_ELSE
274	0	1
278	0	1
279	0	1
280	0	1
281	0	1
282	0	1
283	0	2
			==> MISSING_ELSE
284	0	2
			==> MISSING_ELSE
285	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
293	0	1
294	0	1
295	0	1
298	0	1
299	0	1
300	0	1
301	0	1
			==> MISSING_ELSE
306	0	1
308	0	1
309	0	1
311	0	1
313	0	1
315	0	1
317	0	1
319	0	1
321	0	1
323	0	1
324	0	1
325	0	1
326	0	1
327	0	1
329	0	1
334	0	1
335	0	1
336	0	1
337	0	1
338	0	1
340	0	1
346	0	1
347	0	1
348	0	1
349	0	1
350	0	1
353	0	1
361	0	1
365	0	1
366	0	1
370	0	1
373	0	1
377	0	1
380	0	1
390	0	1
392	0	1
			==> MISSING_ELSE
397	0	1
399	0	1
401	0	1
403	0	1
405	0	1
407	0	1
409	0	1
412	0	1
414	0	1

---

Cond Coverage for Module : spi_cmdparse

	Total	Covered	Percent
Conditions	75	0	0.00
Logical	75	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       176
 EXPRESSION (cmd_info_i[(CmdInfoReadStatus1 + i)].valid && (data_i == cmd_info_i[(CmdInfoReadStatus1 + i)].opcode))
             ---------------------1--------------------    ---------------------------2---------------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       176
 SUB-EXPRESSION (data_i == cmd_info_i[(CmdInfoReadStatus1 + i)].opcode)
                ---------------------------1---------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       183
 EXPRESSION (cmd_info_i[CmdInfoReadJedecId].valid && (data_i == cmd_info_i[CmdInfoReadJedecId].opcode))
             ------------------1-----------------    ------------------------2------------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       183
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoReadJedecId].opcode)
                ------------------------1------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       185
 EXPRESSION (cmd_info_i[CmdInfoReadSfdp].valid && (data_i == cmd_info_i[CmdInfoReadSfdp].opcode))
             ----------------1----------------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       185
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoReadSfdp].opcode)
                -----------------------1----------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       187
 EXPRESSION (cmd_info_i[CmdInfoEn4B].valid && (data_i == cmd_info_i[CmdInfoEn4B].opcode))
             --------------1--------------    ---------------------2--------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       187
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoEn4B].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       189
 EXPRESSION (cmd_info_i[CmdInfoEx4B].valid && (data_i == cmd_info_i[CmdInfoEx4B].opcode))
             --------------1--------------    ---------------------2--------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       189
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoEx4B].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       191
 EXPRESSION (cmd_info_i[CmdInfoWrEn].valid && (data_i == cmd_info_i[CmdInfoWrEn].opcode))
             --------------1--------------    ---------------------2--------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       191
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoWrEn].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       193
 EXPRESSION (cmd_info_i[CmdInfoWrDi].valid && (data_i == cmd_info_i[CmdInfoWrDi].opcode))
             --------------1--------------    ---------------------2--------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       193
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoWrDi].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       199
 EXPRESSION (cmd_info_i[i].valid && (data_i == cmd_info_i[i].opcode))
             ---------1---------    ----------------2---------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       199
 SUB-EXPRESSION (data_i == cmd_info_i[i].opcode)
                ----------------1---------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       236
 EXPRESSION ((st == StIdle) && module_active && data_valid_i)
             -------1------    ------2------    ------3-----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       236
 SUB-EXPRESSION (st == StIdle)
                -------1------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       238
 EXPRESSION (cmd_info_i[i].valid && (data_i == cmd_info_i[i].opcode))
             ---------1---------    ----------------2---------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       238
 SUB-EXPRESSION (data_i == cmd_info_i[i].opcode)
                ----------------1---------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       266
 EXPRESSION ((st == StIdle) && module_active && data_valid_i)
             -------1------    ------2------    ------3-----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       266
 SUB-EXPRESSION (st == StIdle)
                -------1------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       293
 EXPRESSION (spi_mode_i == FlashMode)
            ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       294
 EXPRESSION (spi_mode_i == PassThrough)
            -------------1-------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       295
 EXPRESSION (in_flashmode || in_passthrough)
             ------1-----    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       317
 EXPRESSION (module_active && data_valid_i && cmd_info_d.valid)
             ------1------    ------2-----    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       373
 EXPRESSION (opcode_en4b ? DpEn4B : DpEx4B)
             -----1-----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       380
 EXPRESSION (opcode_wren ? DpWrEn : DpWrDi)
             -----1-----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       390
 EXPRESSION (module_active && data_valid_i)
             ------1------    ------2-----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

---

FSM Coverage for Module : spi_cmdparse

Summary for FSM :: st

	Total	Covered	Percent
States	9	0	0.00	(Not included in score)
Transitions	8	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: st

---

states	Line No.	Covered	Tests
StAddr4B	370	Not Covered
StIdle	236	Not Covered
StJedec	335	Not Covered
StReadCmd	361	Not Covered
StSfdp	347	Not Covered
StStatus	324	Not Covered
StUpload	365	Not Covered
StWait	329	Not Covered
StWrEn	377	Not Covered

transitions	Line No.	Covered	Tests
StIdle->StAddr4B	370	Not Covered
StIdle->StJedec	335	Not Covered
StIdle->StReadCmd	361	Not Covered
StIdle->StSfdp	347	Not Covered
StIdle->StStatus	324	Not Covered
StIdle->StUpload	365	Not Covered
StIdle->StWait	329	Not Covered
StIdle->StWrEn	377	Not Covered

---

Branch Coverage for Module : spi_cmdparse

	Line No.	Total	Covered	Percent
Branches		49	0	0.00
IF	176	2	0	0.00
IF	199	2	0	0.00
IF	216	3	0	0.00
IF	236	2	0	0.00
IF	266	2	0	0.00
IF	278	8	0	0.00
IF	298	3	0	0.00
CASE	315	27	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	176	if ((cmd_info_i[(CmdInfoReadStatus1 + i)].valid && (data_i == cmd_info_i[(CmdInfoReadStatus1 + i)].opcode)))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	199	if ((cmd_info_i[i].valid && (data_i == cmd_info_i[i].opcode)))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	216	if ((!rst_ni))
-2-:	223	if (latch_cmdinfo)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	236	if ((((st == StIdle) && module_active) && data_valid_i))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	266	if ((((st == StIdle) && module_active) && data_valid_i))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	278	if ((!rst_ni))
-2-:	282	if (intercept_d)
-3-:	283	if (opcode_readstatus)
-4-:	284	if (opcode_readjedec)
-5-:	285	if (opcode_readsfdp)

Branches:

-1-	-2-	-3-	-4-	-5-	Status	Tests
1	-	-	-	-	Not Covered
0	1	1	-	-	Not Covered
0	1	0	-	-	Not Covered
0	1	-	1	-	Not Covered
0	1	-	0	-	Not Covered
0	1	-	-	1	Not Covered
0	1	-	-	0	Not Covered
0	0	-	-	-	Not Covered

	LineNo.	Expression
-1-:	298	if ((!rst_ni))
-2-:	300	if (module_active)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	315	case (st)
-2-:	317	if (((module_active && data_valid_i) && cmd_info_d.valid))
-3-:	321	case (1'b1)
-4-:	323	if (in_flashmode)
-5-:	325	if (cfg_intercept_en_status_i)
-6-:	334	if (in_flashmode)
-7-:	336	if (cfg_intercept_en_jedec_i)
-8-:	346	if (in_flashmode)
-9-:	348	if (cfg_intercept_en_sfdp_i)
-10-:	373	(opcode_en4b) ? 
-11-:	380	(opcode_wren) ? 
-12-:	390	if ((module_active && data_valid_i))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	Status	Tests
StIdle	1	opcode_readstatus	1	-	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readstatus	0	1	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readstatus	0	0	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readjedec	-	-	1	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readjedec	-	-	0	1	-	-	-	-	-	Not Covered
StIdle	1	opcode_readjedec	-	-	0	0	-	-	-	-	-	Not Covered
StIdle	1	opcode_readsfdp	-	-	-	-	1	-	-	-	-	Not Covered
StIdle	1	opcode_readsfdp	-	-	-	-	0	1	-	-	-	Not Covered
StIdle	1	opcode_readsfdp	-	-	-	-	0	0	-	-	-	Not Covered
StIdle	1	opcode_readcmd	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	1	upload	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_en4b opcode_ex4b	-	-	-	-	-	-	1	-	-	Not Covered
StIdle	1	opcode_en4b opcode_ex4b	-	-	-	-	-	-	0	-	-	Not Covered
StIdle	1	opcode_wren opcode_wrdi	-	-	-	-	-	-	-	1	-	Not Covered
StIdle	1	opcode_wren opcode_wrdi	-	-	-	-	-	-	-	0	-	Not Covered
StIdle	1	default	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	0	-	-	-	-	-	-	-	-	-	1	Not Covered
StIdle	0	-	-	-	-	-	-	-	-	-	0	Not Covered
StStatus	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StJedec	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StSfdp	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StReadCmd	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StUpload	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StAddr4B	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StWrEn	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StWait	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	Not Covered