Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_spi_device_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	162507918	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

19205030

1

T4

4230

T1

15

T5

37

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	169539900	1			T4	5678		T1	5		T5	1
values[0x0]	6084060	1			T4	1247		T1	4		T5	21
values[0x1]	6088988	1			T4	1244		T1	9		T5	23

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	82937148	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

98775800

1

T4

5184

T1

16

T5

39

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	679022	1			T4	54		T2	1935		T3	356
valid_sources[0x01]	679574	1			T4	43		T2	1911		T3	350
valid_sources[0x02]	693374	1			T4	44		T2	1741		T3	353
valid_sources[0x03]	692595	1			T4	38		T2	1904		T3	308
valid_sources[0x04]	712801	1			T4	62		T2	1902		T3	343
valid_sources[0x05]	678399	1			T4	69		T5	2		T2	1778
valid_sources[0x06]	712521	1			T4	41		T5	2		T2	2058
valid_sources[0x07]	712423	1			T4	5		T2	1888		T3	376
valid_sources[0x08]	699105	1			T4	3		T1	1		T2	1945
valid_sources[0x09]	704033	1			T4	53		T2	1833		T3	347
valid_sources[0x0a]	720494	1			T4	3		T2	2037		T3	352
valid_sources[0x0b]	725812	1			T4	26		T1	1		T2	1880
valid_sources[0x0c]	688465	1			T4	55		T2	1936		T3	348
valid_sources[0x0d]	687704	1			T4	2		T2	1876		T3	328
valid_sources[0x0e]	722209	1			T4	2		T2	1989		T3	364
valid_sources[0x0f]	677731	1			T4	31		T2	1862		T3	320
valid_sources[0x10]	711348	1			T4	19		T2	1822		T3	355
valid_sources[0x11]	667961	1			T4	42		T2	2033		T3	356
valid_sources[0x12]	752887	1			T4	29		T2	2031		T3	355
valid_sources[0x13]	730875	1			T4	56		T2	1782		T3	306
valid_sources[0x14]	682155	1			T4	35		T2	1883		T3	354
valid_sources[0x15]	834347	1			T4	109		T2	1852		T3	385
valid_sources[0x16]	711497	1			T4	4		T5	2		T2	1910
valid_sources[0x17]	709339	1			T4	23		T2	1985		T3	345
valid_sources[0x18]	713062	1			T4	29		T5	1		T2	2015
valid_sources[0x19]	730575	1			T4	27		T2	2008		T3	382
valid_sources[0x1a]	747613	1			T4	8		T2	1909		T3	353
valid_sources[0x1b]	704927	1			T4	11		T2	1907		T3	314
valid_sources[0x1c]	683602	1			T4	27		T2	1949		T3	313
valid_sources[0x1d]	699558	1			T4	24		T5	2		T2	1951
valid_sources[0x1e]	691971	1			T4	19		T2	1936		T3	323
valid_sources[0x1f]	696092	1			T4	67		T2	1983		T3	309
valid_sources[0x20]	714596	1			T2	1922		T3	320		T9	1543
valid_sources[0x21]	694447	1			T4	56		T2	1955		T3	316
valid_sources[0x22]	680337	1			T4	12		T2	1935		T3	373
valid_sources[0x23]	708260	1			T4	60		T2	1830		T3	356
valid_sources[0x24]	697814	1			T4	24		T2	1876		T3	349
valid_sources[0x25]	744299	1			T4	17		T2	1953		T3	358
valid_sources[0x26]	721958	1			T4	11		T2	1974		T3	319
valid_sources[0x27]	690856	1			T4	56		T5	1		T2	1959
valid_sources[0x28]	706338	1			T4	42		T1	1		T2	2058
valid_sources[0x29]	699125	1			T4	18		T2	1876		T3	330
valid_sources[0x2a]	701301	1			T4	138		T2	1991		T3	334
valid_sources[0x2b]	682735	1			T4	12		T2	2001		T3	311
valid_sources[0x2c]	675816	1			T4	30		T2	2025		T3	334
valid_sources[0x2d]	927284	1			T4	40		T1	1		T2	1901
valid_sources[0x2e]	673698	1			T2	1983		T3	374		T9	1529
valid_sources[0x2f]	715865	1			T4	19		T2	2031		T3	349
valid_sources[0x30]	685197	1			T4	23		T2	1810		T3	354
valid_sources[0x31]	742844	1			T4	16		T2	1891		T3	314
valid_sources[0x32]	682911	1			T4	34		T2	1929		T3	361
valid_sources[0x33]	673722	1			T4	20		T2	1851		T3	346
valid_sources[0x34]	721696	1			T4	13		T5	2		T2	1897
valid_sources[0x35]	682054	1			T4	3		T2	1875		T3	365
valid_sources[0x36]	722922	1			T4	11		T2	1966		T3	331
valid_sources[0x37]	738791	1			T4	50		T5	2		T2	1837
valid_sources[0x38]	697490	1			T4	4		T2	1762		T3	339
valid_sources[0x39]	720653	1			T4	18		T5	3		T2	1830
valid_sources[0x3a]	688501	1			T4	16		T2	1897		T3	308
valid_sources[0x3b]	670283	1			T4	29		T2	2111		T3	361
valid_sources[0x3c]	675647	1			T4	25		T2	1979		T3	347
valid_sources[0x3d]	704915	1			T4	141		T2	1831		T3	363
valid_sources[0x3e]	697008	1			T4	26		T2	1976		T3	348
valid_sources[0x3f]	681381	1			T4	26		T5	1		T2	1862
valid_sources[0x40]	709101	1			T4	35		T5	1		T2	2120
valid_sources[0x41]	712103	1			T4	8		T2	1802		T3	366
valid_sources[0x42]	675520	1			T4	36		T2	1820		T3	345
valid_sources[0x43]	724128	1			T4	102		T2	1820		T3	318
valid_sources[0x44]	734229	1			T4	13		T5	1		T2	1892
valid_sources[0x45]	680852	1			T4	73		T2	1881		T3	344
valid_sources[0x46]	699528	1			T4	40		T2	1966		T3	322
valid_sources[0x47]	692429	1			T4	28		T5	1		T2	1756
valid_sources[0x48]	685652	1			T4	27		T2	1905		T3	368
valid_sources[0x49]	689996	1			T4	43		T2	1854		T3	341
valid_sources[0x4a]	701057	1			T4	34		T2	1957		T3	293
valid_sources[0x4b]	661759	1			T4	13		T2	1770		T3	312
valid_sources[0x4c]	707862	1			T4	7		T2	1890		T3	391
valid_sources[0x4d]	750507	1			T4	29		T2	2042		T3	349
valid_sources[0x4e]	759585	1			T4	36		T2	1888		T3	317
valid_sources[0x4f]	707798	1			T4	21		T2	1743		T3	346
valid_sources[0x50]	774300	1			T4	46		T2	1853		T3	356
valid_sources[0x51]	649544	1			T4	20		T2	2006		T3	317
valid_sources[0x52]	716447	1			T4	21		T2	1762		T3	352
valid_sources[0x53]	765341	1			T4	34		T2	1773		T3	336
valid_sources[0x54]	684558	1			T4	44		T2	1755		T3	318
valid_sources[0x55]	685807	1			T4	51		T2	1927		T3	372
valid_sources[0x56]	731591	1			T4	129		T2	1918		T3	351
valid_sources[0x57]	708544	1			T4	30		T2	1897		T3	324
valid_sources[0x58]	721760	1			T4	32		T2	1933		T3	394
valid_sources[0x59]	713119	1			T4	6		T2	1920		T3	333
valid_sources[0x5a]	684693	1			T4	3		T1	1		T2	1844
valid_sources[0x5b]	690512	1			T4	40		T2	1840		T3	364
valid_sources[0x5c]	660851	1			T4	22		T5	2		T2	1909
valid_sources[0x5d]	686320	1			T4	3		T2	1796		T3	347
valid_sources[0x5e]	668774	1			T4	66		T2	1818		T3	358
valid_sources[0x5f]	718553	1			T4	18		T2	1885		T3	371
valid_sources[0x60]	694298	1			T4	53		T2	1863		T3	336
valid_sources[0x61]	696965	1			T4	12		T2	1902		T3	365
valid_sources[0x62]	710481	1			T4	2		T2	1979		T3	343
valid_sources[0x63]	692958	1			T4	2		T2	2041		T3	298
valid_sources[0x64]	696031	1			T4	4		T2	1867		T3	359
valid_sources[0x65]	752712	1			T4	5		T2	1930		T3	369
valid_sources[0x66]	723354	1			T4	19		T2	1794		T3	335
valid_sources[0x67]	691977	1			T4	28		T2	1884		T3	359
valid_sources[0x68]	667071	1			T4	14		T1	1		T2	1912
valid_sources[0x69]	712168	1			T4	31		T1	4		T2	1774
valid_sources[0x6a]	898739	1			T4	52		T2	1911		T3	316
valid_sources[0x6b]	683692	1			T4	11		T2	1892		T3	342
valid_sources[0x6c]	685499	1			T4	20		T2	1978		T3	308
valid_sources[0x6d]	691626	1			T4	78		T2	1813		T3	358
valid_sources[0x6e]	713963	1			T4	75		T2	1849		T3	352
valid_sources[0x6f]	697011	1			T4	62		T2	1901		T3	296
valid_sources[0x70]	706941	1			T4	51		T5	1		T2	1891
valid_sources[0x71]	698349	1			T4	58		T5	1		T2	1935
valid_sources[0x72]	713675	1			T4	104		T2	1972		T3	309
valid_sources[0x73]	686613	1			T4	60		T2	1910		T3	376
valid_sources[0x74]	671836	1			T4	46		T2	1893		T3	357
valid_sources[0x75]	712832	1			T4	23		T2	1818		T3	305
valid_sources[0x76]	726685	1			T4	26		T2	1927		T3	299
valid_sources[0x77]	700113	1			T4	6		T5	1		T2	1836
valid_sources[0x78]	689864	1			T4	1		T5	1		T2	1842
valid_sources[0x79]	697202	1			T4	128		T2	1932		T3	334
valid_sources[0x7a]	659860	1			T4	14		T2	1841		T3	317
valid_sources[0x7b]	693496	1			T4	27		T2	2005		T3	340
valid_sources[0x7c]	679280	1			T4	11		T2	2069		T3	366
valid_sources[0x7d]	722164	1			T4	20		T2	2108		T3	377
valid_sources[0x7e]	685272	1			T4	34		T2	1929		T3	332
valid_sources[0x7f]	707972	1			T4	57		T1	2		T2	2027
valid_sources[0x80]	656615	1			T4	8		T2	1865		T3	352

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

7367944

1

T4

2015

T1

2

T2

12522

values[0x0]

all_enables

biggest_size

5926453

1

T4

1109

T1

4

T5

18

values[0x1]

all_enables

biggest_size

5910633

1

T4

1106

T1

9

T5

19