Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
95.39	96.31	94.03	97.00		93.33	96.30	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	61	61	100.00	61	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	61	61	100.00	61	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	1907094280	8656	0	0
addr_swap_data_rd_A	1907094280	1077	0	0
addr_swap_mask_rd_A	1907094280	950	0	0
cmd_filter_0_rd_A	1907094280	5399	0	0
cmd_filter_1_rd_A	1907094280	4332	0	0
cmd_filter_2_rd_A	1907094280	5194	0	0
cmd_filter_3_rd_A	1907094280	5209	0	0
cmd_filter_4_rd_A	1907094280	5680	0	0
cmd_filter_5_rd_A	1907094280	4622	0	0
cmd_filter_6_rd_A	1907094280	6031	0	0
cmd_filter_7_rd_A	1907094280	5470	0	0
cmd_info_0_rd_A	1907094280	2692	0	0
cmd_info_10_rd_A	1907094280	2587	0	0
cmd_info_11_rd_A	1907094280	2511	0	0
cmd_info_12_rd_A	1907094280	2729	0	0
cmd_info_13_rd_A	1907094280	2225	0	0
cmd_info_14_rd_A	1907094280	2618	0	0
cmd_info_15_rd_A	1907094280	2612	0	0
cmd_info_16_rd_A	1907094280	2708	0	0
cmd_info_17_rd_A	1907094280	2120	0	0
cmd_info_18_rd_A	1907094280	2403	0	0
cmd_info_19_rd_A	1907094280	2406	0	0
cmd_info_1_rd_A	1907094280	2668	0	0
cmd_info_20_rd_A	1907094280	2490	0	0
cmd_info_21_rd_A	1907094280	2637	0	0
cmd_info_22_rd_A	1907094280	2375	0	0
cmd_info_23_rd_A	1907094280	2587	0	0
cmd_info_2_rd_A	1907094280	2344	0	0
cmd_info_3_rd_A	1907094280	2500	0	0
cmd_info_4_rd_A	1907094280	2501	0	0
cmd_info_5_rd_A	1907094280	2335	0	0
cmd_info_6_rd_A	1907094280	2658	0	0
cmd_info_7_rd_A	1907094280	2587	0	0
cmd_info_8_rd_A	1907094280	2811	0	0
cmd_info_9_rd_A	1907094280	2365	0	0
cmd_info_en4b_rd_A	1907094280	1046	0	0
cmd_info_ex4b_rd_A	1907094280	1139	0	0
cmd_info_wrdi_rd_A	1907094280	1081	0	0
cmd_info_wren_rd_A	1907094280	1090	0	0
control_rd_A	1907094280	1551	0	0
fifo_level_rd_A	1907094280	1101	0	0
intercept_en_rd_A	1907094280	1420	0	0
intr_enable_rd_A	1907094280	2645	0	0
jedec_cc_rd_A	1907094280	1056	0	0
jedec_id_rd_A	1907094280	1127	0	0
mailbox_addr_rd_A	1907094280	999	0	0
payload_swap_data_rd_A	1907094280	1018	0	0
payload_swap_mask_rd_A	1907094280	905	0	0
read_threshold_rd_A	1907094280	940	0	0
rxf_addr_rd_A	1907094280	1099	0	0
tpm_access_0_rd_A	1907094280	1366	0	0
tpm_access_1_rd_A	1907094280	922	0	0
tpm_cfg_rd_A	1907094280	1467	0	0
tpm_did_vid_rd_A	1907094280	1172	0	0
tpm_int_enable_rd_A	1907094280	980	0	0
tpm_int_status_rd_A	1907094280	921	0	0
tpm_int_vector_rd_A	1907094280	906	0	0
tpm_intf_capability_rd_A	1907094280	996	0	0
tpm_rid_rd_A	1907094280	1037	0	0
tpm_sts_rd_A	1907094280	899	0	0
txf_addr_rd_A	1907094280	1144	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	8656	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T83	8732	185	0	0
T84	6443	536	0	0
T115	0	88	0	0
T117	0	3	0	0
T118	0	3	0	0
T121	0	579	0	0
T146	1253	0	0	0
T147	1895	1	0	0
T148	1182	0	0	0
T150	0	8	0	0
T155	16502	0	0	0
T179	0	12	0	0
T180	1707	0	0	0
T181	1083	0	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1077	0	0
T69	5995	9	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	70	0	0
T117	0	68	0	0
T118	0	87	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	74	0	0
T155	16502	0	0	0
T161	0	560	0	0
T164	0	15	0	0
T168	0	20	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	1	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	950	0	0
T81	3859	9	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	30	0	0
T117	0	39	0	0
T118	0	62	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T149	1496	0	0	0
T152	0	61	0	0
T155	16502	0	0	0
T161	0	568	0	0
T164	0	12	0	0
T168	0	13	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	10	0	0
T183	0	1	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	5399	0	0
T69	5995	12	0	0
T81	3859	7	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	32	0	0
T117	0	858	0	0
T118	0	694	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	1087	0	0
T155	16502	0	0	0
T161	0	563	0	0
T164	0	376	0	0
T168	0	33	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	150	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	4332	0	0
T69	5995	4	0	0
T85	14938	38	0	0
T86	1468	0	0	0
T117	99035	778	0	0
T118	0	878	0	0
T151	199765	0	0	0
T152	0	1186	0	0
T158	2848	0	0	0
T161	0	498	0	0
T164	0	9	0	0
T168	8390	36	0	0
T179	3350	0	0	0
T182	0	116	0	0
T184	0	2	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	5194	0	0
T69	5995	4	0	0
T81	3859	5	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	17	0	0
T117	0	1167	0	0
T118	0	866	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	760	0	0
T155	16502	0	0	0
T161	0	462	0	0
T164	0	298	0	0
T168	0	25	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	131	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	5209	0	0
T69	5995	16	0	0
T81	3859	4	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	34	0	0
T117	0	1208	0	0
T118	0	886	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	985	0	0
T155	16502	0	0	0
T161	0	548	0	0
T164	0	134	0	0
T168	0	25	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	144	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	5680	0	0
T69	5995	7	0	0
T81	3859	6	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	43	0	0
T117	0	1119	0	0
T118	0	1278	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	1157	0	0
T155	16502	0	0	0
T161	0	503	0	0
T164	0	17	0	0
T168	0	4	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	263	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	4622	0	0
T69	5995	10	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	27	0	0
T117	0	1210	0	0
T118	0	748	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	1054	0	0
T155	16502	0	0	0
T161	0	498	0	0
T164	0	116	0	0
T168	0	4	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	6	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	6031	0	0
T69	5995	9	0	0
T81	3859	10	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	70	0	0
T117	0	1115	0	0
T118	0	1193	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	1155	0	0
T155	16502	0	0	0
T161	0	448	0	0
T164	0	335	0	0
T168	0	21	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	302	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	5470	0	0
T69	5995	11	0	0
T81	3859	12	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	21	0	0
T117	0	1204	0	0
T118	0	929	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	726	0	0
T155	16502	0	0	0
T161	0	501	0	0
T164	0	117	0	0
T168	0	35	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	114	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2692	0	0
T69	5995	11	0	0
T85	14938	76	0	0
T86	1468	0	0	0
T117	99035	277	0	0
T118	0	412	0	0
T151	199765	0	0	0
T152	0	499	0	0
T158	2848	0	0	0
T161	0	465	0	0
T164	0	111	0	0
T168	8390	16	0	0
T179	3350	0	0	0
T182	0	94	0	0
T184	0	7	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2587	0	0
T81	3859	6	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	25	0	0
T117	0	377	0	0
T118	0	431	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T149	1496	0	0	0
T152	0	423	0	0
T155	16502	0	0	0
T161	0	484	0	0
T164	0	86	0	0
T168	0	44	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	58	0	0
T187	0	70	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2511	0	0
T69	5995	13	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	50	0	0
T117	0	208	0	0
T118	0	446	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	398	0	0
T155	16502	0	0	0
T161	0	461	0	0
T164	0	89	0	0
T168	0	24	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	81	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2729	0	0
T69	5995	11	0	0
T81	3859	4	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	37	0	0
T117	0	484	0	0
T118	0	556	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	410	0	0
T155	16502	0	0	0
T161	0	530	0	0
T164	0	116	0	0
T168	0	8	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	56	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2225	0	0
T69	5995	1	0	0
T81	3859	1	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	46	0	0
T117	0	472	0	0
T118	0	207	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	371	0	0
T155	16502	0	0	0
T161	0	568	0	0
T164	0	54	0	0
T168	0	8	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	5	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2618	0	0
T69	5995	22	0	0
T85	14938	31	0	0
T86	1468	0	0	0
T117	99035	438	0	0
T118	0	490	0	0
T151	199765	0	0	0
T152	0	450	0	0
T158	2848	0	0	0
T161	0	472	0	0
T164	0	41	0	0
T168	8390	15	0	0
T179	3350	0	0	0
T182	0	9	0	0
T184	0	14	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2612	0	0
T69	5995	16	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	87	0	0
T117	0	293	0	0
T118	0	476	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	371	0	0
T155	16502	0	0	0
T161	0	549	0	0
T164	0	14	0	0
T168	0	30	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	48	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2708	0	0
T69	5995	11	0	0
T81	3859	8	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	53	0	0
T117	0	392	0	0
T118	0	415	0	0
T125	0	5	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	584	0	0
T155	16502	0	0	0
T161	0	550	0	0
T168	0	16	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	126	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2120	0	0
T69	5995	5	0	0
T83	8732	8	0	0
T85	14938	21	0	0
T86	1468	0	0	0
T117	99035	332	0	0
T118	0	263	0	0
T151	199765	0	0	0
T152	0	406	0	0
T161	0	489	0	0
T164	0	85	0	0
T168	8390	21	0	0
T179	3350	0	0	0
T182	0	45	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2403	0	0
T69	5995	21	0	0
T81	3859	10	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	50	0	0
T117	0	442	0	0
T118	0	477	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	460	0	0
T155	16502	0	0	0
T161	0	517	0	0
T164	0	18	0	0
T168	0	9	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	9	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2406	0	0
T69	5995	15	0	0
T81	3859	6	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	47	0	0
T117	0	289	0	0
T118	0	349	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	447	0	0
T155	16502	0	0	0
T161	0	579	0	0
T164	0	89	0	0
T168	0	22	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	72	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2668	0	0
T69	5995	10	0	0
T85	14938	36	0	0
T86	1468	0	0	0
T117	99035	398	0	0
T118	0	440	0	0
T151	199765	0	0	0
T152	0	470	0	0
T158	2848	0	0	0
T161	0	541	0	0
T164	0	162	0	0
T168	8390	34	0	0
T179	3350	0	0	0
T182	0	5	0	0
T183	0	2	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2490	0	0
T85	14938	41	0	0
T86	1468	0	0	0
T117	99035	472	0	0
T118	0	380	0	0
T121	15070	0	0	0
T151	199765	0	0	0
T152	0	323	0	0
T158	2848	0	0	0
T161	0	521	0	0
T164	0	53	0	0
T168	8390	9	0	0
T179	3350	0	0	0
T182	0	61	0	0
T183	0	1	0	0
T184	0	3	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2637	0	0
T69	5995	13	0	0
T81	3859	9	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	47	0	0
T117	0	390	0	0
T118	0	376	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	531	0	0
T155	16502	0	0	0
T161	0	475	0	0
T164	0	21	0	0
T168	0	32	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	113	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2375	0	0
T69	5995	12	0	0
T81	3859	4	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	48	0	0
T117	0	447	0	0
T118	0	364	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	360	0	0
T155	16502	0	0	0
T161	0	503	0	0
T164	0	48	0	0
T168	0	39	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	14	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2587	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	9	0	0
T117	0	460	0	0
T118	0	407	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T149	1496	0	0	0
T152	0	397	0	0
T155	16502	0	0	0
T161	0	546	0	0
T164	0	102	0	0
T168	0	37	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	34	0	0
T183	0	4	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2344	0	0
T69	5995	5	0	0
T81	3859	6	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	54	0	0
T117	0	388	0	0
T118	0	371	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	462	0	0
T155	16502	0	0	0
T161	0	601	0	0
T164	0	10	0	0
T168	0	9	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	8	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2500	0	0
T69	5995	7	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	42	0	0
T117	0	386	0	0
T118	0	365	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	441	0	0
T155	16502	0	0	0
T161	0	539	0	0
T164	0	119	0	0
T168	0	40	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	35	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2501	0	0
T69	5995	3	0	0
T81	3859	9	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	30	0	0
T117	0	412	0	0
T118	0	384	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	323	0	0
T155	16502	0	0	0
T161	0	500	0	0
T164	0	68	0	0
T168	0	26	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	38	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2335	0	0
T69	5995	24	0	0
T81	3859	9	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	29	0	0
T117	0	264	0	0
T118	0	403	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	231	0	0
T155	16502	0	0	0
T161	0	487	0	0
T164	0	146	0	0
T168	0	13	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	62	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2658	0	0
T69	5995	14	0	0
T81	3859	8	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	37	0	0
T117	0	449	0	0
T118	0	409	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	488	0	0
T155	16502	0	0	0
T161	0	508	0	0
T164	0	50	0	0
T168	0	17	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	43	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2587	0	0
T69	5995	16	0	0
T81	3859	11	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	82	0	0
T117	0	300	0	0
T118	0	415	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	504	0	0
T155	16502	0	0	0
T161	0	460	0	0
T164	0	57	0	0
T168	0	54	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	68	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2811	0	0
T69	5995	7	0	0
T81	3859	9	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	44	0	0
T117	0	462	0	0
T118	0	482	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	518	0	0
T155	16502	0	0	0
T161	0	545	0	0
T164	0	14	0	0
T168	0	25	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	53	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2365	0	0
T69	5995	18	0	0
T81	3859	13	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	55	0	0
T117	0	441	0	0
T118	0	316	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	389	0	0
T155	16502	0	0	0
T161	0	479	0	0
T164	0	59	0	0
T168	0	9	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	56	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1046	0	0
T69	5995	14	0	0
T85	14938	52	0	0
T86	1468	0	0	0
T117	99035	114	0	0
T118	0	46	0	0
T151	199765	0	0	0
T152	0	99	0	0
T158	2848	0	0	0
T161	0	510	0	0
T164	0	19	0	0
T168	8390	12	0	0
T179	3350	0	0	0
T182	0	22	0	0
T184	0	4	0	0
T185	870	0	0	0
T186	1096	0	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1139	0	0
T69	5995	8	0	0
T81	3859	9	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	25	0	0
T117	0	82	0	0
T118	0	97	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	91	0	0
T155	16502	0	0	0
T161	0	586	0	0
T164	0	27	0	0
T168	0	29	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	20	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1081	0	0
T69	5995	15	0	0
T81	3859	10	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	20	0	0
T117	0	98	0	0
T118	0	102	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	77	0	0
T155	16502	0	0	0
T161	0	538	0	0
T164	0	11	0	0
T168	0	20	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	11	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1090	0	0
T81	3859	11	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	44	0	0
T117	0	71	0	0
T118	0	73	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T149	1496	0	0	0
T152	0	124	0	0
T155	16502	0	0	0
T161	0	527	0	0
T164	0	7	0	0
T168	0	16	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	27	0	0
T184	0	5	0	0

control_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1551	0	0
T69	5995	3	0	0
T85	14938	52	0	0
T86	1468	0	0	0
T117	99035	215	0	0
T118	0	168	0	0
T151	199765	0	0	0
T152	0	191	0	0
T158	2848	0	0	0
T161	0	500	0	0
T164	0	19	0	0
T168	8390	22	0	0
T179	3350	0	0	0
T182	0	7	0	0
T184	0	11	0	0
T185	870	0	0	0
T186	1096	0	0	0

fifo_level_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1101	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	57	0	0
T117	0	84	0	0
T118	0	87	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T149	1496	0	0	0
T152	0	119	0	0
T155	16502	0	0	0
T161	0	549	0	0
T164	0	21	0	0
T168	0	20	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	12	0	0
T184	0	4	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1420	0	0
T85	14938	38	0	0
T86	1468	0	0	0
T117	99035	195	0	0
T118	0	146	0	0
T121	15070	0	0	0
T151	199765	0	0	0
T152	0	136	0	0
T158	2848	0	0	0
T161	0	554	0	0
T164	0	25	0	0
T168	8390	15	0	0
T179	3350	0	0	0
T182	0	12	0	0
T183	0	13	0	0
T184	0	7	0	0
T185	870	0	0	0
T186	1096	0	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	2645	0	0
T66	1439	23	0	0
T67	1206	28	0	0
T68	756	0	0	0
T81	3859	0	0	0
T85	0	18	0	0
T87	1133	0	0	0
T88	1127	0	0	0
T117	0	361	0	0
T118	0	339	0	0
T154	19531	0	0	0
T155	16502	0	0	0
T156	855	0	0	0
T157	990	8	0	0
T161	0	525	0	0
T168	0	18	0	0
T182	0	102	0	0
T188	0	11	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1056	0	0
T69	5995	2	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	81	0	0
T117	0	53	0	0
T118	0	90	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	70	0	0
T155	16502	0	0	0
T161	0	519	0	0
T164	0	22	0	0
T168	0	50	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	21	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1127	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	50	0	0
T117	0	120	0	0
T118	0	118	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T149	1496	0	0	0
T152	0	87	0	0
T155	16502	0	0	0
T161	0	537	0	0
T164	0	15	0	0
T168	0	10	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	14	0	0
T183	0	2	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	999	0	0
T69	5995	4	0	0
T85	14938	54	0	0
T86	1468	0	0	0
T117	99035	55	0	0
T118	0	65	0	0
T151	199765	0	0	0
T152	0	57	0	0
T158	2848	0	0	0
T161	0	553	0	0
T164	0	7	0	0
T168	8390	37	0	0
T179	3350	0	0	0
T182	0	13	0	0
T183	0	3	0	0
T185	870	0	0	0
T186	1096	0	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1018	0	0
T69	5995	30	0	0
T85	14938	75	0	0
T86	1468	0	0	0
T117	99035	67	0	0
T118	0	71	0	0
T151	199765	0	0	0
T152	0	49	0	0
T158	2848	0	0	0
T161	0	537	0	0
T164	0	3	0	0
T168	8390	12	0	0
T179	3350	0	0	0
T182	0	9	0	0
T183	0	2	0	0
T185	870	0	0	0
T186	1096	0	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	905	0	0
T69	5995	13	0	0
T81	3859	6	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	27	0	0
T117	0	74	0	0
T118	0	81	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	45	0	0
T155	16502	0	0	0
T161	0	518	0	0
T164	0	18	0	0
T168	0	4	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	11	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	940	0	0
T69	5995	15	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	74	0	0
T117	0	56	0	0
T118	0	25	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	68	0	0
T155	16502	0	0	0
T161	0	507	0	0
T164	0	13	0	0
T168	0	18	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	5	0	0

rxf_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1099	0	0
T69	5995	7	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	45	0	0
T117	0	69	0	0
T118	0	144	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	93	0	0
T155	16502	0	0	0
T161	0	504	0	0
T164	0	13	0	0
T168	0	52	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	16	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1366	0	0
T85	14938	23	0	0
T86	1468	0	0	0
T117	99035	179	0	0
T118	0	193	0	0
T121	15070	0	0	0
T151	199765	0	0	0
T152	0	136	0	0
T158	2848	0	0	0
T161	0	492	0	0
T164	0	29	0	0
T168	8390	25	0	0
T179	3350	0	0	0
T182	0	40	0	0
T183	0	2	0	0
T184	0	10	0	0
T185	870	0	0	0
T186	1096	0	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	922	0	0
T69	5995	1	0	0
T81	3859	3	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	17	0	0
T117	0	74	0	0
T118	0	79	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	54	0	0
T155	16502	0	0	0
T161	0	522	0	0
T164	0	5	0	0
T168	0	14	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	5	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1467	0	0
T69	5995	3	0	0
T81	3859	4	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	68	0	0
T117	0	170	0	0
T118	0	180	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	150	0	0
T155	16502	0	0	0
T161	0	516	0	0
T164	0	43	0	0
T168	0	49	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	49	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1172	0	0
T69	5995	6	0	0
T81	3859	1	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	61	0	0
T117	0	98	0	0
T118	0	115	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	67	0	0
T155	16502	0	0	0
T161	0	561	0	0
T164	0	11	0	0
T168	0	38	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	7	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	980	0	0
T69	5995	6	0	0
T85	14938	49	0	0
T86	1468	0	0	0
T117	99035	38	0	0
T118	0	83	0	0
T151	199765	0	0	0
T152	0	80	0	0
T158	2848	0	0	0
T161	0	515	0	0
T164	0	16	0	0
T168	8390	46	0	0
T179	3350	0	0	0
T182	0	12	0	0
T183	0	7	0	0
T185	870	0	0	0
T186	1096	0	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	921	0	0
T69	5995	25	0	0
T81	3859	12	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	32	0	0
T117	0	74	0	0
T118	0	86	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	29	0	0
T155	16502	0	0	0
T161	0	528	0	0
T164	0	10	0	0
T168	0	4	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	7	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	906	0	0
T69	5995	7	0	0
T81	3859	4	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	27	0	0
T117	0	54	0	0
T118	0	40	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	65	0	0
T155	16502	0	0	0
T161	0	494	0	0
T164	0	14	0	0
T168	0	27	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	12	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	996	0	0
T69	5995	18	0	0
T81	3859	10	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	26	0	0
T117	0	80	0	0
T118	0	56	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	60	0	0
T155	16502	0	0	0
T161	0	531	0	0
T164	0	13	0	0
T168	0	17	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	4	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1037	0	0
T69	5995	9	0	0
T81	3859	5	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	96	0	0
T117	0	52	0	0
T118	0	76	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	70	0	0
T155	16502	0	0	0
T161	0	556	0	0
T164	0	9	0	0
T168	0	3	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	10	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	899	0	0
T69	5995	6	0	0
T85	14938	41	0	0
T86	1468	0	0	0
T117	99035	29	0	0
T118	0	63	0	0
T151	199765	0	0	0
T152	0	51	0	0
T158	2848	0	0	0
T161	0	523	0	0
T164	0	6	0	0
T168	8390	28	0	0
T179	3350	0	0	0
T183	0	10	0	0
T185	870	0	0	0
T186	1096	0	0	0
T187	0	27	0	0

txf_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	1907094280	1144	0	0
T69	5995	7	0	0
T81	3859	2	0	0
T82	6849	0	0	0
T84	6443	0	0	0
T85	0	71	0	0
T117	0	110	0	0
T118	0	68	0	0
T146	1253	0	0	0
T147	1895	0	0	0
T148	1182	0	0	0
T152	0	109	0	0
T155	16502	0	0	0
T161	0	537	0	0
T164	0	17	0	0
T168	0	25	0	0
T180	1707	0	0	0
T181	1083	0	0	0
T182	0	12	0	0