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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.10 99.01 96.35 98.63 92.06 98.05 95.86 99.76


Total test records in report: 1791
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T475 /workspace/coverage/default/25.spi_device_txrx.1213983696 Dec 24 01:56:18 PM PST 23 Dec 24 02:02:55 PM PST 23 22766061329 ps
T476 /workspace/coverage/default/11.spi_device_intr.974861741 Dec 24 01:54:38 PM PST 23 Dec 24 01:55:03 PM PST 23 3949643433 ps
T299 /workspace/coverage/default/4.spi_device_cfg_cmd.1134401128 Dec 24 01:54:07 PM PST 23 Dec 24 01:54:17 PM PST 23 1307308060 ps
T109 /workspace/coverage/default/41.spi_device_tpm_read_hw_reg.3304956016 Dec 24 01:57:36 PM PST 23 Dec 24 01:57:53 PM PST 23 5588553028 ps
T477 /workspace/coverage/default/29.spi_device_txrx.813403323 Dec 24 01:56:23 PM PST 23 Dec 24 02:12:45 PM PST 23 156947154111 ps
T478 /workspace/coverage/default/5.spi_device_tpm_rw.1839233890 Dec 24 01:54:13 PM PST 23 Dec 24 01:54:23 PM PST 23 165568710 ps
T73 /workspace/coverage/default/37.spi_device_abort.627270227 Dec 24 01:57:13 PM PST 23 Dec 24 01:57:21 PM PST 23 16314881 ps
T80 /workspace/coverage/default/33.spi_device_alert_test.1628848310 Dec 24 01:56:55 PM PST 23 Dec 24 01:57:07 PM PST 23 41739036 ps
T479 /workspace/coverage/default/32.spi_device_abort.3407843996 Dec 24 01:56:40 PM PST 23 Dec 24 01:56:44 PM PST 23 16074028 ps
T239 /workspace/coverage/default/6.spi_device_mailbox.808998220 Dec 24 01:54:16 PM PST 23 Dec 24 01:54:31 PM PST 23 444423459 ps
T75 /workspace/coverage/default/43.spi_device_tx_async_fifo_reset.242248453 Dec 24 01:57:35 PM PST 23 Dec 24 01:57:37 PM PST 23 16035464 ps
T206 /workspace/coverage/default/8.spi_device_intr.984926729 Dec 24 01:54:22 PM PST 23 Dec 24 01:54:51 PM PST 23 15464568396 ps
T359 /workspace/coverage/default/2.spi_device_tpm_read_hw_reg.450799942 Dec 24 01:53:54 PM PST 23 Dec 24 01:53:58 PM PST 23 2002035736 ps
T229 /workspace/coverage/default/17.spi_device_intercept.220124580 Dec 24 01:55:50 PM PST 23 Dec 24 01:55:57 PM PST 23 481941151 ps
T480 /workspace/coverage/default/15.spi_device_csb_read.452164244 Dec 24 01:55:13 PM PST 23 Dec 24 01:55:15 PM PST 23 14638967 ps
T172 /workspace/coverage/default/8.spi_device_read_buffer_direct.3424973308 Dec 24 01:54:20 PM PST 23 Dec 24 01:54:32 PM PST 23 253249190 ps
T133 /workspace/coverage/default/2.spi_device_tx_async_fifo_reset.1696218130 Dec 24 01:53:55 PM PST 23 Dec 24 01:53:57 PM PST 23 18919318 ps
T292 /workspace/coverage/default/29.spi_device_pass_addr_payload_swap.3646391092 Dec 24 01:58:14 PM PST 23 Dec 24 01:58:26 PM PST 23 15523280927 ps
T264 /workspace/coverage/default/45.spi_device_mailbox.938474641 Dec 24 01:58:20 PM PST 23 Dec 24 01:58:30 PM PST 23 9967886152 ps
T207 /workspace/coverage/default/17.spi_device_dummy_item_extra_dly.2576863403 Dec 24 01:55:34 PM PST 23 Dec 24 02:09:30 PM PST 23 871282227697 ps
T481 /workspace/coverage/default/42.spi_device_bit_transfer.1240407955 Dec 24 01:57:36 PM PST 23 Dec 24 01:57:44 PM PST 23 1133156977 ps
T482 /workspace/coverage/default/0.spi_device_byte_transfer.3873258392 Dec 24 01:53:17 PM PST 23 Dec 24 01:53:26 PM PST 23 923592662 ps
T483 /workspace/coverage/default/21.spi_device_tpm_read_hw_reg.4166088184 Dec 24 01:56:21 PM PST 23 Dec 24 01:56:30 PM PST 23 859630821 ps
T484 /workspace/coverage/default/13.spi_device_txrx.3146955407 Dec 24 01:56:00 PM PST 23 Dec 24 01:58:16 PM PST 23 57528540119 ps
T48 /workspace/coverage/default/25.spi_device_flash_and_tpm.282466478 Dec 24 01:56:06 PM PST 23 Dec 24 02:00:50 PM PST 23 90020799924 ps
T51 /workspace/coverage/default/33.spi_device_fifo_underflow_overflow.607099849 Dec 24 01:56:56 PM PST 23 Dec 24 02:09:03 PM PST 23 144594816812 ps
T485 /workspace/coverage/default/2.spi_device_tpm_sts_read.3228912119 Dec 24 01:54:07 PM PST 23 Dec 24 01:54:11 PM PST 23 121127510 ps
T134 /workspace/coverage/default/45.spi_device_tx_async_fifo_reset.4202610997 Dec 24 01:57:50 PM PST 23 Dec 24 01:57:52 PM PST 23 16916572 ps
T28 /workspace/coverage/default/1.spi_device_stress_all.1262533897 Dec 24 01:53:39 PM PST 23 Dec 24 02:27:57 PM PST 23 632375722263 ps
T116 /workspace/coverage/default/45.spi_device_intercept.2560755130 Dec 24 01:58:19 PM PST 23 Dec 24 01:58:27 PM PST 23 7028507219 ps
T486 /workspace/coverage/default/45.spi_device_txrx.946287316 Dec 24 01:57:50 PM PST 23 Dec 24 02:01:23 PM PST 23 64148400254 ps
T487 /workspace/coverage/default/16.spi_device_csb_read.1381967065 Dec 24 01:55:12 PM PST 23 Dec 24 01:55:14 PM PST 23 42741147 ps
T193 /workspace/coverage/default/49.spi_device_fifo_underflow_overflow.2144552137 Dec 24 01:58:34 PM PST 23 Dec 24 02:03:43 PM PST 23 136904745869 ps
T135 /workspace/coverage/default/22.spi_device_tx_async_fifo_reset.3339948504 Dec 24 01:55:51 PM PST 23 Dec 24 01:55:52 PM PST 23 16281955 ps
T488 /workspace/coverage/default/34.spi_device_fifo_underflow_overflow.2062182985 Dec 24 01:56:58 PM PST 23 Dec 24 02:00:40 PM PST 23 122385292712 ps
T489 /workspace/coverage/default/25.spi_device_tpm_read_hw_reg.262735228 Dec 24 01:56:28 PM PST 23 Dec 24 01:56:44 PM PST 23 4476235757 ps
T490 /workspace/coverage/default/3.spi_device_byte_transfer.2138598630 Dec 24 01:54:08 PM PST 23 Dec 24 01:54:14 PM PST 23 1182056486 ps
T491 /workspace/coverage/default/37.spi_device_upload.1989043532 Dec 24 01:57:20 PM PST 23 Dec 24 01:57:31 PM PST 23 241660933 ps
T492 /workspace/coverage/default/26.spi_device_dummy_item_extra_dly.3523027320 Dec 24 01:56:04 PM PST 23 Dec 24 02:14:28 PM PST 23 809941773664 ps
T281 /workspace/coverage/default/5.spi_device_cfg_cmd.3144331008 Dec 24 01:54:15 PM PST 23 Dec 24 01:54:25 PM PST 23 247323499 ps
T136 /workspace/coverage/default/13.spi_device_tx_async_fifo_reset.4149256541 Dec 24 01:54:57 PM PST 23 Dec 24 01:55:01 PM PST 23 14041774 ps
T354 /workspace/coverage/default/6.spi_device_tpm_all.370015423 Dec 24 01:54:18 PM PST 23 Dec 24 01:54:48 PM PST 23 2303962809 ps
T45 /workspace/coverage/default/12.spi_device_mem_parity.3703942397 Dec 24 01:55:18 PM PST 23 Dec 24 01:55:21 PM PST 23 31481674 ps
T52 /workspace/coverage/default/22.spi_device_fifo_underflow_overflow.2869177605 Dec 24 01:55:55 PM PST 23 Dec 24 02:04:16 PM PST 23 72460179078 ps
T274 /workspace/coverage/default/36.spi_device_cfg_cmd.1960760383 Dec 24 01:57:13 PM PST 23 Dec 24 01:57:23 PM PST 23 189676756 ps
T22 /workspace/coverage/default/18.spi_device_pass_addr_payload_swap.2266169311 Dec 24 01:55:32 PM PST 23 Dec 24 01:55:54 PM PST 23 8183393486 ps
T53 /workspace/coverage/default/45.spi_device_fifo_underflow_overflow.412992913 Dec 24 01:57:54 PM PST 23 Dec 24 02:06:36 PM PST 23 322598540068 ps
T113 /workspace/coverage/default/18.spi_device_rx_timeout.2117767788 Dec 24 01:56:07 PM PST 23 Dec 24 01:56:16 PM PST 23 2394779293 ps
T493 /workspace/coverage/default/29.spi_device_bit_transfer.3544141648 Dec 24 01:56:18 PM PST 23 Dec 24 01:56:24 PM PST 23 713514274 ps
T494 /workspace/coverage/default/43.spi_device_intr.1490141170 Dec 24 01:57:36 PM PST 23 Dec 24 01:58:17 PM PST 23 21385042263 ps
T495 /workspace/coverage/default/25.spi_device_alert_test.2837218825 Dec 24 01:55:57 PM PST 23 Dec 24 01:55:58 PM PST 23 12743531 ps
T257 /workspace/coverage/default/23.spi_device_extreme_fifo_size.3450227387 Dec 24 01:55:51 PM PST 23 Dec 24 01:56:54 PM PST 23 122254199334 ps
T496 /workspace/coverage/default/41.spi_device_dummy_item_extra_dly.3047020235 Dec 24 01:57:35 PM PST 23 Dec 24 02:22:00 PM PST 23 101405989936 ps
T63 /workspace/coverage/default/48.spi_device_flash_and_tpm_min_idle.602567221 Dec 24 01:58:32 PM PST 23 Dec 24 02:01:45 PM PST 23 25209717405 ps
T260 /workspace/coverage/default/6.spi_device_fifo_full.3282208391 Dec 24 01:54:12 PM PST 23 Dec 24 02:47:08 PM PST 23 55072701801 ps
T173 /workspace/coverage/default/44.spi_device_flash_mode.4029635769 Dec 24 01:57:52 PM PST 23 Dec 24 01:58:02 PM PST 23 366594748 ps
T218 /workspace/coverage/default/33.spi_device_pass_addr_payload_swap.1619512178 Dec 24 01:56:55 PM PST 23 Dec 24 01:57:12 PM PST 23 366765655 ps
T128 /workspace/coverage/default/41.spi_device_stress_all.2447936147 Dec 24 01:57:35 PM PST 23 Dec 24 02:53:10 PM PST 23 321901866955 ps
T497 /workspace/coverage/default/11.spi_device_bit_transfer.1585112191 Dec 24 01:54:25 PM PST 23 Dec 24 01:54:35 PM PST 23 2127722404 ps
T498 /workspace/coverage/default/21.spi_device_smoke.2111577419 Dec 24 01:56:01 PM PST 23 Dec 24 01:56:03 PM PST 23 56469050 ps
T499 /workspace/coverage/default/27.spi_device_tpm_read_hw_reg.2437699880 Dec 24 01:56:18 PM PST 23 Dec 24 01:56:26 PM PST 23 1673626250 ps
T500 /workspace/coverage/default/8.spi_device_tpm_all.4139532685 Dec 24 01:54:21 PM PST 23 Dec 24 01:54:32 PM PST 23 1221621819 ps
T114 /workspace/coverage/default/23.spi_device_rx_timeout.3899148586 Dec 24 01:56:02 PM PST 23 Dec 24 01:56:11 PM PST 23 2441604382 ps
T501 /workspace/coverage/default/2.spi_device_dummy_item_extra_dly.1359407189 Dec 24 01:53:55 PM PST 23 Dec 24 02:42:23 PM PST 23 456221397314 ps
T502 /workspace/coverage/default/19.spi_device_bit_transfer.2172713335 Dec 24 01:55:42 PM PST 23 Dec 24 01:55:45 PM PST 23 266056699 ps
T503 /workspace/coverage/default/0.spi_device_intr.2610584068 Dec 24 01:53:17 PM PST 23 Dec 24 01:53:54 PM PST 23 36345140315 ps
T504 /workspace/coverage/default/32.spi_device_tx_async_fifo_reset.2718520816 Dec 24 01:56:44 PM PST 23 Dec 24 01:56:51 PM PST 23 24586251 ps
T505 /workspace/coverage/default/37.spi_device_tx_async_fifo_reset.2248192530 Dec 24 01:57:13 PM PST 23 Dec 24 01:57:22 PM PST 23 59028001 ps
T174 /workspace/coverage/default/34.spi_device_read_buffer_direct.2349200685 Dec 24 01:56:59 PM PST 23 Dec 24 01:57:16 PM PST 23 2068491741 ps
T506 /workspace/coverage/default/34.spi_device_abort.680274301 Dec 24 01:56:56 PM PST 23 Dec 24 01:57:07 PM PST 23 25258417 ps
T29 /workspace/coverage/default/15.spi_device_flash_all.2997874587 Dec 24 01:55:16 PM PST 23 Dec 24 01:56:29 PM PST 23 6437670366 ps
T89 /workspace/coverage/default/15.spi_device_ram_cfg.775487259 Dec 24 01:55:12 PM PST 23 Dec 24 01:55:15 PM PST 23 123164125 ps
T90 /workspace/coverage/default/18.spi_device_ram_cfg.766333151 Dec 24 01:56:04 PM PST 23 Dec 24 01:56:08 PM PST 23 15263172 ps
T507 /workspace/coverage/default/8.spi_device_tx_async_fifo_reset.663412021 Dec 24 01:54:21 PM PST 23 Dec 24 01:54:30 PM PST 23 14282207 ps
T508 /workspace/coverage/default/4.spi_device_perf.862428035 Dec 24 01:53:55 PM PST 23 Dec 24 02:02:04 PM PST 23 24135020154 ps
T91 /workspace/coverage/default/2.spi_device_sec_cm.2091464403 Dec 24 01:54:10 PM PST 23 Dec 24 01:54:17 PM PST 23 82884635 ps
T96 /workspace/coverage/default/31.spi_device_tx_async_fifo_reset.2795723111 Dec 24 01:56:55 PM PST 23 Dec 24 01:57:07 PM PST 23 57220579 ps
T97 /workspace/coverage/default/14.spi_device_cfg_cmd.661812346 Dec 24 01:55:12 PM PST 23 Dec 24 01:55:17 PM PST 23 6068271636 ps
T98 /workspace/coverage/default/43.spi_device_intercept.798494653 Dec 24 01:57:37 PM PST 23 Dec 24 01:57:44 PM PST 23 118562732 ps
T99 /workspace/coverage/default/30.spi_device_flash_and_tpm.2910608700 Dec 24 01:56:39 PM PST 23 Dec 24 01:58:34 PM PST 23 57891884569 ps
T100 /workspace/coverage/default/36.spi_device_tx_async_fifo_reset.2214220323 Dec 24 01:57:14 PM PST 23 Dec 24 01:57:22 PM PST 23 16148926 ps
T285 /workspace/coverage/default/43.spi_device_pass_cmd_filtering.2874747302 Dec 24 01:57:42 PM PST 23 Dec 24 01:58:35 PM PST 23 18571720050 ps
T46 /workspace/coverage/default/18.spi_device_mem_parity.1332464263 Dec 24 01:56:04 PM PST 23 Dec 24 01:56:08 PM PST 23 16048665 ps
T77 /workspace/coverage/default/32.spi_device_rx_async_fifo_reset.1465814640 Dec 24 01:56:39 PM PST 23 Dec 24 01:56:43 PM PST 23 34288123 ps
T509 /workspace/coverage/default/31.spi_device_tpm_rw.1811264716 Dec 24 01:56:41 PM PST 23 Dec 24 01:56:46 PM PST 23 66809098 ps
T510 /workspace/coverage/default/30.spi_device_abort.2882538788 Dec 24 01:56:39 PM PST 23 Dec 24 01:56:43 PM PST 23 17428301 ps
T511 /workspace/coverage/default/39.spi_device_abort.2736047508 Dec 24 01:57:13 PM PST 23 Dec 24 01:57:20 PM PST 23 16015684 ps
T512 /workspace/coverage/default/26.spi_device_fifo_underflow_overflow.2704438916 Dec 24 01:56:03 PM PST 23 Dec 24 02:10:36 PM PST 23 184381066690 ps
T513 /workspace/coverage/default/19.spi_device_rx_timeout.4082486499 Dec 24 01:55:52 PM PST 23 Dec 24 01:56:00 PM PST 23 820729666 ps
T78 /workspace/coverage/default/4.spi_device_rx_async_fifo_reset.3185071952 Dec 24 01:54:08 PM PST 23 Dec 24 01:54:12 PM PST 23 60950244 ps
T54 /workspace/coverage/default/3.spi_device_extreme_fifo_size.4258809931 Dec 24 01:54:06 PM PST 23 Dec 24 02:38:22 PM PST 23 213424677425 ps
T514 /workspace/coverage/default/3.spi_device_fifo_full.2680702763 Dec 24 01:54:09 PM PST 23 Dec 24 01:58:01 PM PST 23 44884470603 ps
T515 /workspace/coverage/default/18.spi_device_tpm_all.1004707610 Dec 24 01:56:04 PM PST 23 Dec 24 01:56:17 PM PST 23 2867333519 ps
T175 /workspace/coverage/default/21.spi_device_read_buffer_direct.3834170338 Dec 24 01:56:24 PM PST 23 Dec 24 01:56:32 PM PST 23 6749122555 ps
T30 /workspace/coverage/default/43.spi_device_flash_and_tpm.4092649759 Dec 24 01:57:38 PM PST 23 Dec 24 02:01:07 PM PST 23 58624746689 ps
T516 /workspace/coverage/default/41.spi_device_byte_transfer.881244716 Dec 24 01:57:36 PM PST 23 Dec 24 01:57:43 PM PST 23 169990036 ps
T31 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.964458539 Dec 24 01:54:07 PM PST 23 Dec 24 01:58:59 PM PST 23 139712002147 ps
T517 /workspace/coverage/default/6.spi_device_smoke.2484719905 Dec 24 01:54:17 PM PST 23 Dec 24 01:54:25 PM PST 23 160474233 ps
T518 /workspace/coverage/default/45.spi_device_smoke.2737090211 Dec 24 01:57:51 PM PST 23 Dec 24 01:57:53 PM PST 23 34495062 ps
T519 /workspace/coverage/default/37.spi_device_tpm_read_hw_reg.2781018871 Dec 24 01:57:14 PM PST 23 Dec 24 01:57:42 PM PST 23 4948495498 ps
T520 /workspace/coverage/default/40.spi_device_byte_transfer.1422452748 Dec 24 01:57:17 PM PST 23 Dec 24 01:57:29 PM PST 23 334544395 ps
T92 /workspace/coverage/default/1.spi_device_sec_cm.3879475640 Dec 24 01:53:53 PM PST 23 Dec 24 01:53:55 PM PST 23 166210649 ps
T60 /workspace/coverage/default/16.spi_device_flash_and_tpm_min_idle.2192589653 Dec 24 01:56:05 PM PST 23 Dec 24 01:58:48 PM PST 23 11342268445 ps
T101 /workspace/coverage/default/11.spi_device_extreme_fifo_size.783415597 Dec 24 01:54:45 PM PST 23 Dec 24 01:55:31 PM PST 23 49198946816 ps
T102 /workspace/coverage/default/43.spi_device_tpm_sts_read.3860635173 Dec 24 01:57:39 PM PST 23 Dec 24 01:57:44 PM PST 23 165709118 ps
T141 /workspace/coverage/default/37.spi_device_rx_async_fifo_reset.1810544218 Dec 24 01:57:15 PM PST 23 Dec 24 01:57:24 PM PST 23 48521826 ps
T55 /workspace/coverage/default/21.spi_device_perf.533711386 Dec 24 01:56:18 PM PST 23 Dec 24 02:03:38 PM PST 23 21065938407 ps
T521 /workspace/coverage/default/25.spi_device_rx_timeout.1918304476 Dec 24 01:58:43 PM PST 23 Dec 24 01:58:52 PM PST 23 545017227 ps
T522 /workspace/coverage/default/36.spi_device_perf.4029983320 Dec 24 01:57:20 PM PST 23 Dec 24 02:04:15 PM PST 23 78453533025 ps
T523 /workspace/coverage/default/41.spi_device_txrx.436301541 Dec 24 01:57:36 PM PST 23 Dec 24 01:59:24 PM PST 23 10078722994 ps
T61 /workspace/coverage/default/45.spi_device_flash_and_tpm_min_idle.2642931566 Dec 24 01:58:22 PM PST 23 Dec 24 01:59:39 PM PST 23 24688623100 ps
T56 /workspace/coverage/default/48.spi_device_fifo_underflow_overflow.1586988268 Dec 24 01:58:22 PM PST 23 Dec 24 02:01:12 PM PST 23 25772880142 ps
T524 /workspace/coverage/default/0.spi_device_smoke.683443270 Dec 24 01:53:22 PM PST 23 Dec 24 01:53:33 PM PST 23 33890755 ps
T32 /workspace/coverage/default/3.spi_device_flash_and_tpm_min_idle.1530506169 Dec 24 01:54:13 PM PST 23 Dec 24 02:05:55 PM PST 23 94006084092 ps
T525 /workspace/coverage/default/5.spi_device_tpm_sts_read.645783104 Dec 24 01:54:14 PM PST 23 Dec 24 01:54:21 PM PST 23 82988453 ps
T526 /workspace/coverage/default/26.spi_device_abort.1282925347 Dec 24 01:56:03 PM PST 23 Dec 24 01:56:07 PM PST 23 22818139 ps
T527 /workspace/coverage/default/42.spi_device_smoke.3513175134 Dec 24 01:57:40 PM PST 23 Dec 24 01:57:46 PM PST 23 91065945 ps
T528 /workspace/coverage/default/5.spi_device_perf.3679769218 Dec 24 01:54:12 PM PST 23 Dec 24 02:07:20 PM PST 23 122302417243 ps
T176 /workspace/coverage/default/10.spi_device_read_buffer_direct.3678842773 Dec 24 01:54:30 PM PST 23 Dec 24 01:54:39 PM PST 23 7980617009 ps
T529 /workspace/coverage/default/5.spi_device_rx_async_fifo_reset.3918071981 Dec 24 01:54:15 PM PST 23 Dec 24 01:54:23 PM PST 23 28210627 ps
T530 /workspace/coverage/default/48.spi_device_dummy_item_extra_dly.1668414625 Dec 24 01:58:19 PM PST 23 Dec 24 02:02:22 PM PST 23 35488741810 ps
T531 /workspace/coverage/default/47.spi_device_tpm_sts_read.1149197276 Dec 24 01:58:20 PM PST 23 Dec 24 01:58:22 PM PST 23 32298557 ps
T289 /workspace/coverage/default/37.spi_device_pass_addr_payload_swap.2737358950 Dec 24 01:57:20 PM PST 23 Dec 24 01:57:45 PM PST 23 24616491561 ps
T256 /workspace/coverage/default/26.spi_device_extreme_fifo_size.4101720170 Dec 24 01:55:59 PM PST 23 Dec 24 02:18:47 PM PST 23 416284420503 ps
T230 /workspace/coverage/default/1.spi_device_mailbox.617767956 Dec 24 01:53:53 PM PST 23 Dec 24 01:54:22 PM PST 23 38181162957 ps
T532 /workspace/coverage/default/26.spi_device_rx_timeout.1167246621 Dec 24 01:56:10 PM PST 23 Dec 24 01:56:21 PM PST 23 550468801 ps
T533 /workspace/coverage/default/34.spi_device_extreme_fifo_size.310129924 Dec 24 01:56:58 PM PST 23 Dec 24 02:35:48 PM PST 23 238289285638 ps
T534 /workspace/coverage/default/39.spi_device_extreme_fifo_size.2262608921 Dec 24 01:57:11 PM PST 23 Dec 24 02:09:33 PM PST 23 59238582286 ps
T535 /workspace/coverage/default/4.spi_device_byte_transfer.2458715894 Dec 24 01:54:07 PM PST 23 Dec 24 01:54:13 PM PST 23 110973937 ps
T536 /workspace/coverage/default/5.spi_device_fifo_underflow_overflow.1575622286 Dec 24 01:54:08 PM PST 23 Dec 24 02:00:41 PM PST 23 72947729391 ps
T537 /workspace/coverage/default/26.spi_device_byte_transfer.4032243055 Dec 24 01:55:59 PM PST 23 Dec 24 01:56:04 PM PST 23 591055743 ps
T538 /workspace/coverage/default/8.spi_device_fifo_full.4070241867 Dec 24 01:54:20 PM PST 23 Dec 24 02:11:17 PM PST 23 16957827982 ps
T539 /workspace/coverage/default/18.spi_device_bit_transfer.1917954023 Dec 24 01:56:26 PM PST 23 Dec 24 01:56:32 PM PST 23 1394945437 ps
T540 /workspace/coverage/default/12.spi_device_perf.2477761839 Dec 24 01:54:55 PM PST 23 Dec 24 02:04:04 PM PST 23 53319708955 ps
T541 /workspace/coverage/default/47.spi_device_extreme_fifo_size.2798901955 Dec 24 01:58:37 PM PST 23 Dec 24 03:00:09 PM PST 23 312855656268 ps
T542 /workspace/coverage/default/16.spi_device_dummy_item_extra_dly.802862141 Dec 24 01:55:13 PM PST 23 Dec 24 01:59:11 PM PST 23 139490442435 ps
T197 /workspace/coverage/default/29.spi_device_flash_and_tpm.1002878954 Dec 24 01:56:28 PM PST 23 Dec 24 02:06:36 PM PST 23 366344411444 ps
T543 /workspace/coverage/default/29.spi_device_extreme_fifo_size.2528763266 Dec 24 01:56:22 PM PST 23 Dec 24 02:13:32 PM PST 23 672407314752 ps
T255 /workspace/coverage/default/11.spi_device_upload.3666041485 Dec 24 01:54:32 PM PST 23 Dec 24 01:54:45 PM PST 23 2087027042 ps
T544 /workspace/coverage/default/8.spi_device_rx_async_fifo_reset.167859695 Dec 24 01:54:22 PM PST 23 Dec 24 01:54:31 PM PST 23 183890518 ps
T545 /workspace/coverage/default/23.spi_device_tpm_read_hw_reg.1419034215 Dec 24 01:56:21 PM PST 23 Dec 24 01:56:28 PM PST 23 713147724 ps
T286 /workspace/coverage/default/6.spi_device_flash_all.77317632 Dec 24 01:54:15 PM PST 23 Dec 24 01:54:32 PM PST 23 4015074834 ps
T62 /workspace/coverage/default/30.spi_device_stress_all.4045566891 Dec 24 01:56:39 PM PST 23 Dec 24 02:07:05 PM PST 23 191377022053 ps
T546 /workspace/coverage/default/31.spi_device_bit_transfer.3170409026 Dec 24 01:56:53 PM PST 23 Dec 24 01:57:02 PM PST 23 1905616835 ps
T547 /workspace/coverage/default/27.spi_device_csb_read.3620712178 Dec 24 01:56:07 PM PST 23 Dec 24 01:56:12 PM PST 23 26747236 ps
T177 /workspace/coverage/default/28.spi_device_flash_mode.3946939215 Dec 24 01:56:22 PM PST 23 Dec 24 01:57:56 PM PST 23 18871221594 ps
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T606 /workspace/coverage/default/10.spi_device_tpm_sts_read.1278453920 Dec 24 01:54:30 PM PST 23 Dec 24 01:54:35 PM PST 23 49101949 ps
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T607 /workspace/coverage/default/6.spi_device_tpm_sts_read.2008643737 Dec 24 01:54:14 PM PST 23 Dec 24 01:54:22 PM PST 23 71293012 ps
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T312 /workspace/coverage/default/2.spi_device_intercept.2488201311 Dec 24 01:54:09 PM PST 23 Dec 24 01:54:18 PM PST 23 1414237833 ps
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T617 /workspace/coverage/default/38.spi_device_mailbox.4279693239 Dec 24 01:57:14 PM PST 23 Dec 24 01:57:24 PM PST 23 41325944 ps
T618 /workspace/coverage/default/14.spi_device_perf.2769249647 Dec 24 01:54:54 PM PST 23 Dec 24 02:13:11 PM PST 23 68569234811 ps
T216 /workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.569494000 Dec 24 01:56:23 PM PST 23 Dec 24 01:57:44 PM PST 23 3929273496 ps
T619 /workspace/coverage/default/3.spi_device_abort.3010986286 Dec 24 01:54:11 PM PST 23 Dec 24 01:54:19 PM PST 23 52781379 ps
T267 /workspace/coverage/default/40.spi_device_cfg_cmd.3465598394 Dec 24 01:57:21 PM PST 23 Dec 24 01:57:32 PM PST 23 374978644 ps
T620 /workspace/coverage/default/46.spi_device_cfg_cmd.1825331558 Dec 24 01:58:20 PM PST 23 Dec 24 01:58:25 PM PST 23 35083161 ps
T621 /workspace/coverage/default/26.spi_device_tpm_rw.243640681 Dec 24 01:56:03 PM PST 23 Dec 24 01:56:07 PM PST 23 44401454 ps
T622 /workspace/coverage/default/20.spi_device_txrx.1630392421 Dec 24 01:55:49 PM PST 23 Dec 24 01:58:32 PM PST 23 12844995359 ps
T623 /workspace/coverage/default/1.spi_device_byte_transfer.3415755054 Dec 24 01:53:27 PM PST 23 Dec 24 01:53:37 PM PST 23 151221124 ps
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