Unified Coverage Report :: Module :: spi_fwm_rxf_ctrl

Module : spi_fwm_rxf_ctrl

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_fwmode.u_rxf_ctrl	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.u_fwmode.u_rxf_ctrl

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00	0.00					u_fwmode

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : spi_fwm_rxf_ctrl

	Line No.	Total	Covered	Percent
TOTAL		94	0	0.00
ALWAYS	80	3	0	0.00
CONT_ASSIGN	84	1	0	0.00
CONT_ASSIGN	87	1	0	0.00
CONT_ASSIGN	90	1	0	0.00
CONT_ASSIGN	91	1	0	0.00
CONT_ASSIGN	93	1	0	0.00
ALWAYS	97	10	0	0.00
CONT_ASSIGN	116	1	0	0.00
ALWAYS	120	3	0	0.00
ALWAYS	131	7	0	0.00
CONT_ASSIGN	139	1	0	0.00
CONT_ASSIGN	142	1	0	0.00
ALWAYS	146	11	0	0.00
ALWAYS	160	4	0	0.00
CONT_ASSIGN	167	1	0	0.00
CONT_ASSIGN	171	1	0	0.00
ALWAYS	181	41	0	0.00
ALWAYS	266	5	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
80	0	2
81	0	1
84	0	1
87	0	1
90	0	1
91	0	1
93	0	1
97	0	1
98	0	1
99	0	1
100	0	1
102	0	1
103	0	1
104	0	1
106	0	1
107	0	1
110	0	1
			==> MISSING_ELSE
116	0	1
120	0	1
122	0	1
124	0	1
131	0	1
132	0	1
133	0	1
134	0	1
135	0	1
136	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
139	0	1
142	0	1
146	0	1
147	0	1
148	0	1
149	0	1
150	0	1
151	0	2
152	0	1
153	0	1
154	0	1
155	0	1
			==> MISSING_ELSE
160	0	1
161	0	1
162	0	1
163	0	1
			==> MISSING_ELSE
167	0	1
171	0	1
181	0	1
182	0	1
183	0	1
184	0	1
185	0	1
186	0	1
187	0	1
188	0	1
190	0	1
194	0	1
195	0	1
196	0	1
197	0	1
199	0	1
207	0	1
208	0	1
209	0	1
210	0	1
211	0	1
212	0	1
213	0	1
214	0	1
215	0	1
217	0	1
218	0	1
226	0	1
227	0	1
228	0	1
229	0	1
230	0	1
232	0	1
233	0	1
234	0	1
236	0	1
243	0	1
244	0	1
246	0	1
247	0	1
248	0	1
255	0	1
256	0	1
266	0	1
267	0	1
268	0	1
270	0	1
271	0	1

---

Cond Coverage for Module : spi_fwm_rxf_ctrl

	Total	Covered	Percent
Conditions	39	0	0.00
Logical	39	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       84
 EXPRESSION (spi_mode_i == FwMode)
            -----------1----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       90
 EXPRESSION ((ptr_cmp[(PtrW - 1)] == 1'b1) && (ptr_cmp[(PtrW - 2):SDW] == '0))
             --------------1--------------    ---------------2---------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       90
 SUB-EXPRESSION (ptr_cmp[(PtrW - 1)] == 1'b1)
                --------------1--------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       90
 SUB-EXPRESSION (ptr_cmp[(PtrW - 2):SDW] == '0)
                ---------------1---------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       100
 EXPRESSION (byte_enable == '0)
            ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       102
 EXPRESSION (wptr[(PtrW - 2):SDW] == sramf_limit)
            ------------------1------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       116
 EXPRESSION (1'b1 == (&byte_enable))
            ------------1-----------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       120
 EXPRESSION (wptr[(PtrW - 1)] == rptr[(PtrW - 1)])
            -------------------1------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       135
 EXPRESSION (st == StWait)
            -------1------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       136
 EXPRESSION (cur_timer != '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       139
 EXPRESSION (cur_timer == '0)
            --------1--------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       151
 EXPRESSION (pos == 2'((NumBytes - 1)))
            -------------1-------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       167
 EXPRESSION ((byte_enable == '0) ? '1 : spi_device_pkg::sram_strb2mask(byte_enable))
             ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       167
 SUB-EXPRESSION (byte_enable == '0)
                ---------1---------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       194
 EXPRESSION (active && fifo_valid && ((!sramf_full)))
             ---1--    -----2----    -------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       207
 EXPRESSION (fifo_valid && ((!full_sramwidth)))
             -----1----    ---------2---------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       230
 EXPRESSION (((!fifo_valid)) && timer_expired)
             -------1-------    ------2------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

---

FSM Coverage for Module : spi_fwm_rxf_ctrl

Summary for FSM :: st

	Total	Covered	Percent
States	5	0	0.00	(Not included in score)
Transitions	7	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: st

---

states	Line No.	Covered	Tests
StIdle	199	Not Covered
StPop	195	Not Covered
StUpdate	244	Not Covered
StWait	217	Not Covered
StWrite	212	Not Covered

transitions	Line No.	Covered	Tests
StIdle->StPop	195	Not Covered
StPop->StWait	217	Not Covered
StPop->StWrite	212	Not Covered
StUpdate->StIdle	255	Not Covered
StWait->StPop	227	Not Covered
StWait->StWrite	232	Not Covered
StWrite->StUpdate	244	Not Covered

---

Branch Coverage for Module : spi_fwm_rxf_ctrl

	Line No.	Total	Covered	Percent
Branches		38	0	0.00
TERNARY	167	2	0	0.00
IF	80	2	0	0.00
IF	97	5	0	0.00
IF	120	2	0	0.00
IF	131	5	0	0.00
IF	146	5	0	0.00
IF	160	3	0	0.00
CASE	190	12	0	0.00
IF	266	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwm_rxf_ctrl.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	167	((byte_enable == '0)) ? 

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	80	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	97	if ((!rst_ni))
-2-:	99	if (update_wptr)
-3-:	100	if ((byte_enable == '0))
-4-:	102	if ((wptr[(PtrW - 2):SDW] == sramf_limit))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	1	1	Not Covered
0	1	1	0	Not Covered
0	1	0	-	Not Covered
0	0	-	-	Not Covered

	LineNo.	Expression
-1-:	120	if ((wptr[(PtrW - 1)] == rptr[(PtrW - 1)]))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	131	if ((!rst_ni))
-2-:	133	if (timer_rst)
-3-:	135	if ((st == StWait))
-4-:	136	if ((cur_timer != '0))

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	-	-	Not Covered
0	0	1	1	Not Covered
0	0	1	0	Not Covered
0	0	0	-	Not Covered

	LineNo.	Expression
-1-:	146	if ((!rst_ni))
-2-:	149	if (update_wdata)
-3-:	151	if ((pos == 2'((NumBytes - 1))))
-4-:	153	if (clr_byte_enable)

Branches:

-1-	-2-	-3-	-4-	Status	Tests
1	-	-	-	Not Covered
0	1	1	-	Not Covered
0	1	0	-	Not Covered
0	0	-	1	Not Covered
0	0	-	0	Not Covered

	LineNo.	Expression
-1-:	160	if ((!rst_ni))
-2-:	162	if (update_wdata)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	190	case (st)
-2-:	194	if (((active && fifo_valid) && (!sramf_full)))
-3-:	207	if ((fifo_valid && (!full_sramwidth)))
-4-:	211	if (full_sramwidth)
-5-:	226	if (fifo_valid)
-6-:	230	if (((!fifo_valid) && timer_expired))
-7-:	243	if (sram_gnt)

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	Status	Tests
StIdle	1	-	-	-	-	-	Not Covered
StIdle	0	-	-	-	-	-	Not Covered
StPop	-	1	-	-	-	-	Not Covered
StPop	-	0	1	-	-	-	Not Covered
StPop	-	0	0	-	-	-	Not Covered
StWait	-	-	-	1	-	-	Not Covered
StWait	-	-	-	0	1	-	Not Covered
StWait	-	-	-	0	0	-	Not Covered
StWrite	-	-	-	-	-	1	Not Covered
StWrite	-	-	-	-	-	0	Not Covered
StUpdate	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	Not Covered

	LineNo.	Expression
-1-:	266	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered