Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : spi_fwmode
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_fwmode 0.00 0.00 0.00



Module Instance : tb.dut.u_fwmode

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
19.21 0.00 0.00 76.82 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_fwmode_arb 0.00 0.00 0.00 0.00
u_rx_fifo 0.00 0.00 0.00 0.00
u_rxf_ctrl 0.00 0.00 0.00 0.00 0.00
u_tx_fifo 0.00 0.00 0.00 0.00
u_txf_ctrl 0.00 0.00 0.00 0.00 0.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : spi_fwmode
Line No.TotalCoveredPercent
TOTAL1200.00
CONT_ASSIGN88100.00
CONT_ASSIGN124100.00
CONT_ASSIGN125100.00
CONT_ASSIGN128100.00
CONT_ASSIGN129100.00
CONT_ASSIGN142100.00
CONT_ASSIGN143100.00
CONT_ASSIGN145100.00
CONT_ASSIGN146100.00
CONT_ASSIGN147100.00
CONT_ASSIGN148100.00
CONT_ASSIGN269100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_fwmode.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
88 0 1
124 0 1
125 0 1
128 0 1
129 0 1
142 0 1
143 0 1
145 0 1
146 0 1
147 0 1
148 0 1
269 0 1


Cond Coverage for Module : spi_fwmode
TotalCoveredPercent
Conditions1100.00
Logical1100.00
Non-Logical00
Event00

 LINE       88
 EXPRESSION (spi_mode_i == FwMode)
            -----------1----------
-1-StatusTests
0Not Covered
1Not Covered

 LINE       124
 EXPRESSION (rx_data_valid_i && active)
             -------1-------    ---2--
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       142
 EXPRESSION (rxf_wvalid & ((~rxf_wready)))
             -----1----   -------2-------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       143
 EXPRESSION (txf_rready & ((~txf_rvalid)))
             -----1----   -------2-------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%