Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
95.99 98.38 94.45 98.61 89.36 97.08 95.82 98.22


Total tests in report: 1113
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
62.88 62.88 92.62 92.62 79.79 79.79 65.58 65.58 26.67 26.67 89.24 89.24 71.90 71.90 14.39 14.39 /workspace/coverage/default/46.spi_device_mailbox.2724703557
84.56 21.68 97.65 5.03 90.77 10.98 69.54 3.97 93.33 66.67 96.12 6.88 84.73 12.82 59.79 45.40 /workspace/coverage/default/2.spi_device_stress_all.690426813
87.74 3.18 97.76 0.11 91.64 0.87 89.58 20.04 93.33 0.00 96.29 0.17 85.45 0.72 60.14 0.35 /workspace/coverage/default/12.spi_device_flash_mode.1680590263
90.60 2.85 98.15 0.39 92.66 1.01 91.57 1.98 93.33 0.00 96.71 0.42 85.59 0.14 76.16 16.02 /workspace/coverage/default/8.spi_device_stress_all.345772867
92.26 1.66 98.17 0.02 92.83 0.18 92.56 0.99 93.33 0.00 96.75 0.03 94.09 8.50 78.09 1.93 /workspace/coverage/cover_reg_top/9.spi_device_tl_intg_err.2186021659
93.14 0.88 98.17 0.00 92.83 0.00 92.56 0.00 93.33 0.00 96.75 0.00 94.09 0.00 84.27 6.18 /workspace/coverage/default/28.spi_device_stress_all.1158751006
93.71 0.57 98.18 0.01 92.83 0.00 96.53 3.97 93.33 0.00 96.75 0.00 94.09 0.00 84.27 0.00 /workspace/coverage/default/0.spi_device_ram_cfg.3221296479
94.27 0.55 98.28 0.09 93.16 0.33 96.73 0.20 93.33 0.00 96.90 0.15 94.38 0.29 87.09 2.82 /workspace/coverage/default/3.spi_device_flash_and_tpm.1667488710
94.67 0.40 98.28 0.00 93.16 0.00 96.73 0.00 93.33 0.00 96.90 0.00 94.38 0.00 89.91 2.82 /workspace/coverage/default/39.spi_device_stress_all.2686476688
94.95 0.28 98.28 0.00 93.94 0.77 96.73 0.00 93.33 0.00 96.93 0.03 94.67 0.29 90.80 0.89 /workspace/coverage/cover_reg_top/14.spi_device_tl_errors.2063063947
95.24 0.28 98.28 0.00 93.94 0.00 96.73 0.00 93.33 0.00 96.93 0.00 94.81 0.14 92.63 1.83 /workspace/coverage/default/45.spi_device_stress_all.1261022895
95.46 0.23 98.28 0.00 93.96 0.03 97.92 1.19 93.33 0.00 96.93 0.00 94.96 0.14 92.88 0.25 /workspace/coverage/default/2.spi_device_sec_cm.426028062
95.63 0.16 98.28 0.00 93.96 0.00 97.92 0.00 93.33 0.00 96.93 0.00 94.96 0.00 94.02 1.14 /workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.2613889048
95.75 0.13 98.28 0.00 93.99 0.03 97.92 0.00 93.33 0.00 96.93 0.00 95.82 0.86 94.02 0.00 /workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.3665229523
95.88 0.12 98.28 0.00 94.09 0.10 97.92 0.00 93.33 0.00 96.95 0.02 95.82 0.00 94.76 0.74 /workspace/coverage/default/26.spi_device_stress_all.973103434
95.97 0.09 98.33 0.06 94.20 0.11 98.31 0.40 93.33 0.00 97.03 0.08 95.82 0.00 94.76 0.00 /workspace/coverage/default/9.spi_device_mem_parity.697921692
96.05 0.08 98.33 0.00 94.20 0.00 98.31 0.00 93.33 0.00 97.03 0.00 95.82 0.00 95.30 0.54 /workspace/coverage/default/40.spi_device_stress_all.3895246245
96.11 0.06 98.33 0.00 94.20 0.00 98.31 0.00 93.33 0.00 97.03 0.00 95.82 0.00 95.75 0.45 /workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.1099356901
96.16 0.05 98.33 0.00 94.20 0.00 98.31 0.00 93.33 0.00 97.03 0.00 95.82 0.00 96.09 0.35 /workspace/coverage/default/15.spi_device_flash_all.3393005647
96.20 0.04 98.36 0.03 94.24 0.04 98.51 0.20 93.33 0.00 97.03 0.00 95.82 0.00 96.09 0.00 /workspace/coverage/default/10.spi_device_alert_test.2367011259
96.23 0.04 98.36 0.00 94.24 0.00 98.51 0.00 93.33 0.00 97.03 0.00 95.82 0.00 96.34 0.25 /workspace/coverage/default/29.spi_device_stress_all.253097753
96.27 0.04 98.36 0.00 94.24 0.00 98.51 0.00 93.33 0.00 97.03 0.00 95.82 0.00 96.59 0.25 /workspace/coverage/default/5.spi_device_flash_and_tpm.4172531645
96.30 0.03 98.36 0.00 94.26 0.03 98.61 0.10 93.33 0.00 97.05 0.02 95.82 0.00 96.69 0.10 /workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.302992807
96.33 0.03 98.36 0.00 94.26 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 96.88 0.20 /workspace/coverage/default/2.spi_device_flash_mode.2151546886
96.36 0.03 98.36 0.00 94.26 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.08 0.20 /workspace/coverage/default/22.spi_device_stress_all.1413444310
96.39 0.03 98.36 0.00 94.40 0.14 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.13 0.05 /workspace/coverage/cover_reg_top/6.spi_device_tl_errors.4055929352
96.41 0.02 98.36 0.00 94.42 0.01 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.28 0.15 /workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.3039775137
96.43 0.02 98.36 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.43 0.15 /workspace/coverage/default/2.spi_device_flash_all.306188830
96.45 0.01 98.36 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.53 0.10 /workspace/coverage/default/20.spi_device_flash_all.3309830557
96.46 0.01 98.36 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.63 0.10 /workspace/coverage/default/27.spi_device_flash_and_tpm.1322000312
96.47 0.01 98.36 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.05 0.00 95.82 0.00 97.73 0.10 /workspace/coverage/default/28.spi_device_flash_all.1640277476
96.48 0.01 98.37 0.01 94.42 0.00 98.61 0.00 93.33 0.00 97.07 0.02 95.82 0.00 97.77 0.05 /workspace/coverage/default/3.spi_device_tpm_all.3852619674
96.50 0.01 98.38 0.01 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.02 95.82 0.00 97.82 0.05 /workspace/coverage/default/42.spi_device_intercept.1628074360
96.50 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 97.87 0.05 /workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.41239670
96.51 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 97.92 0.05 /workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1764213056
96.52 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 97.97 0.05 /workspace/coverage/default/0.spi_device_tpm_sts_read.2467331287
96.52 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.02 0.05 /workspace/coverage/default/12.spi_device_stress_all.1708670969
96.53 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.07 0.05 /workspace/coverage/default/14.spi_device_flash_all.604431269
96.54 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.12 0.05 /workspace/coverage/default/15.spi_device_stress_all.507573451
96.54 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.17 0.05 /workspace/coverage/default/39.spi_device_flash_and_tpm.3783251624
96.55 0.01 98.38 0.00 94.42 0.00 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.22 0.05 /workspace/coverage/default/4.spi_device_flash_and_tpm_min_idle.1185250375
96.56 0.01 98.38 0.00 94.44 0.03 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.22 0.00 /workspace/coverage/cover_reg_top/11.spi_device_tl_errors.3084983500
96.56 0.01 98.38 0.00 94.45 0.01 98.61 0.00 93.33 0.00 97.08 0.00 95.82 0.00 98.22 0.00 /workspace/coverage/cover_reg_top/7.spi_device_tl_intg_err.3428463551


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3917080469
/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.2364673347
/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.3676281500
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.2427177068
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.4136789935
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.3748564797
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.2384703478
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.4129643971
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.2880537225
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.2173397703
/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.521885021
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.1526828882
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.3035633823
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.1175062343
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.1180046367
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.4038591734
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.3985769872
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.803990770
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.2581611374
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.2418213377
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.3578836692
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.1871638413
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.3567910725
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.1681320896
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2867924191
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.2598957585
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.192907293
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.11036725
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.943635466
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.1808491956
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.1759999055
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.1352737258
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.1971750447
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.4195318191
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.1425628868
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.2120847330
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.918294856
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.4253714728
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.1562950189
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.3917364477
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.3440837152
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3539929617
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.2254211163
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.696211975
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.535407154
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1194463568
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.3601942298
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.967381482
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.4122228845
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.551407069
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.3692632205
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.3135687346
/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.4049851805
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3123539228
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.3831112393
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.161711561
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.928019625
/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.826426151
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.1973167901
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.674948875
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.882618835
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.2679029126
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.3505966653
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.1631444586
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.3307939720
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.3579820202
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.1369035526
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.909368891
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.1877902500
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.2954224213
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.2244964505
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.2395620004
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.2500541983
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.4123235011
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.288681140
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.2404878826
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.1231475251
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2873618760
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.396363571
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.3244137118
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.3817759120
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.1757539633
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.3307982214
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.1739218868
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.1404746350
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.1059780262
/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.1716450542
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.622874826
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.304080537
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.860314237
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.237373028
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.3350675726
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.3984439462
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.1559582784
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.1944569905
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.1679497520
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.3312136933
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.4092174270
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.3833474934
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.4283045894
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.566738395
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.22413835
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.267228161
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.732940936
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.1064727428
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.1784550031
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.530903868
/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.1598319413
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.2881456818
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.1894086378
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.1928480781
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.3740522974
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2417783220
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.3627001123
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.2707707172
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.1934797817
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.690321630
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.1869445371
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.4080983945
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.1198509896
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2158116610
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.389236221
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.703857801
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.3559435712
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.2554246521
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.3907019025
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.3389718388
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.4017697979
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.251391034
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.1324325475
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.2822262149
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.79447089
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.1906464205
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.2006781174
/workspace/coverage/cover_reg_top/45.spi_device_intr_test.1613202907
/workspace/coverage/cover_reg_top/46.spi_device_intr_test.1951748616
/workspace/coverage/cover_reg_top/47.spi_device_intr_test.3749130657
/workspace/coverage/cover_reg_top/48.spi_device_intr_test.1504998687
/workspace/coverage/cover_reg_top/49.spi_device_intr_test.569442540
/workspace/coverage/cover_reg_top/5.spi_device_csr_mem_rw_with_rand_reset.1236003246
/workspace/coverage/cover_reg_top/5.spi_device_csr_rw.3689563570
/workspace/coverage/cover_reg_top/5.spi_device_intr_test.3023470851
/workspace/coverage/cover_reg_top/5.spi_device_same_csr_outstanding.1098625175
/workspace/coverage/cover_reg_top/5.spi_device_tl_errors.3589458847
/workspace/coverage/cover_reg_top/5.spi_device_tl_intg_err.136271825
/workspace/coverage/cover_reg_top/6.spi_device_csr_mem_rw_with_rand_reset.2288870611
/workspace/coverage/cover_reg_top/6.spi_device_csr_rw.3314501444
/workspace/coverage/cover_reg_top/6.spi_device_intr_test.1116366348
/workspace/coverage/cover_reg_top/6.spi_device_same_csr_outstanding.2486926675
/workspace/coverage/cover_reg_top/6.spi_device_tl_intg_err.1062789429
/workspace/coverage/cover_reg_top/7.spi_device_csr_mem_rw_with_rand_reset.233519415
/workspace/coverage/cover_reg_top/7.spi_device_csr_rw.2472213565
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/workspace/coverage/default/9.spi_device_read_buffer_direct.2333470731
/workspace/coverage/default/9.spi_device_stress_all.1846224121
/workspace/coverage/default/9.spi_device_tpm_all.1995069758
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.1593236499
/workspace/coverage/default/9.spi_device_tpm_rw.1064885386
/workspace/coverage/default/9.spi_device_tpm_sts_read.210252734
/workspace/coverage/default/9.spi_device_upload.2442946930




Total test records in report: 1113
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/16.spi_device_cfg_cmd.1962652939 Mar 03 02:06:37 PM PST 24 Mar 03 02:06:40 PM PST 24 558215277 ps
T2 /workspace/coverage/default/35.spi_device_csb_read.2892517327 Mar 03 02:07:49 PM PST 24 Mar 03 02:07:50 PM PST 24 45688473 ps
T3 /workspace/coverage/default/41.spi_device_cfg_cmd.1415185205 Mar 03 02:08:07 PM PST 24 Mar 03 02:08:11 PM PST 24 198862335 ps
T4 /workspace/coverage/default/35.spi_device_tpm_sts_read.2341709091 Mar 03 02:07:45 PM PST 24 Mar 03 02:07:46 PM PST 24 80831075 ps
T5 /workspace/coverage/default/33.spi_device_pass_addr_payload_swap.3573486849 Mar 03 02:07:41 PM PST 24 Mar 03 02:07:47 PM PST 24 1314883985 ps
T6 /workspace/coverage/default/9.spi_device_mem_parity.697921692 Mar 03 02:06:09 PM PST 24 Mar 03 02:06:10 PM PST 24 49378520 ps
T7 /workspace/coverage/default/16.spi_device_csb_read.2780751226 Mar 03 02:06:34 PM PST 24 Mar 03 02:06:35 PM PST 24 82598075 ps
T8 /workspace/coverage/default/36.spi_device_tpm_sts_read.1033146714 Mar 03 02:07:48 PM PST 24 Mar 03 02:07:50 PM PST 24 51356647 ps
T9 /workspace/coverage/default/46.spi_device_mailbox.2724703557 Mar 03 02:08:38 PM PST 24 Mar 03 02:08:48 PM PST 24 4631765954 ps
T10 /workspace/coverage/default/34.spi_device_cfg_cmd.2949737588 Mar 03 02:07:47 PM PST 24 Mar 03 02:07:49 PM PST 24 55286175 ps
T15 /workspace/coverage/default/21.spi_device_intercept.1674176076 Mar 03 02:06:51 PM PST 24 Mar 03 02:06:55 PM PST 24 3992238318 ps
T18 /workspace/coverage/default/14.spi_device_tpm_read_hw_reg.3848197563 Mar 03 02:06:30 PM PST 24 Mar 03 02:06:41 PM PST 24 1879373188 ps
T19 /workspace/coverage/default/45.spi_device_csb_read.245878947 Mar 03 02:08:22 PM PST 24 Mar 03 02:08:23 PM PST 24 64481086 ps
T13 /workspace/coverage/default/12.spi_device_pass_cmd_filtering.389880952 Mar 03 02:06:22 PM PST 24 Mar 03 02:06:39 PM PST 24 20525551945 ps
T20 /workspace/coverage/default/9.spi_device_tpm_read_hw_reg.1593236499 Mar 03 02:06:08 PM PST 24 Mar 03 02:06:19 PM PST 24 6737443193 ps
T11 /workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.302992807 Mar 03 02:07:07 PM PST 24 Mar 03 02:08:47 PM PST 24 12875215460 ps
T16 /workspace/coverage/default/49.spi_device_mailbox.896664171 Mar 03 02:08:42 PM PST 24 Mar 03 02:09:04 PM PST 24 25688387293 ps
T17 /workspace/coverage/default/23.spi_device_pass_addr_payload_swap.538317625 Mar 03 02:07:00 PM PST 24 Mar 03 02:07:11 PM PST 24 16878059189 ps
T12 /workspace/coverage/default/16.spi_device_read_buffer_direct.407420604 Mar 03 02:06:41 PM PST 24 Mar 03 02:06:45 PM PST 24 181331090 ps
T14 /workspace/coverage/default/48.spi_device_flash_mode.4131051713 Mar 03 02:08:45 PM PST 24 Mar 03 02:09:35 PM PST 24 34419744161 ps
T21 /workspace/coverage/default/3.spi_device_flash_and_tpm.1667488710 Mar 03 02:05:52 PM PST 24 Mar 03 02:08:33 PM PST 24 47906642382 ps
T23 /workspace/coverage/default/29.spi_device_flash_all.2123222419 Mar 03 02:07:24 PM PST 24 Mar 03 02:08:46 PM PST 24 32473697798 ps
T42 /workspace/coverage/default/12.spi_device_flash_mode.1680590263 Mar 03 02:06:21 PM PST 24 Mar 03 02:06:43 PM PST 24 36284900353 ps
T24 /workspace/coverage/default/0.spi_device_mem_parity.4123046790 Mar 03 02:05:36 PM PST 24 Mar 03 02:05:37 PM PST 24 23720096 ps
T43 /workspace/coverage/default/12.spi_device_upload.3835178807 Mar 03 02:06:20 PM PST 24 Mar 03 02:06:25 PM PST 24 1273744071 ps
T44 /workspace/coverage/default/27.spi_device_mailbox.345716446 Mar 03 02:07:18 PM PST 24 Mar 03 02:07:37 PM PST 24 9529828085 ps
T36 /workspace/coverage/default/25.spi_device_intercept.882149788 Mar 03 02:07:05 PM PST 24 Mar 03 02:07:10 PM PST 24 1175973531 ps
T76 /workspace/coverage/default/19.spi_device_ram_cfg.2353454730 Mar 03 02:06:48 PM PST 24 Mar 03 02:06:49 PM PST 24 16719215 ps
T22 /workspace/coverage/default/20.spi_device_tpm_sts_read.3330873653 Mar 03 02:06:51 PM PST 24 Mar 03 02:06:52 PM PST 24 241814564 ps
T45 /workspace/coverage/default/21.spi_device_flash_mode.1316888687 Mar 03 02:06:54 PM PST 24 Mar 03 02:07:11 PM PST 24 9987782335 ps
T31 /workspace/coverage/default/14.spi_device_tpm_rw.960569871 Mar 03 02:06:28 PM PST 24 Mar 03 02:06:30 PM PST 24 70167837 ps
T46 /workspace/coverage/default/37.spi_device_pass_addr_payload_swap.3337959684 Mar 03 02:07:59 PM PST 24 Mar 03 02:08:01 PM PST 24 336488127 ps
T32 /workspace/coverage/default/2.spi_device_stress_all.690426813 Mar 03 02:05:46 PM PST 24 Mar 03 02:16:48 PM PST 24 105088429013 ps
T50 /workspace/coverage/default/20.spi_device_tpm_read_hw_reg.1459962438 Mar 03 02:06:47 PM PST 24 Mar 03 02:07:02 PM PST 24 2536491847 ps
T138 /workspace/coverage/default/1.spi_device_intercept.870844054 Mar 03 02:05:49 PM PST 24 Mar 03 02:05:53 PM PST 24 315405041 ps
T99 /workspace/coverage/default/0.spi_device_tpm_sts_read.2467331287 Mar 03 02:05:40 PM PST 24 Mar 03 02:05:42 PM PST 24 114543501 ps
T48 /workspace/coverage/default/7.spi_device_flash_mode.2714909545 Mar 03 02:06:10 PM PST 24 Mar 03 02:06:40 PM PST 24 20982565952 ps
T139 /workspace/coverage/default/35.spi_device_mailbox.3064861062 Mar 03 02:07:51 PM PST 24 Mar 03 02:07:56 PM PST 24 1331020634 ps
T33 /workspace/coverage/default/31.spi_device_tpm_rw.524493468 Mar 03 02:07:32 PM PST 24 Mar 03 02:07:35 PM PST 24 247764925 ps
T29 /workspace/coverage/default/34.spi_device_tpm_all.3358673857 Mar 03 02:07:41 PM PST 24 Mar 03 02:08:27 PM PST 24 39323705261 ps
T140 /workspace/coverage/default/44.spi_device_cfg_cmd.3333209474 Mar 03 02:08:23 PM PST 24 Mar 03 02:08:27 PM PST 24 2811565405 ps
T30 /workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.3771266387 Mar 03 02:06:59 PM PST 24 Mar 03 02:08:13 PM PST 24 37044810567 ps
T281 /workspace/coverage/default/39.spi_device_tpm_read_hw_reg.3239160763 Mar 03 02:08:00 PM PST 24 Mar 03 02:08:05 PM PST 24 721015632 ps
T101 /workspace/coverage/default/35.spi_device_pass_cmd_filtering.2934463192 Mar 03 02:07:55 PM PST 24 Mar 03 02:08:04 PM PST 24 3165964768 ps
T51 /workspace/coverage/default/3.spi_device_tpm_all.3852619674 Mar 03 02:05:56 PM PST 24 Mar 03 02:06:20 PM PST 24 32984392782 ps
T52 /workspace/coverage/default/30.spi_device_flash_all.1113543939 Mar 03 02:07:32 PM PST 24 Mar 03 02:09:18 PM PST 24 78989168439 ps
T49 /workspace/coverage/default/18.spi_device_flash_mode.3721659064 Mar 03 02:06:45 PM PST 24 Mar 03 02:07:00 PM PST 24 2442153461 ps
T53 /workspace/coverage/default/29.spi_device_stress_all.253097753 Mar 03 02:07:26 PM PST 24 Mar 03 02:08:56 PM PST 24 28676847297 ps
T100 /workspace/coverage/default/34.spi_device_mailbox.3050507909 Mar 03 02:07:55 PM PST 24 Mar 03 02:08:17 PM PST 24 25414371070 ps
T122 /workspace/coverage/default/44.spi_device_flash_mode.130032197 Mar 03 02:08:22 PM PST 24 Mar 03 02:08:37 PM PST 24 8242197377 ps
T123 /workspace/coverage/default/21.spi_device_read_buffer_direct.2547833929 Mar 03 02:07:01 PM PST 24 Mar 03 02:07:07 PM PST 24 384073247 ps
T124 /workspace/coverage/default/23.spi_device_intercept.7336596 Mar 03 02:07:00 PM PST 24 Mar 03 02:07:14 PM PST 24 3527217946 ps
T160 /workspace/coverage/default/45.spi_device_upload.1821497453 Mar 03 02:08:29 PM PST 24 Mar 03 02:08:44 PM PST 24 47386332857 ps
T161 /workspace/coverage/default/12.spi_device_csb_read.2387969003 Mar 03 02:06:12 PM PST 24 Mar 03 02:06:13 PM PST 24 33428989 ps
T162 /workspace/coverage/default/33.spi_device_mailbox.380962205 Mar 03 02:07:41 PM PST 24 Mar 03 02:07:56 PM PST 24 4490249712 ps
T28 /workspace/coverage/default/12.spi_device_mem_parity.3451334885 Mar 03 02:06:18 PM PST 24 Mar 03 02:06:19 PM PST 24 49278641 ps
T125 /workspace/coverage/default/4.spi_device_mailbox.2223273574 Mar 03 02:05:51 PM PST 24 Mar 03 02:06:12 PM PST 24 116852642884 ps
T282 /workspace/coverage/default/20.spi_device_flash_mode.2371466963 Mar 03 02:06:55 PM PST 24 Mar 03 02:07:12 PM PST 24 12888167020 ps
T54 /workspace/coverage/default/47.spi_device_tpm_rw.2041281638 Mar 03 02:08:34 PM PST 24 Mar 03 02:08:39 PM PST 24 191859943 ps
T34 /workspace/coverage/default/18.spi_device_upload.1851206618 Mar 03 02:06:44 PM PST 24 Mar 03 02:06:57 PM PST 24 1478745013 ps
T69 /workspace/coverage/default/47.spi_device_upload.3930625292 Mar 03 02:08:35 PM PST 24 Mar 03 02:08:47 PM PST 24 6798958783 ps
T221 /workspace/coverage/default/29.spi_device_pass_cmd_filtering.4162672755 Mar 03 02:07:26 PM PST 24 Mar 03 02:07:47 PM PST 24 11328248782 ps
T283 /workspace/coverage/default/19.spi_device_csb_read.318820455 Mar 03 02:06:51 PM PST 24 Mar 03 02:06:52 PM PST 24 65680927 ps
T227 /workspace/coverage/default/2.spi_device_upload.2191222787 Mar 03 02:05:47 PM PST 24 Mar 03 02:05:59 PM PST 24 4021437627 ps
T143 /workspace/coverage/default/11.spi_device_read_buffer_direct.241202143 Mar 03 02:06:15 PM PST 24 Mar 03 02:06:21 PM PST 24 874363731 ps
T284 /workspace/coverage/default/3.spi_device_mem_parity.1811757125 Mar 03 02:05:47 PM PST 24 Mar 03 02:05:49 PM PST 24 69437108 ps
T35 /workspace/coverage/default/44.spi_device_flash_all.1799545806 Mar 03 02:08:21 PM PST 24 Mar 03 02:09:37 PM PST 24 11745475121 ps
T37 /workspace/coverage/default/11.spi_device_pass_addr_payload_swap.2404440652 Mar 03 02:06:18 PM PST 24 Mar 03 02:06:30 PM PST 24 51115793534 ps
T55 /workspace/coverage/default/27.spi_device_flash_and_tpm_min_idle.1965325389 Mar 03 02:07:20 PM PST 24 Mar 03 02:13:08 PM PST 24 178541336496 ps
T62 /workspace/coverage/default/11.spi_device_tpm_read_hw_reg.1090080869 Mar 03 02:06:19 PM PST 24 Mar 03 02:06:54 PM PST 24 59547904707 ps
T38 /workspace/coverage/default/10.spi_device_flash_and_tpm.2151602785 Mar 03 02:06:19 PM PST 24 Mar 03 02:08:06 PM PST 24 5016051648 ps
T39 /workspace/coverage/default/36.spi_device_flash_and_tpm_min_idle.3929759173 Mar 03 02:07:56 PM PST 24 Mar 03 02:11:21 PM PST 24 77874100039 ps
T63 /workspace/coverage/default/8.spi_device_ram_cfg.4044461042 Mar 03 02:06:08 PM PST 24 Mar 03 02:06:10 PM PST 24 37893203 ps
T64 /workspace/coverage/default/14.spi_device_csb_read.1626176402 Mar 03 02:06:30 PM PST 24 Mar 03 02:06:32 PM PST 24 16931396 ps
T65 /workspace/coverage/default/25.spi_device_alert_test.1373787362 Mar 03 02:07:07 PM PST 24 Mar 03 02:07:08 PM PST 24 14569833 ps
T66 /workspace/coverage/default/32.spi_device_upload.1286501887 Mar 03 02:07:42 PM PST 24 Mar 03 02:08:12 PM PST 24 39206853638 ps
T67 /workspace/coverage/default/3.spi_device_mailbox.2959494610 Mar 03 02:05:56 PM PST 24 Mar 03 02:06:01 PM PST 24 370337386 ps
T68 /workspace/coverage/default/49.spi_device_tpm_read_hw_reg.1263312209 Mar 03 02:08:42 PM PST 24 Mar 03 02:08:48 PM PST 24 6055586644 ps
T182 /workspace/coverage/default/15.spi_device_pass_cmd_filtering.1549567873 Mar 03 02:06:29 PM PST 24 Mar 03 02:06:39 PM PST 24 727942810 ps
T144 /workspace/coverage/default/3.spi_device_read_buffer_direct.4185756548 Mar 03 02:05:52 PM PST 24 Mar 03 02:05:56 PM PST 24 586612093 ps
T169 /workspace/coverage/default/29.spi_device_flash_and_tpm.3812220077 Mar 03 02:07:27 PM PST 24 Mar 03 02:11:26 PM PST 24 176776941715 ps
T230 /workspace/coverage/default/33.spi_device_upload.1075241739 Mar 03 02:07:41 PM PST 24 Mar 03 02:07:45 PM PST 24 933423361 ps
T215 /workspace/coverage/default/48.spi_device_cfg_cmd.686814120 Mar 03 02:08:45 PM PST 24 Mar 03 02:08:51 PM PST 24 5920785063 ps
T25 /workspace/coverage/default/49.spi_device_flash_and_tpm_min_idle.1322014372 Mar 03 02:08:50 PM PST 24 Mar 03 02:09:40 PM PST 24 12044213869 ps
T26 /workspace/coverage/default/26.spi_device_stress_all.973103434 Mar 03 02:07:14 PM PST 24 Mar 03 02:18:12 PM PST 24 177940373800 ps
T70 /workspace/coverage/default/21.spi_device_alert_test.1262796073 Mar 03 02:06:54 PM PST 24 Mar 03 02:06:54 PM PST 24 32783077 ps
T224 /workspace/coverage/default/46.spi_device_upload.3892257706 Mar 03 02:08:39 PM PST 24 Mar 03 02:08:47 PM PST 24 457447643 ps
T40 /workspace/coverage/default/4.spi_device_flash_and_tpm.489715269 Mar 03 02:05:53 PM PST 24 Mar 03 02:12:43 PM PST 24 1235725636827 ps
T285 /workspace/coverage/default/16.spi_device_tpm_read_hw_reg.801549626 Mar 03 02:06:40 PM PST 24 Mar 03 02:06:45 PM PST 24 634499862 ps
T191 /workspace/coverage/default/42.spi_device_intercept.1628074360 Mar 03 02:08:16 PM PST 24 Mar 03 02:08:23 PM PST 24 702598047 ps
T286 /workspace/coverage/default/17.spi_device_tpm_read_hw_reg.337412128 Mar 03 02:06:43 PM PST 24 Mar 03 02:06:50 PM PST 24 3661176858 ps
T280 /workspace/coverage/default/42.spi_device_tpm_rw.3140790106 Mar 03 02:08:14 PM PST 24 Mar 03 02:08:16 PM PST 24 65750744 ps
T77 /workspace/coverage/default/14.spi_device_ram_cfg.1498864712 Mar 03 02:06:30 PM PST 24 Mar 03 02:06:31 PM PST 24 85518193 ps
T145 /workspace/coverage/default/9.spi_device_flash_mode.2039299564 Mar 03 02:06:13 PM PST 24 Mar 03 02:06:26 PM PST 24 2172793884 ps
T287 /workspace/coverage/default/47.spi_device_tpm_sts_read.720130772 Mar 03 02:08:34 PM PST 24 Mar 03 02:08:35 PM PST 24 77507668 ps
T288 /workspace/coverage/default/17.spi_device_ram_cfg.2251944674 Mar 03 02:06:44 PM PST 24 Mar 03 02:06:45 PM PST 24 33582497 ps
T289 /workspace/coverage/default/48.spi_device_tpm_read_hw_reg.1541465794 Mar 03 02:08:43 PM PST 24 Mar 03 02:09:08 PM PST 24 34198419099 ps
T211 /workspace/coverage/default/49.spi_device_flash_mode.2303253823 Mar 03 02:08:44 PM PST 24 Mar 03 02:08:55 PM PST 24 457406010 ps
T222 /workspace/coverage/default/14.spi_device_intercept.1357506975 Mar 03 02:06:29 PM PST 24 Mar 03 02:06:36 PM PST 24 655364353 ps
T41 /workspace/coverage/default/37.spi_device_flash_and_tpm_min_idle.1099356901 Mar 03 02:07:57 PM PST 24 Mar 03 02:14:00 PM PST 24 313490762937 ps
T290 /workspace/coverage/default/12.spi_device_tpm_rw.2777074476 Mar 03 02:06:22 PM PST 24 Mar 03 02:06:23 PM PST 24 22242370 ps
T72 /workspace/coverage/default/17.spi_device_stress_all.2976695766 Mar 03 02:06:42 PM PST 24 Mar 03 02:12:52 PM PST 24 214977186049 ps
T206 /workspace/coverage/default/37.spi_device_flash_mode.2083001266 Mar 03 02:07:59 PM PST 24 Mar 03 02:08:06 PM PST 24 623838803 ps
T291 /workspace/coverage/default/38.spi_device_csb_read.3227656533 Mar 03 02:07:59 PM PST 24 Mar 03 02:08:00 PM PST 24 15963252 ps
T168 /workspace/coverage/default/16.spi_device_flash_all.4216165624 Mar 03 02:06:44 PM PST 24 Mar 03 02:08:41 PM PST 24 15626780402 ps
T292 /workspace/coverage/default/37.spi_device_tpm_sts_read.612382292 Mar 03 02:07:56 PM PST 24 Mar 03 02:07:58 PM PST 24 169718111 ps
T242 /workspace/coverage/default/37.spi_device_upload.3572420282 Mar 03 02:07:58 PM PST 24 Mar 03 02:08:15 PM PST 24 5136746000 ps
T217 /workspace/coverage/default/14.spi_device_cfg_cmd.1200206602 Mar 03 02:06:28 PM PST 24 Mar 03 02:06:33 PM PST 24 1187333736 ps
T92 /workspace/coverage/default/12.spi_device_flash_and_tpm.2398592126 Mar 03 02:06:24 PM PST 24 Mar 03 02:09:22 PM PST 24 63428579355 ps
T235 /workspace/coverage/default/48.spi_device_pass_addr_payload_swap.1361048875 Mar 03 02:08:44 PM PST 24 Mar 03 02:09:22 PM PST 24 13595440707 ps
T275 /workspace/coverage/default/31.spi_device_tpm_all.10170717 Mar 03 02:07:32 PM PST 24 Mar 03 02:08:16 PM PST 24 27181136849 ps
T293 /workspace/coverage/default/1.spi_device_read_buffer_direct.1234895269 Mar 03 02:05:44 PM PST 24 Mar 03 02:05:48 PM PST 24 814232852 ps
T47 /workspace/coverage/default/48.spi_device_flash_and_tpm.2644071309 Mar 03 02:08:44 PM PST 24 Mar 03 02:15:54 PM PST 24 60723048636 ps
T294 /workspace/coverage/default/17.spi_device_tpm_sts_read.2754432948 Mar 03 02:06:43 PM PST 24 Mar 03 02:06:45 PM PST 24 296118420 ps
T237 /workspace/coverage/default/5.spi_device_mailbox.2451884909 Mar 03 02:05:58 PM PST 24 Mar 03 02:06:14 PM PST 24 24196565421 ps
T295 /workspace/coverage/default/40.spi_device_flash_mode.2934650786 Mar 03 02:08:07 PM PST 24 Mar 03 02:08:32 PM PST 24 14171393024 ps
T296 /workspace/coverage/default/30.spi_device_tpm_rw.1432654297 Mar 03 02:07:23 PM PST 24 Mar 03 02:07:29 PM PST 24 93602080 ps
T228 /workspace/coverage/default/49.spi_device_flash_and_tpm.2399811879 Mar 03 02:08:41 PM PST 24 Mar 03 02:10:10 PM PST 24 12459394801 ps
T297 /workspace/coverage/default/42.spi_device_tpm_read_hw_reg.3256209586 Mar 03 02:08:14 PM PST 24 Mar 03 02:08:23 PM PST 24 9564875931 ps
T225 /workspace/coverage/default/34.spi_device_intercept.4200803770 Mar 03 02:07:54 PM PST 24 Mar 03 02:08:07 PM PST 24 11901712725 ps
T236 /workspace/coverage/default/14.spi_device_pass_addr_payload_swap.2271335872 Mar 03 02:06:27 PM PST 24 Mar 03 02:06:40 PM PST 24 4025303381 ps
T298 /workspace/coverage/default/31.spi_device_csb_read.3079159976 Mar 03 02:07:34 PM PST 24 Mar 03 02:07:35 PM PST 24 18720673 ps
T299 /workspace/coverage/default/25.spi_device_tpm_read_hw_reg.2080516401 Mar 03 02:07:06 PM PST 24 Mar 03 02:07:08 PM PST 24 348735090 ps
T300 /workspace/coverage/default/25.spi_device_tpm_sts_read.343497229 Mar 03 02:07:06 PM PST 24 Mar 03 02:07:07 PM PST 24 113185353 ps
T276 /workspace/coverage/default/44.spi_device_tpm_rw.1027190878 Mar 03 02:08:21 PM PST 24 Mar 03 02:08:22 PM PST 24 12518439 ps
T301 /workspace/coverage/default/29.spi_device_tpm_all.1799644567 Mar 03 02:07:27 PM PST 24 Mar 03 02:07:37 PM PST 24 2243116902 ps
T73 /workspace/coverage/default/24.spi_device_stress_all.569839498 Mar 03 02:07:07 PM PST 24 Mar 03 02:12:47 PM PST 24 215407556315 ps
T71 /workspace/coverage/default/10.spi_device_alert_test.2367011259 Mar 03 02:06:12 PM PST 24 Mar 03 02:06:13 PM PST 24 97099176 ps
T219 /workspace/coverage/default/5.spi_device_intercept.4010623402 Mar 03 02:05:57 PM PST 24 Mar 03 02:05:59 PM PST 24 101471178 ps
T302 /workspace/coverage/default/29.spi_device_tpm_rw.2947186759 Mar 03 02:07:28 PM PST 24 Mar 03 02:07:29 PM PST 24 21047434 ps
T303 /workspace/coverage/default/49.spi_device_tpm_rw.4270471774 Mar 03 02:08:46 PM PST 24 Mar 03 02:08:48 PM PST 24 138968727 ps
T241 /workspace/coverage/default/29.spi_device_upload.197307289 Mar 03 02:07:26 PM PST 24 Mar 03 02:07:54 PM PST 24 9742256582 ps
T74 /workspace/coverage/default/25.spi_device_stress_all.1068146422 Mar 03 02:07:07 PM PST 24 Mar 03 02:10:28 PM PST 24 37924017662 ps
T200 /workspace/coverage/default/0.spi_device_flash_all.3993110393 Mar 03 02:05:40 PM PST 24 Mar 03 02:07:01 PM PST 24 14584673039 ps
T199 /workspace/coverage/default/36.spi_device_pass_addr_payload_swap.1726011670 Mar 03 02:07:49 PM PST 24 Mar 03 02:08:07 PM PST 24 6453409251 ps
T304 /workspace/coverage/default/44.spi_device_tpm_read_hw_reg.3026441170 Mar 03 02:08:20 PM PST 24 Mar 03 02:08:50 PM PST 24 19579903833 ps
T305 /workspace/coverage/default/31.spi_device_tpm_read_hw_reg.3373475202 Mar 03 02:07:35 PM PST 24 Mar 03 02:07:37 PM PST 24 863889412 ps
T306 /workspace/coverage/default/48.spi_device_read_buffer_direct.2073823134 Mar 03 02:08:44 PM PST 24 Mar 03 02:08:48 PM PST 24 166183349 ps
T307 /workspace/coverage/default/43.spi_device_flash_all.598581177 Mar 03 02:08:22 PM PST 24 Mar 03 02:08:45 PM PST 24 7637008269 ps
T308 /workspace/coverage/default/19.spi_device_flash_all.2731139904 Mar 03 02:06:49 PM PST 24 Mar 03 02:06:56 PM PST 24 685165660 ps
T141 /workspace/coverage/default/2.spi_device_flash_and_tpm.1102762630 Mar 03 02:05:48 PM PST 24 Mar 03 02:07:07 PM PST 24 7308574866 ps
T166 /workspace/coverage/default/15.spi_device_flash_all.3393005647 Mar 03 02:06:36 PM PST 24 Mar 03 02:08:15 PM PST 24 20498042790 ps
T75 /workspace/coverage/default/8.spi_device_stress_all.345772867 Mar 03 02:06:08 PM PST 24 Mar 03 02:12:15 PM PST 24 121986997683 ps
T309 /workspace/coverage/default/7.spi_device_read_buffer_direct.3433944367 Mar 03 02:06:03 PM PST 24 Mar 03 02:06:10 PM PST 24 991993998 ps
T310 /workspace/coverage/default/38.spi_device_tpm_rw.792045040 Mar 03 02:08:00 PM PST 24 Mar 03 02:08:07 PM PST 24 175314225 ps
T188 /workspace/coverage/default/27.spi_device_flash_all.2730839536 Mar 03 02:07:20 PM PST 24 Mar 03 02:09:44 PM PST 24 34475497580 ps
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