Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_08/spi_device_1r1w-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
95.10	95.20	93.48	97.84		93.55	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	508123200	3493	0	0
addr_swap_data_rd_A	508123200	2034	0	0
addr_swap_mask_rd_A	508123200	2107	0	0
cfg_rd_A	508123200	2373	0	0
cmd_filter_0_rd_A	508123200	10088	0	0
cmd_filter_1_rd_A	508123200	9684	0	0
cmd_filter_2_rd_A	508123200	9983	0	0
cmd_filter_3_rd_A	508123200	9831	0	0
cmd_filter_4_rd_A	508123200	10242	0	0
cmd_filter_5_rd_A	508123200	11308	0	0
cmd_filter_6_rd_A	508123200	9686	0	0
cmd_filter_7_rd_A	508123200	10289	0	0
cmd_info_0_rd_A	508123200	5539	0	0
cmd_info_10_rd_A	508123200	4492	0	0
cmd_info_11_rd_A	508123200	4789	0	0
cmd_info_12_rd_A	508123200	4775	0	0
cmd_info_13_rd_A	508123200	4712	0	0
cmd_info_14_rd_A	508123200	4794	0	0
cmd_info_15_rd_A	508123200	5115	0	0
cmd_info_16_rd_A	508123200	5221	0	0
cmd_info_17_rd_A	508123200	5370	0	0
cmd_info_18_rd_A	508123200	4672	0	0
cmd_info_19_rd_A	508123200	4940	0	0
cmd_info_1_rd_A	508123200	4775	0	0
cmd_info_20_rd_A	508123200	4584	0	0
cmd_info_21_rd_A	508123200	5360	0	0
cmd_info_22_rd_A	508123200	5326	0	0
cmd_info_23_rd_A	508123200	5110	0	0
cmd_info_2_rd_A	508123200	4946	0	0
cmd_info_3_rd_A	508123200	4900	0	0
cmd_info_4_rd_A	508123200	4899	0	0
cmd_info_5_rd_A	508123200	5277	0	0
cmd_info_6_rd_A	508123200	5163	0	0
cmd_info_7_rd_A	508123200	4735	0	0
cmd_info_8_rd_A	508123200	5023	0	0
cmd_info_9_rd_A	508123200	4825	0	0
cmd_info_en4b_rd_A	508123200	2279	0	0
cmd_info_ex4b_rd_A	508123200	2238	0	0
cmd_info_wrdi_rd_A	508123200	2209	0	0
cmd_info_wren_rd_A	508123200	2204	0	0
intercept_en_rd_A	508123200	2659	0	0
intr_enable_rd_A	508123200	4811	0	0
jedec_cc_rd_A	508123200	2155	0	0
jedec_id_rd_A	508123200	2178	0	0
mailbox_addr_rd_A	508123200	2017	0	0
payload_swap_data_rd_A	508123200	2020	0	0
payload_swap_mask_rd_A	508123200	1901	0	0
read_threshold_rd_A	508123200	2051	0	0
tpm_access_0_rd_A	508123200	2741	0	0
tpm_access_1_rd_A	508123200	1999	0	0
tpm_cfg_rd_A	508123200	2948	0	0
tpm_did_vid_rd_A	508123200	2457	0	0
tpm_int_enable_rd_A	508123200	2078	0	0
tpm_int_status_rd_A	508123200	1964	0	0
tpm_int_vector_rd_A	508123200	2046	0	0
tpm_intf_capability_rd_A	508123200	1962	0	0
tpm_rid_rd_A	508123200	1988	0	0
tpm_sts_rd_A	508123200	1976	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	3493	0	0
T105	6341	86	0	0
T106	2426	10	0	0
T107	7476	289	0	0
T121	7670	109	0	0
T122	2756	3	0	0
T123	33503	2	0	0
T124	104666	1	0	0
T129	8912	52	0	0
T138	9525	6	0	0
T140	29283	5	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2034	0	0
T112	3644	4	0	0
T113	3943	3	0	0
T123	33503	25	0	0
T124	104666	132	0	0
T138	9525	5	0	0
T167	11917	23	0	0
T174	39610	242	0	0
T175	21530	54	0	0
T176	42073	306	0	0
T177	90366	215	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2107	0	0
T112	3644	8	0	0
T113	3943	10	0	0
T123	33503	29	0	0
T124	104666	122	0	0
T138	9525	10	0	0
T167	11917	62	0	0
T169	4056	2	0	0
T174	39610	291	0	0
T175	21530	73	0	0
T176	42073	265	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2373	0	0
T112	3644	5	0	0
T113	3943	4	0	0
T123	33503	33	0	0
T124	104666	235	0	0
T138	9525	19	0	0
T167	11917	23	0	0
T169	4056	7	0	0
T174	39610	223	0	0
T175	21530	54	0	0
T176	42073	256	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	10088	0	0
T112	3644	9	0	0
T113	3943	11	0	0
T123	33503	433	0	0
T124	104666	1888	0	0
T138	9525	9	0	0
T167	11917	19	0	0
T169	4056	79	0	0
T174	39610	259	0	0
T175	21530	88	0	0
T176	42073	277	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	9684	0	0
T112	3644	4	0	0
T113	3943	9	0	0
T123	33503	391	0	0
T124	104666	1965	0	0
T138	9525	68	0	0
T167	11917	17	0	0
T169	4056	82	0	0
T174	39610	250	0	0
T175	21530	59	0	0
T176	42073	283	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	9983	0	0
T112	3644	9	0	0
T113	3943	9	0	0
T123	33503	314	0	0
T124	104666	1801	0	0
T138	9525	20	0	0
T167	11917	18	0	0
T169	4056	46	0	0
T174	39610	235	0	0
T175	21530	60	0	0
T176	42073	275	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	9831	0	0
T112	3644	2	0	0
T113	3943	11	0	0
T123	33503	360	0	0
T124	104666	1779	0	0
T138	9525	67	0	0
T167	11917	40	0	0
T169	4056	93	0	0
T174	39610	257	0	0
T175	21530	103	0	0
T176	42073	275	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	10242	0	0
T112	3644	4	0	0
T113	3943	10	0	0
T123	33503	478	0	0
T124	104666	2109	0	0
T138	9525	41	0	0
T167	11917	35	0	0
T174	39610	265	0	0
T175	21530	104	0	0
T176	42073	249	0	0
T177	90366	259	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	11308	0	0
T112	3644	3	0	0
T113	3943	7	0	0
T123	33503	403	0	0
T124	104666	1685	0	0
T138	9525	50	0	0
T167	11917	17	0	0
T169	4056	56	0	0
T174	39610	273	0	0
T175	21530	66	0	0
T176	42073	271	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	9686	0	0
T112	3644	6	0	0
T113	3943	4	0	0
T123	33503	132	0	0
T124	104666	1471	0	0
T138	9525	97	0	0
T167	11917	5	0	0
T169	4056	58	0	0
T174	39610	283	0	0
T175	21530	56	0	0
T176	42073	280	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	10289	0	0
T112	3644	8	0	0
T113	3943	12	0	0
T123	33503	334	0	0
T124	104666	1929	0	0
T138	9525	85	0	0
T167	11917	32	0	0
T174	39610	279	0	0
T175	21530	79	0	0
T176	42073	244	0	0
T177	90366	222	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5539	0	0
T112	3644	1	0	0
T113	3943	6	0	0
T123	33503	110	0	0
T124	104666	778	0	0
T138	9525	7	0	0
T167	11917	29	0	0
T174	39610	285	0	0
T175	21530	59	0	0
T176	42073	268	0	0
T177	90366	277	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4492	0	0
T112	3644	6	0	0
T113	3943	10	0	0
T123	33503	158	0	0
T124	104666	553	0	0
T138	9525	56	0	0
T167	11917	25	0	0
T174	39610	264	0	0
T175	21530	71	0	0
T176	42073	238	0	0
T177	90366	216	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4789	0	0
T112	3644	9	0	0
T113	3943	15	0	0
T123	33503	97	0	0
T124	104666	658	0	0
T138	9525	31	0	0
T167	11917	10	0	0
T169	4056	26	0	0
T174	39610	284	0	0
T175	21530	55	0	0
T176	42073	262	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4775	0	0
T112	3644	1	0	0
T113	3943	11	0	0
T123	33503	174	0	0
T124	104666	732	0	0
T138	9525	33	0	0
T167	11917	28	0	0
T174	39610	248	0	0
T175	21530	68	0	0
T176	42073	306	0	0
T177	90366	222	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4712	0	0
T112	3644	2	0	0
T113	3943	11	0	0
T123	33503	48	0	0
T124	104666	729	0	0
T138	9525	35	0	0
T167	11917	29	0	0
T169	4056	9	0	0
T174	39610	307	0	0
T175	21530	57	0	0
T176	42073	260	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4794	0	0
T112	3644	5	0	0
T113	3943	6	0	0
T123	33503	168	0	0
T124	104666	814	0	0
T138	9525	8	0	0
T167	11917	13	0	0
T169	4056	17	0	0
T174	39610	280	0	0
T175	21530	85	0	0
T176	42073	265	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5115	0	0
T112	3644	4	0	0
T113	3943	2	0	0
T123	33503	80	0	0
T124	104666	908	0	0
T138	9525	17	0	0
T167	11917	14	0	0
T169	4056	4	0	0
T174	39610	250	0	0
T175	21530	52	0	0
T176	42073	293	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5221	0	0
T112	3644	6	0	0
T113	3943	3	0	0
T123	33503	181	0	0
T124	104666	787	0	0
T138	9525	57	0	0
T167	11917	2	0	0
T169	4056	3	0	0
T174	39610	283	0	0
T175	21530	40	0	0
T176	42073	241	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5370	0	0
T112	3644	15	0	0
T113	3943	1	0	0
T123	33503	203	0	0
T124	104666	812	0	0
T138	9525	6	0	0
T167	11917	34	0	0
T169	4056	20	0	0
T174	39610	254	0	0
T175	21530	35	0	0
T176	42073	238	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4672	0	0
T113	3943	7	0	0
T123	33503	111	0	0
T124	104666	879	0	0
T138	9525	12	0	0
T167	11917	28	0	0
T169	4056	23	0	0
T174	39610	275	0	0
T175	21530	45	0	0
T176	42073	255	0	0
T177	90366	201	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4940	0	0
T113	3943	12	0	0
T123	33503	105	0	0
T124	104666	645	0	0
T138	9525	82	0	0
T167	11917	41	0	0
T169	4056	3	0	0
T174	39610	251	0	0
T175	21530	117	0	0
T176	42073	280	0	0
T177	90366	204	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4775	0	0
T112	3644	9	0	0
T113	3943	7	0	0
T123	33503	179	0	0
T124	104666	787	0	0
T138	9525	27	0	0
T167	11917	4	0	0
T174	39610	242	0	0
T175	21530	60	0	0
T176	42073	235	0	0
T177	90366	193	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4584	0	0
T112	3644	1	0	0
T113	3943	4	0	0
T123	33503	225	0	0
T124	104666	692	0	0
T138	9525	69	0	0
T167	11917	15	0	0
T169	4056	5	0	0
T174	39610	279	0	0
T175	21530	55	0	0
T176	42073	257	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5360	0	0
T112	3644	6	0	0
T113	3943	7	0	0
T123	33503	160	0	0
T124	104666	618	0	0
T138	9525	46	0	0
T167	11917	39	0	0
T174	39610	259	0	0
T175	21530	60	0	0
T176	42073	285	0	0
T177	90366	287	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5326	0	0
T112	3644	7	0	0
T113	3943	4	0	0
T123	33503	164	0	0
T124	104666	810	0	0
T138	9525	67	0	0
T167	11917	29	0	0
T169	4056	15	0	0
T174	39610	271	0	0
T175	21530	50	0	0
T176	42073	282	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5110	0	0
T112	3644	2	0	0
T113	3943	10	0	0
T123	33503	141	0	0
T124	104666	863	0	0
T138	9525	22	0	0
T167	11917	10	0	0
T169	4056	16	0	0
T174	39610	222	0	0
T175	21530	20	0	0
T176	42073	289	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4946	0	0
T112	3644	3	0	0
T113	3943	8	0	0
T123	33503	211	0	0
T124	104666	864	0	0
T138	9525	48	0	0
T167	11917	20	0	0
T169	4056	4	0	0
T174	39610	237	0	0
T175	21530	56	0	0
T176	42073	229	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4900	0	0
T112	3644	4	0	0
T113	3943	1	0	0
T123	33503	80	0	0
T124	104666	834	0	0
T138	9525	33	0	0
T167	11917	44	0	0
T174	39610	275	0	0
T175	21530	44	0	0
T176	42073	212	0	0
T177	90366	198	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4899	0	0
T112	3644	9	0	0
T113	3943	3	0	0
T123	33503	124	0	0
T124	104666	862	0	0
T138	9525	14	0	0
T167	11917	37	0	0
T169	4056	3	0	0
T174	39610	261	0	0
T175	21530	55	0	0
T176	42073	266	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5277	0	0
T112	3644	8	0	0
T113	3943	6	0	0
T123	33503	176	0	0
T124	104666	837	0	0
T138	9525	80	0	0
T167	11917	23	0	0
T174	39610	321	0	0
T175	21530	88	0	0
T176	42073	304	0	0
T177	90366	216	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5163	0	0
T113	3943	4	0	0
T123	33503	182	0	0
T124	104666	885	0	0
T138	9525	19	0	0
T167	11917	35	0	0
T169	4056	6	0	0
T174	39610	269	0	0
T175	21530	55	0	0
T176	42073	276	0	0
T177	90366	228	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4735	0	0
T112	3644	6	0	0
T113	3943	6	0	0
T123	33503	166	0	0
T124	104666	682	0	0
T138	9525	72	0	0
T167	11917	22	0	0
T169	4056	9	0	0
T174	39610	294	0	0
T175	21530	80	0	0
T176	42073	242	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	5023	0	0
T112	3644	10	0	0
T113	3943	1	0	0
T123	33503	93	0	0
T124	104666	725	0	0
T167	11917	13	0	0
T169	4056	6	0	0
T174	39610	238	0	0
T175	21530	38	0	0
T176	42073	267	0	0
T177	90366	193	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4825	0	0
T113	3943	9	0	0
T123	33503	148	0	0
T124	104666	681	0	0
T138	9525	56	0	0
T149	10290	62	0	0
T167	11917	31	0	0
T174	39610	267	0	0
T175	21530	57	0	0
T176	42073	277	0	0
T177	90366	210	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2279	0	0
T112	3644	1	0	0
T113	3943	11	0	0
T123	33503	37	0	0
T124	104666	160	0	0
T138	9525	16	0	0
T167	11917	48	0	0
T174	39610	288	0	0
T175	21530	37	0	0
T176	42073	233	0	0
T177	90366	208	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2238	0	0
T112	3644	8	0	0
T123	33503	28	0	0
T124	104666	178	0	0
T138	9525	15	0	0
T149	10290	8	0	0
T167	11917	22	0	0
T174	39610	277	0	0
T175	21530	23	0	0
T176	42073	249	0	0
T177	90366	226	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2209	0	0
T112	3644	2	0	0
T113	3943	13	0	0
T123	33503	29	0	0
T124	104666	176	0	0
T138	9525	7	0	0
T167	11917	10	0	0
T169	4056	2	0	0
T174	39610	238	0	0
T175	21530	105	0	0
T176	42073	264	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2204	0	0
T112	3644	1	0	0
T113	3943	11	0	0
T123	33503	42	0	0
T124	104666	154	0	0
T138	9525	3	0	0
T167	11917	22	0	0
T169	4056	5	0	0
T174	39610	261	0	0
T175	21530	39	0	0
T176	42073	251	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2659	0	0
T112	3644	4	0	0
T113	3943	8	0	0
T123	33503	38	0	0
T124	104666	255	0	0
T138	9525	4	0	0
T167	11917	23	0	0
T169	4056	8	0	0
T174	39610	254	0	0
T175	21530	81	0	0
T176	42073	253	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	4811	0	0
T34	5267	30	0	0
T35	11135	0	0	0
T44	0	11	0	0
T48	175894	0	0	0
T60	455654	0	0	0
T72	20307	0	0	0
T79	1292	0	0	0
T90	0	29	0	0
T92	0	17	0	0
T99	10397	0	0	0
T115	2820	0	0	0
T178	0	20	0	0
T179	0	59	0	0
T180	0	33	0	0
T181	0	36	0	0
T182	0	52	0	0
T183	0	9	0	0
T184	1277	0	0	0
T185	954	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2155	0	0
T112	3644	6	0	0
T113	3943	8	0	0
T123	33503	25	0	0
T124	104666	174	0	0
T138	9525	4	0	0
T167	11917	28	0	0
T174	39610	219	0	0
T175	21530	88	0	0
T176	42073	244	0	0
T177	90366	256	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2178	0	0
T112	3644	5	0	0
T113	3943	4	0	0
T123	33503	27	0	0
T124	104666	176	0	0
T138	9525	15	0	0
T167	11917	11	0	0
T174	39610	257	0	0
T175	21530	23	0	0
T176	42073	268	0	0
T177	90366	190	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2017	0	0
T112	3644	4	0	0
T113	3943	5	0	0
T123	33503	31	0	0
T124	104666	137	0	0
T138	9525	13	0	0
T167	11917	19	0	0
T174	39610	281	0	0
T175	21530	75	0	0
T176	42073	269	0	0
T177	90366	203	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2020	0	0
T112	3644	9	0	0
T113	3943	10	0	0
T123	33503	17	0	0
T124	104666	124	0	0
T138	9525	10	0	0
T167	11917	16	0	0
T174	39610	292	0	0
T175	21530	41	0	0
T176	42073	300	0	0
T177	90366	225	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	1901	0	0
T112	3644	1	0	0
T113	3943	9	0	0
T123	33503	36	0	0
T124	104666	122	0	0
T138	9525	1	0	0
T167	11917	20	0	0
T174	39610	295	0	0
T175	21530	58	0	0
T176	42073	217	0	0
T177	90366	197	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2051	0	0
T113	3943	11	0	0
T123	33503	33	0	0
T124	104666	104	0	0
T138	9525	17	0	0
T167	11917	23	0	0
T169	4056	5	0	0
T174	39610	257	0	0
T175	21530	52	0	0
T176	42073	239	0	0
T177	90366	262	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2741	0	0
T112	3644	3	0	0
T113	3943	9	0	0
T123	33503	69	0	0
T124	104666	297	0	0
T138	9525	6	0	0
T167	11917	31	0	0
T169	4056	10	0	0
T174	39610	266	0	0
T175	21530	20	0	0
T176	42073	254	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	1999	0	0
T112	3644	7	0	0
T113	3943	7	0	0
T123	33503	12	0	0
T124	104666	121	0	0
T138	9525	12	0	0
T167	11917	29	0	0
T169	4056	2	0	0
T174	39610	302	0	0
T175	21530	56	0	0
T176	42073	279	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2948	0	0
T112	3644	4	0	0
T113	3943	8	0	0
T123	33503	53	0	0
T124	104666	342	0	0
T138	9525	11	0	0
T167	11917	22	0	0
T174	39610	248	0	0
T175	21530	85	0	0
T176	42073	270	0	0
T177	90366	207	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2457	0	0
T112	3644	3	0	0
T113	3943	10	0	0
T123	33503	28	0	0
T124	104666	210	0	0
T138	9525	12	0	0
T167	11917	8	0	0
T169	4056	3	0	0
T174	39610	248	0	0
T175	21530	99	0	0
T176	42073	277	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2078	0	0
T112	3644	7	0	0
T113	3943	11	0	0
T123	33503	13	0	0
T124	104666	117	0	0
T138	9525	13	0	0
T167	11917	9	0	0
T174	39610	270	0	0
T175	21530	93	0	0
T176	42073	307	0	0
T177	90366	230	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	1964	0	0
T113	3943	4	0	0
T123	33503	21	0	0
T124	104666	74	0	0
T138	9525	8	0	0
T167	11917	31	0	0
T169	4056	3	0	0
T174	39610	267	0	0
T175	21530	69	0	0
T176	42073	214	0	0
T177	90366	216	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	2046	0	0
T112	3644	9	0	0
T113	3943	12	0	0
T123	33503	26	0	0
T124	104666	107	0	0
T138	9525	5	0	0
T167	11917	11	0	0
T174	39610	258	0	0
T175	21530	71	0	0
T176	42073	261	0	0
T177	90366	204	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	1962	0	0
T112	3644	9	0	0
T113	3943	9	0	0
T123	33503	21	0	0
T124	104666	108	0	0
T138	9525	17	0	0
T167	11917	12	0	0
T174	39610	284	0	0
T175	21530	60	0	0
T176	42073	242	0	0
T177	90366	219	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	1988	0	0
T113	3943	9	0	0
T123	33503	18	0	0
T124	104666	126	0	0
T138	9525	19	0	0
T167	11917	33	0	0
T169	4056	3	0	0
T174	39610	271	0	0
T175	21530	64	0	0
T176	42073	270	0	0
T177	90366	230	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	508123200	1976	0	0
T112	3644	8	0	0
T113	3943	6	0	0
T123	33503	7	0	0
T124	104666	113	0	0
T138	9525	13	0	0
T167	11917	31	0	0
T169	4056	5	0	0
T174	39610	246	0	0
T175	21530	88	0	0
T176	42073	275	0	0