| T608 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.3608944474 |
|
|
Oct 15 06:11:31 AM UTC 24 |
Oct 15 06:11:33 AM UTC 24 |
374370731 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.1867470598 |
|
|
Oct 15 06:03:55 AM UTC 24 |
Oct 15 06:11:33 AM UTC 24 |
230856542402 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.1811799147 |
|
|
Oct 15 06:10:34 AM UTC 24 |
Oct 15 06:11:34 AM UTC 24 |
7175210532 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_rw.2512846132 |
|
|
Oct 15 06:11:32 AM UTC 24 |
Oct 15 06:11:35 AM UTC 24 |
28183249 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.227093173 |
|
|
Oct 15 06:11:25 AM UTC 24 |
Oct 15 06:11:35 AM UTC 24 |
2624624027 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.1036924596 |
|
|
Oct 15 06:11:32 AM UTC 24 |
Oct 15 06:11:39 AM UTC 24 |
276263748 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.736458938 |
|
|
Oct 15 06:06:44 AM UTC 24 |
Oct 15 06:11:39 AM UTC 24 |
24290152498 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.2101198454 |
|
|
Oct 15 06:11:03 AM UTC 24 |
Oct 15 06:11:41 AM UTC 24 |
15838139029 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_intercept.2616763098 |
|
|
Oct 15 06:11:35 AM UTC 24 |
Oct 15 06:11:42 AM UTC 24 |
647697734 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_cfg_cmd.1158104705 |
|
|
Oct 15 06:11:36 AM UTC 24 |
Oct 15 06:11:42 AM UTC 24 |
698355253 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_upload.4017321965 |
|
|
Oct 15 06:11:36 AM UTC 24 |
Oct 15 06:11:46 AM UTC 24 |
1483436496 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.1896300757 |
|
|
Oct 15 06:08:27 AM UTC 24 |
Oct 15 06:11:47 AM UTC 24 |
10683135079 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode.638747992 |
|
|
Oct 15 06:11:40 AM UTC 24 |
Oct 15 06:11:47 AM UTC 24 |
179334941 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.2448836685 |
|
|
Oct 15 06:11:35 AM UTC 24 |
Oct 15 06:11:49 AM UTC 24 |
8202957613 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_stress_all.3886033028 |
|
|
Oct 15 06:09:07 AM UTC 24 |
Oct 15 06:11:49 AM UTC 24 |
5432875729 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_alert_test.3616454167 |
|
|
Oct 15 06:11:48 AM UTC 24 |
Oct 15 06:11:50 AM UTC 24 |
23587662 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_csb_read.3036533858 |
|
|
Oct 15 06:11:50 AM UTC 24 |
Oct 15 06:11:52 AM UTC 24 |
40931228 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.2344832299 |
|
|
Oct 15 06:11:53 AM UTC 24 |
Oct 15 06:11:55 AM UTC 24 |
199610577 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_tpm_all.3540457603 |
|
|
Oct 15 06:11:28 AM UTC 24 |
Oct 15 06:11:57 AM UTC 24 |
22148184802 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_rw.1059494783 |
|
|
Oct 15 06:11:56 AM UTC 24 |
Oct 15 06:11:58 AM UTC 24 |
17620333 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.1387616891 |
|
|
Oct 15 06:08:58 AM UTC 24 |
Oct 15 06:12:01 AM UTC 24 |
42217667399 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.4087275732 |
|
|
Oct 15 06:11:42 AM UTC 24 |
Oct 15 06:12:06 AM UTC 24 |
1311627543 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_intercept.3176072116 |
|
|
Oct 15 06:12:02 AM UTC 24 |
Oct 15 06:12:08 AM UTC 24 |
855674423 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.3918003500 |
|
|
Oct 15 06:11:50 AM UTC 24 |
Oct 15 06:12:09 AM UTC 24 |
10682697155 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_mailbox.150993812 |
|
|
Oct 15 06:12:07 AM UTC 24 |
Oct 15 06:12:13 AM UTC 24 |
98206574 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_cfg_cmd.2228772031 |
|
|
Oct 15 06:12:10 AM UTC 24 |
Oct 15 06:12:14 AM UTC 24 |
149883345 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_upload.2218231313 |
|
|
Oct 15 06:12:08 AM UTC 24 |
Oct 15 06:12:16 AM UTC 24 |
1886240880 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_mailbox.4254199033 |
|
|
Oct 15 06:11:36 AM UTC 24 |
Oct 15 06:12:16 AM UTC 24 |
3266267001 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_all.314101679 |
|
|
Oct 15 06:11:14 AM UTC 24 |
Oct 15 06:12:18 AM UTC 24 |
7279956977 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3172220468 |
|
|
Oct 15 06:11:59 AM UTC 24 |
Oct 15 06:12:18 AM UTC 24 |
5381715265 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.1137500009 |
|
|
Oct 15 06:12:00 AM UTC 24 |
Oct 15 06:12:20 AM UTC 24 |
3868430505 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_csb_read.3488027604 |
|
|
Oct 15 06:12:25 AM UTC 24 |
Oct 15 06:12:27 AM UTC 24 |
44201489 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/17.spi_device_flash_all.193207772 |
|
|
Oct 15 06:06:48 AM UTC 24 |
Oct 15 06:12:21 AM UTC 24 |
162197411404 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_alert_test.2251010075 |
|
|
Oct 15 06:12:21 AM UTC 24 |
Oct 15 06:12:23 AM UTC 24 |
11877391 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.4225934521 |
|
|
Oct 15 06:10:56 AM UTC 24 |
Oct 15 06:12:24 AM UTC 24 |
12864173688 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.1982692754 |
|
|
Oct 15 06:11:14 AM UTC 24 |
Oct 15 06:12:25 AM UTC 24 |
18392325035 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_mailbox.1320432188 |
|
|
Oct 15 06:11:09 AM UTC 24 |
Oct 15 06:12:26 AM UTC 24 |
8345203960 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode.3687025786 |
|
|
Oct 15 06:12:14 AM UTC 24 |
Oct 15 06:12:26 AM UTC 24 |
1261538237 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.1523514149 |
|
|
Oct 15 06:10:12 AM UTC 24 |
Oct 15 06:12:26 AM UTC 24 |
16320632459 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.266395630 |
|
|
Oct 15 06:12:25 AM UTC 24 |
Oct 15 06:12:28 AM UTC 24 |
187603653 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.1118128720 |
|
|
Oct 15 06:12:28 AM UTC 24 |
Oct 15 06:12:30 AM UTC 24 |
516641060 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_all.3331812863 |
|
|
Oct 15 06:12:26 AM UTC 24 |
Oct 15 06:12:31 AM UTC 24 |
156360740 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_tpm_rw.2906791422 |
|
|
Oct 15 06:12:28 AM UTC 24 |
Oct 15 06:12:31 AM UTC 24 |
102111594 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.1193669908 |
|
|
Oct 15 06:12:28 AM UTC 24 |
Oct 15 06:12:34 AM UTC 24 |
954335928 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2048760471 |
|
|
Oct 15 06:12:16 AM UTC 24 |
Oct 15 06:12:34 AM UTC 24 |
1911627292 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_intercept.3954497861 |
|
|
Oct 15 06:12:29 AM UTC 24 |
Oct 15 06:12:34 AM UTC 24 |
107951849 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_all.1867612446 |
|
|
Oct 15 06:08:54 AM UTC 24 |
Oct 15 06:12:37 AM UTC 24 |
60864411469 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_cfg_cmd.2562215052 |
|
|
Oct 15 06:12:32 AM UTC 24 |
Oct 15 06:12:38 AM UTC 24 |
284501628 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.1118698711 |
|
|
Oct 15 06:03:40 AM UTC 24 |
Oct 15 06:12:39 AM UTC 24 |
46970194109 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.2103613359 |
|
|
Oct 15 06:08:27 AM UTC 24 |
Oct 15 06:12:39 AM UTC 24 |
43044106225 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.1910981049 |
|
|
Oct 15 06:11:41 AM UTC 24 |
Oct 15 06:12:40 AM UTC 24 |
1809711236 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_upload.2193513363 |
|
|
Oct 15 06:12:32 AM UTC 24 |
Oct 15 06:12:41 AM UTC 24 |
868943341 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.108216218 |
|
|
Oct 15 06:12:34 AM UTC 24 |
Oct 15 06:12:42 AM UTC 24 |
450609122 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_stress_all.3514886230 |
|
|
Oct 15 06:12:40 AM UTC 24 |
Oct 15 06:12:43 AM UTC 24 |
30755847 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_tpm_all.3899645 |
|
|
Oct 15 06:11:51 AM UTC 24 |
Oct 15 06:12:45 AM UTC 24 |
42427055556 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_alert_test.351017233 |
|
|
Oct 15 06:12:43 AM UTC 24 |
Oct 15 06:12:45 AM UTC 24 |
12917934 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_csb_read.882094487 |
|
|
Oct 15 06:12:43 AM UTC 24 |
Oct 15 06:12:45 AM UTC 24 |
25725520 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.3740436132 |
|
|
Oct 15 06:11:18 AM UTC 24 |
Oct 15 06:12:46 AM UTC 24 |
15056267708 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.2025195074 |
|
|
Oct 15 06:10:11 AM UTC 24 |
Oct 15 06:12:47 AM UTC 24 |
18316396885 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.3413460509 |
|
|
Oct 15 06:12:14 AM UTC 24 |
Oct 15 06:12:49 AM UTC 24 |
2044489884 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.564272351 |
|
|
Oct 15 06:12:45 AM UTC 24 |
Oct 15 06:12:49 AM UTC 24 |
912329381 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3316214975 |
|
|
Oct 15 06:12:48 AM UTC 24 |
Oct 15 06:12:50 AM UTC 24 |
294878975 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_all.1080390547 |
|
|
Oct 15 06:10:34 AM UTC 24 |
Oct 15 06:12:51 AM UTC 24 |
75412685029 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_rw.1658630772 |
|
|
Oct 15 06:12:48 AM UTC 24 |
Oct 15 06:12:51 AM UTC 24 |
1170568737 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.3104780876 |
|
|
Oct 15 06:12:28 AM UTC 24 |
Oct 15 06:12:52 AM UTC 24 |
4673950343 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_mailbox.728335856 |
|
|
Oct 15 06:12:32 AM UTC 24 |
Oct 15 06:12:54 AM UTC 24 |
7862440367 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_upload.2544945582 |
|
|
Oct 15 06:12:51 AM UTC 24 |
Oct 15 06:12:54 AM UTC 24 |
156269803 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.988871724 |
|
|
Oct 15 06:12:19 AM UTC 24 |
Oct 15 06:12:55 AM UTC 24 |
1768002241 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_intercept.92364431 |
|
|
Oct 15 06:12:48 AM UTC 24 |
Oct 15 06:12:55 AM UTC 24 |
570451113 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_cfg_cmd.3285695601 |
|
|
Oct 15 06:12:51 AM UTC 24 |
Oct 15 06:12:56 AM UTC 24 |
771663286 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_all.3215071602 |
|
|
Oct 15 06:11:43 AM UTC 24 |
Oct 15 06:12:58 AM UTC 24 |
3725091588 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1993731664 |
|
|
Oct 15 06:12:48 AM UTC 24 |
Oct 15 06:12:58 AM UTC 24 |
1588846123 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_alert_test.205367484 |
|
|
Oct 15 06:12:56 AM UTC 24 |
Oct 15 06:12:59 AM UTC 24 |
13776568 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_csb_read.740537318 |
|
|
Oct 15 06:12:57 AM UTC 24 |
Oct 15 06:12:59 AM UTC 24 |
68240862 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.1268519798 |
|
|
Oct 15 06:12:53 AM UTC 24 |
Oct 15 06:13:00 AM UTC 24 |
122477867 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_all.94909775 |
|
|
Oct 15 06:12:59 AM UTC 24 |
Oct 15 06:13:01 AM UTC 24 |
33651690 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_tpm_all.2466917358 |
|
|
Oct 15 06:12:45 AM UTC 24 |
Oct 15 06:13:01 AM UTC 24 |
2521746497 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode.1248465448 |
|
|
Oct 15 06:12:53 AM UTC 24 |
Oct 15 06:13:02 AM UTC 24 |
1448211501 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.3377026295 |
|
|
Oct 15 06:12:59 AM UTC 24 |
Oct 15 06:13:03 AM UTC 24 |
889912793 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.3636036665 |
|
|
Oct 15 06:13:01 AM UTC 24 |
Oct 15 06:13:04 AM UTC 24 |
25757101 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode.3351462079 |
|
|
Oct 15 06:12:34 AM UTC 24 |
Oct 15 06:13:04 AM UTC 24 |
5578567231 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_tpm_rw.3380161831 |
|
|
Oct 15 06:13:02 AM UTC 24 |
Oct 15 06:13:05 AM UTC 24 |
1111733286 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.4075805643 |
|
|
Oct 15 06:12:48 AM UTC 24 |
Oct 15 06:13:11 AM UTC 24 |
46612843278 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_all.2587933525 |
|
|
Oct 15 06:13:09 AM UTC 24 |
Oct 15 06:13:12 AM UTC 24 |
43481606 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_cfg_cmd.2920013037 |
|
|
Oct 15 06:13:06 AM UTC 24 |
Oct 15 06:13:12 AM UTC 24 |
481248719 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_mailbox.3643408349 |
|
|
Oct 15 06:13:03 AM UTC 24 |
Oct 15 06:13:12 AM UTC 24 |
1102188180 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3714472477 |
|
|
Oct 15 06:11:47 AM UTC 24 |
Oct 15 06:13:13 AM UTC 24 |
17624494838 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode.2478463332 |
|
|
Oct 15 06:13:06 AM UTC 24 |
Oct 15 06:13:13 AM UTC 24 |
228758777 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_mailbox.2548318056 |
|
|
Oct 15 06:12:51 AM UTC 24 |
Oct 15 06:13:13 AM UTC 24 |
2757988355 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_intercept.3253774974 |
|
|
Oct 15 06:13:03 AM UTC 24 |
Oct 15 06:13:13 AM UTC 24 |
4016683084 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.4173411413 |
|
|
Oct 15 06:12:53 AM UTC 24 |
Oct 15 06:13:14 AM UTC 24 |
5729360938 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_alert_test.4089227380 |
|
|
Oct 15 06:13:13 AM UTC 24 |
Oct 15 06:13:15 AM UTC 24 |
12802123 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_upload.798608700 |
|
|
Oct 15 06:13:06 AM UTC 24 |
Oct 15 06:13:16 AM UTC 24 |
442222790 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/31.spi_device_stress_all.477235533 |
|
|
Oct 15 06:12:56 AM UTC 24 |
Oct 15 06:13:16 AM UTC 24 |
5752136522 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_csb_read.734934184 |
|
|
Oct 15 06:13:15 AM UTC 24 |
Oct 15 06:13:17 AM UTC 24 |
71644663 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3757253597 |
|
|
Oct 15 06:13:15 AM UTC 24 |
Oct 15 06:13:18 AM UTC 24 |
138924106 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.1746667805 |
|
|
Oct 15 06:12:19 AM UTC 24 |
Oct 15 06:13:19 AM UTC 24 |
44077635803 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_rw.572391570 |
|
|
Oct 15 06:13:17 AM UTC 24 |
Oct 15 06:13:20 AM UTC 24 |
130749166 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.915302945 |
|
|
Oct 15 06:10:55 AM UTC 24 |
Oct 15 06:13:20 AM UTC 24 |
4990535325 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.4013257517 |
|
|
Oct 15 06:13:07 AM UTC 24 |
Oct 15 06:13:21 AM UTC 24 |
1443830429 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.2464430296 |
|
|
Oct 15 06:13:03 AM UTC 24 |
Oct 15 06:13:22 AM UTC 24 |
7254288977 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_flash_all.3126533463 |
|
|
Oct 15 06:12:18 AM UTC 24 |
Oct 15 06:13:22 AM UTC 24 |
22321820644 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_intercept.306328546 |
|
|
Oct 15 06:13:17 AM UTC 24 |
Oct 15 06:13:23 AM UTC 24 |
3748715369 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.1541112947 |
|
|
Oct 15 06:13:17 AM UTC 24 |
Oct 15 06:13:25 AM UTC 24 |
336682778 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.4151515974 |
|
|
Oct 15 06:13:03 AM UTC 24 |
Oct 15 06:13:26 AM UTC 24 |
10859414279 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.1103037288 |
|
|
Oct 15 06:13:17 AM UTC 24 |
Oct 15 06:13:29 AM UTC 24 |
451333426 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_cfg_cmd.870932884 |
|
|
Oct 15 06:13:21 AM UTC 24 |
Oct 15 06:13:29 AM UTC 24 |
1162859376 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_stress_all.1527028856 |
|
|
Oct 15 06:13:26 AM UTC 24 |
Oct 15 06:13:29 AM UTC 24 |
73585104 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.2946032506 |
|
|
Oct 15 06:13:22 AM UTC 24 |
Oct 15 06:13:29 AM UTC 24 |
219459509 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_alert_test.2398921347 |
|
|
Oct 15 06:13:27 AM UTC 24 |
Oct 15 06:13:30 AM UTC 24 |
13814458 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_all.331711917 |
|
|
Oct 15 06:12:38 AM UTC 24 |
Oct 15 06:13:30 AM UTC 24 |
2852019254 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_csb_read.2387062599 |
|
|
Oct 15 06:13:29 AM UTC 24 |
Oct 15 06:13:31 AM UTC 24 |
23395891 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.3851620320 |
|
|
Oct 15 06:13:30 AM UTC 24 |
Oct 15 06:13:33 AM UTC 24 |
71113992 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_mailbox.3938974383 |
|
|
Oct 15 06:13:18 AM UTC 24 |
Oct 15 06:13:35 AM UTC 24 |
840033108 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_stress_all.3041420245 |
|
|
Oct 15 06:11:48 AM UTC 24 |
Oct 15 06:13:35 AM UTC 24 |
23484515238 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.791448327 |
|
|
Oct 15 06:13:32 AM UTC 24 |
Oct 15 06:13:36 AM UTC 24 |
31748952 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_rw.2723752620 |
|
|
Oct 15 06:13:30 AM UTC 24 |
Oct 15 06:13:37 AM UTC 24 |
172695724 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.3558073714 |
|
|
Oct 15 06:10:53 AM UTC 24 |
Oct 15 06:13:38 AM UTC 24 |
57907714003 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_all.927526251 |
|
|
Oct 15 06:13:15 AM UTC 24 |
Oct 15 06:13:38 AM UTC 24 |
11301205870 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_cfg_cmd.433188861 |
|
|
Oct 15 06:13:37 AM UTC 24 |
Oct 15 06:13:40 AM UTC 24 |
239553631 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_all.3181490523 |
|
|
Oct 15 06:13:30 AM UTC 24 |
Oct 15 06:13:41 AM UTC 24 |
3023148361 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.2448068568 |
|
|
Oct 15 06:11:43 AM UTC 24 |
Oct 15 06:13:42 AM UTC 24 |
7657032730 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.1859790156 |
|
|
Oct 15 06:09:41 AM UTC 24 |
Oct 15 06:13:44 AM UTC 24 |
396083425383 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_upload.3986228224 |
|
|
Oct 15 06:13:35 AM UTC 24 |
Oct 15 06:13:45 AM UTC 24 |
5491883255 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_intercept.4165801152 |
|
|
Oct 15 06:13:32 AM UTC 24 |
Oct 15 06:13:47 AM UTC 24 |
4859007001 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_alert_test.1056824678 |
|
|
Oct 15 06:13:46 AM UTC 24 |
Oct 15 06:13:48 AM UTC 24 |
37809184 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_csb_read.3394663290 |
|
|
Oct 15 06:13:46 AM UTC 24 |
Oct 15 06:13:48 AM UTC 24 |
61144802 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_upload.3497655931 |
|
|
Oct 15 06:13:18 AM UTC 24 |
Oct 15 06:13:50 AM UTC 24 |
10524118066 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.2810014477 |
|
|
Oct 15 06:13:15 AM UTC 24 |
Oct 15 06:13:51 AM UTC 24 |
20773562618 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.1793000786 |
|
|
Oct 15 06:10:05 AM UTC 24 |
Oct 15 06:13:51 AM UTC 24 |
25922481149 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.2122685753 |
|
|
Oct 15 06:13:49 AM UTC 24 |
Oct 15 06:13:51 AM UTC 24 |
34842134 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.3203788112 |
|
|
Oct 15 06:13:30 AM UTC 24 |
Oct 15 06:13:52 AM UTC 24 |
21317453024 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/18.spi_device_stress_all.3950400675 |
|
|
Oct 15 06:07:18 AM UTC 24 |
Oct 15 06:13:53 AM UTC 24 |
44878160851 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_rw.977035168 |
|
|
Oct 15 06:13:50 AM UTC 24 |
Oct 15 06:13:54 AM UTC 24 |
653845262 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.186652588 |
|
|
Oct 15 06:13:39 AM UTC 24 |
Oct 15 06:13:55 AM UTC 24 |
1106819763 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_mailbox.593170362 |
|
|
Oct 15 06:13:33 AM UTC 24 |
Oct 15 06:13:56 AM UTC 24 |
6216642471 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_all.1904097252 |
|
|
Oct 15 06:13:49 AM UTC 24 |
Oct 15 06:13:56 AM UTC 24 |
471423100 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode.1179464744 |
|
|
Oct 15 06:13:37 AM UTC 24 |
Oct 15 06:13:57 AM UTC 24 |
2692470218 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.2771051165 |
|
|
Oct 15 06:13:48 AM UTC 24 |
Oct 15 06:13:58 AM UTC 24 |
1044957287 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_cfg_cmd.1704337175 |
|
|
Oct 15 06:13:55 AM UTC 24 |
Oct 15 06:13:59 AM UTC 24 |
109583320 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_intercept.2925895096 |
|
|
Oct 15 06:13:52 AM UTC 24 |
Oct 15 06:14:01 AM UTC 24 |
1201958219 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2822113425 |
|
|
Oct 15 06:13:52 AM UTC 24 |
Oct 15 06:14:02 AM UTC 24 |
2491991396 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.1384375263 |
|
|
Oct 15 06:13:30 AM UTC 24 |
Oct 15 06:14:03 AM UTC 24 |
6907557408 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_alert_test.1592325227 |
|
|
Oct 15 06:14:03 AM UTC 24 |
Oct 15 06:14:05 AM UTC 24 |
12282760 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.3075764029 |
|
|
Oct 15 06:13:52 AM UTC 24 |
Oct 15 06:14:05 AM UTC 24 |
2657568836 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.2941399627 |
|
|
Oct 15 06:13:58 AM UTC 24 |
Oct 15 06:14:07 AM UTC 24 |
465680441 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_csb_read.3997233962 |
|
|
Oct 15 06:14:05 AM UTC 24 |
Oct 15 06:14:07 AM UTC 24 |
21165733 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.1662604052 |
|
|
Oct 15 06:13:06 AM UTC 24 |
Oct 15 06:14:08 AM UTC 24 |
13568167536 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.427591795 |
|
|
Oct 15 06:14:08 AM UTC 24 |
Oct 15 06:14:10 AM UTC 24 |
59240100 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_rw.2831850964 |
|
|
Oct 15 06:14:08 AM UTC 24 |
Oct 15 06:14:11 AM UTC 24 |
472228387 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.2605044876 |
|
|
Oct 15 06:13:12 AM UTC 24 |
Oct 15 06:14:14 AM UTC 24 |
4183957823 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.3987224985 |
|
|
Oct 15 06:14:06 AM UTC 24 |
Oct 15 06:14:14 AM UTC 24 |
466515726 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_mode.484933134 |
|
|
Oct 15 06:13:56 AM UTC 24 |
Oct 15 06:14:14 AM UTC 24 |
826033792 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_all.2833880772 |
|
|
Oct 15 06:13:58 AM UTC 24 |
Oct 15 06:14:18 AM UTC 24 |
1518016341 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode.2777515601 |
|
|
Oct 15 06:13:21 AM UTC 24 |
Oct 15 06:14:19 AM UTC 24 |
9735752794 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.2364978775 |
|
|
Oct 15 06:10:34 AM UTC 24 |
Oct 15 06:14:19 AM UTC 24 |
19297902858 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.981797277 |
|
|
Oct 15 06:08:49 AM UTC 24 |
Oct 15 06:14:20 AM UTC 24 |
111795697371 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.732478203 |
|
|
Oct 15 06:14:09 AM UTC 24 |
Oct 15 06:14:21 AM UTC 24 |
1435073013 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/27.spi_device_stress_all.2430015578 |
|
|
Oct 15 06:11:21 AM UTC 24 |
Oct 15 06:14:27 AM UTC 24 |
8800789689 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.424985512 |
|
|
Oct 15 06:14:11 AM UTC 24 |
Oct 15 06:14:28 AM UTC 24 |
1115498992 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_mailbox.3398347286 |
|
|
Oct 15 06:13:54 AM UTC 24 |
Oct 15 06:14:28 AM UTC 24 |
2244301549 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_upload.2278032898 |
|
|
Oct 15 06:13:54 AM UTC 24 |
Oct 15 06:14:29 AM UTC 24 |
26476864621 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_alert_test.2043194209 |
|
|
Oct 15 06:14:30 AM UTC 24 |
Oct 15 06:14:32 AM UTC 24 |
13158214 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_csb_read.1800063676 |
|
|
Oct 15 06:14:30 AM UTC 24 |
Oct 15 06:14:32 AM UTC 24 |
59845130 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.4088088577 |
|
|
Oct 15 06:14:21 AM UTC 24 |
Oct 15 06:14:34 AM UTC 24 |
926018327 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1290441754 |
|
|
Oct 15 06:14:15 AM UTC 24 |
Oct 15 06:14:35 AM UTC 24 |
1818223846 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode.970585199 |
|
|
Oct 15 06:14:19 AM UTC 24 |
Oct 15 06:14:36 AM UTC 24 |
217464829 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.4222312002 |
|
|
Oct 15 06:14:19 AM UTC 24 |
Oct 15 06:14:37 AM UTC 24 |
639432471 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.4251693871 |
|
|
Oct 15 06:13:21 AM UTC 24 |
Oct 15 06:14:37 AM UTC 24 |
3204994647 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_intercept.2745656047 |
|
|
Oct 15 06:14:12 AM UTC 24 |
Oct 15 06:14:37 AM UTC 24 |
1247330633 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_upload.28488079 |
|
|
Oct 15 06:14:15 AM UTC 24 |
Oct 15 06:14:37 AM UTC 24 |
21999194653 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.2295684210 |
|
|
Oct 15 06:14:36 AM UTC 24 |
Oct 15 06:14:38 AM UTC 24 |
70032871 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_tpm_all.1860578277 |
|
|
Oct 15 06:14:06 AM UTC 24 |
Oct 15 06:14:40 AM UTC 24 |
7547739859 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_rw.4053106416 |
|
|
Oct 15 06:14:37 AM UTC 24 |
Oct 15 06:14:41 AM UTC 24 |
213489432 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.3216904460 |
|
|
Oct 15 06:14:37 AM UTC 24 |
Oct 15 06:14:45 AM UTC 24 |
3573042928 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.3589421031 |
|
|
Oct 15 06:07:55 AM UTC 24 |
Oct 15 06:14:45 AM UTC 24 |
109166461432 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_cfg_cmd.919809687 |
|
|
Oct 15 06:14:39 AM UTC 24 |
Oct 15 06:14:45 AM UTC 24 |
384215672 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.2384017067 |
|
|
Oct 15 06:14:33 AM UTC 24 |
Oct 15 06:14:47 AM UTC 24 |
16119845863 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.1096561051 |
|
|
Oct 15 06:13:59 AM UTC 24 |
Oct 15 06:14:49 AM UTC 24 |
2530853490 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_upload.26446044 |
|
|
Oct 15 06:14:39 AM UTC 24 |
Oct 15 06:14:52 AM UTC 24 |
4746223418 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.2571975967 |
|
|
Oct 15 06:12:34 AM UTC 24 |
Oct 15 06:14:52 AM UTC 24 |
46828198311 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.2360188834 |
|
|
Oct 15 06:14:46 AM UTC 24 |
Oct 15 06:14:53 AM UTC 24 |
518829603 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_mailbox.1781025149 |
|
|
Oct 15 06:14:39 AM UTC 24 |
Oct 15 06:14:54 AM UTC 24 |
1296821686 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_alert_test.1831588211 |
|
|
Oct 15 06:14:53 AM UTC 24 |
Oct 15 06:14:55 AM UTC 24 |
12809281 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_csb_read.3129261282 |
|
|
Oct 15 06:14:53 AM UTC 24 |
Oct 15 06:14:55 AM UTC 24 |
22734665 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/25.spi_device_stress_all.1212383067 |
|
|
Oct 15 06:10:35 AM UTC 24 |
Oct 15 06:14:56 AM UTC 24 |
19916815800 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_mode.521303791 |
|
|
Oct 15 06:14:42 AM UTC 24 |
Oct 15 06:14:56 AM UTC 24 |
890303156 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_intercept.1883664691 |
|
|
Oct 15 06:14:39 AM UTC 24 |
Oct 15 06:14:57 AM UTC 24 |
1111733907 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.1408073563 |
|
|
Oct 15 06:14:56 AM UTC 24 |
Oct 15 06:14:58 AM UTC 24 |
65286134 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_rw.2480373037 |
|
|
Oct 15 06:14:56 AM UTC 24 |
Oct 15 06:14:59 AM UTC 24 |
105774187 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.3361982967 |
|
|
Oct 15 06:14:37 AM UTC 24 |
Oct 15 06:15:03 AM UTC 24 |
33019933409 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_intercept.447031192 |
|
|
Oct 15 06:14:58 AM UTC 24 |
Oct 15 06:15:05 AM UTC 24 |
848500252 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_mailbox.1245058941 |
|
|
Oct 15 06:14:15 AM UTC 24 |
Oct 15 06:15:06 AM UTC 24 |
3332415698 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1152884061 |
|
|
Oct 15 06:15:04 AM UTC 24 |
Oct 15 06:15:08 AM UTC 24 |
586864295 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_upload.2951196211 |
|
|
Oct 15 06:14:59 AM UTC 24 |
Oct 15 06:15:09 AM UTC 24 |
1440243865 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.3803530743 |
|
|
Oct 15 06:14:58 AM UTC 24 |
Oct 15 06:15:09 AM UTC 24 |
585714123 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode_ignore_cmds.2850257570 |
|
|
Oct 15 06:15:07 AM UTC 24 |
Oct 15 06:15:10 AM UTC 24 |
145826152 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.3493437286 |
|
|
Oct 15 06:14:58 AM UTC 24 |
Oct 15 06:15:12 AM UTC 24 |
2985113881 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_tpm_all.3106166384 |
|
|
Oct 15 06:14:33 AM UTC 24 |
Oct 15 06:15:12 AM UTC 24 |
16005971023 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.2006969936 |
|
|
Oct 15 06:13:13 AM UTC 24 |
Oct 15 06:15:14 AM UTC 24 |
6626812691 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_stress_all.960253114 |
|
|
Oct 15 06:15:11 AM UTC 24 |
Oct 15 06:15:14 AM UTC 24 |
40758670 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.791098408 |
|
|
Oct 15 06:15:07 AM UTC 24 |
Oct 15 06:15:14 AM UTC 24 |
277407149 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_alert_test.923557555 |
|
|
Oct 15 06:15:13 AM UTC 24 |
Oct 15 06:15:15 AM UTC 24 |
13708535 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_mailbox.3642075547 |
|
|
Oct 15 06:14:59 AM UTC 24 |
Oct 15 06:15:15 AM UTC 24 |
755154051 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_csb_read.67409036 |
|
|
Oct 15 06:15:14 AM UTC 24 |
Oct 15 06:15:16 AM UTC 24 |
16892660 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_all.293536518 |
|
|
Oct 15 06:15:09 AM UTC 24 |
Oct 15 06:15:18 AM UTC 24 |
1175923228 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.3169964474 |
|
|
Oct 15 06:15:16 AM UTC 24 |
Oct 15 06:15:18 AM UTC 24 |
73896582 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_rw.1334600726 |
|
|
Oct 15 06:15:16 AM UTC 24 |
Oct 15 06:15:18 AM UTC 24 |
58867194 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_flash_mode.872952945 |
|
|
Oct 15 06:15:06 AM UTC 24 |
Oct 15 06:15:21 AM UTC 24 |
1121396679 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.500968176 |
|
|
Oct 15 06:15:17 AM UTC 24 |
Oct 15 06:15:21 AM UTC 24 |
3105335466 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1582995458 |
|
|
Oct 15 06:14:55 AM UTC 24 |
Oct 15 06:15:24 AM UTC 24 |
21719410424 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/29.spi_device_stress_all.3211958085 |
|
|
Oct 15 06:12:21 AM UTC 24 |
Oct 15 06:15:25 AM UTC 24 |
9244045956 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/38.spi_device_tpm_all.149042815 |
|
|
Oct 15 06:14:55 AM UTC 24 |
Oct 15 06:15:25 AM UTC 24 |
16237042313 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.2940421176 |
|
|
Oct 15 06:15:17 AM UTC 24 |
Oct 15 06:15:26 AM UTC 24 |
987605157 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_upload.1969429182 |
|
|
Oct 15 06:15:20 AM UTC 24 |
Oct 15 06:15:27 AM UTC 24 |
896284183 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.1104228392 |
|
|
Oct 15 06:15:15 AM UTC 24 |
Oct 15 06:15:32 AM UTC 24 |
2754083993 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_cfg_cmd.59208676 |
|
|
Oct 15 06:15:22 AM UTC 24 |
Oct 15 06:15:32 AM UTC 24 |
640036450 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.348302808 |
|
|
Oct 15 06:15:27 AM UTC 24 |
Oct 15 06:15:34 AM UTC 24 |
1197182829 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_mailbox.1395142155 |
|
|
Oct 15 06:15:20 AM UTC 24 |
Oct 15 06:15:34 AM UTC 24 |
1194294089 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_alert_test.3294940742 |
|
|
Oct 15 06:15:34 AM UTC 24 |
Oct 15 06:15:36 AM UTC 24 |
36471504 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_csb_read.2171994746 |
|
|
Oct 15 06:15:35 AM UTC 24 |
Oct 15 06:15:38 AM UTC 24 |
40898102 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/37.spi_device_flash_all.1288469374 |
|
|
Oct 15 06:14:46 AM UTC 24 |
Oct 15 06:15:38 AM UTC 24 |
2081131887 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_all.1774258302 |
|
|
Oct 15 06:15:27 AM UTC 24 |
Oct 15 06:15:39 AM UTC 24 |
305584709 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.1925858630 |
|
|
Oct 15 06:15:37 AM UTC 24 |
Oct 15 06:15:39 AM UTC 24 |
220257408 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/36.spi_device_flash_all.2285173250 |
|
|
Oct 15 06:14:21 AM UTC 24 |
Oct 15 06:15:40 AM UTC 24 |
6883364979 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_intercept.2034885892 |
|
|
Oct 15 06:15:20 AM UTC 24 |
Oct 15 06:15:41 AM UTC 24 |
1793093315 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_rw.3989490 |
|
|
Oct 15 06:15:39 AM UTC 24 |
Oct 15 06:15:41 AM UTC 24 |
207140804 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_mode.403237404 |
|
|
Oct 15 06:15:22 AM UTC 24 |
Oct 15 06:15:42 AM UTC 24 |
1797907009 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm.2913309962 |
|
|
Oct 15 06:13:24 AM UTC 24 |
Oct 15 06:15:42 AM UTC 24 |
32460321862 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_all.2913863351 |
|
|
Oct 15 06:13:39 AM UTC 24 |
Oct 15 06:15:44 AM UTC 24 |
14730718692 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.695412992 |
|
|
Oct 15 06:15:35 AM UTC 24 |
Oct 15 06:15:46 AM UTC 24 |
1405493733 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_intercept.1437178289 |
|
|
Oct 15 06:15:40 AM UTC 24 |
Oct 15 06:15:47 AM UTC 24 |
574638333 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_upload.2622024550 |
|
|
Oct 15 06:15:42 AM UTC 24 |
Oct 15 06:15:47 AM UTC 24 |
233807626 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.4015002546 |
|
|
Oct 15 06:15:39 AM UTC 24 |
Oct 15 06:15:47 AM UTC 24 |
298177652 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_cfg_cmd.320056381 |
|
|
Oct 15 06:15:42 AM UTC 24 |
Oct 15 06:15:48 AM UTC 24 |
157659191 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_flash_mode.2203254174 |
|
|
Oct 15 06:15:44 AM UTC 24 |
Oct 15 06:15:48 AM UTC 24 |
34538476 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/35.spi_device_stress_all.2877104222 |
|
|
Oct 15 06:14:01 AM UTC 24 |
Oct 15 06:15:48 AM UTC 24 |
13425204544 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_flash_and_tpm.2254192684 |
|
|
Oct 15 06:15:27 AM UTC 24 |
Oct 15 06:15:50 AM UTC 24 |
3957342405 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_alert_test.2692373627 |
|
|
Oct 15 06:15:49 AM UTC 24 |
Oct 15 06:15:51 AM UTC 24 |
11926593 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.3518694694 |
|
|
Oct 15 06:13:38 AM UTC 24 |
Oct 15 06:15:51 AM UTC 24 |
85607014332 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_csb_read.3926574831 |
|
|
Oct 15 06:15:49 AM UTC 24 |
Oct 15 06:15:51 AM UTC 24 |
35956651 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/33.spi_device_flash_and_tpm_min_idle.132833647 |
|
|
Oct 15 06:13:25 AM UTC 24 |
Oct 15 06:15:51 AM UTC 24 |
10916606692 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/39.spi_device_tpm_all.1747798974 |
|
|
Oct 15 06:15:15 AM UTC 24 |
Oct 15 06:15:53 AM UTC 24 |
5181340482 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.1417536524 |
|
|
Oct 15 06:15:52 AM UTC 24 |
Oct 15 06:15:55 AM UTC 24 |
113925875 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_tpm_rw.3824731591 |
|
|
Oct 15 06:15:52 AM UTC 24 |
Oct 15 06:15:55 AM UTC 24 |
222081068 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_pass_cmd_filtering.543560178 |
|
|
Oct 15 06:15:52 AM UTC 24 |
Oct 15 06:15:57 AM UTC 24 |
100208048 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.2607562414 |
|
|
Oct 15 06:15:45 AM UTC 24 |
Oct 15 06:15:57 AM UTC 24 |
1090968403 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.1857600251 |
|
|
Oct 15 06:15:40 AM UTC 24 |
Oct 15 06:15:58 AM UTC 24 |
8211984528 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/41.spi_device_upload.2505451586 |
|
|
Oct 15 06:15:56 AM UTC 24 |
Oct 15 06:16:01 AM UTC 24 |
461967645 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_10_14/spi_device_1r1w-sim-vcs/coverage/default/40.spi_device_mailbox.1021325951 |
|
|
Oct 15 06:15:42 AM UTC 24 |
Oct 15 06:16:01 AM UTC 24 |
3980207012 ps |