Unified Coverage Report :: Module :: spi_device_csr_assert_fpv

Module : spi_device_csr_assert_fpv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Source File(s) :
/workspaces/repo/scratch/os_regression/spi_device_1r1w-sim-vcs/default/sim-vcs/../src/lowrisc_fpv_spi_device_csr_assert_0/spi_device_csr_assert_fpv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.spi_device_csr_assert	100.00						100.00

---

Module Instance : tb.dut.spi_device_csr_assert

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
100.00						100.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.52	95.20	84.31	97.00		90.62	95.45	dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Assert Coverage for Module : spi_device_csr_assert_fpv

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	58	58	100.00	58	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	58	58	100.00	58	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
TlulOOBAddrErr_A	487100895	3290	0	0
addr_swap_data_rd_A	487100895	1133	0	0
addr_swap_mask_rd_A	487100895	1142	0	0
cfg_rd_A	487100895	1600	0	0
cmd_filter_0_rd_A	487100895	8695	0	0
cmd_filter_1_rd_A	487100895	8682	0	0
cmd_filter_2_rd_A	487100895	7930	0	0
cmd_filter_3_rd_A	487100895	8792	0	0
cmd_filter_4_rd_A	487100895	8671	0	0
cmd_filter_5_rd_A	487100895	7737	0	0
cmd_filter_6_rd_A	487100895	9036	0	0
cmd_filter_7_rd_A	487100895	8129	0	0
cmd_info_0_rd_A	487100895	3801	0	0
cmd_info_10_rd_A	487100895	3574	0	0
cmd_info_11_rd_A	487100895	3885	0	0
cmd_info_12_rd_A	487100895	3838	0	0
cmd_info_13_rd_A	487100895	3523	0	0
cmd_info_14_rd_A	487100895	4259	0	0
cmd_info_15_rd_A	487100895	4011	0	0
cmd_info_16_rd_A	487100895	3954	0	0
cmd_info_17_rd_A	487100895	4134	0	0
cmd_info_18_rd_A	487100895	3967	0	0
cmd_info_19_rd_A	487100895	3924	0	0
cmd_info_1_rd_A	487100895	3937	0	0
cmd_info_20_rd_A	487100895	3700	0	0
cmd_info_21_rd_A	487100895	4184	0	0
cmd_info_22_rd_A	487100895	4212	0	0
cmd_info_23_rd_A	487100895	3778	0	0
cmd_info_2_rd_A	487100895	3986	0	0
cmd_info_3_rd_A	487100895	3931	0	0
cmd_info_4_rd_A	487100895	3766	0	0
cmd_info_5_rd_A	487100895	4087	0	0
cmd_info_6_rd_A	487100895	3697	0	0
cmd_info_7_rd_A	487100895	4202	0	0
cmd_info_8_rd_A	487100895	3661	0	0
cmd_info_9_rd_A	487100895	3837	0	0
cmd_info_en4b_rd_A	487100895	1428	0	0
cmd_info_ex4b_rd_A	487100895	1320	0	0
cmd_info_wrdi_rd_A	487100895	1259	0	0
cmd_info_wren_rd_A	487100895	1233	0	0
intercept_en_rd_A	487100895	1796	0	0
intr_enable_rd_A	487100895	3519	0	0
jedec_cc_rd_A	487100895	1266	0	0
jedec_id_rd_A	487100895	1222	0	0
mailbox_addr_rd_A	487100895	1134	0	0
payload_swap_data_rd_A	487100895	1044	0	0
payload_swap_mask_rd_A	487100895	1098	0	0
read_threshold_rd_A	487100895	1023	0	0
tpm_access_0_rd_A	487100895	1780	0	0
tpm_access_1_rd_A	487100895	1116	0	0
tpm_cfg_rd_A	487100895	2209	0	0
tpm_did_vid_rd_A	487100895	1282	0	0
tpm_int_enable_rd_A	487100895	1004	0	0
tpm_int_status_rd_A	487100895	1039	0	0
tpm_int_vector_rd_A	487100895	1056	0	0
tpm_intf_capability_rd_A	487100895	1107	0	0
tpm_rid_rd_A	487100895	1079	0	0
tpm_sts_rd_A	487100895	1067	0	0

TlulOOBAddrErr_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3290	0	0
T98	19546	185	0	0
T100	13469	3	0	0
T123	3140	136	0	0
T124	12085	5	0	0
T125	6706	251	0	0
T126	31830	1	0	0
T127	28879	3	0	0
T134	4878	177	0	0
T143	3955	4	0	0
T144	8145	7	0	0

addr_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1133	0	0
T99	35204	29	0	0
T109	4985	11	0	0
T126	31830	10	0	0
T150	10409	12	0	0
T151	38795	231	0	0
T153	90680	236	0	0
T167	3950	1	0	0
T168	6042	25	0	0
T175	7092	13	0	0
T176	4514	4	0	0

addr_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1142	0	0
T99	35204	45	0	0
T109	4985	3	0	0
T126	31830	37	0	0
T140	17129	28	0	0
T150	10409	4	0	0
T151	38795	321	0	0
T153	90680	210	0	0
T167	3950	6	0	0
T175	7092	12	0	0
T177	8473	7	0	0

cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1600	0	0
T99	35204	69	0	0
T109	4985	15	0	0
T126	31830	32	0	0
T150	10409	45	0	0
T151	38795	208	0	0
T153	90680	258	0	0
T167	3950	1	0	0
T168	6042	6	0	0
T175	7092	22	0	0
T176	4514	2	0	0

cmd_filter_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	8695	0	0
T99	35204	829	0	0
T109	4985	1	0	0
T126	31830	507	0	0
T150	10409	14	0	0
T151	38795	222	0	0
T153	90680	236	0	0
T167	3950	4	0	0
T168	6042	4	0	0
T175	7092	24	0	0
T176	4514	64	0	0

cmd_filter_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	8682	0	0
T99	35204	638	0	0
T109	4985	7	0	0
T126	31830	292	0	0
T140	17129	399	0	0
T150	10409	264	0	0
T151	38795	216	0	0
T153	90680	232	0	0
T167	3950	156	0	0
T168	6042	9	0	0
T175	7092	17	0	0

cmd_filter_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	7930	0	0
T99	35204	544	0	0
T109	4985	15	0	0
T126	31830	445	0	0
T150	10409	122	0	0
T151	38795	191	0	0
T153	90680	207	0	0
T167	3950	5	0	0
T168	6042	21	0	0
T175	7092	26	0	0
T176	4514	83	0	0

cmd_filter_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	8792	0	0
T99	35204	594	0	0
T109	4985	20	0	0
T126	31830	403	0	0
T140	17129	163	0	0
T150	10409	255	0	0
T151	38795	201	0	0
T153	90680	226	0	0
T167	3950	8	0	0
T168	6042	3	0	0
T175	7092	24	0	0

cmd_filter_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	8671	0	0
T98	19546	1	0	0
T99	35204	629	0	0
T109	4985	19	0	0
T126	31830	396	0	0
T150	10409	254	0	0
T151	38795	209	0	0
T153	90680	266	0	0
T167	3950	118	0	0
T168	6042	5	0	0
T175	7092	5	0	0

cmd_filter_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	7737	0	0
T99	35204	464	0	0
T109	4985	13	0	0
T126	31830	395	0	0
T140	17129	273	0	0
T150	10409	229	0	0
T151	38795	262	0	0
T153	90680	188	0	0
T167	3950	2	0	0
T168	6042	14	0	0
T176	4514	65	0	0

cmd_filter_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	9036	0	0
T99	35204	300	0	0
T109	4985	16	0	0
T126	31830	367	0	0
T150	10409	149	0	0
T151	38795	242	0	0
T153	90680	237	0	0
T167	3950	1	0	0
T168	6042	13	0	0
T175	7092	10	0	0
T176	4514	70	0	0

cmd_filter_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	8129	0	0
T99	35204	606	0	0
T109	4985	5	0	0
T126	31830	244	0	0
T140	17129	168	0	0
T150	10409	256	0	0
T151	38795	232	0	0
T153	90680	246	0	0
T168	6042	11	0	0
T175	7092	25	0	0
T176	4514	6	0	0

cmd_info_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3801	0	0
T99	35204	170	0	0
T109	4985	17	0	0
T126	31830	167	0	0
T150	10409	68	0	0
T151	38795	232	0	0
T153	90680	237	0	0
T167	3950	7	0	0
T168	6042	1	0	0
T175	7092	21	0	0
T176	4514	13	0	0

cmd_info_10_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3574	0	0
T99	35204	122	0	0
T109	4985	12	0	0
T126	31830	126	0	0
T150	10409	60	0	0
T151	38795	218	0	0
T153	90680	223	0	0
T167	3950	3	0	0
T168	6042	3	0	0
T175	7092	12	0	0
T176	4514	23	0	0

cmd_info_11_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3885	0	0
T99	35204	195	0	0
T109	4985	21	0	0
T126	31830	189	0	0
T140	17129	86	0	0
T150	10409	101	0	0
T151	38795	257	0	0
T153	90680	225	0	0
T167	3950	1	0	0
T168	6042	7	0	0
T175	7092	14	0	0

cmd_info_12_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3838	0	0
T99	35204	214	0	0
T109	4985	15	0	0
T126	31830	239	0	0
T150	10409	80	0	0
T151	38795	263	0	0
T153	90680	239	0	0
T167	3950	43	0	0
T168	6042	20	0	0
T175	7092	17	0	0
T176	4514	8	0	0

cmd_info_13_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3523	0	0
T99	35204	118	0	0
T109	4985	8	0	0
T126	31830	110	0	0
T150	10409	99	0	0
T151	38795	197	0	0
T153	90680	255	0	0
T167	3950	52	0	0
T168	6042	1	0	0
T175	7092	8	0	0
T176	4514	26	0	0

cmd_info_14_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4259	0	0
T99	35204	363	0	0
T109	4985	7	0	0
T126	31830	142	0	0
T150	10409	5	0	0
T151	38795	248	0	0
T153	90680	251	0	0
T167	3950	3	0	0
T168	6042	9	0	0
T175	7092	9	0	0
T176	4514	17	0	0

cmd_info_15_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4011	0	0
T99	35204	132	0	0
T109	4985	15	0	0
T126	31830	140	0	0
T150	10409	48	0	0
T151	38795	203	0	0
T153	90680	257	0	0
T167	3950	1	0	0
T168	6042	1	0	0
T175	7092	8	0	0
T176	4514	5	0	0

cmd_info_16_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3954	0	0
T99	35204	243	0	0
T109	4985	6	0	0
T126	31830	128	0	0
T150	10409	5	0	0
T151	38795	338	0	0
T153	90680	229	0	0
T167	3950	46	0	0
T168	6042	27	0	0
T175	7092	21	0	0
T176	4514	34	0	0

cmd_info_17_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4134	0	0
T99	35204	183	0	0
T109	4985	9	0	0
T126	31830	111	0	0
T140	17129	93	0	0
T150	10409	86	0	0
T151	38795	242	0	0
T153	90680	189	0	0
T167	3950	55	0	0
T168	6042	5	0	0
T175	7092	9	0	0

cmd_info_18_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3967	0	0
T99	35204	245	0	0
T109	4985	18	0	0
T126	31830	127	0	0
T140	17129	15	0	0
T150	10409	181	0	0
T151	38795	201	0	0
T153	90680	207	0	0
T167	3950	62	0	0
T168	6042	7	0	0
T176	4514	28	0	0

cmd_info_19_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3924	0	0
T99	35204	379	0	0
T109	4985	17	0	0
T126	31830	135	0	0
T137	12534	1	0	0
T150	10409	139	0	0
T151	38795	240	0	0
T153	90680	227	0	0
T167	3950	6	0	0
T168	6042	16	0	0
T175	7092	15	0	0

cmd_info_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3937	0	0
T98	19546	4	0	0
T99	35204	244	0	0
T109	4985	8	0	0
T126	31830	197	0	0
T150	10409	102	0	0
T151	38795	278	0	0
T153	90680	230	0	0
T167	3950	59	0	0
T168	6042	5	0	0
T175	7092	2	0	0

cmd_info_20_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3700	0	0
T99	35204	269	0	0
T109	4985	9	0	0
T126	31830	174	0	0
T150	10409	57	0	0
T151	38795	243	0	0
T153	90680	186	0	0
T167	3950	48	0	0
T168	6042	8	0	0
T175	7092	15	0	0
T176	4514	25	0	0

cmd_info_21_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4184	0	0
T99	35204	354	0	0
T109	4985	15	0	0
T126	31830	124	0	0
T150	10409	66	0	0
T151	38795	262	0	0
T153	90680	222	0	0
T167	3950	5	0	0
T168	6042	10	0	0
T175	7092	6	0	0
T176	4514	21	0	0

cmd_info_22_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4212	0	0
T99	35204	189	0	0
T109	4985	5	0	0
T126	31830	158	0	0
T140	17129	129	0	0
T150	10409	108	0	0
T151	38795	217	0	0
T153	90680	207	0	0
T167	3950	1	0	0
T168	6042	18	0	0
T175	7092	12	0	0

cmd_info_23_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3778	0	0
T99	35204	287	0	0
T109	4985	10	0	0
T126	31830	168	0	0
T150	10409	59	0	0
T151	38795	242	0	0
T153	90680	214	0	0
T167	3950	35	0	0
T168	6042	10	0	0
T175	7092	31	0	0
T176	4514	33	0	0

cmd_info_2_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3986	0	0
T99	35204	250	0	0
T109	4985	22	0	0
T126	31830	130	0	0
T150	10409	145	0	0
T151	38795	256	0	0
T153	90680	231	0	0
T167	3950	7	0	0
T168	6042	23	0	0
T175	7092	3	0	0
T176	4514	22	0	0

cmd_info_3_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3931	0	0
T99	35204	431	0	0
T109	4985	8	0	0
T126	31830	101	0	0
T140	17129	55	0	0
T150	10409	53	0	0
T151	38795	224	0	0
T153	90680	233	0	0
T167	3950	59	0	0
T175	7092	3	0	0
T176	4514	2	0	0

cmd_info_4_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3766	0	0
T99	35204	273	0	0
T109	4985	8	0	0
T126	31830	153	0	0
T150	10409	56	0	0
T151	38795	205	0	0
T153	90680	209	0	0
T167	3950	54	0	0
T168	6042	6	0	0
T175	7092	22	0	0
T176	4514	27	0	0

cmd_info_5_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4087	0	0
T99	35204	348	0	0
T109	4985	7	0	0
T126	31830	84	0	0
T140	17129	107	0	0
T150	10409	85	0	0
T151	38795	274	0	0
T153	90680	208	0	0
T168	6042	5	0	0
T175	7092	4	0	0
T177	8473	105	0	0

cmd_info_6_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3697	0	0
T99	35204	355	0	0
T109	4985	10	0	0
T126	31830	206	0	0
T150	10409	103	0	0
T151	38795	193	0	0
T153	90680	277	0	0
T167	3950	50	0	0
T168	6042	1	0	0
T175	7092	31	0	0
T176	4514	28	0	0

cmd_info_7_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	4202	0	0
T99	35204	421	0	0
T109	4985	8	0	0
T126	31830	138	0	0
T150	10409	8	0	0
T151	38795	275	0	0
T153	90680	226	0	0
T167	3950	10	0	0
T168	6042	5	0	0
T175	7092	17	0	0
T176	4514	2	0	0

cmd_info_8_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3661	0	0
T99	35204	281	0	0
T109	4985	6	0	0
T126	31830	126	0	0
T150	10409	66	0	0
T151	38795	234	0	0
T153	90680	210	0	0
T167	3950	2	0	0
T168	6042	21	0	0
T175	7092	5	0	0
T176	4514	33	0	0

cmd_info_9_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3837	0	0
T99	35204	283	0	0
T109	4985	11	0	0
T126	31830	126	0	0
T150	10409	73	0	0
T151	38795	235	0	0
T153	90680	252	0	0
T167	3950	46	0	0
T168	6042	8	0	0
T175	7092	22	0	0
T176	4514	31	0	0

cmd_info_en4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1428	0	0
T99	35204	72	0	0
T109	4985	5	0	0
T126	31830	31	0	0
T150	10409	12	0	0
T151	38795	278	0	0
T153	90680	197	0	0
T167	3950	8	0	0
T168	6042	6	0	0
T175	7092	23	0	0
T176	4514	5	0	0

cmd_info_ex4b_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1320	0	0
T99	35204	74	0	0
T109	4985	9	0	0
T126	31830	21	0	0
T150	10409	19	0	0
T151	38795	242	0	0
T153	90680	200	0	0
T167	3950	10	0	0
T168	6042	6	0	0
T175	7092	10	0	0
T176	4514	8	0	0

cmd_info_wrdi_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1259	0	0
T99	35204	64	0	0
T109	4985	7	0	0
T126	31830	37	0	0
T150	10409	19	0	0
T151	38795	244	0	0
T153	90680	203	0	0
T167	3950	10	0	0
T168	6042	4	0	0
T175	7092	13	0	0
T176	4514	2	0	0

cmd_info_wren_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1233	0	0
T99	35204	82	0	0
T109	4985	4	0	0
T126	31830	36	0	0
T140	17129	12	0	0
T150	10409	8	0	0
T151	38795	245	0	0
T153	90680	237	0	0
T167	3950	6	0	0
T168	6042	21	0	0
T176	4514	1	0	0

intercept_en_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1796	0	0
T99	35204	100	0	0
T109	4985	8	0	0
T126	31830	55	0	0
T150	10409	16	0	0
T151	38795	246	0	0
T153	90680	239	0	0
T167	3950	4	0	0
T168	6042	3	0	0
T175	7092	10	0	0
T176	4514	7	0	0

intr_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	3519	0	0
T38	107061	14	0	0
T39	3774	0	0	0
T45	0	10	0	0
T102	0	61	0	0
T156	741685	0	0	0
T157	8302	0	0	0
T158	42364	0	0	0
T159	38603	0	0	0
T160	21697	0	0	0
T161	805416	0	0	0
T162	108200	0	0	0
T178	0	17	0	0
T179	0	4	0	0
T180	0	24	0	0
T181	0	49	0	0
T182	0	33	0	0
T183	0	72	0	0
T184	0	14	0	0
T185	1649	0	0	0

jedec_cc_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1266	0	0
T99	35204	59	0	0
T109	4985	13	0	0
T126	31830	27	0	0
T150	10409	19	0	0
T151	38795	260	0	0
T153	90680	216	0	0
T167	3950	6	0	0
T168	6042	43	0	0
T175	7092	6	0	0
T176	4514	2	0	0

jedec_id_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1222	0	0
T99	35204	47	0	0
T109	4985	9	0	0
T126	31830	21	0	0
T150	10409	13	0	0
T151	38795	249	0	0
T153	90680	196	0	0
T167	3950	5	0	0
T168	6042	4	0	0
T175	7092	13	0	0
T176	4514	5	0	0

mailbox_addr_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1134	0	0
T99	35204	44	0	0
T109	4985	10	0	0
T126	31830	23	0	0
T140	17129	29	0	0
T150	10409	8	0	0
T151	38795	229	0	0
T153	90680	240	0	0
T167	3950	9	0	0
T168	6042	26	0	0
T175	7092	15	0	0

payload_swap_data_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1044	0	0
T98	19546	7	0	0
T99	35204	34	0	0
T109	4985	16	0	0
T126	31830	19	0	0
T150	10409	1	0	0
T151	38795	238	0	0
T153	90680	213	0	0
T167	3950	7	0	0
T168	6042	3	0	0
T175	7092	21	0	0

payload_swap_mask_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1098	0	0
T99	35204	45	0	0
T109	4985	4	0	0
T126	31830	14	0	0
T140	17129	30	0	0
T150	10409	16	0	0
T151	38795	223	0	0
T153	90680	206	0	0
T168	6042	31	0	0
T176	4514	3	0	0
T177	8473	7	0	0

read_threshold_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1023	0	0
T99	35204	37	0	0
T109	4985	8	0	0
T126	31830	33	0	0
T140	17129	23	0	0
T150	10409	7	0	0
T151	38795	205	0	0
T153	90680	238	0	0
T167	3950	3	0	0
T168	6042	1	0	0
T175	7092	10	0	0

tpm_access_0_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1780	0	0
T99	35204	106	0	0
T109	4985	10	0	0
T126	31830	70	0	0
T150	10409	7	0	0
T151	38795	256	0	0
T153	90680	282	0	0
T167	3950	6	0	0
T168	6042	2	0	0
T175	7092	4	0	0
T176	4514	13	0	0

tpm_access_1_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1116	0	0
T99	35204	41	0	0
T109	4985	13	0	0
T126	31830	41	0	0
T140	17129	15	0	0
T150	10409	16	0	0
T151	38795	238	0	0
T153	90680	214	0	0
T167	3950	5	0	0
T168	6042	9	0	0
T177	8473	11	0	0

tpm_cfg_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	2209	0	0
T99	35204	107	0	0
T109	4985	15	0	0
T126	31830	39	0	0
T150	10409	50	0	0
T151	38795	248	0	0
T153	90680	200	0	0
T167	3950	2	0	0
T168	6042	13	0	0
T175	7092	23	0	0
T176	4514	15	0	0

tpm_did_vid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1282	0	0
T99	35204	45	0	0
T109	4985	3	0	0
T126	31830	22	0	0
T140	17129	24	0	0
T150	10409	24	0	0
T151	38795	251	0	0
T153	90680	228	0	0
T167	3950	9	0	0
T168	6042	17	0	0
T176	4514	2	0	0

tpm_int_enable_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1004	0	0
T99	35204	24	0	0
T109	4985	6	0	0
T126	31830	26	0	0
T140	17129	19	0	0
T150	10409	18	0	0
T151	38795	216	0	0
T153	90680	227	0	0
T167	3950	4	0	0
T168	6042	11	0	0
T175	7092	7	0	0

tpm_int_status_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1039	0	0
T99	35204	37	0	0
T109	4985	5	0	0
T126	31830	29	0	0
T140	17129	16	0	0
T150	10409	10	0	0
T151	38795	209	0	0
T153	90680	196	0	0
T167	3950	5	0	0
T168	6042	3	0	0
T175	7092	33	0	0

tpm_int_vector_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1056	0	0
T99	35204	47	0	0
T109	4985	9	0	0
T126	31830	23	0	0
T140	17129	24	0	0
T150	10409	9	0	0
T151	38795	189	0	0
T153	90680	236	0	0
T167	3950	8	0	0
T175	7092	17	0	0
T176	4514	9	0	0

tpm_intf_capability_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1107	0	0
T99	35204	32	0	0
T109	4985	15	0	0
T126	31830	19	0	0
T150	10409	5	0	0
T151	38795	248	0	0
T153	90680	208	0	0
T167	3950	2	0	0
T168	6042	14	0	0
T175	7092	30	0	0
T176	4514	1	0	0

tpm_rid_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1079	0	0
T99	35204	21	0	0
T109	4985	8	0	0
T126	31830	40	0	0
T150	10409	5	0	0
T151	38795	225	0	0
T153	90680	180	0	0
T167	3950	7	0	0
T168	6042	11	0	0
T175	7092	11	0	0
T176	4514	3	0	0

tpm_sts_rd_A

Name	Attempts	Real Successes	Failures	Incomplete
Total	487100895	1067	0	0
T99	35204	27	0	0
T109	4985	6	0	0
T126	31830	28	0	0
T140	17129	24	0	0
T150	10409	12	0	0
T151	38795	220	0	0
T153	90680	235	0	0
T167	3950	5	0	0
T168	6042	12	0	0
T175	7092	27	0	0