Total Coverage Summary 

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
95.95	98.37	94.16	98.61	89.36	97.10	95.82	98.22

Total tests in report: 1113

---

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
81.59	81.59	97.72	97.72	90.17	90.17	71.23	71.23	84.44	84.44	96.09	96.09	85.01	85.01	46.44	46.44	/workspace/coverage/default/8.spi_device_stress_all.1994456391
89.30	7.72	98.06	0.34	92.34	2.17	91.67	20.44	93.33	8.89	96.61	0.53	85.30	0.29	67.80	21.36	/workspace/coverage/default/29.spi_device_stress_all.2090522790
91.00	1.69	98.08	0.02	92.53	0.19	92.66	0.99	93.33	0.00	96.65	0.03	93.95	8.65	69.78	1.98	/workspace/coverage/cover_reg_top/2.spi_device_tl_intg_err.652126708
92.44	1.45	98.08	0.00	92.55	0.02	92.66	0.00	93.33	0.00	96.66	0.02	93.95	0.00	79.87	10.09	/workspace/coverage/default/18.spi_device_stress_all.2391496562
93.09	0.64	98.08	0.00	92.55	0.00	92.66	0.00	93.33	0.00	96.66	0.00	93.95	0.00	84.37	4.50	/workspace/coverage/default/38.spi_device_stress_all.1872012678
93.66	0.57	98.09	0.01	92.55	0.00	96.63	3.97	93.33	0.00	96.66	0.00	93.95	0.00	84.37	0.00	/workspace/coverage/default/0.spi_device_ram_cfg.2340151203
94.07	0.41	98.12	0.03	92.68	0.12	96.83	0.20	93.33	0.00	96.73	0.07	93.95	0.00	86.84	2.47	/workspace/coverage/default/9.spi_device_flash_and_tpm.1168904305
94.38	0.31	98.15	0.03	92.70	0.02	96.83	0.00	93.33	0.00	96.78	0.05	93.95	0.00	88.92	2.08	/workspace/coverage/default/10.spi_device_flash_all.302083674
94.61	0.23	98.15	0.00	93.36	0.66	96.83	0.00	93.33	0.00	96.82	0.03	94.09	0.14	89.71	0.79	/workspace/coverage/cover_reg_top/15.spi_device_tl_errors.1555024899
94.84	0.23	98.15	0.00	93.39	0.02	98.02	1.19	93.33	0.00	96.82	0.00	94.24	0.14	89.96	0.25	/workspace/coverage/default/2.spi_device_sec_cm.3190979072
95.05	0.21	98.26	0.11	93.73	0.34	98.02	0.00	93.33	0.00	96.97	0.15	94.81	0.58	90.26	0.30	/workspace/coverage/default/12.spi_device_flash_mode.3324134441
95.24	0.19	98.26	0.00	93.73	0.00	98.02	0.00	93.33	0.00	96.97	0.00	94.81	0.00	91.59	1.34	/workspace/coverage/default/37.spi_device_stress_all.150463184
95.41	0.16	98.26	0.00	93.73	0.00	98.02	0.00	93.33	0.00	96.97	0.00	94.81	0.00	92.73	1.14	/workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.2991356850
95.55	0.15	98.26	0.00	93.73	0.00	98.02	0.00	93.33	0.00	96.97	0.00	94.96	0.14	93.62	0.89	/workspace/coverage/default/43.spi_device_stress_all.1848914165
95.68	0.12	98.26	0.00	93.73	0.00	98.02	0.00	93.33	0.00	96.97	0.00	95.82	0.86	93.62	0.00	/workspace/coverage/cover_reg_top/0.spi_device_csr_bit_bash.358243535
95.79	0.11	98.26	0.00	93.73	0.00	98.02	0.00	93.33	0.00	96.97	0.00	95.82	0.00	94.41	0.79	/workspace/coverage/default/49.spi_device_flash_all.2857978649
95.88	0.09	98.31	0.06	93.81	0.09	98.41	0.40	93.33	0.00	97.05	0.08	95.82	0.00	94.41	0.00	/workspace/coverage/default/1.spi_device_mem_parity.109142326
95.96	0.08	98.31	0.00	93.81	0.00	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	95.00	0.59	/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.1526822421
96.02	0.06	98.31	0.00	93.81	0.00	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	95.40	0.40	/workspace/coverage/default/18.spi_device_flash_and_tpm_min_idle.2341281730
96.08	0.06	98.31	0.00	93.81	0.00	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	95.80	0.40	/workspace/coverage/default/20.spi_device_stress_all.2866153481
96.12	0.04	98.31	0.00	93.81	0.00	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	96.09	0.30	/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.384414086
96.16	0.04	98.31	0.00	93.81	0.00	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	96.39	0.30	/workspace/coverage/default/22.spi_device_stress_all.3591878609
96.20	0.04	98.31	0.00	93.81	0.00	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	96.69	0.30	/workspace/coverage/default/6.spi_device_flash_all.1661973591
96.24	0.04	98.31	0.00	94.04	0.22	98.41	0.00	93.33	0.00	97.05	0.00	95.82	0.00	96.74	0.05	/workspace/coverage/cover_reg_top/11.spi_device_tl_errors.2979051701
96.28	0.04	98.34	0.03	94.08	0.04	98.61	0.20	93.33	0.00	97.05	0.00	95.82	0.00	96.74	0.00	/workspace/coverage/default/16.spi_device_alert_test.1340529694
96.31	0.03	98.34	0.00	94.08	0.00	98.61	0.00	93.33	0.00	97.05	0.00	95.82	0.00	96.93	0.20	/workspace/coverage/cover_reg_top/3.spi_device_tl_intg_err.2411983334
96.34	0.03	98.34	0.00	94.08	0.00	98.61	0.00	93.33	0.00	97.05	0.00	95.82	0.00	97.13	0.20	/workspace/coverage/default/19.spi_device_flash_and_tpm.915921716
96.37	0.03	98.34	0.00	94.08	0.00	98.61	0.00	93.33	0.00	97.05	0.00	95.82	0.00	97.33	0.20	/workspace/coverage/default/33.spi_device_stress_all.2644151529
96.39	0.02	98.34	0.00	94.08	0.00	98.61	0.00	93.33	0.00	97.05	0.00	95.82	0.00	97.48	0.15	/workspace/coverage/default/42.spi_device_flash_mode.3196236983
96.41	0.02	98.35	0.01	94.09	0.01	98.61	0.00	93.33	0.00	97.07	0.02	95.82	0.00	97.58	0.10	/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.1317357079
96.42	0.01	98.35	0.00	94.09	0.00	98.61	0.00	93.33	0.00	97.07	0.00	95.82	0.00	97.68	0.10	/workspace/coverage/cover_reg_top/0.spi_device_tl_intg_err.3434357787
96.44	0.01	98.35	0.00	94.09	0.00	98.61	0.00	93.33	0.00	97.07	0.00	95.82	0.00	97.77	0.10	/workspace/coverage/default/21.spi_device_flash_and_tpm.1616460455
96.45	0.01	98.35	0.00	94.09	0.00	98.61	0.00	93.33	0.00	97.07	0.00	95.82	0.00	97.87	0.10	/workspace/coverage/default/24.spi_device_flash_and_tpm.352626425
96.46	0.01	98.35	0.00	94.09	0.00	98.61	0.00	93.33	0.00	97.07	0.00	95.82	0.00	97.97	0.10	/workspace/coverage/default/31.spi_device_flash_and_tpm.140630312
96.47	0.01	98.36	0.01	94.09	0.00	98.61	0.00	93.33	0.00	97.09	0.02	95.82	0.00	98.02	0.05	/workspace/coverage/default/32.spi_device_stress_all.554411691
96.49	0.01	98.36	0.00	94.11	0.02	98.61	0.00	93.33	0.00	97.09	0.00	95.82	0.00	98.07	0.05	/workspace/coverage/default/33.spi_device_flash_and_tpm.2076103704
96.49	0.01	98.36	0.00	94.11	0.00	98.61	0.00	93.33	0.00	97.09	0.00	95.82	0.00	98.12	0.05	/workspace/coverage/default/23.spi_device_flash_and_tpm.1720224948
96.50	0.01	98.36	0.00	94.11	0.00	98.61	0.00	93.33	0.00	97.09	0.00	95.82	0.00	98.17	0.05	/workspace/coverage/default/29.spi_device_flash_all.601374180
96.51	0.01	98.36	0.00	94.11	0.00	98.61	0.00	93.33	0.00	97.09	0.00	95.82	0.00	98.22	0.05	/workspace/coverage/default/48.spi_device_flash_and_tpm.3663290430
96.51	0.01	98.37	0.01	94.11	0.00	98.61	0.00	93.33	0.00	97.10	0.02	95.82	0.00	98.22	0.00	/workspace/coverage/default/27.spi_device_read_buffer_direct.2277875527
96.51	0.01	98.37	0.00	94.14	0.02	98.61	0.00	93.33	0.00	97.10	0.00	95.82	0.00	98.22	0.00	/workspace/coverage/cover_reg_top/0.spi_device_csr_hw_reset.14534450
96.52	0.01	98.37	0.00	94.16	0.02	98.61	0.00	93.33	0.00	97.10	0.00	95.82	0.00	98.22	0.00	/workspace/coverage/cover_reg_top/16.spi_device_tl_errors.1716818994

---

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.spi_device_csr_aliasing.3933613427
/workspace/coverage/cover_reg_top/0.spi_device_csr_mem_rw_with_rand_reset.1188485618
/workspace/coverage/cover_reg_top/0.spi_device_csr_rw.2908460885
/workspace/coverage/cover_reg_top/0.spi_device_intr_test.2231477577
/workspace/coverage/cover_reg_top/0.spi_device_mem_partial_access.4235287375
/workspace/coverage/cover_reg_top/0.spi_device_mem_walk.1841884379
/workspace/coverage/cover_reg_top/0.spi_device_same_csr_outstanding.2496311459
/workspace/coverage/cover_reg_top/0.spi_device_tl_errors.547133502
/workspace/coverage/cover_reg_top/1.spi_device_csr_aliasing.910034165
/workspace/coverage/cover_reg_top/1.spi_device_csr_bit_bash.861964259
/workspace/coverage/cover_reg_top/1.spi_device_csr_hw_reset.1064484568
/workspace/coverage/cover_reg_top/1.spi_device_csr_mem_rw_with_rand_reset.2684349122
/workspace/coverage/cover_reg_top/1.spi_device_csr_rw.210160990
/workspace/coverage/cover_reg_top/1.spi_device_intr_test.350123473
/workspace/coverage/cover_reg_top/1.spi_device_mem_partial_access.2075461895
/workspace/coverage/cover_reg_top/1.spi_device_mem_walk.1453518201
/workspace/coverage/cover_reg_top/1.spi_device_same_csr_outstanding.1476445132
/workspace/coverage/cover_reg_top/1.spi_device_tl_errors.301531860
/workspace/coverage/cover_reg_top/1.spi_device_tl_intg_err.1198514885
/workspace/coverage/cover_reg_top/10.spi_device_csr_mem_rw_with_rand_reset.1213639743
/workspace/coverage/cover_reg_top/10.spi_device_csr_rw.1411473787
/workspace/coverage/cover_reg_top/10.spi_device_intr_test.379195785
/workspace/coverage/cover_reg_top/10.spi_device_same_csr_outstanding.2415727821
/workspace/coverage/cover_reg_top/10.spi_device_tl_errors.2954564389
/workspace/coverage/cover_reg_top/10.spi_device_tl_intg_err.1941081861
/workspace/coverage/cover_reg_top/11.spi_device_csr_mem_rw_with_rand_reset.3792942183
/workspace/coverage/cover_reg_top/11.spi_device_csr_rw.2876831110
/workspace/coverage/cover_reg_top/11.spi_device_intr_test.972599662
/workspace/coverage/cover_reg_top/11.spi_device_same_csr_outstanding.3952545237
/workspace/coverage/cover_reg_top/11.spi_device_tl_intg_err.2699201420
/workspace/coverage/cover_reg_top/12.spi_device_csr_mem_rw_with_rand_reset.1911389422
/workspace/coverage/cover_reg_top/12.spi_device_csr_rw.2977374900
/workspace/coverage/cover_reg_top/12.spi_device_intr_test.2866393364
/workspace/coverage/cover_reg_top/12.spi_device_same_csr_outstanding.1852936107
/workspace/coverage/cover_reg_top/12.spi_device_tl_errors.1845122674
/workspace/coverage/cover_reg_top/12.spi_device_tl_intg_err.1942407676
/workspace/coverage/cover_reg_top/13.spi_device_csr_mem_rw_with_rand_reset.4036449841
/workspace/coverage/cover_reg_top/13.spi_device_csr_rw.1179728066
/workspace/coverage/cover_reg_top/13.spi_device_intr_test.1972200245
/workspace/coverage/cover_reg_top/13.spi_device_same_csr_outstanding.3261028740
/workspace/coverage/cover_reg_top/13.spi_device_tl_errors.3476958780
/workspace/coverage/cover_reg_top/13.spi_device_tl_intg_err.3451117340
/workspace/coverage/cover_reg_top/14.spi_device_csr_mem_rw_with_rand_reset.2876955459
/workspace/coverage/cover_reg_top/14.spi_device_csr_rw.1570916578
/workspace/coverage/cover_reg_top/14.spi_device_intr_test.1668691035
/workspace/coverage/cover_reg_top/14.spi_device_same_csr_outstanding.2101725960
/workspace/coverage/cover_reg_top/14.spi_device_tl_errors.3556504184
/workspace/coverage/cover_reg_top/14.spi_device_tl_intg_err.2817955107
/workspace/coverage/cover_reg_top/15.spi_device_csr_mem_rw_with_rand_reset.2444163061
/workspace/coverage/cover_reg_top/15.spi_device_csr_rw.1689480663
/workspace/coverage/cover_reg_top/15.spi_device_intr_test.832490058
/workspace/coverage/cover_reg_top/15.spi_device_same_csr_outstanding.2440698733
/workspace/coverage/cover_reg_top/15.spi_device_tl_intg_err.1983943201
/workspace/coverage/cover_reg_top/16.spi_device_csr_mem_rw_with_rand_reset.3029920124
/workspace/coverage/cover_reg_top/16.spi_device_csr_rw.1621494505
/workspace/coverage/cover_reg_top/16.spi_device_intr_test.2178204228
/workspace/coverage/cover_reg_top/16.spi_device_same_csr_outstanding.3138330464
/workspace/coverage/cover_reg_top/16.spi_device_tl_intg_err.2496096287
/workspace/coverage/cover_reg_top/17.spi_device_csr_mem_rw_with_rand_reset.142034196
/workspace/coverage/cover_reg_top/17.spi_device_csr_rw.562469475
/workspace/coverage/cover_reg_top/17.spi_device_intr_test.4263244679
/workspace/coverage/cover_reg_top/17.spi_device_same_csr_outstanding.1413600757
/workspace/coverage/cover_reg_top/17.spi_device_tl_errors.3843585235
/workspace/coverage/cover_reg_top/17.spi_device_tl_intg_err.2220623683
/workspace/coverage/cover_reg_top/18.spi_device_csr_mem_rw_with_rand_reset.2772722284
/workspace/coverage/cover_reg_top/18.spi_device_csr_rw.3361439952
/workspace/coverage/cover_reg_top/18.spi_device_intr_test.2558551598
/workspace/coverage/cover_reg_top/18.spi_device_same_csr_outstanding.351880860
/workspace/coverage/cover_reg_top/18.spi_device_tl_errors.395799087
/workspace/coverage/cover_reg_top/18.spi_device_tl_intg_err.1304610838
/workspace/coverage/cover_reg_top/19.spi_device_csr_mem_rw_with_rand_reset.3896333732
/workspace/coverage/cover_reg_top/19.spi_device_csr_rw.3259990207
/workspace/coverage/cover_reg_top/19.spi_device_intr_test.2371705507
/workspace/coverage/cover_reg_top/19.spi_device_same_csr_outstanding.2789885649
/workspace/coverage/cover_reg_top/19.spi_device_tl_errors.3472446
/workspace/coverage/cover_reg_top/19.spi_device_tl_intg_err.168189307
/workspace/coverage/cover_reg_top/2.spi_device_csr_aliasing.2343085597
/workspace/coverage/cover_reg_top/2.spi_device_csr_bit_bash.4187537436
/workspace/coverage/cover_reg_top/2.spi_device_csr_hw_reset.1432024258
/workspace/coverage/cover_reg_top/2.spi_device_csr_mem_rw_with_rand_reset.188434641
/workspace/coverage/cover_reg_top/2.spi_device_csr_rw.621316009
/workspace/coverage/cover_reg_top/2.spi_device_intr_test.2462385274
/workspace/coverage/cover_reg_top/2.spi_device_mem_partial_access.1810847501
/workspace/coverage/cover_reg_top/2.spi_device_mem_walk.3425347095
/workspace/coverage/cover_reg_top/2.spi_device_same_csr_outstanding.2145149561
/workspace/coverage/cover_reg_top/2.spi_device_tl_errors.4234172539
/workspace/coverage/cover_reg_top/20.spi_device_intr_test.3669774805
/workspace/coverage/cover_reg_top/21.spi_device_intr_test.3982377401
/workspace/coverage/cover_reg_top/22.spi_device_intr_test.2403280769
/workspace/coverage/cover_reg_top/23.spi_device_intr_test.51842790
/workspace/coverage/cover_reg_top/24.spi_device_intr_test.2410983825
/workspace/coverage/cover_reg_top/25.spi_device_intr_test.1149701304
/workspace/coverage/cover_reg_top/26.spi_device_intr_test.1686143006
/workspace/coverage/cover_reg_top/27.spi_device_intr_test.1738809164
/workspace/coverage/cover_reg_top/28.spi_device_intr_test.1367699606
/workspace/coverage/cover_reg_top/29.spi_device_intr_test.4245154085
/workspace/coverage/cover_reg_top/3.spi_device_csr_aliasing.3659243965
/workspace/coverage/cover_reg_top/3.spi_device_csr_bit_bash.1070688205
/workspace/coverage/cover_reg_top/3.spi_device_csr_hw_reset.4012749117
/workspace/coverage/cover_reg_top/3.spi_device_csr_mem_rw_with_rand_reset.706878141
/workspace/coverage/cover_reg_top/3.spi_device_csr_rw.2085104098
/workspace/coverage/cover_reg_top/3.spi_device_intr_test.4138206571
/workspace/coverage/cover_reg_top/3.spi_device_mem_partial_access.3414189434
/workspace/coverage/cover_reg_top/3.spi_device_mem_walk.2253522156
/workspace/coverage/cover_reg_top/3.spi_device_same_csr_outstanding.2553819953
/workspace/coverage/cover_reg_top/3.spi_device_tl_errors.666634581
/workspace/coverage/cover_reg_top/30.spi_device_intr_test.1450097340
/workspace/coverage/cover_reg_top/31.spi_device_intr_test.4154501677
/workspace/coverage/cover_reg_top/32.spi_device_intr_test.2593011820
/workspace/coverage/cover_reg_top/33.spi_device_intr_test.2041713993
/workspace/coverage/cover_reg_top/34.spi_device_intr_test.2823743111
/workspace/coverage/cover_reg_top/35.spi_device_intr_test.3228966269
/workspace/coverage/cover_reg_top/36.spi_device_intr_test.3249240851
/workspace/coverage/cover_reg_top/37.spi_device_intr_test.746622509
/workspace/coverage/cover_reg_top/38.spi_device_intr_test.3782219489
/workspace/coverage/cover_reg_top/39.spi_device_intr_test.1292041285
/workspace/coverage/cover_reg_top/4.spi_device_csr_aliasing.2900049009
/workspace/coverage/cover_reg_top/4.spi_device_csr_bit_bash.622417262
/workspace/coverage/cover_reg_top/4.spi_device_csr_hw_reset.2815294090
/workspace/coverage/cover_reg_top/4.spi_device_csr_mem_rw_with_rand_reset.293094920
/workspace/coverage/cover_reg_top/4.spi_device_csr_rw.3078844634
/workspace/coverage/cover_reg_top/4.spi_device_intr_test.1597040898
/workspace/coverage/cover_reg_top/4.spi_device_mem_partial_access.1823441370
/workspace/coverage/cover_reg_top/4.spi_device_mem_walk.374714419
/workspace/coverage/cover_reg_top/4.spi_device_same_csr_outstanding.807921587
/workspace/coverage/cover_reg_top/4.spi_device_tl_errors.1627552527
/workspace/coverage/cover_reg_top/4.spi_device_tl_intg_err.4258760740
/workspace/coverage/cover_reg_top/40.spi_device_intr_test.4258249396
/workspace/coverage/cover_reg_top/41.spi_device_intr_test.3603931317
/workspace/coverage/cover_reg_top/42.spi_device_intr_test.3728775152
/workspace/coverage/cover_reg_top/43.spi_device_intr_test.3483041957
/workspace/coverage/cover_reg_top/44.spi_device_intr_test.1666174512
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/workspace/coverage/default/8.spi_device_flash_mode.3693074526
/workspace/coverage/default/8.spi_device_intercept.724064407
/workspace/coverage/default/8.spi_device_mailbox.1719765374
/workspace/coverage/default/8.spi_device_mem_parity.1888141308
/workspace/coverage/default/8.spi_device_pass_addr_payload_swap.90337291
/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3989056338
/workspace/coverage/default/8.spi_device_ram_cfg.249688823
/workspace/coverage/default/8.spi_device_read_buffer_direct.4049474300
/workspace/coverage/default/8.spi_device_tpm_all.1598105757
/workspace/coverage/default/8.spi_device_tpm_read_hw_reg.3765444428
/workspace/coverage/default/8.spi_device_tpm_rw.3830975684
/workspace/coverage/default/8.spi_device_tpm_sts_read.3919763070
/workspace/coverage/default/8.spi_device_upload.2999392907
/workspace/coverage/default/9.spi_device_alert_test.684209395
/workspace/coverage/default/9.spi_device_cfg_cmd.1622836424
/workspace/coverage/default/9.spi_device_csb_read.1959842820
/workspace/coverage/default/9.spi_device_flash_all.1960784452
/workspace/coverage/default/9.spi_device_flash_and_tpm_min_idle.2529846399
/workspace/coverage/default/9.spi_device_flash_mode.362724499
/workspace/coverage/default/9.spi_device_intercept.641418336
/workspace/coverage/default/9.spi_device_mailbox.3626887232
/workspace/coverage/default/9.spi_device_mem_parity.3989074277
/workspace/coverage/default/9.spi_device_pass_addr_payload_swap.2041793876
/workspace/coverage/default/9.spi_device_pass_cmd_filtering.1943128079
/workspace/coverage/default/9.spi_device_ram_cfg.1802542173
/workspace/coverage/default/9.spi_device_read_buffer_direct.1667096057
/workspace/coverage/default/9.spi_device_tpm_all.2906445941
/workspace/coverage/default/9.spi_device_tpm_read_hw_reg.92971531
/workspace/coverage/default/9.spi_device_tpm_rw.3101596636
/workspace/coverage/default/9.spi_device_tpm_sts_read.835268302
/workspace/coverage/default/9.spi_device_upload.2202250740

---

Total test records in report: 1113

---

tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html

---

TEST NO	TEST LOCATION	TEST NAME	STATUS	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/0.spi_device_flash_and_tpm_min_idle.2071864145			Mar 28 01:35:51 PM PDT 24	Mar 28 01:37:25 PM PDT 24	101504275237 ps
T2	/workspace/coverage/default/32.spi_device_tpm_all.1000416174			Mar 28 01:37:41 PM PDT 24	Mar 28 01:38:22 PM PDT 24	16831983584 ps
T3	/workspace/coverage/default/31.spi_device_intercept.186778830			Mar 28 01:37:49 PM PDT 24	Mar 28 01:37:53 PM PDT 24	441382034 ps
T4	/workspace/coverage/default/33.spi_device_flash_and_tpm_min_idle.3516670710			Mar 28 01:37:51 PM PDT 24	Mar 28 01:38:58 PM PDT 24	53676173560 ps
T5	/workspace/coverage/default/47.spi_device_flash_and_tpm_min_idle.3232712609			Mar 28 01:38:37 PM PDT 24	Mar 28 01:40:17 PM PDT 24	17899380627 ps
T6	/workspace/coverage/default/8.spi_device_stress_all.1994456391			Mar 28 01:36:18 PM PDT 24	Mar 28 01:37:49 PM PDT 24	17986455673 ps
T7	/workspace/coverage/default/7.spi_device_pass_addr_payload_swap.279464872			Mar 28 01:36:17 PM PDT 24	Mar 28 01:36:48 PM PDT 24	11713721851 ps
T8	/workspace/coverage/default/23.spi_device_pass_addr_payload_swap.1317357079			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:31 PM PDT 24	4903282778 ps
T9	/workspace/coverage/default/38.spi_device_read_buffer_direct.1449943488			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:25 PM PDT 24	1404258828 ps
T10	/workspace/coverage/default/26.spi_device_mailbox.3722661136			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:30 PM PDT 24	3197560546 ps
T11	/workspace/coverage/default/25.spi_device_pass_addr_payload_swap.3446999518			Mar 28 01:37:24 PM PDT 24	Mar 28 01:37:31 PM PDT 24	692909601 ps
T17	/workspace/coverage/default/0.spi_device_tpm_rw.999031863			Mar 28 01:35:53 PM PDT 24	Mar 28 01:35:54 PM PDT 24	223447159 ps
T12	/workspace/coverage/default/9.spi_device_flash_and_tpm.1168904305			Mar 28 01:36:34 PM PDT 24	Mar 28 01:39:27 PM PDT 24	86481190685 ps
T24	/workspace/coverage/default/22.spi_device_flash_all.2958359096			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:46 PM PDT 24	4911446171 ps
T27	/workspace/coverage/default/36.spi_device_pass_addr_payload_swap.2855638166			Mar 28 01:37:57 PM PDT 24	Mar 28 01:38:01 PM PDT 24	91497628 ps
T13	/workspace/coverage/default/29.spi_device_stress_all.2090522790			Mar 28 01:37:39 PM PDT 24	Mar 28 01:44:23 PM PDT 24	57357018474 ps
T53	/workspace/coverage/default/44.spi_device_alert_test.1309069104			Mar 28 01:38:34 PM PDT 24	Mar 28 01:38:36 PM PDT 24	107514529 ps
T14	/workspace/coverage/default/8.spi_device_tpm_all.1598105757			Mar 28 01:36:17 PM PDT 24	Mar 28 01:36:47 PM PDT 24	2004684540 ps
T15	/workspace/coverage/default/4.spi_device_tpm_read_hw_reg.3845502736			Mar 28 01:36:03 PM PDT 24	Mar 28 01:36:29 PM PDT 24	9258574930 ps
T16	/workspace/coverage/default/36.spi_device_flash_and_tpm_min_idle.2312160604			Mar 28 01:38:03 PM PDT 24	Mar 28 01:38:58 PM PDT 24	3066811304 ps
T31	/workspace/coverage/default/0.spi_device_flash_all.1838351301			Mar 28 01:35:50 PM PDT 24	Mar 28 01:37:01 PM PDT 24	30710486891 ps
T54	/workspace/coverage/default/18.spi_device_alert_test.4134535926			Mar 28 01:37:02 PM PDT 24	Mar 28 01:37:02 PM PDT 24	15177754 ps
T35	/workspace/coverage/default/29.spi_device_flash_and_tpm.3574147386			Mar 28 01:37:40 PM PDT 24	Mar 28 01:39:04 PM PDT 24	30081464708 ps
T80	/workspace/coverage/default/17.spi_device_tpm_sts_read.1513816192			Mar 28 01:36:53 PM PDT 24	Mar 28 01:36:55 PM PDT 24	152240550 ps
T262	/workspace/coverage/default/4.spi_device_cfg_cmd.1073055282			Mar 28 01:36:07 PM PDT 24	Mar 28 01:36:10 PM PDT 24	1397914894 ps
T32	/workspace/coverage/default/40.spi_device_flash_mode.2383047919			Mar 28 01:38:18 PM PDT 24	Mar 28 01:38:46 PM PDT 24	11233378687 ps
T148	/workspace/coverage/default/42.spi_device_mailbox.2128374853			Mar 28 01:38:18 PM PDT 24	Mar 28 01:38:25 PM PDT 24	3469766331 ps
T136	/workspace/coverage/default/11.spi_device_flash_and_tpm.1875845400			Mar 28 01:36:33 PM PDT 24	Mar 28 01:37:23 PM PDT 24	27763183339 ps
T33	/workspace/coverage/default/48.spi_device_read_buffer_direct.3536675825			Mar 28 01:38:36 PM PDT 24	Mar 28 01:38:41 PM PDT 24	1976598721 ps
T206	/workspace/coverage/default/38.spi_device_mailbox.1140370953			Mar 28 01:38:12 PM PDT 24	Mar 28 01:38:27 PM PDT 24	5130202062 ps
T52	/workspace/coverage/default/39.spi_device_stress_all.1302308299			Mar 28 01:38:20 PM PDT 24	Mar 28 01:38:21 PM PDT 24	215417933 ps
T147	/workspace/coverage/default/41.spi_device_upload.1668236456			Mar 28 01:38:56 PM PDT 24	Mar 28 01:39:03 PM PDT 24	941198970 ps
T82	/workspace/coverage/default/21.spi_device_mailbox.401800587			Mar 28 01:36:53 PM PDT 24	Mar 28 01:37:05 PM PDT 24	3004278574 ps
T118	/workspace/coverage/default/48.spi_device_flash_mode.1371317824			Mar 28 01:38:38 PM PDT 24	Mar 28 01:39:13 PM PDT 24	12851786186 ps
T192	/workspace/coverage/default/36.spi_device_cfg_cmd.4148280202			Mar 28 01:38:06 PM PDT 24	Mar 28 01:38:09 PM PDT 24	155346782 ps
T151	/workspace/coverage/default/46.spi_device_intercept.1329642860			Mar 28 01:38:32 PM PDT 24	Mar 28 01:38:36 PM PDT 24	1239103005 ps
T81	/workspace/coverage/default/27.spi_device_tpm_read_hw_reg.1637304925			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:27 PM PDT 24	1751399083 ps
T263	/workspace/coverage/default/2.spi_device_tpm_sts_read.179372696			Mar 28 01:36:01 PM PDT 24	Mar 28 01:36:02 PM PDT 24	147507697 ps
T173	/workspace/coverage/default/24.spi_device_mailbox.24790986			Mar 28 01:37:22 PM PDT 24	Mar 28 01:37:59 PM PDT 24	11990744983 ps
T260	/workspace/coverage/default/27.spi_device_tpm_all.3033639888			Mar 28 01:37:21 PM PDT 24	Mar 28 01:38:01 PM PDT 24	3907664004 ps
T139	/workspace/coverage/default/8.spi_device_pass_cmd_filtering.3989056338			Mar 28 01:36:16 PM PDT 24	Mar 28 01:36:25 PM PDT 24	1098012863 ps
T264	/workspace/coverage/default/38.spi_device_cfg_cmd.462175747			Mar 28 01:38:14 PM PDT 24	Mar 28 01:38:17 PM PDT 24	798523546 ps
T160	/workspace/coverage/default/27.spi_device_mailbox.1752262557			Mar 28 01:37:25 PM PDT 24	Mar 28 01:37:50 PM PDT 24	26839577874 ps
T21	/workspace/coverage/default/14.spi_device_mem_parity.1949984929			Mar 28 01:36:36 PM PDT 24	Mar 28 01:36:38 PM PDT 24	169798364 ps
T25	/workspace/coverage/default/1.spi_device_flash_and_tpm_min_idle.2991356850			Mar 28 01:36:08 PM PDT 24	Mar 28 01:38:23 PM PDT 24	53925197557 ps
T265	/workspace/coverage/default/36.spi_device_mailbox.733155420			Mar 28 01:37:54 PM PDT 24	Mar 28 01:38:00 PM PDT 24	5605627815 ps
T70	/workspace/coverage/default/19.spi_device_flash_and_tpm_min_idle.1688247822			Mar 28 01:36:55 PM PDT 24	Mar 28 01:38:40 PM PDT 24	15423559726 ps
T55	/workspace/coverage/default/23.spi_device_alert_test.3279726874			Mar 28 01:37:23 PM PDT 24	Mar 28 01:37:23 PM PDT 24	10564424 ps
T266	/workspace/coverage/default/25.spi_device_alert_test.2081115961			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:20 PM PDT 24	49729875 ps
T140	/workspace/coverage/default/18.spi_device_tpm_rw.4231589613			Mar 28 01:36:58 PM PDT 24	Mar 28 01:37:00 PM PDT 24	395746720 ps
T267	/workspace/coverage/default/26.spi_device_tpm_rw.2670586499			Mar 28 01:37:23 PM PDT 24	Mar 28 01:37:24 PM PDT 24	57927437 ps
T137	/workspace/coverage/default/4.spi_device_pass_cmd_filtering.3297455330			Mar 28 01:36:01 PM PDT 24	Mar 28 01:36:08 PM PDT 24	1347995042 ps
T268	/workspace/coverage/default/42.spi_device_alert_test.730377468			Mar 28 01:38:23 PM PDT 24	Mar 28 01:38:24 PM PDT 24	26659798 ps
T269	/workspace/coverage/default/8.spi_device_alert_test.98412143			Mar 28 01:36:26 PM PDT 24	Mar 28 01:36:27 PM PDT 24	29571432 ps
T270	/workspace/coverage/default/16.spi_device_alert_test.1340529694			Mar 28 01:37:02 PM PDT 24	Mar 28 01:37:04 PM PDT 24	27707287 ps
T34	/workspace/coverage/default/14.spi_device_read_buffer_direct.1424386906			Mar 28 01:36:57 PM PDT 24	Mar 28 01:37:01 PM PDT 24	523369633 ps
T26	/workspace/coverage/default/12.spi_device_flash_and_tpm.2869812647			Mar 28 01:36:35 PM PDT 24	Mar 28 01:39:05 PM PDT 24	83702438845 ps
T168	/workspace/coverage/default/6.spi_device_mailbox.3607639474			Mar 28 01:36:12 PM PDT 24	Mar 28 01:36:57 PM PDT 24	15056014698 ps
T154	/workspace/coverage/default/8.spi_device_flash_all.887707568			Mar 28 01:36:17 PM PDT 24	Mar 28 01:37:20 PM PDT 24	24282960165 ps
T189	/workspace/coverage/default/23.spi_device_pass_cmd_filtering.2383025155			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:35 PM PDT 24	4110674571 ps
T58	/workspace/coverage/default/4.spi_device_sec_cm.1786559614			Mar 28 01:36:07 PM PDT 24	Mar 28 01:36:08 PM PDT 24	329660000 ps
T63	/workspace/coverage/default/9.spi_device_cfg_cmd.1622836424			Mar 28 01:36:12 PM PDT 24	Mar 28 01:36:15 PM PDT 24	324207561 ps
T64	/workspace/coverage/default/33.spi_device_tpm_rw.501537371			Mar 28 01:37:46 PM PDT 24	Mar 28 01:37:49 PM PDT 24	59581508 ps
T65	/workspace/coverage/default/8.spi_device_flash_and_tpm_min_idle.3898491494			Mar 28 01:36:16 PM PDT 24	Mar 28 01:41:38 PM PDT 24	43139234716 ps
T66	/workspace/coverage/default/10.spi_device_flash_and_tpm.4048663373			Mar 28 01:36:39 PM PDT 24	Mar 28 01:38:18 PM PDT 24	5603921715 ps
T22	/workspace/coverage/default/5.spi_device_mem_parity.65593272			Mar 28 01:36:09 PM PDT 24	Mar 28 01:36:10 PM PDT 24	35856537 ps
T67	/workspace/coverage/default/38.spi_device_upload.3672724200			Mar 28 01:38:12 PM PDT 24	Mar 28 01:38:28 PM PDT 24	16568686100 ps
T68	/workspace/coverage/default/35.spi_device_flash_all.541483958			Mar 28 01:37:51 PM PDT 24	Mar 28 01:38:30 PM PDT 24	32161074274 ps
T69	/workspace/coverage/default/22.spi_device_pass_addr_payload_swap.1981349435			Mar 28 01:37:00 PM PDT 24	Mar 28 01:37:12 PM PDT 24	22432750020 ps
T56	/workspace/coverage/default/12.spi_device_stress_all.1100300002			Mar 28 01:36:35 PM PDT 24	Mar 28 01:36:36 PM PDT 24	527205564 ps
T127	/workspace/coverage/default/6.spi_device_stress_all.504420578			Mar 28 01:36:13 PM PDT 24	Mar 28 01:37:56 PM PDT 24	216138845824 ps
T259	/workspace/coverage/default/14.spi_device_tpm_all.3450929397			Mar 28 01:36:39 PM PDT 24	Mar 28 01:37:08 PM PDT 24	1785210681 ps
T166	/workspace/coverage/default/10.spi_device_mailbox.2029900443			Mar 28 01:36:34 PM PDT 24	Mar 28 01:37:02 PM PDT 24	20641764509 ps
T71	/workspace/coverage/default/2.spi_device_flash_and_tpm_min_idle.384414086			Mar 28 01:36:02 PM PDT 24	Mar 28 01:39:20 PM PDT 24	190063325446 ps
T59	/workspace/coverage/default/2.spi_device_sec_cm.3190979072			Mar 28 01:36:01 PM PDT 24	Mar 28 01:36:02 PM PDT 24	62688403 ps
T119	/workspace/coverage/default/49.spi_device_read_buffer_direct.2652847525			Mar 28 01:38:47 PM PDT 24	Mar 28 01:38:54 PM PDT 24	7036224323 ps
T204	/workspace/coverage/default/33.spi_device_cfg_cmd.3710478193			Mar 28 01:37:48 PM PDT 24	Mar 28 01:37:51 PM PDT 24	204887070 ps
T193	/workspace/coverage/default/27.spi_device_intercept.1968295176			Mar 28 01:37:23 PM PDT 24	Mar 28 01:37:28 PM PDT 24	5194781447 ps
T271	/workspace/coverage/default/36.spi_device_flash_mode.2314382540			Mar 28 01:37:53 PM PDT 24	Mar 28 01:38:43 PM PDT 24	38063800106 ps
T272	/workspace/coverage/default/31.spi_device_tpm_rw.1916917166			Mar 28 01:37:37 PM PDT 24	Mar 28 01:37:38 PM PDT 24	23991082 ps
T134	/workspace/coverage/default/40.spi_device_upload.557823696			Mar 28 01:38:19 PM PDT 24	Mar 28 01:39:05 PM PDT 24	55872379622 ps
T188	/workspace/coverage/default/6.spi_device_pass_addr_payload_swap.2757378940			Mar 28 01:36:29 PM PDT 24	Mar 28 01:36:33 PM PDT 24	3957686610 ps
T273	/workspace/coverage/default/30.spi_device_tpm_rw.1517927959			Mar 28 01:37:41 PM PDT 24	Mar 28 01:37:44 PM PDT 24	210421568 ps
T274	/workspace/coverage/default/38.spi_device_csb_read.2441888138			Mar 28 01:38:15 PM PDT 24	Mar 28 01:38:16 PM PDT 24	16720017 ps
T135	/workspace/coverage/default/23.spi_device_upload.2918156094			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:26 PM PDT 24	5283435525 ps
T214	/workspace/coverage/default/10.spi_device_cfg_cmd.348975598			Mar 28 01:36:34 PM PDT 24	Mar 28 01:36:38 PM PDT 24	199153788 ps
T120	/workspace/coverage/default/18.spi_device_flash_mode.3621240162			Mar 28 01:36:59 PM PDT 24	Mar 28 01:37:26 PM PDT 24	19861325384 ps
T275	/workspace/coverage/default/1.spi_device_tpm_read_hw_reg.1479287766			Mar 28 01:35:48 PM PDT 24	Mar 28 01:35:51 PM PDT 24	2283555568 ps
T276	/workspace/coverage/default/49.spi_device_tpm_read_hw_reg.379556834			Mar 28 01:38:52 PM PDT 24	Mar 28 01:39:01 PM PDT 24	2648115711 ps
T277	/workspace/coverage/default/48.spi_device_mailbox.2098565503			Mar 28 01:38:40 PM PDT 24	Mar 28 01:38:50 PM PDT 24	3086970418 ps
T28	/workspace/coverage/default/18.spi_device_stress_all.2391496562			Mar 28 01:37:02 PM PDT 24	Mar 28 01:49:48 PM PDT 24	105746211051 ps
T278	/workspace/coverage/default/21.spi_device_alert_test.3838411790			Mar 28 01:37:05 PM PDT 24	Mar 28 01:37:06 PM PDT 24	36995929 ps
T116	/workspace/coverage/default/14.spi_device_flash_and_tpm.3465800840			Mar 28 01:36:55 PM PDT 24	Mar 28 01:38:39 PM PDT 24	106054862674 ps
T279	/workspace/coverage/default/39.spi_device_csb_read.2964307694			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:18 PM PDT 24	14527353 ps
T280	/workspace/coverage/default/27.spi_device_alert_test.1697538846			Mar 28 01:37:48 PM PDT 24	Mar 28 01:37:49 PM PDT 24	79551184 ps
T121	/workspace/coverage/default/12.spi_device_flash_mode.3324134441			Mar 28 01:36:30 PM PDT 24	Mar 28 01:36:42 PM PDT 24	496089290 ps
T179	/workspace/coverage/default/5.spi_device_flash_all.317586425			Mar 28 01:36:08 PM PDT 24	Mar 28 01:38:10 PM PDT 24	67627822973 ps
T281	/workspace/coverage/default/41.spi_device_tpm_rw.3915490161			Mar 28 01:38:15 PM PDT 24	Mar 28 01:38:19 PM PDT 24	565784140 ps
T196	/workspace/coverage/default/44.spi_device_cfg_cmd.1256685832			Mar 28 01:38:35 PM PDT 24	Mar 28 01:38:38 PM PDT 24	170816358 ps
T258	/workspace/coverage/default/41.spi_device_tpm_all.2968644573			Mar 28 01:38:16 PM PDT 24	Mar 28 01:39:38 PM PDT 24	14139340885 ps
T76	/workspace/coverage/default/40.spi_device_flash_and_tpm.2581311702			Mar 28 01:38:16 PM PDT 24	Mar 28 01:39:52 PM PDT 24	43422897709 ps
T133	/workspace/coverage/default/45.spi_device_stress_all.3540956966			Mar 28 01:38:30 PM PDT 24	Mar 28 01:38:46 PM PDT 24	1043186921 ps
T29	/workspace/coverage/default/17.spi_device_pass_addr_payload_swap.1689767618			Mar 28 01:36:53 PM PDT 24	Mar 28 01:37:03 PM PDT 24	3925541386 ps
T282	/workspace/coverage/default/12.spi_device_tpm_sts_read.1479350076			Mar 28 01:36:34 PM PDT 24	Mar 28 01:36:35 PM PDT 24	18683424 ps
T283	/workspace/coverage/default/35.spi_device_flash_and_tpm_min_idle.2004279855			Mar 28 01:37:54 PM PDT 24	Mar 28 01:38:29 PM PDT 24	3115686826 ps
T284	/workspace/coverage/default/28.spi_device_csb_read.1114317768			Mar 28 01:37:35 PM PDT 24	Mar 28 01:37:36 PM PDT 24	20220846 ps
T122	/workspace/coverage/default/45.spi_device_read_buffer_direct.1084600207			Mar 28 01:38:36 PM PDT 24	Mar 28 01:38:42 PM PDT 24	3617884321 ps
T169	/workspace/coverage/default/27.spi_device_upload.2270984458			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:30 PM PDT 24	1146956242 ps
T285	/workspace/coverage/default/0.spi_device_tpm_sts_read.2004670687			Mar 28 01:35:50 PM PDT 24	Mar 28 01:35:51 PM PDT 24	97119317 ps
T191	/workspace/coverage/default/34.spi_device_pass_addr_payload_swap.2110979725			Mar 28 01:37:56 PM PDT 24	Mar 28 01:38:03 PM PDT 24	889104586 ps
T123	/workspace/coverage/default/19.spi_device_flash_mode.3451500296			Mar 28 01:36:54 PM PDT 24	Mar 28 01:37:02 PM PDT 24	238156591 ps
T180	/workspace/coverage/default/4.spi_device_flash_all.1676400804			Mar 28 01:36:09 PM PDT 24	Mar 28 01:37:43 PM PDT 24	53892720109 ps
T23	/workspace/coverage/default/9.spi_device_mem_parity.3989074277			Mar 28 01:36:21 PM PDT 24	Mar 28 01:36:23 PM PDT 24	40510140 ps
T286	/workspace/coverage/default/45.spi_device_csb_read.847117473			Mar 28 01:38:34 PM PDT 24	Mar 28 01:38:35 PM PDT 24	20872088 ps
T124	/workspace/coverage/default/6.spi_device_flash_mode.932607525			Mar 28 01:36:11 PM PDT 24	Mar 28 01:36:24 PM PDT 24	618484539 ps
T181	/workspace/coverage/default/13.spi_device_flash_and_tpm_min_idle.2831235347			Mar 28 01:36:39 PM PDT 24	Mar 28 01:39:26 PM PDT 24	25023804799 ps
T287	/workspace/coverage/default/28.spi_device_tpm_sts_read.3646981929			Mar 28 01:37:38 PM PDT 24	Mar 28 01:37:39 PM PDT 24	191871539 ps
T57	/workspace/coverage/default/10.spi_device_ram_cfg.566582426			Mar 28 01:36:31 PM PDT 24	Mar 28 01:36:32 PM PDT 24	18513246 ps
T288	/workspace/coverage/default/14.spi_device_flash_mode.3573651181			Mar 28 01:36:53 PM PDT 24	Mar 28 01:37:12 PM PDT 24	11919476257 ps
T125	/workspace/coverage/default/41.spi_device_flash_mode.1694487928			Mar 28 01:38:16 PM PDT 24	Mar 28 01:38:41 PM PDT 24	3323268088 ps
T77	/workspace/coverage/default/44.spi_device_flash_and_tpm.1066206290			Mar 28 01:38:35 PM PDT 24	Mar 28 01:42:19 PM PDT 24	53753532553 ps
T117	/workspace/coverage/default/20.spi_device_stress_all.2866153481			Mar 28 01:36:54 PM PDT 24	Mar 28 01:39:18 PM PDT 24	58351586399 ps
T289	/workspace/coverage/default/48.spi_device_pass_cmd_filtering.4269552675			Mar 28 01:38:38 PM PDT 24	Mar 28 01:38:40 PM PDT 24	112298686 ps
T30	/workspace/coverage/default/41.spi_device_flash_and_tpm.4199129947			Mar 28 01:38:20 PM PDT 24	Mar 28 01:42:35 PM PDT 24	43403102390 ps
T153	/workspace/coverage/default/19.spi_device_flash_all.2079458905			Mar 28 01:36:52 PM PDT 24	Mar 28 01:41:07 PM PDT 24	110615192750 ps
T290	/workspace/coverage/default/38.spi_device_alert_test.969555121			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:18 PM PDT 24	42247826 ps
T291	/workspace/coverage/default/47.spi_device_alert_test.2715718687			Mar 28 01:38:37 PM PDT 24	Mar 28 01:38:38 PM PDT 24	36771712 ps
T292	/workspace/coverage/default/6.spi_device_read_buffer_direct.1637629673			Mar 28 01:36:15 PM PDT 24	Mar 28 01:36:22 PM PDT 24	6794504831 ps
T36	/workspace/coverage/default/43.spi_device_stress_all.1848914165			Mar 28 01:38:34 PM PDT 24	Mar 28 01:43:05 PM PDT 24	26973744969 ps
T43	/workspace/coverage/default/42.spi_device_tpm_read_hw_reg.242962369			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:27 PM PDT 24	2920968402 ps
T44	/workspace/coverage/default/23.spi_device_flash_and_tpm.1720224948			Mar 28 01:37:23 PM PDT 24	Mar 28 01:40:36 PM PDT 24	54143005375 ps
T45	/workspace/coverage/default/0.spi_device_csb_read.2487813427			Mar 28 01:35:48 PM PDT 24	Mar 28 01:35:49 PM PDT 24	47839536 ps
T46	/workspace/coverage/default/27.spi_device_csb_read.1305955137			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:22 PM PDT 24	25692139 ps
T47	/workspace/coverage/default/0.spi_device_ram_cfg.2340151203			Mar 28 01:35:48 PM PDT 24	Mar 28 01:35:49 PM PDT 24	43647855 ps
T48	/workspace/coverage/default/12.spi_device_ram_cfg.774577806			Mar 28 01:36:34 PM PDT 24	Mar 28 01:36:35 PM PDT 24	27145098 ps
T49	/workspace/coverage/default/28.spi_device_tpm_read_hw_reg.807333791			Mar 28 01:37:35 PM PDT 24	Mar 28 01:37:48 PM PDT 24	2179388258 ps
T50	/workspace/coverage/default/16.spi_device_mailbox.3743721436			Mar 28 01:37:02 PM PDT 24	Mar 28 01:37:30 PM PDT 24	10440953050 ps
T51	/workspace/coverage/default/26.spi_device_flash_and_tpm_min_idle.3545221014			Mar 28 01:37:23 PM PDT 24	Mar 28 01:40:27 PM PDT 24	19886029667 ps
T293	/workspace/coverage/default/20.spi_device_alert_test.742629178			Mar 28 01:36:59 PM PDT 24	Mar 28 01:37:00 PM PDT 24	15139013 ps
T294	/workspace/coverage/default/10.spi_device_tpm_read_hw_reg.3464068431			Mar 28 01:36:39 PM PDT 24	Mar 28 01:37:13 PM PDT 24	41106756825 ps
T149	/workspace/coverage/default/7.spi_device_mailbox.1692531608			Mar 28 01:36:30 PM PDT 24	Mar 28 01:36:45 PM PDT 24	5196642646 ps
T255	/workspace/coverage/default/22.spi_device_flash_mode.3761947742			Mar 28 01:37:22 PM PDT 24	Mar 28 01:37:36 PM PDT 24	4847999463 ps
T295	/workspace/coverage/default/17.spi_device_alert_test.1868678300			Mar 28 01:36:58 PM PDT 24	Mar 28 01:36:59 PM PDT 24	31551975 ps
T223	/workspace/coverage/default/15.spi_device_upload.83131463			Mar 28 01:36:57 PM PDT 24	Mar 28 01:37:08 PM PDT 24	1538440493 ps
T296	/workspace/coverage/default/43.spi_device_flash_and_tpm_min_idle.1719058741			Mar 28 01:38:36 PM PDT 24	Mar 28 01:41:48 PM PDT 24	379287926066 ps
T297	/workspace/coverage/default/20.spi_device_mailbox.2202755581			Mar 28 01:37:00 PM PDT 24	Mar 28 01:37:08 PM PDT 24	575043766 ps
T298	/workspace/coverage/default/31.spi_device_read_buffer_direct.3371764684			Mar 28 01:37:49 PM PDT 24	Mar 28 01:37:55 PM PDT 24	975385329 ps
T159	/workspace/coverage/default/18.spi_device_flash_all.3244615489			Mar 28 01:37:05 PM PDT 24	Mar 28 01:39:29 PM PDT 24	32526245714 ps
T299	/workspace/coverage/default/42.spi_device_tpm_all.75848955			Mar 28 01:38:16 PM PDT 24	Mar 28 01:39:28 PM PDT 24	24268605440 ps
T300	/workspace/coverage/default/1.spi_device_read_buffer_direct.3556893555			Mar 28 01:36:02 PM PDT 24	Mar 28 01:36:06 PM PDT 24	692154162 ps
T301	/workspace/coverage/default/35.spi_device_tpm_read_hw_reg.904834086			Mar 28 01:37:50 PM PDT 24	Mar 28 01:38:08 PM PDT 24	4318904012 ps
T302	/workspace/coverage/default/15.spi_device_flash_and_tpm.1949987959			Mar 28 01:36:59 PM PDT 24	Mar 28 01:37:55 PM PDT 24	7344256666 ps
T174	/workspace/coverage/default/3.spi_device_flash_and_tpm.3671669543			Mar 28 01:36:01 PM PDT 24	Mar 28 01:36:38 PM PDT 24	2543513653 ps
T138	/workspace/coverage/default/19.spi_device_flash_and_tpm.915921716			Mar 28 01:36:50 PM PDT 24	Mar 28 01:40:43 PM PDT 24	96414731393 ps
T219	/workspace/coverage/default/19.spi_device_pass_cmd_filtering.533520950			Mar 28 01:37:03 PM PDT 24	Mar 28 01:37:41 PM PDT 24	28651843832 ps
T261	/workspace/coverage/default/17.spi_device_flash_and_tpm.4251598027			Mar 28 01:36:59 PM PDT 24	Mar 28 01:37:32 PM PDT 24	2761025751 ps
T303	/workspace/coverage/default/35.spi_device_read_buffer_direct.2504803090			Mar 28 01:37:54 PM PDT 24	Mar 28 01:38:00 PM PDT 24	1381644490 ps
T37	/workspace/coverage/default/22.spi_device_flash_and_tpm_min_idle.4147753119			Mar 28 01:37:19 PM PDT 24	Mar 28 01:41:39 PM PDT 24	114199875719 ps
T304	/workspace/coverage/default/9.spi_device_csb_read.1959842820			Mar 28 01:36:26 PM PDT 24	Mar 28 01:36:27 PM PDT 24	19838426 ps
T212	/workspace/coverage/default/37.spi_device_mailbox.4141068154			Mar 28 01:37:55 PM PDT 24	Mar 28 01:38:12 PM PDT 24	22838885418 ps
T305	/workspace/coverage/default/13.spi_device_alert_test.1210578924			Mar 28 01:36:39 PM PDT 24	Mar 28 01:36:40 PM PDT 24	18555214 ps
T222	/workspace/coverage/default/30.spi_device_pass_cmd_filtering.3902949516			Mar 28 01:37:38 PM PDT 24	Mar 28 01:37:50 PM PDT 24	5987974013 ps
T306	/workspace/coverage/default/12.spi_device_mem_parity.856046975			Mar 28 01:36:35 PM PDT 24	Mar 28 01:36:36 PM PDT 24	362606731 ps
T307	/workspace/coverage/default/36.spi_device_tpm_rw.3842014954			Mar 28 01:37:50 PM PDT 24	Mar 28 01:37:51 PM PDT 24	27548644 ps
T215	/workspace/coverage/default/38.spi_device_pass_addr_payload_swap.2590981857			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:57 PM PDT 24	54873610995 ps
T194	/workspace/coverage/default/7.spi_device_cfg_cmd.592324148			Mar 28 01:36:24 PM PDT 24	Mar 28 01:36:29 PM PDT 24	439787612 ps
T308	/workspace/coverage/default/23.spi_device_read_buffer_direct.1172028271			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:25 PM PDT 24	1278829520 ps
T128	/workspace/coverage/default/24.spi_device_stress_all.1285518043			Mar 28 01:37:21 PM PDT 24	Mar 28 01:39:38 PM PDT 24	18563605287 ps
T207	/workspace/coverage/default/30.spi_device_cfg_cmd.1405443940			Mar 28 01:37:40 PM PDT 24	Mar 28 01:37:45 PM PDT 24	281446872 ps
T309	/workspace/coverage/default/13.spi_device_tpm_sts_read.1764900735			Mar 28 01:36:35 PM PDT 24	Mar 28 01:36:37 PM PDT 24	363291820 ps
T198	/workspace/coverage/default/35.spi_device_intercept.2764719144			Mar 28 01:37:54 PM PDT 24	Mar 28 01:38:00 PM PDT 24	6276151249 ps
T152	/workspace/coverage/default/10.spi_device_flash_all.302083674			Mar 28 01:36:32 PM PDT 24	Mar 28 01:38:00 PM PDT 24	43774944461 ps
T203	/workspace/coverage/default/12.spi_device_upload.662887906			Mar 28 01:36:34 PM PDT 24	Mar 28 01:36:39 PM PDT 24	2111341193 ps
T310	/workspace/coverage/default/21.spi_device_upload.228451714			Mar 28 01:37:03 PM PDT 24	Mar 28 01:37:11 PM PDT 24	1815051406 ps
T311	/workspace/coverage/default/34.spi_device_tpm_sts_read.3885731818			Mar 28 01:37:57 PM PDT 24	Mar 28 01:37:58 PM PDT 24	95042122 ps
T183	/workspace/coverage/default/16.spi_device_intercept.3766155550			Mar 28 01:37:05 PM PDT 24	Mar 28 01:37:11 PM PDT 24	810525112 ps
T312	/workspace/coverage/default/48.spi_device_alert_test.1473929573			Mar 28 01:38:53 PM PDT 24	Mar 28 01:38:54 PM PDT 24	64670419 ps
T313	/workspace/coverage/default/38.spi_device_tpm_all.4031239285			Mar 28 01:38:13 PM PDT 24	Mar 28 01:38:37 PM PDT 24	2240212741 ps
T79	/workspace/coverage/default/27.spi_device_read_buffer_direct.2277875527			Mar 28 01:37:35 PM PDT 24	Mar 28 01:37:38 PM PDT 24	762340829 ps
T256	/workspace/coverage/default/25.spi_device_flash_mode.3920027154			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:41 PM PDT 24	2911380729 ps
T172	/workspace/coverage/default/36.spi_device_upload.1567183752			Mar 28 01:37:52 PM PDT 24	Mar 28 01:38:02 PM PDT 24	2382335103 ps
T314	/workspace/coverage/default/33.spi_device_csb_read.1005046472			Mar 28 01:37:40 PM PDT 24	Mar 28 01:37:41 PM PDT 24	61273920 ps
T257	/workspace/coverage/default/39.spi_device_flash_mode.2368976384			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:59 PM PDT 24	36386023367 ps
T182	/workspace/coverage/default/4.spi_device_intercept.2335811551			Mar 28 01:36:09 PM PDT 24	Mar 28 01:36:12 PM PDT 24	789571990 ps
T38	/workspace/coverage/default/18.spi_device_flash_and_tpm.2353403216			Mar 28 01:37:06 PM PDT 24	Mar 28 01:41:42 PM PDT 24	264371938936 ps
T164	/workspace/coverage/default/23.spi_device_flash_and_tpm_min_idle.2920386252			Mar 28 01:37:24 PM PDT 24	Mar 28 01:42:29 PM PDT 24	52908878955 ps
T226	/workspace/coverage/default/31.spi_device_mailbox.1690613966			Mar 28 01:37:41 PM PDT 24	Mar 28 01:38:06 PM PDT 24	3778403741 ps
T315	/workspace/coverage/default/5.spi_device_upload.2415153575			Mar 28 01:36:09 PM PDT 24	Mar 28 01:36:13 PM PDT 24	581938330 ps
T316	/workspace/coverage/default/0.spi_device_tpm_read_hw_reg.39533495			Mar 28 01:35:53 PM PDT 24	Mar 28 01:36:14 PM PDT 24	18858365546 ps
T210	/workspace/coverage/default/37.spi_device_upload.4084710083			Mar 28 01:37:56 PM PDT 24	Mar 28 01:37:58 PM PDT 24	263790226 ps
T317	/workspace/coverage/default/46.spi_device_flash_mode.2530072754			Mar 28 01:38:34 PM PDT 24	Mar 28 01:39:02 PM PDT 24	9775497863 ps
T318	/workspace/coverage/default/26.spi_device_tpm_sts_read.276059344			Mar 28 01:37:22 PM PDT 24	Mar 28 01:37:23 PM PDT 24	58822059 ps
T225	/workspace/coverage/default/40.spi_device_pass_addr_payload_swap.2784803688			Mar 28 01:38:19 PM PDT 24	Mar 28 01:38:36 PM PDT 24	7474648059 ps
T319	/workspace/coverage/default/25.spi_device_tpm_sts_read.2542088010			Mar 28 01:37:23 PM PDT 24	Mar 28 01:37:24 PM PDT 24	91290850 ps
T320	/workspace/coverage/default/5.spi_device_cfg_cmd.2440335856			Mar 28 01:36:09 PM PDT 24	Mar 28 01:36:12 PM PDT 24	390794546 ps
T211	/workspace/coverage/default/39.spi_device_cfg_cmd.3420532430			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:20 PM PDT 24	56523403 ps
T321	/workspace/coverage/default/32.spi_device_pass_addr_payload_swap.2663125325			Mar 28 01:37:38 PM PDT 24	Mar 28 01:37:50 PM PDT 24	10358914381 ps
T170	/workspace/coverage/default/24.spi_device_flash_and_tpm_min_idle.1526822421			Mar 28 01:37:26 PM PDT 24	Mar 28 01:39:53 PM PDT 24	51029383227 ps
T322	/workspace/coverage/default/41.spi_device_tpm_sts_read.1727026069			Mar 28 01:38:14 PM PDT 24	Mar 28 01:38:15 PM PDT 24	171587692 ps
T150	/workspace/coverage/default/49.spi_device_flash_all.2857978649			Mar 28 01:38:48 PM PDT 24	Mar 28 01:45:50 PM PDT 24	359440352618 ps
T323	/workspace/coverage/default/0.spi_device_cfg_cmd.3192101617			Mar 28 01:35:50 PM PDT 24	Mar 28 01:35:54 PM PDT 24	501621976 ps
T324	/workspace/coverage/default/39.spi_device_pass_cmd_filtering.536171380			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:36 PM PDT 24	6544215553 ps
T205	/workspace/coverage/default/15.spi_device_pass_cmd_filtering.2331203778			Mar 28 01:36:57 PM PDT 24	Mar 28 01:37:21 PM PDT 24	6449941846 ps
T325	/workspace/coverage/default/2.spi_device_pass_addr_payload_swap.715471578			Mar 28 01:35:56 PM PDT 24	Mar 28 01:36:17 PM PDT 24	12610853556 ps
T184	/workspace/coverage/default/9.spi_device_intercept.641418336			Mar 28 01:36:22 PM PDT 24	Mar 28 01:36:29 PM PDT 24	1323243678 ps
T326	/workspace/coverage/default/47.spi_device_tpm_rw.2092025091			Mar 28 01:38:35 PM PDT 24	Mar 28 01:38:37 PM PDT 24	242651010 ps
T327	/workspace/coverage/default/16.spi_device_csb_read.2667622523			Mar 28 01:37:03 PM PDT 24	Mar 28 01:37:04 PM PDT 24	65354965 ps
T221	/workspace/coverage/default/22.spi_device_mailbox.2833879245			Mar 28 01:37:00 PM PDT 24	Mar 28 01:37:07 PM PDT 24	1037301308 ps
T155	/workspace/coverage/default/46.spi_device_flash_and_tpm_min_idle.230841142			Mar 28 01:38:32 PM PDT 24	Mar 28 01:39:14 PM PDT 24	2701390577 ps
T328	/workspace/coverage/default/42.spi_device_csb_read.3740982804			Mar 28 01:38:17 PM PDT 24	Mar 28 01:38:18 PM PDT 24	70650494 ps
T329	/workspace/coverage/default/30.spi_device_alert_test.1464236758			Mar 28 01:37:39 PM PDT 24	Mar 28 01:37:41 PM PDT 24	52769220 ps
T330	/workspace/coverage/default/18.spi_device_tpm_read_hw_reg.3491676405			Mar 28 01:36:57 PM PDT 24	Mar 28 01:37:16 PM PDT 24	23831124320 ps
T224	/workspace/coverage/default/6.spi_device_cfg_cmd.113301514			Mar 28 01:36:11 PM PDT 24	Mar 28 01:36:13 PM PDT 24	123955721 ps
T331	/workspace/coverage/default/1.spi_device_mem_parity.109142326			Mar 28 01:35:55 PM PDT 24	Mar 28 01:35:56 PM PDT 24	82656817 ps
T220	/workspace/coverage/default/32.spi_device_mailbox.986898903			Mar 28 01:37:45 PM PDT 24	Mar 28 01:38:06 PM PDT 24	18486414425 ps
T167	/workspace/coverage/default/30.spi_device_intercept.1050212217			Mar 28 01:37:42 PM PDT 24	Mar 28 01:37:50 PM PDT 24	1059846213 ps
T332	/workspace/coverage/default/43.spi_device_tpm_read_hw_reg.3771382220			Mar 28 01:38:18 PM PDT 24	Mar 28 01:38:19 PM PDT 24	147086336 ps
T333	/workspace/coverage/default/12.spi_device_cfg_cmd.297388802			Mar 28 01:36:31 PM PDT 24	Mar 28 01:36:37 PM PDT 24	8070709051 ps
T39	/workspace/coverage/default/26.spi_device_stress_all.1186497897			Mar 28 01:37:20 PM PDT 24	Mar 28 01:40:34 PM PDT 24	141807959222 ps
T334	/workspace/coverage/default/29.spi_device_csb_read.2168789050			Mar 28 01:37:33 PM PDT 24	Mar 28 01:37:34 PM PDT 24	13143516 ps
T335	/workspace/coverage/default/14.spi_device_csb_read.1318800396			Mar 28 01:36:39 PM PDT 24	Mar 28 01:36:40 PM PDT 24	19570244 ps
T336	/workspace/coverage/default/24.spi_device_pass_addr_payload_swap.2977642929			Mar 28 01:37:20 PM PDT 24	Mar 28 01:37:36 PM PDT 24	3492004036 ps
T337	/workspace/coverage/default/4.spi_device_tpm_rw.2881755561			Mar 28 01:36:06 PM PDT 24	Mar 28 01:36:10 PM PDT 24	650334518 ps
T190	/workspace/coverage/default/7.spi_device_intercept.1304264570			Mar 28 01:36:17 PM PDT 24	Mar 28 01:36:25 PM PDT 24	8700633762 ps
T186	/workspace/coverage/default/46.spi_device_pass_cmd_filtering.1526435877			Mar 28 01:38:30 PM PDT 24	Mar 28 01:39:01 PM PDT 24	47369500014 ps
T338	/workspace/coverage/default/25.spi_device_upload.1081360044			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:39 PM PDT 24	17518959956 ps
T339	/workspace/coverage/default/3.spi_device_intercept.3962196067			Mar 28 01:36:04 PM PDT 24	Mar 28 01:36:08 PM PDT 24	3377650378 ps
T340	/workspace/coverage/default/29.spi_device_flash_and_tpm_min_idle.2370739242			Mar 28 01:37:38 PM PDT 24	Mar 28 01:41:12 PM PDT 24	26707181284 ps
T178	/workspace/coverage/default/17.spi_device_upload.151279691			Mar 28 01:36:56 PM PDT 24	Mar 28 01:37:05 PM PDT 24	7562161764 ps
T341	/workspace/coverage/default/15.spi_device_ram_cfg.623045362			Mar 28 01:36:53 PM PDT 24	Mar 28 01:36:54 PM PDT 24	26507868 ps
T342	/workspace/coverage/default/19.spi_device_tpm_read_hw_reg.2809383121			Mar 28 01:37:00 PM PDT 24	Mar 28 01:37:05 PM PDT 24	2658773850 ps
T343	/workspace/coverage/default/14.spi_device_pass_addr_payload_swap.3657038065			Mar 28 01:36:54 PM PDT 24	Mar 28 01:37:11 PM PDT 24	4517164771 ps
T208	/workspace/coverage/default/25.spi_device_flash_and_tpm.1506091980			Mar 28 01:37:22 PM PDT 24	Mar 28 01:38:30 PM PDT 24	5535411088 ps
T187	/workspace/coverage/default/28.spi_device_mailbox.1402298129			Mar 28 01:37:37 PM PDT 24	Mar 28 01:38:02 PM PDT 24	9321239030 ps
T344	/workspace/coverage/default/15.spi_device_csb_read.2203533106			Mar 28 01:36:54 PM PDT 24	Mar 28 01:36:55 PM PDT 24	41516344 ps
T345	/workspace/coverage/default/12.spi_device_tpm_read_hw_reg.2139508436			Mar 28 01:36:41 PM PDT 24	Mar 28 01:36:48 PM PDT 24	2249212499 ps
T346	/workspace/coverage/default/25.spi_device_read_buffer_direct.1879675275			Mar 28 01:37:21 PM PDT 24	Mar 28 01:37:28 PM PDT 24	3171685780 ps
T347	/workspace/coverage/default/6.spi_device_mem_parity.2607537616			Mar 28 01:36:09 PM PDT 24	Mar 28 01:36:10 PM PDT 24	14792810 ps
T348	/workspace/coverage/default/49.spi_device_tpm_all.676089586			Mar 28 01:38:46 PM PDT 24	Mar 28 01:39:27 PM PDT 24	24284514350 ps
T349	/workspace/coverage/default/1.spi_device_intercept.582224721			Mar 28 01:36:09 PM PDT 24	Mar 28 01:36:25 PM PDT 24	4864727079 ps
T350	/workspace/coverage/default/23.spi_device_flash_all.1197736497			Mar 28 01:37:20 PM PDT 24	Mar 28 01:39:21 PM PDT 24	32797042945 ps
T351	/workspace/coverage/default/28.spi_device_stress_all.133587219			Mar 28 01:37:38 PM PDT 24	Mar 28 01:37:41 PM PDT 24	186746673 ps
T157	/workspace/coverage/default/38.spi_device_stress_all.1872012678			Mar 28 01:38:16 PM PDT 24	Mar 28 01:48:10 PM PDT 24	76201622675 ps
T352	/workspace/coverage/default/34.spi_device_upload.223090100			Mar 28 01:37:56 PM PDT 24	Mar 28 01:38:12 PM PDT 24	9698381769 ps
T353	/workspace/coverage/default/5.spi_device_csb_read.4254885594			Mar 28 01:36:02 PM PDT 24	Mar 28 01:36:03 PM PDT 24	20039918 ps
T354	/workspace/coverage/default/34.spi_device_flash_mode.3955041905			Mar 28 01:37:49 PM PDT 24	Mar 28 01:38:09 PM PDT 24	5118429696 ps
T227	/workspace/coverage/default/38.spi_device_flash_and_tpm_min_idle.1868261464			Mar 28 01:38:15 PM PDT 24	Mar 28 01:39:48 PM PDT 24	13195511269 ps
T78	/workspace/coverage/default/32.spi_device_stress_all.554411691			Mar 28 01:37:39 PM PDT 24	Mar 28 01:40:32 PM PDT 24	82714639474 ps
T355	/workspace/coverage/default/32.spi_device_tpm_sts_read.3366613874			Mar 28 01:37:39 PM PDT 24	Mar 28 01:37:41 PM PDT 24	274393421 ps
T356	/workspace/coverage/default/11.spi_device_pass_addr_payload_swap.896890671			Mar 28 01:36:36 PM PDT 24	Mar 28 01:36:52 PM PDT 24	3304251064 ps