| T340 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/10.spi_device_upload.1214748863 |
|
|
Aug 25 10:59:29 AM UTC 24 |
Aug 25 11:00:35 AM UTC 24 |
10505887243 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/13.spi_device_pass_addr_payload_swap.4006070632 |
|
|
Aug 25 11:00:12 AM UTC 24 |
Aug 25 11:00:36 AM UTC 24 |
3544543038 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.585191930 |
|
|
Aug 25 11:00:11 AM UTC 24 |
Aug 25 11:00:38 AM UTC 24 |
10162917777 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.3613490085 |
|
|
Aug 25 11:00:31 AM UTC 24 |
Aug 25 11:00:38 AM UTC 24 |
345172872 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.3679841286 |
|
|
Aug 25 11:00:36 AM UTC 24 |
Aug 25 11:00:45 AM UTC 24 |
1287081655 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.1333901391 |
|
|
Aug 25 11:00:28 AM UTC 24 |
Aug 25 11:00:45 AM UTC 24 |
3033509994 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.2023387758 |
|
|
Aug 25 11:00:45 AM UTC 24 |
Aug 25 11:00:48 AM UTC 24 |
27253708 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.3789351358 |
|
|
Aug 25 11:00:45 AM UTC 24 |
Aug 25 11:00:48 AM UTC 24 |
22538172 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/11.spi_device_mailbox.1598515840 |
|
|
Aug 25 10:59:43 AM UTC 24 |
Aug 25 11:00:51 AM UTC 24 |
3626431465 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.1117417110 |
|
|
Aug 25 11:00:48 AM UTC 24 |
Aug 25 11:00:51 AM UTC 24 |
48434136 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.1198144790 |
|
|
Aug 25 11:00:27 AM UTC 24 |
Aug 25 11:00:52 AM UTC 24 |
7799279975 ps |
| T37 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/3.spi_device_stress_all.192233567 |
|
|
Aug 25 10:57:38 AM UTC 24 |
Aug 25 11:00:53 AM UTC 24 |
13542357719 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.377783567 |
|
|
Aug 25 11:00:53 AM UTC 24 |
Aug 25 11:00:55 AM UTC 24 |
38179250 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.1801934575 |
|
|
Aug 25 11:00:25 AM UTC 24 |
Aug 25 11:00:55 AM UTC 24 |
69816880941 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.1805847932 |
|
|
Aug 25 11:00:35 AM UTC 24 |
Aug 25 11:00:56 AM UTC 24 |
9117644372 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.1548383038 |
|
|
Aug 25 11:00:53 AM UTC 24 |
Aug 25 11:00:57 AM UTC 24 |
480808982 ps |
| T280 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3519004529 |
|
|
Aug 25 11:00:54 AM UTC 24 |
Aug 25 11:00:58 AM UTC 24 |
227014142 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.330023523 |
|
|
Aug 25 11:00:56 AM UTC 24 |
Aug 25 11:01:00 AM UTC 24 |
61326054 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_mode_ignore_cmds.2018823366 |
|
|
Aug 25 10:59:16 AM UTC 24 |
Aug 25 11:01:04 AM UTC 24 |
29959095311 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.821782662 |
|
|
Aug 25 11:00:48 AM UTC 24 |
Aug 25 11:01:04 AM UTC 24 |
4870267322 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/2.spi_device_flash_and_tpm.2970066625 |
|
|
Aug 25 10:57:12 AM UTC 24 |
Aug 25 11:01:05 AM UTC 24 |
20082991389 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.2088833825 |
|
|
Aug 25 11:00:36 AM UTC 24 |
Aug 25 11:01:06 AM UTC 24 |
1276779427 ps |
| T114 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.981748480 |
|
|
Aug 25 11:00:59 AM UTC 24 |
Aug 25 11:01:06 AM UTC 24 |
545873320 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.3341305109 |
|
|
Aug 25 11:00:35 AM UTC 24 |
Aug 25 11:01:07 AM UTC 24 |
961302192 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.74151395 |
|
|
Aug 25 11:00:20 AM UTC 24 |
Aug 25 11:01:07 AM UTC 24 |
1799980152 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.393131600 |
|
|
Aug 25 11:00:26 AM UTC 24 |
Aug 25 11:01:09 AM UTC 24 |
14763325108 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_and_tpm_min_idle.3489159011 |
|
|
Aug 25 10:57:37 AM UTC 24 |
Aug 25 11:01:09 AM UTC 24 |
13886458907 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.3938528196 |
|
|
Aug 25 11:01:01 AM UTC 24 |
Aug 25 11:01:10 AM UTC 24 |
770759501 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.940212053 |
|
|
Aug 25 11:01:08 AM UTC 24 |
Aug 25 11:01:11 AM UTC 24 |
18293709 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.3273492649 |
|
|
Aug 25 11:01:08 AM UTC 24 |
Aug 25 11:01:11 AM UTC 24 |
37502081 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.1205634623 |
|
|
Aug 25 11:00:27 AM UTC 24 |
Aug 25 11:01:11 AM UTC 24 |
6191466379 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.3356374601 |
|
|
Aug 25 11:01:10 AM UTC 24 |
Aug 25 11:01:13 AM UTC 24 |
65709134 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.1377989074 |
|
|
Aug 25 11:00:57 AM UTC 24 |
Aug 25 11:01:14 AM UTC 24 |
2652009548 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.411756848 |
|
|
Aug 25 11:01:11 AM UTC 24 |
Aug 25 11:01:14 AM UTC 24 |
37506814 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.747466837 |
|
|
Aug 25 11:01:11 AM UTC 24 |
Aug 25 11:01:14 AM UTC 24 |
80717804 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_mode_ignore_cmds.2073296301 |
|
|
Aug 25 10:59:33 AM UTC 24 |
Aug 25 11:01:14 AM UTC 24 |
26973976563 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.2905358948 |
|
|
Aug 25 11:01:11 AM UTC 24 |
Aug 25 11:01:15 AM UTC 24 |
92016239 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.2331972598 |
|
|
Aug 25 10:59:20 AM UTC 24 |
Aug 25 11:01:15 AM UTC 24 |
9549406623 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.261390181 |
|
|
Aug 25 11:00:29 AM UTC 24 |
Aug 25 11:01:17 AM UTC 24 |
3335230254 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.4046659380 |
|
|
Aug 25 11:01:01 AM UTC 24 |
Aug 25 11:01:18 AM UTC 24 |
620237793 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.914401697 |
|
|
Aug 25 11:01:14 AM UTC 24 |
Aug 25 11:01:20 AM UTC 24 |
124373672 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.3458469135 |
|
|
Aug 25 11:01:10 AM UTC 24 |
Aug 25 11:01:21 AM UTC 24 |
12603090948 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.546985465 |
|
|
Aug 25 10:58:17 AM UTC 24 |
Aug 25 11:01:21 AM UTC 24 |
22754594400 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.1713436226 |
|
|
Aug 25 11:01:05 AM UTC 24 |
Aug 25 11:01:25 AM UTC 24 |
4497894069 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.1211950251 |
|
|
Aug 25 11:01:23 AM UTC 24 |
Aug 25 11:01:25 AM UTC 24 |
15662544 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.1248623215 |
|
|
Aug 25 11:01:05 AM UTC 24 |
Aug 25 11:01:25 AM UTC 24 |
662029567 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.337181529 |
|
|
Aug 25 11:01:26 AM UTC 24 |
Aug 25 11:01:28 AM UTC 24 |
22525194 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.721593820 |
|
|
Aug 25 11:01:26 AM UTC 24 |
Aug 25 11:01:28 AM UTC 24 |
109700764 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.2916435410 |
|
|
Aug 25 11:01:15 AM UTC 24 |
Aug 25 11:01:28 AM UTC 24 |
3582506542 ps |
| T215 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.644142173 |
|
|
Aug 25 11:00:07 AM UTC 24 |
Aug 25 11:01:28 AM UTC 24 |
8640273218 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.2571599915 |
|
|
Aug 25 10:59:05 AM UTC 24 |
Aug 25 11:01:31 AM UTC 24 |
13672740370 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.3372483351 |
|
|
Aug 25 11:01:29 AM UTC 24 |
Aug 25 11:01:31 AM UTC 24 |
15056589 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.2854414040 |
|
|
Aug 25 11:01:18 AM UTC 24 |
Aug 25 11:01:31 AM UTC 24 |
3299430716 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.3203912131 |
|
|
Aug 25 11:00:56 AM UTC 24 |
Aug 25 11:01:32 AM UTC 24 |
12574252117 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.1828007564 |
|
|
Aug 25 11:00:15 AM UTC 24 |
Aug 25 11:01:32 AM UTC 24 |
9482991210 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.2239265545 |
|
|
Aug 25 11:01:15 AM UTC 24 |
Aug 25 11:01:33 AM UTC 24 |
2142935550 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/2.spi_device_stress_all.3884690238 |
|
|
Aug 25 10:57:16 AM UTC 24 |
Aug 25 11:01:33 AM UTC 24 |
29273163697 ps |
| T76 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/0.spi_device_stress_all.3474766155 |
|
|
Aug 25 10:56:41 AM UTC 24 |
Aug 25 11:01:33 AM UTC 24 |
13028416874 ps |
| T82 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.2997323134 |
|
|
Aug 25 11:01:29 AM UTC 24 |
Aug 25 11:01:34 AM UTC 24 |
653135615 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.2924615430 |
|
|
Aug 25 11:01:29 AM UTC 24 |
Aug 25 11:01:34 AM UTC 24 |
316211803 ps |
| T84 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.2779768867 |
|
|
Aug 25 11:01:12 AM UTC 24 |
Aug 25 11:01:34 AM UTC 24 |
2197888644 ps |
| T85 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.3283242928 |
|
|
Aug 25 11:00:57 AM UTC 24 |
Aug 25 11:01:36 AM UTC 24 |
2082054089 ps |
| T86 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.580125918 |
|
|
Aug 25 11:01:15 AM UTC 24 |
Aug 25 11:01:37 AM UTC 24 |
1334600723 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.1854498401 |
|
|
Aug 25 11:01:35 AM UTC 24 |
Aug 25 11:01:38 AM UTC 24 |
13826959 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.2156753009 |
|
|
Aug 25 11:01:37 AM UTC 24 |
Aug 25 11:01:40 AM UTC 24 |
194501771 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.2708084060 |
|
|
Aug 25 11:01:39 AM UTC 24 |
Aug 25 11:01:41 AM UTC 24 |
18208901 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.1014654954 |
|
|
Aug 25 11:01:34 AM UTC 24 |
Aug 25 11:01:42 AM UTC 24 |
1995035738 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.2941136369 |
|
|
Aug 25 11:01:41 AM UTC 24 |
Aug 25 11:01:43 AM UTC 24 |
128017016 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.844211249 |
|
|
Aug 25 11:00:52 AM UTC 24 |
Aug 25 11:01:45 AM UTC 24 |
5393358597 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.3005895391 |
|
|
Aug 25 11:01:43 AM UTC 24 |
Aug 25 11:01:46 AM UTC 24 |
16655992 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.2996140164 |
|
|
Aug 25 11:01:43 AM UTC 24 |
Aug 25 11:01:46 AM UTC 24 |
26394864 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.4042594491 |
|
|
Aug 25 11:01:34 AM UTC 24 |
Aug 25 11:01:46 AM UTC 24 |
2464723967 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.495855972 |
|
|
Aug 25 11:02:53 AM UTC 24 |
Aug 25 11:02:55 AM UTC 24 |
14814021 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.3943177993 |
|
|
Aug 25 10:59:49 AM UTC 24 |
Aug 25 11:01:47 AM UTC 24 |
14373703418 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.460454602 |
|
|
Aug 25 11:01:34 AM UTC 24 |
Aug 25 11:01:49 AM UTC 24 |
3144395293 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.1360402811 |
|
|
Aug 25 11:01:26 AM UTC 24 |
Aug 25 11:01:52 AM UTC 24 |
20555313263 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.2652483371 |
|
|
Aug 25 11:01:44 AM UTC 24 |
Aug 25 11:01:53 AM UTC 24 |
658377195 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.3796909602 |
|
|
Aug 25 10:59:49 AM UTC 24 |
Aug 25 11:01:53 AM UTC 24 |
6387840046 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.806762735 |
|
|
Aug 25 11:01:48 AM UTC 24 |
Aug 25 11:01:53 AM UTC 24 |
89283193 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.585781173 |
|
|
Aug 25 11:01:47 AM UTC 24 |
Aug 25 11:01:53 AM UTC 24 |
5618106369 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.2298224370 |
|
|
Aug 25 11:01:32 AM UTC 24 |
Aug 25 11:01:55 AM UTC 24 |
6645049574 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.3209451589 |
|
|
Aug 25 11:01:47 AM UTC 24 |
Aug 25 11:01:56 AM UTC 24 |
2200190841 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.1720751871 |
|
|
Aug 25 11:01:47 AM UTC 24 |
Aug 25 11:01:57 AM UTC 24 |
2222197190 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.2968118133 |
|
|
Aug 25 11:01:55 AM UTC 24 |
Aug 25 11:01:57 AM UTC 24 |
89741500 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.1515043323 |
|
|
Aug 25 11:01:56 AM UTC 24 |
Aug 25 11:01:59 AM UTC 24 |
23309401 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.2642846264 |
|
|
Aug 25 11:01:32 AM UTC 24 |
Aug 25 11:01:59 AM UTC 24 |
3778305442 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.3945565534 |
|
|
Aug 25 11:01:53 AM UTC 24 |
Aug 25 11:02:00 AM UTC 24 |
346193427 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.1113527529 |
|
|
Aug 25 11:01:57 AM UTC 24 |
Aug 25 11:02:01 AM UTC 24 |
123028202 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.3163405258 |
|
|
Aug 25 11:01:59 AM UTC 24 |
Aug 25 11:02:03 AM UTC 24 |
405861115 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/1.spi_device_flash_all.2758602647 |
|
|
Aug 25 10:56:53 AM UTC 24 |
Aug 25 11:02:04 AM UTC 24 |
22705611278 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.3113703481 |
|
|
Aug 25 11:01:33 AM UTC 24 |
Aug 25 11:02:04 AM UTC 24 |
16175252166 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.1273398785 |
|
|
Aug 25 11:02:01 AM UTC 24 |
Aug 25 11:02:05 AM UTC 24 |
111327267 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.4197045621 |
|
|
Aug 25 11:01:16 AM UTC 24 |
Aug 25 11:02:06 AM UTC 24 |
11655422892 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2962572164 |
|
|
Aug 25 11:01:42 AM UTC 24 |
Aug 25 11:02:07 AM UTC 24 |
6521239424 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.309274637 |
|
|
Aug 25 11:01:58 AM UTC 24 |
Aug 25 11:02:08 AM UTC 24 |
3480730261 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.4196473841 |
|
|
Aug 25 11:02:04 AM UTC 24 |
Aug 25 11:02:12 AM UTC 24 |
839959183 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.3719789580 |
|
|
Aug 25 11:02:04 AM UTC 24 |
Aug 25 11:02:13 AM UTC 24 |
587111929 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.219208600 |
|
|
Aug 25 11:02:13 AM UTC 24 |
Aug 25 11:02:15 AM UTC 24 |
14533375 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.2688239409 |
|
|
Aug 25 11:02:08 AM UTC 24 |
Aug 25 11:02:15 AM UTC 24 |
120461441 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.1333630971 |
|
|
Aug 25 11:02:02 AM UTC 24 |
Aug 25 11:02:15 AM UTC 24 |
1551016277 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.1225645419 |
|
|
Aug 25 11:02:14 AM UTC 24 |
Aug 25 11:02:16 AM UTC 24 |
16420248 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.3810405899 |
|
|
Aug 25 11:01:18 AM UTC 24 |
Aug 25 11:02:17 AM UTC 24 |
68055096357 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.1482058676 |
|
|
Aug 25 11:02:16 AM UTC 24 |
Aug 25 11:02:18 AM UTC 24 |
66553524 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.282976912 |
|
|
Aug 25 11:02:17 AM UTC 24 |
Aug 25 11:02:19 AM UTC 24 |
16260709 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.84396296 |
|
|
Aug 25 11:02:04 AM UTC 24 |
Aug 25 11:02:22 AM UTC 24 |
1203565900 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.2874564302 |
|
|
Aug 25 11:01:46 AM UTC 24 |
Aug 25 11:02:22 AM UTC 24 |
15814205646 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.2617142851 |
|
|
Aug 25 11:02:18 AM UTC 24 |
Aug 25 11:02:22 AM UTC 24 |
93806640 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm.3261187785 |
|
|
Aug 25 10:58:16 AM UTC 24 |
Aug 25 11:02:23 AM UTC 24 |
13256935290 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/5.spi_device_stress_all.3698626885 |
|
|
Aug 25 10:58:18 AM UTC 24 |
Aug 25 11:02:23 AM UTC 24 |
70697046770 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.982172052 |
|
|
Aug 25 11:02:02 AM UTC 24 |
Aug 25 11:02:23 AM UTC 24 |
4148664346 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.3225309339 |
|
|
Aug 25 11:02:24 AM UTC 24 |
Aug 25 11:02:27 AM UTC 24 |
111688648 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.3827601121 |
|
|
Aug 25 11:02:20 AM UTC 24 |
Aug 25 11:02:29 AM UTC 24 |
241458765 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.24724002 |
|
|
Aug 25 11:02:24 AM UTC 24 |
Aug 25 11:02:29 AM UTC 24 |
120381391 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.429150338 |
|
|
Aug 25 11:00:39 AM UTC 24 |
Aug 25 11:02:29 AM UTC 24 |
3105584692 ps |
| T216 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/9.spi_device_stress_all.1520076951 |
|
|
Aug 25 10:59:21 AM UTC 24 |
Aug 25 11:02:31 AM UTC 24 |
45693738718 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.328152558 |
|
|
Aug 25 11:02:24 AM UTC 24 |
Aug 25 11:02:31 AM UTC 24 |
113116352 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.3244290550 |
|
|
Aug 25 11:02:19 AM UTC 24 |
Aug 25 11:02:31 AM UTC 24 |
526460064 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.4146033708 |
|
|
Aug 25 11:02:22 AM UTC 24 |
Aug 25 11:02:32 AM UTC 24 |
219472629 ps |
| T385 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.370432878 |
|
|
Aug 25 11:01:42 AM UTC 24 |
Aug 25 11:02:33 AM UTC 24 |
5505434161 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.1371984805 |
|
|
Aug 25 11:02:30 AM UTC 24 |
Aug 25 11:02:33 AM UTC 24 |
58748171 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.3958772085 |
|
|
Aug 25 11:02:01 AM UTC 24 |
Aug 25 11:02:34 AM UTC 24 |
3865593786 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.2935514218 |
|
|
Aug 25 11:02:32 AM UTC 24 |
Aug 25 11:02:35 AM UTC 24 |
11729697 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.2520264909 |
|
|
Aug 25 11:02:32 AM UTC 24 |
Aug 25 11:02:35 AM UTC 24 |
39290531 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.348194744 |
|
|
Aug 25 11:02:34 AM UTC 24 |
Aug 25 11:02:36 AM UTC 24 |
172369963 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.3288254612 |
|
|
Aug 25 11:02:34 AM UTC 24 |
Aug 25 11:02:37 AM UTC 24 |
194603044 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.466546340 |
|
|
Aug 25 11:02:33 AM UTC 24 |
Aug 25 11:02:41 AM UTC 24 |
1316119674 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.4128879453 |
|
|
Aug 25 11:02:28 AM UTC 24 |
Aug 25 11:02:42 AM UTC 24 |
744372924 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.785451469 |
|
|
Aug 25 11:02:38 AM UTC 24 |
Aug 25 11:02:42 AM UTC 24 |
423361110 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.2921502584 |
|
|
Aug 25 11:02:35 AM UTC 24 |
Aug 25 11:02:45 AM UTC 24 |
1440696281 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.2374515017 |
|
|
Aug 25 11:01:51 AM UTC 24 |
Aug 25 11:02:45 AM UTC 24 |
1588745361 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.3526315161 |
|
|
Aug 25 11:01:29 AM UTC 24 |
Aug 25 11:02:48 AM UTC 24 |
8637912229 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.1610953256 |
|
|
Aug 25 11:02:35 AM UTC 24 |
Aug 25 11:02:49 AM UTC 24 |
3667312525 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.2308623704 |
|
|
Aug 25 11:02:43 AM UTC 24 |
Aug 25 11:02:50 AM UTC 24 |
857367892 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.2879625733 |
|
|
Aug 25 11:01:50 AM UTC 24 |
Aug 25 11:02:51 AM UTC 24 |
3306731425 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.2996656298 |
|
|
Aug 25 11:02:16 AM UTC 24 |
Aug 25 11:02:53 AM UTC 24 |
26072723963 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.799917011 |
|
|
Aug 25 11:01:15 AM UTC 24 |
Aug 25 11:02:53 AM UTC 24 |
9092451721 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.1668479690 |
|
|
Aug 25 11:02:51 AM UTC 24 |
Aug 25 11:02:53 AM UTC 24 |
11192821 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.3364537076 |
|
|
Aug 25 11:02:42 AM UTC 24 |
Aug 25 11:02:56 AM UTC 24 |
270028623 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.4225825202 |
|
|
Aug 25 11:02:55 AM UTC 24 |
Aug 25 11:02:57 AM UTC 24 |
16503892 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.3267041041 |
|
|
Aug 25 11:01:16 AM UTC 24 |
Aug 25 11:02:57 AM UTC 24 |
3213323986 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.3935212955 |
|
|
Aug 25 11:02:55 AM UTC 24 |
Aug 25 11:02:57 AM UTC 24 |
53240139 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.660754769 |
|
|
Aug 25 11:02:23 AM UTC 24 |
Aug 25 11:02:58 AM UTC 24 |
87745088808 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.1709883656 |
|
|
Aug 25 11:02:33 AM UTC 24 |
Aug 25 11:02:58 AM UTC 24 |
13568705078 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.2704509843 |
|
|
Aug 25 11:02:16 AM UTC 24 |
Aug 25 11:03:00 AM UTC 24 |
9023832662 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.1078239455 |
|
|
Aug 25 11:02:57 AM UTC 24 |
Aug 25 11:03:01 AM UTC 24 |
31668901 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.3503577447 |
|
|
Aug 25 11:02:30 AM UTC 24 |
Aug 25 11:03:01 AM UTC 24 |
1423058550 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.1944571306 |
|
|
Aug 25 11:02:59 AM UTC 24 |
Aug 25 11:03:01 AM UTC 24 |
179964042 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.213167852 |
|
|
Aug 25 11:02:37 AM UTC 24 |
Aug 25 11:03:02 AM UTC 24 |
12917078317 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.2501357324 |
|
|
Aug 25 11:02:58 AM UTC 24 |
Aug 25 11:03:02 AM UTC 24 |
136152686 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.3384217697 |
|
|
Aug 25 11:02:57 AM UTC 24 |
Aug 25 11:03:05 AM UTC 24 |
2578179020 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.1661883737 |
|
|
Aug 25 11:02:35 AM UTC 24 |
Aug 25 11:03:06 AM UTC 24 |
19415517261 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.3470539039 |
|
|
Aug 25 11:03:04 AM UTC 24 |
Aug 25 11:03:06 AM UTC 24 |
39422958 ps |
| T77 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.2538223424 |
|
|
Aug 25 11:01:07 AM UTC 24 |
Aug 25 11:03:06 AM UTC 24 |
7707420181 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm.2536300295 |
|
|
Aug 25 10:58:31 AM UTC 24 |
Aug 25 11:03:07 AM UTC 24 |
17709041338 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.1568235132 |
|
|
Aug 25 11:01:36 AM UTC 24 |
Aug 25 11:03:08 AM UTC 24 |
5815605690 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.3839016062 |
|
|
Aug 25 11:03:01 AM UTC 24 |
Aug 25 11:03:08 AM UTC 24 |
274492088 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.3035794115 |
|
|
Aug 25 11:03:06 AM UTC 24 |
Aug 25 11:03:08 AM UTC 24 |
121884515 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.1787474115 |
|
|
Aug 25 11:02:36 AM UTC 24 |
Aug 25 11:03:09 AM UTC 24 |
2275093568 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.1994661672 |
|
|
Aug 25 11:03:07 AM UTC 24 |
Aug 25 11:03:10 AM UTC 24 |
95330816 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.899435705 |
|
|
Aug 25 11:02:04 AM UTC 24 |
Aug 25 11:03:11 AM UTC 24 |
6945114329 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.2272160704 |
|
|
Aug 25 11:03:09 AM UTC 24 |
Aug 25 11:03:11 AM UTC 24 |
44452008 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.3356199622 |
|
|
Aug 25 11:02:58 AM UTC 24 |
Aug 25 11:03:12 AM UTC 24 |
2678419709 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.711025776 |
|
|
Aug 25 11:02:54 AM UTC 24 |
Aug 25 11:03:12 AM UTC 24 |
7532914940 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.2529314539 |
|
|
Aug 25 11:03:07 AM UTC 24 |
Aug 25 11:03:14 AM UTC 24 |
632537296 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.3883176863 |
|
|
Aug 25 11:01:58 AM UTC 24 |
Aug 25 11:03:14 AM UTC 24 |
39665178850 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.2039331463 |
|
|
Aug 25 11:02:55 AM UTC 24 |
Aug 25 11:03:14 AM UTC 24 |
1167939058 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.1120537791 |
|
|
Aug 25 10:59:34 AM UTC 24 |
Aug 25 11:03:15 AM UTC 24 |
12478246868 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.1248545833 |
|
|
Aug 25 11:03:11 AM UTC 24 |
Aug 25 11:03:16 AM UTC 24 |
273823438 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.170526151 |
|
|
Aug 25 11:02:59 AM UTC 24 |
Aug 25 11:03:17 AM UTC 24 |
1584908805 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.2779267803 |
|
|
Aug 25 11:03:10 AM UTC 24 |
Aug 25 11:03:18 AM UTC 24 |
904657490 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.4057881824 |
|
|
Aug 25 11:03:09 AM UTC 24 |
Aug 25 11:03:18 AM UTC 24 |
1306760376 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.168808391 |
|
|
Aug 25 11:03:12 AM UTC 24 |
Aug 25 11:03:20 AM UTC 24 |
849061562 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.3061530911 |
|
|
Aug 25 11:03:18 AM UTC 24 |
Aug 25 11:03:20 AM UTC 24 |
16684510 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.4261268549 |
|
|
Aug 25 11:03:18 AM UTC 24 |
Aug 25 11:03:20 AM UTC 24 |
20209664 ps |
| T157 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.3483813560 |
|
|
Aug 25 11:00:39 AM UTC 24 |
Aug 25 11:03:20 AM UTC 24 |
93132920672 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.2703436438 |
|
|
Aug 25 11:03:07 AM UTC 24 |
Aug 25 11:03:22 AM UTC 24 |
1283532139 ps |
| T115 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.1224023901 |
|
|
Aug 25 11:03:11 AM UTC 24 |
Aug 25 11:03:23 AM UTC 24 |
343660526 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.1441268297 |
|
|
Aug 25 11:03:12 AM UTC 24 |
Aug 25 11:03:23 AM UTC 24 |
767700068 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.2433558523 |
|
|
Aug 25 11:03:21 AM UTC 24 |
Aug 25 11:03:24 AM UTC 24 |
73870403 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.3530856483 |
|
|
Aug 25 11:02:07 AM UTC 24 |
Aug 25 11:03:24 AM UTC 24 |
42390597807 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.3006577205 |
|
|
Aug 25 11:03:19 AM UTC 24 |
Aug 25 11:03:27 AM UTC 24 |
1103888486 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.3902263682 |
|
|
Aug 25 11:03:21 AM UTC 24 |
Aug 25 11:03:27 AM UTC 24 |
706414129 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.1752873426 |
|
|
Aug 25 11:03:25 AM UTC 24 |
Aug 25 11:03:29 AM UTC 24 |
81892477 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.1294668510 |
|
|
Aug 25 11:03:23 AM UTC 24 |
Aug 25 11:03:31 AM UTC 24 |
215967103 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.1773241503 |
|
|
Aug 25 11:03:21 AM UTC 24 |
Aug 25 11:03:32 AM UTC 24 |
402050339 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.1777936607 |
|
|
Aug 25 11:01:20 AM UTC 24 |
Aug 25 11:03:33 AM UTC 24 |
19923885828 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.487384978 |
|
|
Aug 25 11:02:49 AM UTC 24 |
Aug 25 11:03:33 AM UTC 24 |
3302689086 ps |
| T222 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.4155568967 |
|
|
Aug 25 11:00:37 AM UTC 24 |
Aug 25 11:03:33 AM UTC 24 |
4922721005 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.3486763422 |
|
|
Aug 25 11:03:34 AM UTC 24 |
Aug 25 11:03:36 AM UTC 24 |
17451093 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.2394570572 |
|
|
Aug 25 11:03:25 AM UTC 24 |
Aug 25 11:03:36 AM UTC 24 |
1113343681 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2645625228 |
|
|
Aug 25 11:03:13 AM UTC 24 |
Aug 25 11:03:36 AM UTC 24 |
1227554643 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.3870983428 |
|
|
Aug 25 11:03:34 AM UTC 24 |
Aug 25 11:03:36 AM UTC 24 |
171513401 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.62082152 |
|
|
Aug 25 11:00:00 AM UTC 24 |
Aug 25 11:03:36 AM UTC 24 |
33384335018 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.92547866 |
|
|
Aug 25 11:03:28 AM UTC 24 |
Aug 25 11:03:36 AM UTC 24 |
1431078625 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.679258707 |
|
|
Aug 25 11:03:37 AM UTC 24 |
Aug 25 11:03:40 AM UTC 24 |
82640976 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.400048480 |
|
|
Aug 25 11:03:37 AM UTC 24 |
Aug 25 11:03:40 AM UTC 24 |
78298462 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.828972941 |
|
|
Aug 25 11:03:25 AM UTC 24 |
Aug 25 11:03:40 AM UTC 24 |
1059469509 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.225512102 |
|
|
Aug 25 11:02:57 AM UTC 24 |
Aug 25 11:03:41 AM UTC 24 |
32680365976 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.4152644908 |
|
|
Aug 25 11:02:24 AM UTC 24 |
Aug 25 11:03:42 AM UTC 24 |
6146576045 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.1749658157 |
|
|
Aug 25 11:03:35 AM UTC 24 |
Aug 25 11:03:43 AM UTC 24 |
591733159 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.4285445775 |
|
|
Aug 25 11:03:37 AM UTC 24 |
Aug 25 11:03:44 AM UTC 24 |
786370127 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.1846023712 |
|
|
Aug 25 11:03:41 AM UTC 24 |
Aug 25 11:03:45 AM UTC 24 |
110004406 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.2382098271 |
|
|
Aug 25 11:03:09 AM UTC 24 |
Aug 25 11:03:45 AM UTC 24 |
7229682278 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.2514635209 |
|
|
Aug 25 11:03:37 AM UTC 24 |
Aug 25 11:03:45 AM UTC 24 |
431230006 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.3967553643 |
|
|
Aug 25 11:03:19 AM UTC 24 |
Aug 25 11:03:46 AM UTC 24 |
4555735770 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.274540914 |
|
|
Aug 25 11:03:01 AM UTC 24 |
Aug 25 11:03:48 AM UTC 24 |
11153013525 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.1925435398 |
|
|
Aug 25 11:03:47 AM UTC 24 |
Aug 25 11:03:49 AM UTC 24 |
28042863 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.3421353101 |
|
|
Aug 25 11:03:42 AM UTC 24 |
Aug 25 11:03:51 AM UTC 24 |
107406931 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.3495972048 |
|
|
Aug 25 11:03:49 AM UTC 24 |
Aug 25 11:03:51 AM UTC 24 |
53522892 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_mode_ignore_cmds.3495667810 |
|
|
Aug 25 10:57:33 AM UTC 24 |
Aug 25 11:03:51 AM UTC 24 |
64296277905 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.2265137559 |
|
|
Aug 25 11:03:51 AM UTC 24 |
Aug 25 11:03:54 AM UTC 24 |
51454187 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.3584378064 |
|
|
Aug 25 11:03:37 AM UTC 24 |
Aug 25 11:03:55 AM UTC 24 |
3219772659 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.442826623 |
|
|
Aug 25 11:03:52 AM UTC 24 |
Aug 25 11:03:55 AM UTC 24 |
169145496 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.4220955321 |
|
|
Aug 25 11:03:28 AM UTC 24 |
Aug 25 11:03:56 AM UTC 24 |
4208498269 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.2139443871 |
|
|
Aug 25 11:03:41 AM UTC 24 |
Aug 25 11:03:56 AM UTC 24 |
1891875123 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.3158066092 |
|
|
Aug 25 11:03:42 AM UTC 24 |
Aug 25 11:03:57 AM UTC 24 |
927520941 ps |
| T243 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2642835073 |
|
|
Aug 25 11:01:54 AM UTC 24 |
Aug 25 11:04:00 AM UTC 24 |
6108904716 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.3088079020 |
|
|
Aug 25 11:03:56 AM UTC 24 |
Aug 25 11:04:02 AM UTC 24 |
288116769 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.1299769702 |
|
|
Aug 25 11:05:13 AM UTC 24 |
Aug 25 11:05:21 AM UTC 24 |
7091293685 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.3955170299 |
|
|
Aug 25 11:03:24 AM UTC 24 |
Aug 25 11:04:02 AM UTC 24 |
2680966549 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.609897683 |
|
|
Aug 25 11:03:21 AM UTC 24 |
Aug 25 11:04:03 AM UTC 24 |
18924649188 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.465153799 |
|
|
Aug 25 11:03:52 AM UTC 24 |
Aug 25 11:04:05 AM UTC 24 |
1910036481 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.3476079464 |
|
|
Aug 25 11:03:44 AM UTC 24 |
Aug 25 11:04:06 AM UTC 24 |
4192625851 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.391867374 |
|
|
Aug 25 11:04:01 AM UTC 24 |
Aug 25 11:04:07 AM UTC 24 |
669855300 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.1645199476 |
|
|
Aug 25 11:04:07 AM UTC 24 |
Aug 25 11:04:09 AM UTC 24 |
40291187 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.672185909 |
|
|
Aug 25 11:02:58 AM UTC 24 |
Aug 25 11:04:10 AM UTC 24 |
27532623605 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.3818924560 |
|
|
Aug 25 11:04:08 AM UTC 24 |
Aug 25 11:04:11 AM UTC 24 |
142992401 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.359871572 |
|
|
Aug 25 11:03:56 AM UTC 24 |
Aug 25 11:04:11 AM UTC 24 |
648002695 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.4280609670 |
|
|
Aug 25 11:02:11 AM UTC 24 |
Aug 25 11:04:14 AM UTC 24 |
3416043036 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.3890234116 |
|
|
Aug 25 11:04:11 AM UTC 24 |
Aug 25 11:04:14 AM UTC 24 |
110087156 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.479929670 |
|
|
Aug 25 11:03:54 AM UTC 24 |
Aug 25 11:04:14 AM UTC 24 |
8075128540 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.3056899400 |
|
|
Aug 25 11:03:03 AM UTC 24 |
Aug 25 11:04:15 AM UTC 24 |
28733696313 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.476623008 |
|
|
Aug 25 11:01:21 AM UTC 24 |
Aug 25 11:04:15 AM UTC 24 |
5317106503 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_rw.2534079286 |
|
|
Aug 25 11:04:12 AM UTC 24 |
Aug 25 11:04:15 AM UTC 24 |
224536731 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.870066346 |
|
|
Aug 25 11:03:57 AM UTC 24 |
Aug 25 11:04:17 AM UTC 24 |
5666004777 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.3366934840 |
|
|
Aug 25 11:02:43 AM UTC 24 |
Aug 25 11:04:18 AM UTC 24 |
7105509968 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.93773441 |
|
|
Aug 25 11:03:37 AM UTC 24 |
Aug 25 11:04:22 AM UTC 24 |
10761617114 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.2273927855 |
|
|
Aug 25 11:04:15 AM UTC 24 |
Aug 25 11:04:22 AM UTC 24 |
583600406 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.4089298740 |
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|
Aug 25 11:04:16 AM UTC 24 |
Aug 25 11:04:25 AM UTC 24 |
956278254 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.2685635250 |
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|
Aug 25 11:03:46 AM UTC 24 |
Aug 25 11:04:30 AM UTC 24 |
4240759159 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.2343875428 |
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|
Aug 25 11:03:49 AM UTC 24 |
Aug 25 11:04:30 AM UTC 24 |
95840105734 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_mode_ignore_cmds.70363506 |
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|
Aug 25 10:57:56 AM UTC 24 |
Aug 25 11:04:32 AM UTC 24 |
56656047710 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.3140098235 |
|
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Aug 25 11:04:15 AM UTC 24 |
Aug 25 11:04:32 AM UTC 24 |
652246292 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.827660552 |
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|
Aug 25 11:04:15 AM UTC 24 |
Aug 25 11:04:32 AM UTC 24 |
3001875337 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.2776164499 |
|
|
Aug 25 11:04:10 AM UTC 24 |
Aug 25 11:04:32 AM UTC 24 |
3143851662 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.256189122 |
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|
Aug 25 11:04:22 AM UTC 24 |
Aug 25 11:04:33 AM UTC 24 |
573696878 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.415256727 |
|
|
Aug 25 11:04:31 AM UTC 24 |
Aug 25 11:04:33 AM UTC 24 |
170308077 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.3393067250 |
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|
Aug 25 11:04:32 AM UTC 24 |
Aug 25 11:04:34 AM UTC 24 |
66665794 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.1328738314 |
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|
Aug 25 11:04:33 AM UTC 24 |
Aug 25 11:04:36 AM UTC 24 |
104746745 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.3009193539 |
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Aug 25 11:04:33 AM UTC 24 |
Aug 25 11:04:36 AM UTC 24 |
314890331 ps |