| T627 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.746847076 |
|
|
Aug 25 11:03:31 AM UTC 24 |
Aug 25 11:04:37 AM UTC 24 |
1955630923 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.140390552 |
|
|
Aug 25 11:04:16 AM UTC 24 |
Aug 25 11:04:40 AM UTC 24 |
3305500131 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.3367780464 |
|
|
Aug 25 11:04:18 AM UTC 24 |
Aug 25 11:04:40 AM UTC 24 |
3627762108 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.1459098599 |
|
|
Aug 25 11:04:37 AM UTC 24 |
Aug 25 11:04:41 AM UTC 24 |
143332500 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.2825719269 |
|
|
Aug 25 11:04:38 AM UTC 24 |
Aug 25 11:04:42 AM UTC 24 |
41867624 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.1306481758 |
|
|
Aug 25 11:04:10 AM UTC 24 |
Aug 25 11:04:43 AM UTC 24 |
3058998720 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.454024917 |
|
|
Aug 25 11:04:36 AM UTC 24 |
Aug 25 11:04:44 AM UTC 24 |
9121061875 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.1966013641 |
|
|
Aug 25 11:04:33 AM UTC 24 |
Aug 25 11:04:47 AM UTC 24 |
1164008911 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.4153651078 |
|
|
Aug 25 11:03:50 AM UTC 24 |
Aug 25 11:04:48 AM UTC 24 |
6700922278 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.2342641810 |
|
|
Aug 25 11:04:37 AM UTC 24 |
Aug 25 11:04:49 AM UTC 24 |
935216381 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.2812295849 |
|
|
Aug 25 11:03:14 AM UTC 24 |
Aug 25 11:04:49 AM UTC 24 |
131469848366 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.1039481802 |
|
|
Aug 25 11:04:41 AM UTC 24 |
Aug 25 11:04:51 AM UTC 24 |
2169600903 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.3243538148 |
|
|
Aug 25 11:04:50 AM UTC 24 |
Aug 25 11:04:52 AM UTC 24 |
24736689 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.4251498180 |
|
|
Aug 25 11:04:43 AM UTC 24 |
Aug 25 11:04:52 AM UTC 24 |
616506212 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.3423577301 |
|
|
Aug 25 11:03:57 AM UTC 24 |
Aug 25 11:04:52 AM UTC 24 |
19102302853 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_csb_read.1927600529 |
|
|
Aug 25 11:04:51 AM UTC 24 |
Aug 25 11:04:53 AM UTC 24 |
69371105 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.1257224999 |
|
|
Aug 25 11:04:52 AM UTC 24 |
Aug 25 11:04:55 AM UTC 24 |
198672417 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.183711259 |
|
|
Aug 25 11:04:53 AM UTC 24 |
Aug 25 11:04:55 AM UTC 24 |
31760281 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.1107275939 |
|
|
Aug 25 11:04:33 AM UTC 24 |
Aug 25 11:04:55 AM UTC 24 |
4833340771 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.134644143 |
|
|
Aug 25 11:04:41 AM UTC 24 |
Aug 25 11:04:57 AM UTC 24 |
649743911 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.3441815734 |
|
|
Aug 25 11:04:53 AM UTC 24 |
Aug 25 11:04:57 AM UTC 24 |
92293728 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.2581511947 |
|
|
Aug 25 11:04:19 AM UTC 24 |
Aug 25 11:04:59 AM UTC 24 |
3226936706 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.2524218187 |
|
|
Aug 25 11:04:58 AM UTC 24 |
Aug 25 11:05:02 AM UTC 24 |
88685073 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.1935844952 |
|
|
Aug 25 11:04:56 AM UTC 24 |
Aug 25 11:05:03 AM UTC 24 |
156496802 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.3497097479 |
|
|
Aug 25 11:00:07 AM UTC 24 |
Aug 25 11:05:03 AM UTC 24 |
91415652244 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.603666630 |
|
|
Aug 25 11:04:55 AM UTC 24 |
Aug 25 11:05:07 AM UTC 24 |
5307977158 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.801731008 |
|
|
Aug 25 11:04:04 AM UTC 24 |
Aug 25 11:05:08 AM UTC 24 |
16862872010 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.477677925 |
|
|
Aug 25 11:05:00 AM UTC 24 |
Aug 25 11:05:08 AM UTC 24 |
161662137 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_all.2938154266 |
|
|
Aug 25 10:59:02 AM UTC 24 |
Aug 25 11:05:08 AM UTC 24 |
98055632535 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.2666996872 |
|
|
Aug 25 11:04:58 AM UTC 24 |
Aug 25 11:05:09 AM UTC 24 |
1180019878 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.2025454110 |
|
|
Aug 25 10:59:35 AM UTC 24 |
Aug 25 11:05:11 AM UTC 24 |
17399046578 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.3965547927 |
|
|
Aug 25 11:03:58 AM UTC 24 |
Aug 25 11:05:11 AM UTC 24 |
82641376216 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.4134182004 |
|
|
Aug 25 11:05:09 AM UTC 24 |
Aug 25 11:05:12 AM UTC 24 |
47474470 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.1805493115 |
|
|
Aug 25 11:05:09 AM UTC 24 |
Aug 25 11:05:12 AM UTC 24 |
26713346 ps |
| T211 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2765152547 |
|
|
Aug 25 11:01:54 AM UTC 24 |
Aug 25 11:05:12 AM UTC 24 |
64274054854 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3412741880 |
|
|
Aug 25 11:04:54 AM UTC 24 |
Aug 25 11:05:13 AM UTC 24 |
22625598048 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.3786107346 |
|
|
Aug 25 11:04:16 AM UTC 24 |
Aug 25 11:05:14 AM UTC 24 |
3175570399 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.4075390346 |
|
|
Aug 25 11:05:13 AM UTC 24 |
Aug 25 11:05:15 AM UTC 24 |
77945560 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.3509101872 |
|
|
Aug 25 11:05:13 AM UTC 24 |
Aug 25 11:05:15 AM UTC 24 |
249635306 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.1160990821 |
|
|
Aug 25 11:05:04 AM UTC 24 |
Aug 25 11:05:16 AM UTC 24 |
4954373484 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.3446316005 |
|
|
Aug 25 11:02:46 AM UTC 24 |
Aug 25 11:05:21 AM UTC 24 |
11899816316 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.2256629288 |
|
|
Aug 25 11:01:54 AM UTC 24 |
Aug 25 11:05:21 AM UTC 24 |
10221263213 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.2714864640 |
|
|
Aug 25 11:04:34 AM UTC 24 |
Aug 25 11:05:23 AM UTC 24 |
31374074333 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.1489560725 |
|
|
Aug 25 11:05:13 AM UTC 24 |
Aug 25 11:05:23 AM UTC 24 |
864401467 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/1.spi_device_flash_and_tpm.319643738 |
|
|
Aug 25 10:56:54 AM UTC 24 |
Aug 25 11:05:23 AM UTC 24 |
151609242295 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.3382772056 |
|
|
Aug 25 11:05:14 AM UTC 24 |
Aug 25 11:05:25 AM UTC 24 |
360082199 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_all.842237297 |
|
|
Aug 25 11:05:24 AM UTC 24 |
Aug 25 11:05:26 AM UTC 24 |
28013601 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_stress_all.3491790400 |
|
|
Aug 25 11:04:31 AM UTC 24 |
Aug 25 11:05:26 AM UTC 24 |
1509293850 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.1413522729 |
|
|
Aug 25 11:05:16 AM UTC 24 |
Aug 25 11:05:27 AM UTC 24 |
178682102 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.2368648566 |
|
|
Aug 25 11:03:34 AM UTC 24 |
Aug 25 11:05:27 AM UTC 24 |
11595915814 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.4023551982 |
|
|
Aug 25 11:04:56 AM UTC 24 |
Aug 25 11:05:30 AM UTC 24 |
8113974840 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.315873813 |
|
|
Aug 25 11:05:28 AM UTC 24 |
Aug 25 11:05:30 AM UTC 24 |
33033766 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.3361804058 |
|
|
Aug 25 11:05:28 AM UTC 24 |
Aug 25 11:05:30 AM UTC 24 |
109770037 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.887186363 |
|
|
Aug 25 11:05:23 AM UTC 24 |
Aug 25 11:05:33 AM UTC 24 |
675983879 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.208533521 |
|
|
Aug 25 11:03:32 AM UTC 24 |
Aug 25 11:05:33 AM UTC 24 |
4032083989 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.312496612 |
|
|
Aug 25 11:04:53 AM UTC 24 |
Aug 25 11:05:33 AM UTC 24 |
6624634713 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.3920271899 |
|
|
Aug 25 11:05:31 AM UTC 24 |
Aug 25 11:05:33 AM UTC 24 |
105304212 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.153891723 |
|
|
Aug 25 11:05:31 AM UTC 24 |
Aug 25 11:05:35 AM UTC 24 |
34333859 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.4266834797 |
|
|
Aug 25 11:00:19 AM UTC 24 |
Aug 25 11:05:36 AM UTC 24 |
64679688745 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_stress_all.2569297991 |
|
|
Aug 25 11:05:09 AM UTC 24 |
Aug 25 11:05:36 AM UTC 24 |
11186273673 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.4229346280 |
|
|
Aug 25 11:05:16 AM UTC 24 |
Aug 25 11:05:36 AM UTC 24 |
2905212765 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.651449334 |
|
|
Aug 25 11:05:35 AM UTC 24 |
Aug 25 11:05:39 AM UTC 24 |
166041314 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.1994396989 |
|
|
Aug 25 11:05:15 AM UTC 24 |
Aug 25 11:05:39 AM UTC 24 |
6948447095 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.2371878926 |
|
|
Aug 25 11:05:17 AM UTC 24 |
Aug 25 11:05:39 AM UTC 24 |
1436253268 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.1548265172 |
|
|
Aug 25 11:05:35 AM UTC 24 |
Aug 25 11:05:40 AM UTC 24 |
397326618 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_all.2057865503 |
|
|
Aug 25 11:05:39 AM UTC 24 |
Aug 25 11:05:41 AM UTC 24 |
36707702 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.1126398444 |
|
|
Aug 25 11:05:22 AM UTC 24 |
Aug 25 11:05:42 AM UTC 24 |
531664172 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.4294798657 |
|
|
Aug 25 11:02:08 AM UTC 24 |
Aug 25 11:05:44 AM UTC 24 |
17509643141 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.2711861865 |
|
|
Aug 25 11:05:31 AM UTC 24 |
Aug 25 11:05:45 AM UTC 24 |
502004711 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.1065800710 |
|
|
Aug 25 11:05:43 AM UTC 24 |
Aug 25 11:05:45 AM UTC 24 |
44584913 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.2467669663 |
|
|
Aug 25 11:05:43 AM UTC 24 |
Aug 25 11:05:45 AM UTC 24 |
13840470 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_all.3598201879 |
|
|
Aug 25 11:04:03 AM UTC 24 |
Aug 25 11:05:46 AM UTC 24 |
39567931742 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.189964449 |
|
|
Aug 25 11:05:35 AM UTC 24 |
Aug 25 11:05:48 AM UTC 24 |
403639732 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.2701072823 |
|
|
Aug 25 11:05:33 AM UTC 24 |
Aug 25 11:05:49 AM UTC 24 |
508981238 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.88190381 |
|
|
Aug 25 11:05:46 AM UTC 24 |
Aug 25 11:05:49 AM UTC 24 |
17581574 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.3812941964 |
|
|
Aug 25 11:05:37 AM UTC 24 |
Aug 25 11:05:49 AM UTC 24 |
2269437312 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.3785061336 |
|
|
Aug 25 11:05:46 AM UTC 24 |
Aug 25 11:05:49 AM UTC 24 |
101685215 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.1720377285 |
|
|
Aug 25 10:59:19 AM UTC 24 |
Aug 25 11:05:51 AM UTC 24 |
105084807379 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_all.537412040 |
|
|
Aug 25 11:04:22 AM UTC 24 |
Aug 25 11:05:51 AM UTC 24 |
2935084564 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.3479120731 |
|
|
Aug 25 11:01:32 AM UTC 24 |
Aug 25 11:05:52 AM UTC 24 |
227965772745 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.1563930889 |
|
|
Aug 25 11:05:28 AM UTC 24 |
Aug 25 11:05:52 AM UTC 24 |
8733864212 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.1340051083 |
|
|
Aug 25 11:05:47 AM UTC 24 |
Aug 25 11:05:55 AM UTC 24 |
2990006875 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.636068563 |
|
|
Aug 25 11:05:50 AM UTC 24 |
Aug 25 11:05:55 AM UTC 24 |
1834125905 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.3784920018 |
|
|
Aug 25 11:05:45 AM UTC 24 |
Aug 25 11:05:59 AM UTC 24 |
12334855239 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.2501258981 |
|
|
Aug 25 11:05:50 AM UTC 24 |
Aug 25 11:05:59 AM UTC 24 |
170035346 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.2970123052 |
|
|
Aug 25 11:05:36 AM UTC 24 |
Aug 25 11:05:59 AM UTC 24 |
5003499175 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.3761569166 |
|
|
Aug 25 11:05:37 AM UTC 24 |
Aug 25 11:06:00 AM UTC 24 |
5784954176 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.2524694426 |
|
|
Aug 25 11:01:34 AM UTC 24 |
Aug 25 11:06:01 AM UTC 24 |
227074518380 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.908934210 |
|
|
Aug 25 11:05:51 AM UTC 24 |
Aug 25 11:06:01 AM UTC 24 |
491672092 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.786980813 |
|
|
Aug 25 11:05:59 AM UTC 24 |
Aug 25 11:06:01 AM UTC 24 |
12919736 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.2353632063 |
|
|
Aug 25 11:03:30 AM UTC 24 |
Aug 25 11:06:01 AM UTC 24 |
11010665164 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.1230341360 |
|
|
Aug 25 11:05:22 AM UTC 24 |
Aug 25 11:06:02 AM UTC 24 |
2813402805 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.3641199294 |
|
|
Aug 25 11:06:00 AM UTC 24 |
Aug 25 11:06:03 AM UTC 24 |
30954552 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.3301206727 |
|
|
Aug 25 11:05:53 AM UTC 24 |
Aug 25 11:06:04 AM UTC 24 |
742824624 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3622873682 |
|
|
Aug 25 11:06:02 AM UTC 24 |
Aug 25 11:06:04 AM UTC 24 |
130330610 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.2156248343 |
|
|
Aug 25 11:06:02 AM UTC 24 |
Aug 25 11:06:06 AM UTC 24 |
199174253 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.1948729390 |
|
|
Aug 25 11:05:50 AM UTC 24 |
Aug 25 11:06:06 AM UTC 24 |
3271810391 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.3581054843 |
|
|
Aug 25 11:05:28 AM UTC 24 |
Aug 25 11:06:07 AM UTC 24 |
4802785026 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.1564885553 |
|
|
Aug 25 11:06:03 AM UTC 24 |
Aug 25 11:06:11 AM UTC 24 |
3392512059 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.3887480572 |
|
|
Aug 25 11:06:07 AM UTC 24 |
Aug 25 11:06:12 AM UTC 24 |
202305751 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.1520951159 |
|
|
Aug 25 11:06:03 AM UTC 24 |
Aug 25 11:06:12 AM UTC 24 |
7741603405 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.3429520632 |
|
|
Aug 25 11:05:45 AM UTC 24 |
Aug 25 11:06:14 AM UTC 24 |
2052342765 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.702871327 |
|
|
Aug 25 11:06:02 AM UTC 24 |
Aug 25 11:06:16 AM UTC 24 |
1607912365 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.3838542916 |
|
|
Aug 25 11:06:00 AM UTC 24 |
Aug 25 11:06:19 AM UTC 24 |
3245272478 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.4094467152 |
|
|
Aug 25 11:06:17 AM UTC 24 |
Aug 25 11:06:19 AM UTC 24 |
21930679 ps |
| T223 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.3887095879 |
|
|
Aug 25 11:04:04 AM UTC 24 |
Aug 25 11:06:20 AM UTC 24 |
6763656858 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.1196047024 |
|
|
Aug 25 11:05:14 AM UTC 24 |
Aug 25 11:06:22 AM UTC 24 |
13636087399 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.1476046167 |
|
|
Aug 25 11:06:20 AM UTC 24 |
Aug 25 11:06:22 AM UTC 24 |
16899645 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.2927729637 |
|
|
Aug 25 11:06:22 AM UTC 24 |
Aug 25 11:06:24 AM UTC 24 |
27280626 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.3682560223 |
|
|
Aug 25 11:03:45 AM UTC 24 |
Aug 25 11:06:25 AM UTC 24 |
72470488490 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.1517427106 |
|
|
Aug 25 11:06:24 AM UTC 24 |
Aug 25 11:06:26 AM UTC 24 |
28576186 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.1827555656 |
|
|
Aug 25 11:06:12 AM UTC 24 |
Aug 25 11:06:28 AM UTC 24 |
904770269 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.2449282865 |
|
|
Aug 25 11:06:20 AM UTC 24 |
Aug 25 11:06:30 AM UTC 24 |
755084681 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.1809903612 |
|
|
Aug 25 11:05:50 AM UTC 24 |
Aug 25 11:06:31 AM UTC 24 |
25017645539 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.2148097308 |
|
|
Aug 25 11:06:03 AM UTC 24 |
Aug 25 11:06:31 AM UTC 24 |
1603227682 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.2735070593 |
|
|
Aug 25 11:05:49 AM UTC 24 |
Aug 25 11:06:31 AM UTC 24 |
80141490312 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.2146967730 |
|
|
Aug 25 11:06:26 AM UTC 24 |
Aug 25 11:06:33 AM UTC 24 |
649138200 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.2435054905 |
|
|
Aug 25 11:06:27 AM UTC 24 |
Aug 25 11:06:34 AM UTC 24 |
266438654 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_all.3026364655 |
|
|
Aug 25 11:06:13 AM UTC 24 |
Aug 25 11:06:35 AM UTC 24 |
1962905412 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.3752856660 |
|
|
Aug 25 11:05:53 AM UTC 24 |
Aug 25 11:06:36 AM UTC 24 |
5670952524 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.2275883319 |
|
|
Aug 25 11:06:29 AM UTC 24 |
Aug 25 11:06:36 AM UTC 24 |
671674620 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.3972570504 |
|
|
Aug 25 11:06:32 AM UTC 24 |
Aug 25 11:06:36 AM UTC 24 |
813558352 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/46.spi_device_alert_test.2349042088 |
|
|
Aug 25 11:10:18 AM UTC 24 |
Aug 25 11:10:20 AM UTC 24 |
48255994 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.2033772596 |
|
|
Aug 25 11:06:26 AM UTC 24 |
Aug 25 11:06:37 AM UTC 24 |
4163543546 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.2608247526 |
|
|
Aug 25 11:06:32 AM UTC 24 |
Aug 25 11:06:38 AM UTC 24 |
853932916 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.2568386342 |
|
|
Aug 25 11:06:04 AM UTC 24 |
Aug 25 11:06:40 AM UTC 24 |
1938768876 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.1540936647 |
|
|
Aug 25 11:06:38 AM UTC 24 |
Aug 25 11:06:40 AM UTC 24 |
14172849 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.2134113563 |
|
|
Aug 25 11:06:38 AM UTC 24 |
Aug 25 11:06:40 AM UTC 24 |
96885286 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.785854859 |
|
|
Aug 25 11:06:34 AM UTC 24 |
Aug 25 11:06:41 AM UTC 24 |
882487997 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.541965013 |
|
|
Aug 25 11:06:30 AM UTC 24 |
Aug 25 11:06:42 AM UTC 24 |
1741250775 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/45.spi_device_flash_mode.1977986923 |
|
|
Aug 25 11:09:52 AM UTC 24 |
Aug 25 11:10:20 AM UTC 24 |
5616229696 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.2660236831 |
|
|
Aug 25 11:06:20 AM UTC 24 |
Aug 25 11:06:42 AM UTC 24 |
5432751247 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.3842571287 |
|
|
Aug 25 11:06:41 AM UTC 24 |
Aug 25 11:06:43 AM UTC 24 |
31458747 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.3931852560 |
|
|
Aug 25 11:03:16 AM UTC 24 |
Aug 25 11:06:43 AM UTC 24 |
15379946946 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.3116323443 |
|
|
Aug 25 11:06:41 AM UTC 24 |
Aug 25 11:06:44 AM UTC 24 |
286541341 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.2816183731 |
|
|
Aug 25 11:06:33 AM UTC 24 |
Aug 25 11:06:46 AM UTC 24 |
446856862 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.627902677 |
|
|
Aug 25 11:06:44 AM UTC 24 |
Aug 25 11:06:49 AM UTC 24 |
94292305 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.3672065262 |
|
|
Aug 25 11:06:07 AM UTC 24 |
Aug 25 11:06:50 AM UTC 24 |
3144839032 ps |
| T279 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.382382404 |
|
|
Aug 25 11:06:44 AM UTC 24 |
Aug 25 11:06:50 AM UTC 24 |
717554607 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2370070491 |
|
|
Aug 25 11:06:41 AM UTC 24 |
Aug 25 11:06:51 AM UTC 24 |
19049150607 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.2073425462 |
|
|
Aug 25 11:06:05 AM UTC 24 |
Aug 25 11:06:53 AM UTC 24 |
18512127034 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.15905163 |
|
|
Aug 25 11:06:44 AM UTC 24 |
Aug 25 11:06:55 AM UTC 24 |
4031754282 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.1463883732 |
|
|
Aug 25 11:06:56 AM UTC 24 |
Aug 25 11:06:59 AM UTC 24 |
24670323 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.1896957289 |
|
|
Aug 25 11:01:54 AM UTC 24 |
Aug 25 11:07:00 AM UTC 24 |
25953509050 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2537393660 |
|
|
Aug 25 11:06:42 AM UTC 24 |
Aug 25 11:07:01 AM UTC 24 |
18674836389 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.2186543298 |
|
|
Aug 25 11:06:51 AM UTC 24 |
Aug 25 11:07:01 AM UTC 24 |
1958106288 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.3373222624 |
|
|
Aug 25 11:07:00 AM UTC 24 |
Aug 25 11:07:02 AM UTC 24 |
18779949 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.3756939950 |
|
|
Aug 25 11:07:01 AM UTC 24 |
Aug 25 11:07:03 AM UTC 24 |
319831734 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.955271619 |
|
|
Aug 25 11:06:39 AM UTC 24 |
Aug 25 11:07:04 AM UTC 24 |
4261031367 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.3303339378 |
|
|
Aug 25 11:07:02 AM UTC 24 |
Aug 25 11:07:04 AM UTC 24 |
94373341 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.3252950392 |
|
|
Aug 25 11:06:43 AM UTC 24 |
Aug 25 11:07:05 AM UTC 24 |
7694475606 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.2879861414 |
|
|
Aug 25 11:07:02 AM UTC 24 |
Aug 25 11:07:05 AM UTC 24 |
99728490 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.3034241086 |
|
|
Aug 25 11:05:24 AM UTC 24 |
Aug 25 11:07:08 AM UTC 24 |
14857093370 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.1655583844 |
|
|
Aug 25 11:06:40 AM UTC 24 |
Aug 25 11:07:11 AM UTC 24 |
3663712338 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.251370203 |
|
|
Aug 25 11:01:07 AM UTC 24 |
Aug 25 11:07:14 AM UTC 24 |
27486698719 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.48663612 |
|
|
Aug 25 11:07:05 AM UTC 24 |
Aug 25 11:07:14 AM UTC 24 |
1035472894 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.565825863 |
|
|
Aug 25 11:02:13 AM UTC 24 |
Aug 25 11:07:15 AM UTC 24 |
88869814578 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.2076385809 |
|
|
Aug 25 11:07:05 AM UTC 24 |
Aug 25 11:07:17 AM UTC 24 |
2973937308 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.432886941 |
|
|
Aug 25 11:07:02 AM UTC 24 |
Aug 25 11:07:20 AM UTC 24 |
3751064311 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.572994697 |
|
|
Aug 25 11:07:06 AM UTC 24 |
Aug 25 11:07:22 AM UTC 24 |
2393828832 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.1736571888 |
|
|
Aug 25 11:03:12 AM UTC 24 |
Aug 25 11:07:24 AM UTC 24 |
81711318409 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.3419427862 |
|
|
Aug 25 11:07:09 AM UTC 24 |
Aug 25 11:07:24 AM UTC 24 |
14900009688 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.1546401556 |
|
|
Aug 25 11:06:51 AM UTC 24 |
Aug 25 11:07:25 AM UTC 24 |
4568193055 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.427153066 |
|
|
Aug 25 11:07:23 AM UTC 24 |
Aug 25 11:07:25 AM UTC 24 |
32496626 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.3907606777 |
|
|
Aug 25 11:07:03 AM UTC 24 |
Aug 25 11:07:27 AM UTC 24 |
3151813976 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.1030041393 |
|
|
Aug 25 11:07:25 AM UTC 24 |
Aug 25 11:07:28 AM UTC 24 |
15645195 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.3276078032 |
|
|
Aug 25 10:59:49 AM UTC 24 |
Aug 25 11:07:28 AM UTC 24 |
24153620466 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.2863550160 |
|
|
Aug 25 11:07:27 AM UTC 24 |
Aug 25 11:07:29 AM UTC 24 |
56602746 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.3282476927 |
|
|
Aug 25 11:07:06 AM UTC 24 |
Aug 25 11:07:29 AM UTC 24 |
1382498792 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.94468432 |
|
|
Aug 25 11:07:06 AM UTC 24 |
Aug 25 11:07:30 AM UTC 24 |
1196305584 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.2206884416 |
|
|
Aug 25 11:07:29 AM UTC 24 |
Aug 25 11:07:31 AM UTC 24 |
28719387 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.1123803261 |
|
|
Aug 25 11:07:31 AM UTC 24 |
Aug 25 11:07:35 AM UTC 24 |
55956633 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.1720011923 |
|
|
Aug 25 11:07:16 AM UTC 24 |
Aug 25 11:07:35 AM UTC 24 |
4828471546 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.3260536562 |
|
|
Aug 25 11:07:27 AM UTC 24 |
Aug 25 11:07:36 AM UTC 24 |
3090309978 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.492766490 |
|
|
Aug 25 11:05:08 AM UTC 24 |
Aug 25 11:07:39 AM UTC 24 |
11832329300 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_stress_all.1095204552 |
|
|
Aug 25 11:06:38 AM UTC 24 |
Aug 25 11:07:41 AM UTC 24 |
21819255976 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.3299076523 |
|
|
Aug 25 11:04:26 AM UTC 24 |
Aug 25 11:07:42 AM UTC 24 |
9148442634 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.32731636 |
|
|
Aug 25 11:07:33 AM UTC 24 |
Aug 25 11:07:42 AM UTC 24 |
792892690 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1812070108 |
|
|
Aug 25 11:04:45 AM UTC 24 |
Aug 25 11:07:44 AM UTC 24 |
164742405822 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.2228177175 |
|
|
Aug 25 11:05:57 AM UTC 24 |
Aug 25 11:07:44 AM UTC 24 |
4410524613 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_stress_all.2286286480 |
|
|
Aug 25 11:07:43 AM UTC 24 |
Aug 25 11:07:45 AM UTC 24 |
56051915 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.1525999534 |
|
|
Aug 25 11:07:45 AM UTC 24 |
Aug 25 11:07:47 AM UTC 24 |
45108857 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.1508472337 |
|
|
Aug 25 11:07:45 AM UTC 24 |
Aug 25 11:07:47 AM UTC 24 |
19920411 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.4153100721 |
|
|
Aug 25 11:07:30 AM UTC 24 |
Aug 25 11:07:48 AM UTC 24 |
1489358106 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3698529259 |
|
|
Aug 25 11:07:25 AM UTC 24 |
Aug 25 11:07:49 AM UTC 24 |
17752625553 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.94980292 |
|
|
Aug 25 11:06:08 AM UTC 24 |
Aug 25 11:07:50 AM UTC 24 |
9085228794 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.3295021933 |
|
|
Aug 25 11:07:48 AM UTC 24 |
Aug 25 11:07:51 AM UTC 24 |
103137241 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.2900683104 |
|
|
Aug 25 11:07:46 AM UTC 24 |
Aug 25 11:07:51 AM UTC 24 |
1835153759 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.10248814 |
|
|
Aug 25 11:07:48 AM UTC 24 |
Aug 25 11:07:52 AM UTC 24 |
206965304 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.435353212 |
|
|
Aug 25 11:07:37 AM UTC 24 |
Aug 25 11:07:53 AM UTC 24 |
738077785 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.2166688598 |
|
|
Aug 25 11:07:52 AM UTC 24 |
Aug 25 11:07:57 AM UTC 24 |
73348863 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3714864018 |
|
|
Aug 25 11:04:48 AM UTC 24 |
Aug 25 11:07:57 AM UTC 24 |
14014092356 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode_ignore_cmds.3752908519 |
|
|
Aug 25 11:07:11 AM UTC 24 |
Aug 25 11:07:59 AM UTC 24 |
5905472532 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.2973719316 |
|
|
Aug 25 11:07:36 AM UTC 24 |
Aug 25 11:07:59 AM UTC 24 |
4275484091 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/47.spi_device_csb_read.3430691159 |
|
|
Aug 25 11:10:20 AM UTC 24 |
Aug 25 11:10:22 AM UTC 24 |
35722316 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.634989113 |
|
|
Aug 25 11:01:35 AM UTC 24 |
Aug 25 11:08:00 AM UTC 24 |
29842554683 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_all.2672246827 |
|
|
Aug 25 11:06:35 AM UTC 24 |
Aug 25 11:08:02 AM UTC 24 |
13815372434 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.3482729885 |
|
|
Aug 25 11:05:56 AM UTC 24 |
Aug 25 11:08:02 AM UTC 24 |
9632824786 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_stress_all.3478283530 |
|
|
Aug 25 11:06:53 AM UTC 24 |
Aug 25 11:08:02 AM UTC 24 |
2842745247 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.2362592511 |
|
|
Aug 25 11:07:54 AM UTC 24 |
Aug 25 11:08:03 AM UTC 24 |
2799651059 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.445548552 |
|
|
Aug 25 11:06:43 AM UTC 24 |
Aug 25 11:08:03 AM UTC 24 |
31146277265 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_all.1570560735 |
|
|
Aug 25 11:07:16 AM UTC 24 |
Aug 25 11:08:03 AM UTC 24 |
9138248647 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.124046108 |
|
|
Aug 25 11:02:09 AM UTC 24 |
Aug 25 11:08:04 AM UTC 24 |
286802645459 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.3390992003 |
|
|
Aug 25 11:08:04 AM UTC 24 |
Aug 25 11:08:06 AM UTC 24 |
38706070 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.1300326425 |
|
|
Aug 25 11:08:04 AM UTC 24 |
Aug 25 11:08:06 AM UTC 24 |
64155278 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_stress_all.1615003001 |
|
|
Aug 25 11:08:04 AM UTC 24 |
Aug 25 11:08:06 AM UTC 24 |
51890057 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.1460539924 |
|
|
Aug 25 11:08:04 AM UTC 24 |
Aug 25 11:08:07 AM UTC 24 |
64351904 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.3968289639 |
|
|
Aug 25 11:08:00 AM UTC 24 |
Aug 25 11:08:07 AM UTC 24 |
267491106 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.142996789 |
|
|
Aug 25 11:07:59 AM UTC 24 |
Aug 25 11:08:07 AM UTC 24 |
175306561 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.1370037315 |
|
|
Aug 25 11:07:52 AM UTC 24 |
Aug 25 11:08:08 AM UTC 24 |
2106646016 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.3221028752 |
|
|
Aug 25 11:07:29 AM UTC 24 |
Aug 25 11:08:09 AM UTC 24 |
21400076611 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/42.spi_device_intercept.3969666700 |
|
|
Aug 25 11:09:00 AM UTC 24 |
Aug 25 11:09:10 AM UTC 24 |
1297122872 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.927076052 |
|
|
Aug 25 11:07:29 AM UTC 24 |
Aug 25 11:08:09 AM UTC 24 |
5292916898 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm.1618619593 |
|
|
Aug 25 11:05:41 AM UTC 24 |
Aug 25 11:08:11 AM UTC 24 |
25862630496 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_all.2814347276 |
|
|
Aug 25 11:07:40 AM UTC 24 |
Aug 25 11:08:12 AM UTC 24 |
2820315375 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/42.spi_device_mailbox.3098732299 |
|
|
Aug 25 11:09:00 AM UTC 24 |
Aug 25 11:09:11 AM UTC 24 |
4002077264 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode.2193968567 |
|
|
Aug 25 11:08:09 AM UTC 24 |
Aug 25 11:08:13 AM UTC 24 |
60259048 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.3615464598 |
|
|
Aug 25 11:08:09 AM UTC 24 |
Aug 25 11:08:14 AM UTC 24 |
110978260 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.4112167054 |
|
|
Aug 25 11:07:51 AM UTC 24 |
Aug 25 11:08:14 AM UTC 24 |
1722644250 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2778467181 |
|
|
Aug 25 11:07:50 AM UTC 24 |
Aug 25 11:08:15 AM UTC 24 |
5213392641 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_mailbox.4175872231 |
|
|
Aug 25 11:07:52 AM UTC 24 |
Aug 25 11:08:16 AM UTC 24 |
1150085112 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.797836867 |
|
|
Aug 25 11:08:15 AM UTC 24 |
Aug 25 11:08:17 AM UTC 24 |
21960339 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_all.933705070 |
|
|
Aug 25 11:05:53 AM UTC 24 |
Aug 25 11:09:09 AM UTC 24 |
38729985674 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.184590195 |
|
|
Aug 25 11:08:10 AM UTC 24 |
Aug 25 11:08:18 AM UTC 24 |
1031656338 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.1064665284 |
|
|
Aug 25 11:08:16 AM UTC 24 |
Aug 25 11:08:18 AM UTC 24 |
14944286 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.2804822078 |
|
|
Aug 25 11:08:05 AM UTC 24 |
Aug 25 11:08:21 AM UTC 24 |
199301319 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.2283974026 |
|
|
Aug 25 11:08:19 AM UTC 24 |
Aug 25 11:08:21 AM UTC 24 |
68983717 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_rw.2365800348 |
|
|
Aug 25 11:08:19 AM UTC 24 |
Aug 25 11:08:21 AM UTC 24 |
19873080 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.2218425871 |
|
|
Aug 25 11:08:04 AM UTC 24 |
Aug 25 11:08:22 AM UTC 24 |
10878771468 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.3458788890 |
|
|
Aug 25 11:08:16 AM UTC 24 |
Aug 25 11:08:24 AM UTC 24 |
4151056677 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_mailbox.3561812865 |
|
|
Aug 25 11:08:22 AM UTC 24 |
Aug 25 11:08:26 AM UTC 24 |
30399565 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_cfg_cmd.514158959 |
|
|
Aug 25 11:08:24 AM UTC 24 |
Aug 25 11:08:29 AM UTC 24 |
80701379 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_upload.2178135905 |
|
|
Aug 25 11:08:09 AM UTC 24 |
Aug 25 11:08:29 AM UTC 24 |
17018562465 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_mailbox.3350706699 |
|
|
Aug 25 11:08:08 AM UTC 24 |
Aug 25 11:08:32 AM UTC 24 |
1331648277 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.749432413 |
|
|
Aug 25 11:08:08 AM UTC 24 |
Aug 25 11:08:32 AM UTC 24 |
6135219532 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.2156526330 |
|
|
Aug 25 11:07:30 AM UTC 24 |
Aug 25 11:08:33 AM UTC 24 |
5030842852 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.1031625016 |
|
|
Aug 25 11:08:21 AM UTC 24 |
Aug 25 11:08:34 AM UTC 24 |
449145873 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_all.3652925965 |
|
|
Aug 25 11:07:48 AM UTC 24 |
Aug 25 11:08:35 AM UTC 24 |
12824353619 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.2333666247 |
|
|
Aug 25 11:08:19 AM UTC 24 |
Aug 25 11:08:35 AM UTC 24 |
4285920571 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_read_buffer_direct.1243983531 |
|
|
Aug 25 11:08:29 AM UTC 24 |
Aug 25 11:08:35 AM UTC 24 |
81471856 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_alert_test.2959906588 |
|
|
Aug 25 11:08:35 AM UTC 24 |
Aug 25 11:08:37 AM UTC 24 |
17640447 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_intercept.1558556784 |
|
|
Aug 25 11:08:22 AM UTC 24 |
Aug 25 11:08:37 AM UTC 24 |
3861452575 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.1182914445 |
|
|
Aug 25 11:04:42 AM UTC 24 |
Aug 25 11:08:38 AM UTC 24 |
45947351425 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/41.spi_device_csb_read.2640213590 |
|
|
Aug 25 11:08:37 AM UTC 24 |
Aug 25 11:08:39 AM UTC 24 |
33269232 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_and_tpm_min_idle.12805048 |
|
|
Aug 25 11:07:43 AM UTC 24 |
Aug 25 11:08:39 AM UTC 24 |
6890444682 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_sts_read.3687308213 |
|
|
Aug 25 11:08:38 AM UTC 24 |
Aug 25 11:08:40 AM UTC 24 |
13292607 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_all.114094684 |
|
|
Aug 25 11:08:19 AM UTC 24 |
Aug 25 11:08:41 AM UTC 24 |
1209897720 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.3652635098 |
|
|
Aug 25 11:08:37 AM UTC 24 |
Aug 25 11:08:42 AM UTC 24 |
1026847378 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_rw.3012581748 |
|
|
Aug 25 11:08:38 AM UTC 24 |
Aug 25 11:08:45 AM UTC 24 |
315764291 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_24/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.2182702207 |
|
|
Aug 25 11:08:08 AM UTC 24 |
Aug 25 11:08:46 AM UTC 24 |
50251428187 ps |