| T125 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.918614060 |
|
|
Aug 27 07:43:51 PM UTC 24 |
Aug 27 07:45:12 PM UTC 24 |
6412362315 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.2180821749 |
|
|
Aug 27 07:45:09 PM UTC 24 |
Aug 27 07:45:12 PM UTC 24 |
51629777 ps |
| T144 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.3385194481 |
|
|
Aug 27 07:44:26 PM UTC 24 |
Aug 27 07:45:14 PM UTC 24 |
24191221215 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/2.spi_device_flash_mode_ignore_cmds.2739134274 |
|
|
Aug 27 07:41:43 PM UTC 24 |
Aug 27 07:45:16 PM UTC 24 |
44539384870 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_mailbox.3288168456 |
|
|
Aug 27 07:44:43 PM UTC 24 |
Aug 27 07:45:17 PM UTC 24 |
2781738319 ps |
| T79 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_pass_addr_payload_swap.131850711 |
|
|
Aug 27 07:44:19 PM UTC 24 |
Aug 27 07:45:56 PM UTC 24 |
72231440218 ps |
| T229 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.1710854943 |
|
|
Aug 27 07:45:13 PM UTC 24 |
Aug 27 07:45:17 PM UTC 24 |
465036461 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_all.1512436687 |
|
|
Aug 27 07:43:13 PM UTC 24 |
Aug 27 07:45:20 PM UTC 24 |
12927924814 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.2654199561 |
|
|
Aug 27 07:45:01 PM UTC 24 |
Aug 27 07:45:20 PM UTC 24 |
8521025963 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_all.3709826748 |
|
|
Aug 27 07:42:31 PM UTC 24 |
Aug 27 07:45:20 PM UTC 24 |
20930685756 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.2837548426 |
|
|
Aug 27 07:44:09 PM UTC 24 |
Aug 27 07:45:20 PM UTC 24 |
2560851722 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_tpm_all.1041893211 |
|
|
Aug 27 07:44:14 PM UTC 24 |
Aug 27 07:45:20 PM UTC 24 |
36388455411 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_stress_all.3184909378 |
|
|
Aug 27 07:44:32 PM UTC 24 |
Aug 27 07:45:21 PM UTC 24 |
2326842347 ps |
| T80 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.1711874367 |
|
|
Aug 27 07:45:08 PM UTC 24 |
Aug 27 07:45:21 PM UTC 24 |
1264073962 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.1412782814 |
|
|
Aug 27 07:45:09 PM UTC 24 |
Aug 27 07:45:22 PM UTC 24 |
632063926 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.607175231 |
|
|
Aug 27 07:45:07 PM UTC 24 |
Aug 27 07:45:22 PM UTC 24 |
12520429513 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.1488776534 |
|
|
Aug 27 07:45:20 PM UTC 24 |
Aug 27 07:45:22 PM UTC 24 |
30358630 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.3436053036 |
|
|
Aug 27 07:45:17 PM UTC 24 |
Aug 27 07:45:23 PM UTC 24 |
1345864495 ps |
| T126 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.1969994096 |
|
|
Aug 27 07:43:13 PM UTC 24 |
Aug 27 07:45:23 PM UTC 24 |
43515126241 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.3545955740 |
|
|
Aug 27 07:45:22 PM UTC 24 |
Aug 27 07:45:24 PM UTC 24 |
19964734 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.819431929 |
|
|
Aug 27 07:45:22 PM UTC 24 |
Aug 27 07:45:24 PM UTC 24 |
25038710 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.3383152544 |
|
|
Aug 27 07:45:23 PM UTC 24 |
Aug 27 07:45:25 PM UTC 24 |
25810264 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.3975086442 |
|
|
Aug 27 07:45:23 PM UTC 24 |
Aug 27 07:45:25 PM UTC 24 |
205970780 ps |
| T241 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.1571928186 |
|
|
Aug 27 07:45:12 PM UTC 24 |
Aug 27 07:45:29 PM UTC 24 |
1883643646 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.2831517680 |
|
|
Aug 27 07:45:03 PM UTC 24 |
Aug 27 07:45:30 PM UTC 24 |
7551666732 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.4193152726 |
|
|
Aug 27 07:45:25 PM UTC 24 |
Aug 27 07:45:31 PM UTC 24 |
636437429 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.1816917888 |
|
|
Aug 27 07:45:24 PM UTC 24 |
Aug 27 07:45:32 PM UTC 24 |
1107233583 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/10.spi_device_mailbox.3305746439 |
|
|
Aug 27 07:43:44 PM UTC 24 |
Aug 27 07:45:32 PM UTC 24 |
25768420283 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.1890973867 |
|
|
Aug 27 07:45:26 PM UTC 24 |
Aug 27 07:45:33 PM UTC 24 |
1062359412 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3923407325 |
|
|
Aug 27 07:45:23 PM UTC 24 |
Aug 27 07:45:34 PM UTC 24 |
2184852014 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.3949772807 |
|
|
Aug 27 07:45:32 PM UTC 24 |
Aug 27 07:45:34 PM UTC 24 |
22402000 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm_min_idle.252291168 |
|
|
Aug 27 07:42:45 PM UTC 24 |
Aug 27 07:45:35 PM UTC 24 |
63823883996 ps |
| T214 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.1801522702 |
|
|
Aug 27 07:43:32 PM UTC 24 |
Aug 27 07:45:36 PM UTC 24 |
37710949249 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.1923881061 |
|
|
Aug 27 07:45:34 PM UTC 24 |
Aug 27 07:45:36 PM UTC 24 |
59848398 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.2656408490 |
|
|
Aug 27 07:45:25 PM UTC 24 |
Aug 27 07:45:37 PM UTC 24 |
836151129 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.3122239170 |
|
|
Aug 27 07:45:31 PM UTC 24 |
Aug 27 07:45:37 PM UTC 24 |
105269323 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.352632089 |
|
|
Aug 27 07:45:22 PM UTC 24 |
Aug 27 07:45:37 PM UTC 24 |
5732118528 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.4135395077 |
|
|
Aug 27 07:45:35 PM UTC 24 |
Aug 27 07:45:37 PM UTC 24 |
40772529 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_upload.3903434943 |
|
|
Aug 27 07:44:44 PM UTC 24 |
Aug 27 07:45:38 PM UTC 24 |
12154585429 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.3032444254 |
|
|
Aug 27 07:45:36 PM UTC 24 |
Aug 27 07:45:39 PM UTC 24 |
66463866 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.2314446125 |
|
|
Aug 27 07:45:37 PM UTC 24 |
Aug 27 07:45:39 PM UTC 24 |
11108180 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.3596324217 |
|
|
Aug 27 07:45:37 PM UTC 24 |
Aug 27 07:45:41 PM UTC 24 |
91599347 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.2615640173 |
|
|
Aug 27 07:45:24 PM UTC 24 |
Aug 27 07:45:41 PM UTC 24 |
2010428152 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.256336549 |
|
|
Aug 27 07:45:37 PM UTC 24 |
Aug 27 07:45:41 PM UTC 24 |
239284265 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.36081931 |
|
|
Aug 27 07:45:39 PM UTC 24 |
Aug 27 07:45:43 PM UTC 24 |
257612191 ps |
| T381 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/0.spi_device_flash_and_tpm_min_idle.179537502 |
|
|
Aug 27 07:41:16 PM UTC 24 |
Aug 27 07:45:46 PM UTC 24 |
93688535222 ps |
| T139 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/0.spi_device_flash_mode_ignore_cmds.2949747614 |
|
|
Aug 27 07:41:14 PM UTC 24 |
Aug 27 07:45:49 PM UTC 24 |
125275465797 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.3356226468 |
|
|
Aug 27 07:42:31 PM UTC 24 |
Aug 27 07:45:49 PM UTC 24 |
45229795539 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.4209737854 |
|
|
Aug 27 07:45:13 PM UTC 24 |
Aug 27 07:45:50 PM UTC 24 |
1943981897 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.685646527 |
|
|
Aug 27 07:45:40 PM UTC 24 |
Aug 27 07:45:50 PM UTC 24 |
2106108304 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/0.spi_device_flash_and_tpm.4021801553 |
|
|
Aug 27 07:41:15 PM UTC 24 |
Aug 27 07:45:50 PM UTC 24 |
67754631989 ps |
| T259 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.1511715384 |
|
|
Aug 27 07:45:39 PM UTC 24 |
Aug 27 07:45:51 PM UTC 24 |
1099348243 ps |
| T320 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.2049112600 |
|
|
Aug 27 07:45:39 PM UTC 24 |
Aug 27 07:45:52 PM UTC 24 |
9270335092 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.2669423156 |
|
|
Aug 27 07:45:42 PM UTC 24 |
Aug 27 07:45:52 PM UTC 24 |
890484605 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.3737601108 |
|
|
Aug 27 07:45:51 PM UTC 24 |
Aug 27 07:45:53 PM UTC 24 |
10765136 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.3986816272 |
|
|
Aug 27 07:45:51 PM UTC 24 |
Aug 27 07:45:53 PM UTC 24 |
36984419 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.658999458 |
|
|
Aug 27 07:45:51 PM UTC 24 |
Aug 27 07:45:54 PM UTC 24 |
146220937 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.1287306826 |
|
|
Aug 27 07:45:37 PM UTC 24 |
Aug 27 07:45:54 PM UTC 24 |
7852386603 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.371889470 |
|
|
Aug 27 07:45:53 PM UTC 24 |
Aug 27 07:45:55 PM UTC 24 |
11654640 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.2428581031 |
|
|
Aug 27 07:45:53 PM UTC 24 |
Aug 27 07:45:56 PM UTC 24 |
22587194 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.2931315906 |
|
|
Aug 27 07:45:55 PM UTC 24 |
Aug 27 07:45:59 PM UTC 24 |
337095665 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_mode_ignore_cmds.234863292 |
|
|
Aug 27 07:42:13 PM UTC 24 |
Aug 27 07:46:00 PM UTC 24 |
25064946448 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.2284839169 |
|
|
Aug 27 07:45:43 PM UTC 24 |
Aug 27 07:46:01 PM UTC 24 |
6689169495 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.755014426 |
|
|
Aug 27 07:45:57 PM UTC 24 |
Aug 27 07:46:01 PM UTC 24 |
1404169333 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.534849137 |
|
|
Aug 27 07:45:55 PM UTC 24 |
Aug 27 07:46:01 PM UTC 24 |
274551159 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.4126644050 |
|
|
Aug 27 07:45:51 PM UTC 24 |
Aug 27 07:46:03 PM UTC 24 |
3789669305 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/2.spi_device_flash_and_tpm.581442001 |
|
|
Aug 27 07:41:45 PM UTC 24 |
Aug 27 07:46:05 PM UTC 24 |
119753296934 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.4244373203 |
|
|
Aug 27 07:45:53 PM UTC 24 |
Aug 27 07:46:06 PM UTC 24 |
4470875488 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.4026036506 |
|
|
Aug 27 07:45:56 PM UTC 24 |
Aug 27 07:46:08 PM UTC 24 |
2699537891 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.3142602811 |
|
|
Aug 27 07:46:06 PM UTC 24 |
Aug 27 07:46:08 PM UTC 24 |
786035650 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.2567260111 |
|
|
Aug 27 07:46:07 PM UTC 24 |
Aug 27 07:46:09 PM UTC 24 |
39981681 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.2518327925 |
|
|
Aug 27 07:45:22 PM UTC 24 |
Aug 27 07:46:09 PM UTC 24 |
6248074825 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.1423288761 |
|
|
Aug 27 07:45:57 PM UTC 24 |
Aug 27 07:46:10 PM UTC 24 |
813047604 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.3473454778 |
|
|
Aug 27 07:46:09 PM UTC 24 |
Aug 27 07:46:11 PM UTC 24 |
18632289 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.2292925236 |
|
|
Aug 27 07:46:00 PM UTC 24 |
Aug 27 07:46:11 PM UTC 24 |
1352342577 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.1224218736 |
|
|
Aug 27 07:46:09 PM UTC 24 |
Aug 27 07:46:11 PM UTC 24 |
40178232 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.2861229574 |
|
|
Aug 27 07:46:11 PM UTC 24 |
Aug 27 07:46:14 PM UTC 24 |
111511158 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.302845831 |
|
|
Aug 27 07:46:12 PM UTC 24 |
Aug 27 07:46:15 PM UTC 24 |
57308503 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.3609406399 |
|
|
Aug 27 07:46:10 PM UTC 24 |
Aug 27 07:46:15 PM UTC 24 |
975309291 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.2356830421 |
|
|
Aug 27 07:43:13 PM UTC 24 |
Aug 27 07:46:17 PM UTC 24 |
30981732058 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.4112440762 |
|
|
Aug 27 07:46:12 PM UTC 24 |
Aug 27 07:46:17 PM UTC 24 |
405458016 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2051855880 |
|
|
Aug 27 07:46:10 PM UTC 24 |
Aug 27 07:46:18 PM UTC 24 |
4900267872 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.2168555767 |
|
|
Aug 27 07:45:55 PM UTC 24 |
Aug 27 07:46:19 PM UTC 24 |
5271047833 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.1532745944 |
|
|
Aug 27 07:46:15 PM UTC 24 |
Aug 27 07:46:20 PM UTC 24 |
119151807 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.394146222 |
|
|
Aug 27 07:45:40 PM UTC 24 |
Aug 27 07:46:22 PM UTC 24 |
96367394764 ps |
| T244 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.2486111727 |
|
|
Aug 27 07:46:18 PM UTC 24 |
Aug 27 07:46:23 PM UTC 24 |
155017874 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.206824498 |
|
|
Aug 27 07:46:18 PM UTC 24 |
Aug 27 07:46:23 PM UTC 24 |
129145973 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.378461505 |
|
|
Aug 27 07:46:12 PM UTC 24 |
Aug 27 07:46:24 PM UTC 24 |
3021189740 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.1579703739 |
|
|
Aug 27 07:46:17 PM UTC 24 |
Aug 27 07:46:24 PM UTC 24 |
1960047084 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.3995764401 |
|
|
Aug 27 07:46:20 PM UTC 24 |
Aug 27 07:46:25 PM UTC 24 |
155136177 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.3196534952 |
|
|
Aug 27 07:46:02 PM UTC 24 |
Aug 27 07:46:26 PM UTC 24 |
5646569963 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.736206057 |
|
|
Aug 27 07:46:24 PM UTC 24 |
Aug 27 07:46:27 PM UTC 24 |
56351791 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.3068271716 |
|
|
Aug 27 07:46:26 PM UTC 24 |
Aug 27 07:46:28 PM UTC 24 |
94268521 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.3705175023 |
|
|
Aug 27 07:46:27 PM UTC 24 |
Aug 27 07:46:29 PM UTC 24 |
41994265 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.2463697720 |
|
|
Aug 27 07:46:27 PM UTC 24 |
Aug 27 07:46:30 PM UTC 24 |
1086404764 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.2673580743 |
|
|
Aug 27 07:46:29 PM UTC 24 |
Aug 27 07:46:32 PM UTC 24 |
98706045 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_stress_all.636196428 |
|
|
Aug 27 07:44:55 PM UTC 24 |
Aug 27 07:46:35 PM UTC 24 |
6667604119 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.340150723 |
|
|
Aug 27 07:46:30 PM UTC 24 |
Aug 27 07:46:35 PM UTC 24 |
146290686 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode_ignore_cmds.2281392436 |
|
|
Aug 27 07:44:48 PM UTC 24 |
Aug 27 07:46:35 PM UTC 24 |
21337160620 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.2827701952 |
|
|
Aug 27 07:46:31 PM UTC 24 |
Aug 27 07:46:36 PM UTC 24 |
37938347 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.2827808371 |
|
|
Aug 27 07:46:02 PM UTC 24 |
Aug 27 07:46:37 PM UTC 24 |
22229807728 ps |
| T127 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_and_tpm.3394259561 |
|
|
Aug 27 07:41:59 PM UTC 24 |
Aug 27 07:46:38 PM UTC 24 |
118165254936 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.3484113162 |
|
|
Aug 27 07:46:28 PM UTC 24 |
Aug 27 07:46:40 PM UTC 24 |
3130020463 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.355147826 |
|
|
Aug 27 07:46:35 PM UTC 24 |
Aug 27 07:46:40 PM UTC 24 |
134860273 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.1776966799 |
|
|
Aug 27 07:46:37 PM UTC 24 |
Aug 27 07:46:40 PM UTC 24 |
193742249 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.1633721514 |
|
|
Aug 27 07:46:37 PM UTC 24 |
Aug 27 07:46:40 PM UTC 24 |
98330810 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.1078515256 |
|
|
Aug 27 07:46:05 PM UTC 24 |
Aug 27 07:46:41 PM UTC 24 |
2754458081 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.220365967 |
|
|
Aug 27 07:46:20 PM UTC 24 |
Aug 27 07:46:44 PM UTC 24 |
9661497391 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.2367567019 |
|
|
Aug 27 07:45:44 PM UTC 24 |
Aug 27 07:46:45 PM UTC 24 |
11891750407 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.705691617 |
|
|
Aug 27 07:46:44 PM UTC 24 |
Aug 27 07:46:46 PM UTC 24 |
21469805 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.1645301167 |
|
|
Aug 27 07:46:45 PM UTC 24 |
Aug 27 07:46:47 PM UTC 24 |
157772619 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.675429582 |
|
|
Aug 27 07:44:49 PM UTC 24 |
Aug 27 07:46:48 PM UTC 24 |
36890744258 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.175619693 |
|
|
Aug 27 07:46:41 PM UTC 24 |
Aug 27 07:46:48 PM UTC 24 |
404032312 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.2708025562 |
|
|
Aug 27 07:46:17 PM UTC 24 |
Aug 27 07:46:49 PM UTC 24 |
6154859709 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.2338150461 |
|
|
Aug 27 07:46:38 PM UTC 24 |
Aug 27 07:46:50 PM UTC 24 |
409663476 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.1536304192 |
|
|
Aug 27 07:45:18 PM UTC 24 |
Aug 27 07:46:50 PM UTC 24 |
12391989882 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.2150592711 |
|
|
Aug 27 07:46:33 PM UTC 24 |
Aug 27 07:46:50 PM UTC 24 |
5684815338 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.273421231 |
|
|
Aug 27 07:46:48 PM UTC 24 |
Aug 27 07:46:51 PM UTC 24 |
71712803 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.926794970 |
|
|
Aug 27 07:44:29 PM UTC 24 |
Aug 27 07:46:51 PM UTC 24 |
48544547204 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.2850745702 |
|
|
Aug 27 07:46:49 PM UTC 24 |
Aug 27 07:46:52 PM UTC 24 |
44072706 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.1108872750 |
|
|
Aug 27 07:46:19 PM UTC 24 |
Aug 27 07:46:52 PM UTC 24 |
23720478726 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.1653952950 |
|
|
Aug 27 07:47:00 PM UTC 24 |
Aug 27 07:47:08 PM UTC 24 |
1558524154 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.1680410274 |
|
|
Aug 27 07:46:50 PM UTC 24 |
Aug 27 07:46:55 PM UTC 24 |
115305130 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.4232770755 |
|
|
Aug 27 07:46:49 PM UTC 24 |
Aug 27 07:46:57 PM UTC 24 |
5362612267 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.1241662522 |
|
|
Aug 27 07:46:46 PM UTC 24 |
Aug 27 07:46:57 PM UTC 24 |
2335007235 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.2529460822 |
|
|
Aug 27 07:46:52 PM UTC 24 |
Aug 27 07:46:58 PM UTC 24 |
173529206 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.1807204619 |
|
|
Aug 27 07:45:24 PM UTC 24 |
Aug 27 07:46:58 PM UTC 24 |
10051896028 ps |
| T140 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.3763085388 |
|
|
Aug 27 07:46:53 PM UTC 24 |
Aug 27 07:46:58 PM UTC 24 |
202534462 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.2034837874 |
|
|
Aug 27 07:46:53 PM UTC 24 |
Aug 27 07:46:59 PM UTC 24 |
139149061 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.480553460 |
|
|
Aug 27 07:46:50 PM UTC 24 |
Aug 27 07:47:01 PM UTC 24 |
17167603908 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.148953047 |
|
|
Aug 27 07:46:59 PM UTC 24 |
Aug 27 07:47:01 PM UTC 24 |
34360683 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.2766381992 |
|
|
Aug 27 07:47:00 PM UTC 24 |
Aug 27 07:47:02 PM UTC 24 |
133146857 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.2416644208 |
|
|
Aug 27 07:47:01 PM UTC 24 |
Aug 27 07:47:03 PM UTC 24 |
82163203 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.3593927937 |
|
|
Aug 27 07:46:47 PM UTC 24 |
Aug 27 07:47:06 PM UTC 24 |
35538179564 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.415446583 |
|
|
Aug 27 07:44:29 PM UTC 24 |
Aug 27 07:47:06 PM UTC 24 |
14088558661 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.2051460866 |
|
|
Aug 27 07:45:40 PM UTC 24 |
Aug 27 07:47:06 PM UTC 24 |
17562422231 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.3666719771 |
|
|
Aug 27 07:45:42 PM UTC 24 |
Aug 27 07:47:08 PM UTC 24 |
13100606909 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.163120023 |
|
|
Aug 27 07:46:58 PM UTC 24 |
Aug 27 07:47:08 PM UTC 24 |
1100359430 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.1388480682 |
|
|
Aug 27 07:47:01 PM UTC 24 |
Aug 27 07:47:09 PM UTC 24 |
559183045 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.2289681984 |
|
|
Aug 27 07:44:51 PM UTC 24 |
Aug 27 07:47:15 PM UTC 24 |
16556614480 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.1238003856 |
|
|
Aug 27 07:43:48 PM UTC 24 |
Aug 27 07:47:15 PM UTC 24 |
66158532860 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.3635839313 |
|
|
Aug 27 07:47:06 PM UTC 24 |
Aug 27 07:47:16 PM UTC 24 |
603130217 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.558798113 |
|
|
Aug 27 07:46:52 PM UTC 24 |
Aug 27 07:47:16 PM UTC 24 |
6705200959 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.3980760104 |
|
|
Aug 27 07:47:03 PM UTC 24 |
Aug 27 07:47:16 PM UTC 24 |
24815544984 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.1292411679 |
|
|
Aug 27 07:47:17 PM UTC 24 |
Aug 27 07:47:19 PM UTC 24 |
53233526 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.58219678 |
|
|
Aug 27 07:47:09 PM UTC 24 |
Aug 27 07:47:20 PM UTC 24 |
264337328 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.2928594459 |
|
|
Aug 27 07:47:04 PM UTC 24 |
Aug 27 07:47:22 PM UTC 24 |
10836515585 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.2501976929 |
|
|
Aug 27 07:46:41 PM UTC 24 |
Aug 27 07:47:22 PM UTC 24 |
2005494683 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.2132230738 |
|
|
Aug 27 07:47:07 PM UTC 24 |
Aug 27 07:47:22 PM UTC 24 |
2418355804 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.2119854677 |
|
|
Aug 27 07:47:20 PM UTC 24 |
Aug 27 07:47:23 PM UTC 24 |
78923405 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.3001679128 |
|
|
Aug 27 07:47:10 PM UTC 24 |
Aug 27 07:47:24 PM UTC 24 |
4801589305 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.611555624 |
|
|
Aug 27 07:47:23 PM UTC 24 |
Aug 27 07:47:25 PM UTC 24 |
190435763 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.1893187974 |
|
|
Aug 27 07:47:07 PM UTC 24 |
Aug 27 07:47:25 PM UTC 24 |
1485475934 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.70205126 |
|
|
Aug 27 07:47:09 PM UTC 24 |
Aug 27 07:47:26 PM UTC 24 |
1239977640 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.2590243594 |
|
|
Aug 27 07:47:21 PM UTC 24 |
Aug 27 07:47:26 PM UTC 24 |
798186933 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.3190853608 |
|
|
Aug 27 07:47:23 PM UTC 24 |
Aug 27 07:47:27 PM UTC 24 |
262732579 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.3467288151 |
|
|
Aug 27 07:47:23 PM UTC 24 |
Aug 27 07:47:28 PM UTC 24 |
446241606 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.1857341231 |
|
|
Aug 27 07:47:27 PM UTC 24 |
Aug 27 07:47:31 PM UTC 24 |
63456482 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.3169138093 |
|
|
Aug 27 07:47:24 PM UTC 24 |
Aug 27 07:47:31 PM UTC 24 |
269600970 ps |
| T237 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/9.spi_device_stress_all.3363291945 |
|
|
Aug 27 07:43:34 PM UTC 24 |
Aug 27 07:47:32 PM UTC 24 |
12729182078 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.2321159689 |
|
|
Aug 27 07:47:32 PM UTC 24 |
Aug 27 07:47:34 PM UTC 24 |
14736414 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.3007316888 |
|
|
Aug 27 07:46:50 PM UTC 24 |
Aug 27 07:47:35 PM UTC 24 |
4930513660 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.914202808 |
|
|
Aug 27 07:47:17 PM UTC 24 |
Aug 27 07:47:36 PM UTC 24 |
13951194774 ps |
| T141 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.2386803197 |
|
|
Aug 27 07:46:39 PM UTC 24 |
Aug 27 07:47:36 PM UTC 24 |
8641048025 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.895333348 |
|
|
Aug 27 07:47:28 PM UTC 24 |
Aug 27 07:47:36 PM UTC 24 |
717404487 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.3037851506 |
|
|
Aug 27 07:47:34 PM UTC 24 |
Aug 27 07:47:37 PM UTC 24 |
22904630 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1449050109 |
|
|
Aug 27 07:47:32 PM UTC 24 |
Aug 27 07:47:38 PM UTC 24 |
326211591 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.2721701492 |
|
|
Aug 27 07:47:37 PM UTC 24 |
Aug 27 07:47:39 PM UTC 24 |
25871465 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.1243346306 |
|
|
Aug 27 07:46:36 PM UTC 24 |
Aug 27 07:47:39 PM UTC 24 |
20533945622 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.3015129008 |
|
|
Aug 27 07:47:37 PM UTC 24 |
Aug 27 07:47:39 PM UTC 24 |
80668407 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.1074526593 |
|
|
Aug 27 07:45:34 PM UTC 24 |
Aug 27 07:47:39 PM UTC 24 |
19921781671 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.907546760 |
|
|
Aug 27 07:47:38 PM UTC 24 |
Aug 27 07:47:40 PM UTC 24 |
439213242 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.1268112064 |
|
|
Aug 27 07:47:25 PM UTC 24 |
Aug 27 07:47:40 PM UTC 24 |
1703916893 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.720849024 |
|
|
Aug 27 07:47:26 PM UTC 24 |
Aug 27 07:47:41 PM UTC 24 |
2440502815 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.1309051684 |
|
|
Aug 27 07:47:38 PM UTC 24 |
Aug 27 07:47:41 PM UTC 24 |
1469725533 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.1850580935 |
|
|
Aug 27 07:47:26 PM UTC 24 |
Aug 27 07:47:43 PM UTC 24 |
1869307540 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.2787184142 |
|
|
Aug 27 07:47:42 PM UTC 24 |
Aug 27 07:47:44 PM UTC 24 |
21924342 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.1957077679 |
|
|
Aug 27 07:47:00 PM UTC 24 |
Aug 27 07:47:47 PM UTC 24 |
5057482248 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.1346944022 |
|
|
Aug 27 07:47:40 PM UTC 24 |
Aug 27 07:47:47 PM UTC 24 |
287055679 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.460094471 |
|
|
Aug 27 07:47:40 PM UTC 24 |
Aug 27 07:47:48 PM UTC 24 |
173967708 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.3276879845 |
|
|
Aug 27 07:47:41 PM UTC 24 |
Aug 27 07:47:48 PM UTC 24 |
106003885 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.1539929791 |
|
|
Aug 27 07:47:49 PM UTC 24 |
Aug 27 07:47:51 PM UTC 24 |
13984827 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.2357715408 |
|
|
Aug 27 07:47:49 PM UTC 24 |
Aug 27 07:47:51 PM UTC 24 |
14073175 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.1383233800 |
|
|
Aug 27 07:47:39 PM UTC 24 |
Aug 27 07:47:52 PM UTC 24 |
4116899044 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.1617884355 |
|
|
Aug 27 07:47:37 PM UTC 24 |
Aug 27 07:47:53 PM UTC 24 |
41193421320 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.1117052003 |
|
|
Aug 27 07:47:40 PM UTC 24 |
Aug 27 07:47:56 PM UTC 24 |
1123875515 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.1803432494 |
|
|
Aug 27 07:47:54 PM UTC 24 |
Aug 27 07:47:56 PM UTC 24 |
226668324 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.2194201937 |
|
|
Aug 27 07:47:42 PM UTC 24 |
Aug 27 07:47:56 PM UTC 24 |
682301987 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.809794968 |
|
|
Aug 27 07:47:54 PM UTC 24 |
Aug 27 07:47:56 PM UTC 24 |
118427530 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.3198926033 |
|
|
Aug 27 07:47:40 PM UTC 24 |
Aug 27 07:47:57 PM UTC 24 |
5936270941 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.2315654932 |
|
|
Aug 27 07:45:15 PM UTC 24 |
Aug 27 07:47:58 PM UTC 24 |
67341445952 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.344854914 |
|
|
Aug 27 07:47:43 PM UTC 24 |
Aug 27 07:47:59 PM UTC 24 |
17353341379 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.3417664807 |
|
|
Aug 27 07:47:47 PM UTC 24 |
Aug 27 07:48:00 PM UTC 24 |
1406041154 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.3228338461 |
|
|
Aug 27 07:47:45 PM UTC 24 |
Aug 27 07:48:00 PM UTC 24 |
2315078930 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.2131939576 |
|
|
Aug 27 07:47:52 PM UTC 24 |
Aug 27 07:48:00 PM UTC 24 |
9970145690 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2947387931 |
|
|
Aug 27 07:46:23 PM UTC 24 |
Aug 27 07:48:00 PM UTC 24 |
12251369616 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.1825687398 |
|
|
Aug 27 07:47:57 PM UTC 24 |
Aug 27 07:48:03 PM UTC 24 |
1779599366 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.4173824780 |
|
|
Aug 27 07:47:58 PM UTC 24 |
Aug 27 07:48:03 PM UTC 24 |
879502595 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.2646713477 |
|
|
Aug 27 07:45:30 PM UTC 24 |
Aug 27 07:48:04 PM UTC 24 |
41860322298 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.930310672 |
|
|
Aug 27 07:47:57 PM UTC 24 |
Aug 27 07:48:04 PM UTC 24 |
677296772 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.2921288544 |
|
|
Aug 27 07:47:58 PM UTC 24 |
Aug 27 07:48:04 PM UTC 24 |
2170391927 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.136386475 |
|
|
Aug 27 07:48:04 PM UTC 24 |
Aug 27 07:48:06 PM UTC 24 |
18816040 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.1921516529 |
|
|
Aug 27 07:48:04 PM UTC 24 |
Aug 27 07:48:06 PM UTC 24 |
14503866 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.2356677053 |
|
|
Aug 27 07:47:59 PM UTC 24 |
Aug 27 07:48:09 PM UTC 24 |
2153507700 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.2294030037 |
|
|
Aug 27 07:46:53 PM UTC 24 |
Aug 27 07:48:10 PM UTC 24 |
20953284588 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.4115480903 |
|
|
Aug 27 07:48:08 PM UTC 24 |
Aug 27 07:48:10 PM UTC 24 |
156681350 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.930932973 |
|
|
Aug 27 07:48:08 PM UTC 24 |
Aug 27 07:48:10 PM UTC 24 |
105297193 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3581177379 |
|
|
Aug 27 07:48:01 PM UTC 24 |
Aug 27 07:48:11 PM UTC 24 |
701469821 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.3193336307 |
|
|
Aug 27 07:48:10 PM UTC 24 |
Aug 27 07:48:14 PM UTC 24 |
189119927 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.3515358329 |
|
|
Aug 27 07:47:57 PM UTC 24 |
Aug 27 07:48:14 PM UTC 24 |
12286503152 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.1407091633 |
|
|
Aug 27 07:48:11 PM UTC 24 |
Aug 27 07:48:19 PM UTC 24 |
228700334 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.574274281 |
|
|
Aug 27 07:47:57 PM UTC 24 |
Aug 27 07:48:20 PM UTC 24 |
14006279510 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.1667571387 |
|
|
Aug 27 07:48:14 PM UTC 24 |
Aug 27 07:48:22 PM UTC 24 |
1853738073 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode_ignore_cmds.2175061753 |
|
|
Aug 27 07:47:09 PM UTC 24 |
Aug 27 07:48:22 PM UTC 24 |
20000819808 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.1917711529 |
|
|
Aug 27 07:48:20 PM UTC 24 |
Aug 27 07:48:23 PM UTC 24 |
22588305 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.689848863 |
|
|
Aug 27 07:46:01 PM UTC 24 |
Aug 27 07:48:24 PM UTC 24 |
29856844077 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.2732591831 |
|
|
Aug 27 07:48:22 PM UTC 24 |
Aug 27 07:48:25 PM UTC 24 |
10843065 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.2786654631 |
|
|
Aug 27 07:48:05 PM UTC 24 |
Aug 27 07:48:26 PM UTC 24 |
8333217577 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.546447000 |
|
|
Aug 27 07:48:11 PM UTC 24 |
Aug 27 07:48:27 PM UTC 24 |
2010786221 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.2888183088 |
|
|
Aug 27 07:48:26 PM UTC 24 |
Aug 27 07:48:28 PM UTC 24 |
43181550 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.262614133 |
|
|
Aug 27 07:45:50 PM UTC 24 |
Aug 27 07:48:28 PM UTC 24 |
19416907775 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.1769274757 |
|
|
Aug 27 07:48:27 PM UTC 24 |
Aug 27 07:48:29 PM UTC 24 |
34577845 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.2650892416 |
|
|
Aug 27 07:47:52 PM UTC 24 |
Aug 27 07:48:29 PM UTC 24 |
16463246956 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.2041385776 |
|
|
Aug 27 07:48:29 PM UTC 24 |
Aug 27 07:48:31 PM UTC 24 |
613757108 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.3301992198 |
|
|
Aug 27 07:48:05 PM UTC 24 |
Aug 27 07:48:32 PM UTC 24 |
12440337598 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.1705689081 |
|
|
Aug 27 07:48:30 PM UTC 24 |
Aug 27 07:48:34 PM UTC 24 |
62230861 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.322832538 |
|
|
Aug 27 07:47:26 PM UTC 24 |
Aug 27 07:48:39 PM UTC 24 |
20439199720 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.2850926474 |
|
|
Aug 27 07:48:30 PM UTC 24 |
Aug 27 07:48:39 PM UTC 24 |
8328030564 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.150042626 |
|
|
Aug 27 07:48:21 PM UTC 24 |
Aug 27 07:48:39 PM UTC 24 |
5160590380 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.9513638 |
|
|
Aug 27 07:47:16 PM UTC 24 |
Aug 27 07:48:40 PM UTC 24 |
20972190078 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.955873700 |
|
|
Aug 27 07:48:22 PM UTC 24 |
Aug 27 07:48:43 PM UTC 24 |
1056327922 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.1032554322 |
|
|
Aug 27 07:48:40 PM UTC 24 |
Aug 27 07:48:44 PM UTC 24 |
67832596 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.3229397442 |
|
|
Aug 27 07:48:12 PM UTC 24 |
Aug 27 07:48:46 PM UTC 24 |
8471556795 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.157718163 |
|
|
Aug 27 07:48:29 PM UTC 24 |
Aug 27 07:48:47 PM UTC 24 |
1156596164 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.972164121 |
|
|
Aug 27 07:47:16 PM UTC 24 |
Aug 27 07:48:47 PM UTC 24 |
12537747171 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.434232097 |
|
|
Aug 27 07:46:02 PM UTC 24 |
Aug 27 07:48:48 PM UTC 24 |
85216674852 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.3091754820 |
|
|
Aug 27 07:48:40 PM UTC 24 |
Aug 27 07:48:50 PM UTC 24 |
635263755 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.4230732370 |
|
|
Aug 27 07:48:40 PM UTC 24 |
Aug 27 07:48:50 PM UTC 24 |
3979640117 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.791903665 |
|
|
Aug 27 07:48:43 PM UTC 24 |
Aug 27 07:48:51 PM UTC 24 |
223973453 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.2983662856 |
|
|
Aug 27 07:46:58 PM UTC 24 |
Aug 27 07:48:51 PM UTC 24 |
60522184312 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.1151871485 |
|
|
Aug 27 07:48:28 PM UTC 24 |
Aug 27 07:48:51 PM UTC 24 |
4033725000 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.3238394115 |
|
|
Aug 27 07:48:50 PM UTC 24 |
Aug 27 07:48:52 PM UTC 24 |
35796995 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.3343140530 |
|
|
Aug 27 07:48:51 PM UTC 24 |
Aug 27 07:48:53 PM UTC 24 |
87855069 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.1767178413 |
|
|
Aug 27 07:48:52 PM UTC 24 |
Aug 27 07:48:54 PM UTC 24 |
18915567 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.265436632 |
|
|
Aug 27 07:48:52 PM UTC 24 |
Aug 27 07:48:54 PM UTC 24 |
14060463 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_rw.268751429 |
|
|
Aug 27 07:48:52 PM UTC 24 |
Aug 27 07:48:54 PM UTC 24 |
46100908 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.1542729022 |
|
|
Aug 27 07:48:54 PM UTC 24 |
Aug 27 07:48:58 PM UTC 24 |
318621468 ps |
| T370 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.3646708007 |
|
|
Aug 27 07:48:34 PM UTC 24 |
Aug 27 07:49:00 PM UTC 24 |
2074293333 ps |
| T128 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.498837585 |
|
|
Aug 27 07:44:50 PM UTC 24 |
Aug 27 07:49:00 PM UTC 24 |
13171625468 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.771128582 |
|
|
Aug 27 07:48:15 PM UTC 24 |
Aug 27 07:49:02 PM UTC 24 |
14874623664 ps |