| T650 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.2289803533 |
|
|
Aug 27 07:48:53 PM UTC 24 |
Aug 27 07:49:02 PM UTC 24 |
547073000 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.3135754177 |
|
|
Aug 27 07:48:51 PM UTC 24 |
Aug 27 07:49:03 PM UTC 24 |
8966237175 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.2157653235 |
|
|
Aug 27 07:48:54 PM UTC 24 |
Aug 27 07:49:04 PM UTC 24 |
1225323792 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.273717850 |
|
|
Aug 27 07:49:00 PM UTC 24 |
Aug 27 07:49:04 PM UTC 24 |
272930186 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.4148981421 |
|
|
Aug 27 07:45:20 PM UTC 24 |
Aug 27 07:49:06 PM UTC 24 |
13417588826 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.1717677145 |
|
|
Aug 27 07:48:55 PM UTC 24 |
Aug 27 07:49:07 PM UTC 24 |
4407924027 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.3332603612 |
|
|
Aug 27 07:48:01 PM UTC 24 |
Aug 27 07:49:08 PM UTC 24 |
3170212984 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.2032480209 |
|
|
Aug 27 07:49:07 PM UTC 24 |
Aug 27 07:49:09 PM UTC 24 |
18392591 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.3635066964 |
|
|
Aug 27 07:49:07 PM UTC 24 |
Aug 27 07:49:10 PM UTC 24 |
14652712 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.645032867 |
|
|
Aug 27 07:48:11 PM UTC 24 |
Aug 27 07:49:10 PM UTC 24 |
33535974420 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.641895771 |
|
|
Aug 27 07:49:03 PM UTC 24 |
Aug 27 07:49:12 PM UTC 24 |
1607983780 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.996231788 |
|
|
Aug 27 07:49:11 PM UTC 24 |
Aug 27 07:49:13 PM UTC 24 |
15357086 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.4180021450 |
|
|
Aug 27 07:49:11 PM UTC 24 |
Aug 27 07:49:13 PM UTC 24 |
95718913 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.175548029 |
|
|
Aug 27 07:48:32 PM UTC 24 |
Aug 27 07:49:14 PM UTC 24 |
10863873920 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.2225339822 |
|
|
Aug 27 07:49:09 PM UTC 24 |
Aug 27 07:49:18 PM UTC 24 |
2313164146 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.3837871533 |
|
|
Aug 27 07:49:14 PM UTC 24 |
Aug 27 07:49:19 PM UTC 24 |
79193397 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm_min_idle.3960381601 |
|
|
Aug 27 07:48:47 PM UTC 24 |
Aug 27 07:49:19 PM UTC 24 |
7520700549 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.398960590 |
|
|
Aug 27 07:47:44 PM UTC 24 |
Aug 27 07:49:22 PM UTC 24 |
48207729307 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.2684618908 |
|
|
Aug 27 07:49:01 PM UTC 24 |
Aug 27 07:49:24 PM UTC 24 |
1139357155 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm.4152997381 |
|
|
Aug 27 07:44:29 PM UTC 24 |
Aug 27 07:49:25 PM UTC 24 |
35391108403 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.3708669286 |
|
|
Aug 27 07:49:19 PM UTC 24 |
Aug 27 07:49:28 PM UTC 24 |
3027286796 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.658752718 |
|
|
Aug 27 07:49:23 PM UTC 24 |
Aug 27 07:49:29 PM UTC 24 |
598552761 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.1939697946 |
|
|
Aug 27 07:49:12 PM UTC 24 |
Aug 27 07:49:30 PM UTC 24 |
13894394806 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.1791432565 |
|
|
Aug 27 07:49:30 PM UTC 24 |
Aug 27 07:49:33 PM UTC 24 |
16301008 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_csb_read.3218134064 |
|
|
Aug 27 07:49:33 PM UTC 24 |
Aug 27 07:49:35 PM UTC 24 |
35119924 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.3674003047 |
|
|
Aug 27 07:49:20 PM UTC 24 |
Aug 27 07:49:36 PM UTC 24 |
1094658414 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.2193751232 |
|
|
Aug 27 07:49:15 PM UTC 24 |
Aug 27 07:49:36 PM UTC 24 |
3676445015 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.3846101092 |
|
|
Aug 27 07:49:14 PM UTC 24 |
Aug 27 07:49:36 PM UTC 24 |
4417630883 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.198999055 |
|
|
Aug 27 07:48:01 PM UTC 24 |
Aug 27 07:49:38 PM UTC 24 |
15126538113 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.3952793407 |
|
|
Aug 27 07:48:35 PM UTC 24 |
Aug 27 07:49:39 PM UTC 24 |
6073284817 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.3850762703 |
|
|
Aug 27 07:49:37 PM UTC 24 |
Aug 27 07:49:40 PM UTC 24 |
103050895 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.387308932 |
|
|
Aug 27 07:45:17 PM UTC 24 |
Aug 27 07:49:41 PM UTC 24 |
32628064446 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.1867108549 |
|
|
Aug 27 07:49:37 PM UTC 24 |
Aug 27 07:49:41 PM UTC 24 |
1926330814 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.4230043172 |
|
|
Aug 27 07:49:39 PM UTC 24 |
Aug 27 07:49:44 PM UTC 24 |
1888101304 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.3687176744 |
|
|
Aug 27 07:49:05 PM UTC 24 |
Aug 27 07:49:46 PM UTC 24 |
8030676718 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.1761814568 |
|
|
Aug 27 07:49:43 PM UTC 24 |
Aug 27 07:49:46 PM UTC 24 |
46487858 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.3576907434 |
|
|
Aug 27 07:49:11 PM UTC 24 |
Aug 27 07:49:48 PM UTC 24 |
11498531674 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_stress_all.4076676023 |
|
|
Aug 27 07:48:48 PM UTC 24 |
Aug 27 07:49:48 PM UTC 24 |
9328207163 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.1528809345 |
|
|
Aug 27 07:47:33 PM UTC 24 |
Aug 27 07:49:53 PM UTC 24 |
53817469390 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.4031276537 |
|
|
Aug 27 07:49:47 PM UTC 24 |
Aug 27 07:49:54 PM UTC 24 |
714656065 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.1872610930 |
|
|
Aug 27 07:49:38 PM UTC 24 |
Aug 27 07:49:56 PM UTC 24 |
736238436 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.715528929 |
|
|
Aug 27 07:46:56 PM UTC 24 |
Aug 27 07:49:57 PM UTC 24 |
22420565826 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.1291726704 |
|
|
Aug 27 07:49:56 PM UTC 24 |
Aug 27 07:49:59 PM UTC 24 |
19837574 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.3340494817 |
|
|
Aug 27 07:49:42 PM UTC 24 |
Aug 27 07:49:59 PM UTC 24 |
1616486235 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.2052451653 |
|
|
Aug 27 07:49:57 PM UTC 24 |
Aug 27 07:50:00 PM UTC 24 |
28403701 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.2249143422 |
|
|
Aug 27 07:49:12 PM UTC 24 |
Aug 27 07:50:02 PM UTC 24 |
92088822970 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.3253715095 |
|
|
Aug 27 07:50:01 PM UTC 24 |
Aug 27 07:50:03 PM UTC 24 |
233420789 ps |
| T295 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.420861954 |
|
|
Aug 27 07:46:41 PM UTC 24 |
Aug 27 07:50:03 PM UTC 24 |
118165885103 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.3217089140 |
|
|
Aug 27 07:50:03 PM UTC 24 |
Aug 27 07:50:06 PM UTC 24 |
77785399 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.3110851176 |
|
|
Aug 27 07:49:45 PM UTC 24 |
Aug 27 07:50:06 PM UTC 24 |
752675179 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_mode_ignore_cmds.484744060 |
|
|
Aug 27 07:42:40 PM UTC 24 |
Aug 27 07:50:06 PM UTC 24 |
52116807123 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.1986148595 |
|
|
Aug 27 07:49:39 PM UTC 24 |
Aug 27 07:50:07 PM UTC 24 |
17470369030 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.2228195796 |
|
|
Aug 27 07:49:37 PM UTC 24 |
Aug 27 07:50:08 PM UTC 24 |
10763662085 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.2025677547 |
|
|
Aug 27 07:48:55 PM UTC 24 |
Aug 27 07:50:09 PM UTC 24 |
41778890064 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.2464430848 |
|
|
Aug 27 07:50:00 PM UTC 24 |
Aug 27 07:50:09 PM UTC 24 |
2852312412 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm_min_idle.2912414342 |
|
|
Aug 27 07:48:24 PM UTC 24 |
Aug 27 07:50:13 PM UTC 24 |
6620708588 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.3103739919 |
|
|
Aug 27 07:50:06 PM UTC 24 |
Aug 27 07:50:14 PM UTC 24 |
157216755 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.421742339 |
|
|
Aug 27 07:48:46 PM UTC 24 |
Aug 27 07:50:15 PM UTC 24 |
18466096703 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.382778376 |
|
|
Aug 27 07:50:10 PM UTC 24 |
Aug 27 07:50:17 PM UTC 24 |
550604325 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.2874788715 |
|
|
Aug 27 07:47:29 PM UTC 24 |
Aug 27 07:50:18 PM UTC 24 |
91833830024 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.219715855 |
|
|
Aug 27 07:50:04 PM UTC 24 |
Aug 27 07:50:18 PM UTC 24 |
7482944156 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.552003751 |
|
|
Aug 27 07:50:08 PM UTC 24 |
Aug 27 07:50:19 PM UTC 24 |
1432143505 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.3225478678 |
|
|
Aug 27 07:49:37 PM UTC 24 |
Aug 27 07:50:21 PM UTC 24 |
1842711002 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.3715422048 |
|
|
Aug 27 07:50:04 PM UTC 24 |
Aug 27 07:50:21 PM UTC 24 |
1071885576 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.119568991 |
|
|
Aug 27 07:50:19 PM UTC 24 |
Aug 27 07:50:21 PM UTC 24 |
222608879 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.2542851928 |
|
|
Aug 27 07:50:19 PM UTC 24 |
Aug 27 07:50:21 PM UTC 24 |
40307879 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.3036692917 |
|
|
Aug 27 07:46:42 PM UTC 24 |
Aug 27 07:50:23 PM UTC 24 |
19744717901 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.849105906 |
|
|
Aug 27 07:50:07 PM UTC 24 |
Aug 27 07:50:24 PM UTC 24 |
1826956034 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.195800436 |
|
|
Aug 27 07:50:23 PM UTC 24 |
Aug 27 07:50:25 PM UTC 24 |
47942684 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.438200793 |
|
|
Aug 27 07:50:23 PM UTC 24 |
Aug 27 07:50:25 PM UTC 24 |
99665114 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.908961590 |
|
|
Aug 27 07:45:33 PM UTC 24 |
Aug 27 07:50:28 PM UTC 24 |
27162692523 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.1768511094 |
|
|
Aug 27 07:50:23 PM UTC 24 |
Aug 27 07:50:30 PM UTC 24 |
5495101494 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.519743206 |
|
|
Aug 27 07:50:26 PM UTC 24 |
Aug 27 07:50:30 PM UTC 24 |
251192273 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.1027085093 |
|
|
Aug 27 07:49:01 PM UTC 24 |
Aug 27 07:50:30 PM UTC 24 |
13780797614 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.3952088415 |
|
|
Aug 27 07:45:47 PM UTC 24 |
Aug 27 07:50:30 PM UTC 24 |
114640411827 ps |
| T102 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.3410025989 |
|
|
Aug 27 07:50:28 PM UTC 24 |
Aug 27 07:50:32 PM UTC 24 |
48751691 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.1087780211 |
|
|
Aug 27 07:50:08 PM UTC 24 |
Aug 27 07:50:33 PM UTC 24 |
5292920443 ps |
| T104 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.3488332339 |
|
|
Aug 27 07:50:31 PM UTC 24 |
Aug 27 07:50:34 PM UTC 24 |
832314372 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.475236476 |
|
|
Aug 27 07:50:25 PM UTC 24 |
Aug 27 07:50:34 PM UTC 24 |
681100796 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.2812174996 |
|
|
Aug 27 07:50:35 PM UTC 24 |
Aug 27 07:50:37 PM UTC 24 |
95434198 ps |
| T107 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.3613431511 |
|
|
Aug 27 07:50:32 PM UTC 24 |
Aug 27 07:50:37 PM UTC 24 |
176014783 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.996200964 |
|
|
Aug 27 07:50:07 PM UTC 24 |
Aug 27 07:50:38 PM UTC 24 |
7586529415 ps |
| T109 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.972959926 |
|
|
Aug 27 07:48:02 PM UTC 24 |
Aug 27 07:50:39 PM UTC 24 |
47845434452 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.656924380 |
|
|
Aug 27 07:49:40 PM UTC 24 |
Aug 27 07:50:39 PM UTC 24 |
40858108743 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.1699760836 |
|
|
Aug 27 07:50:26 PM UTC 24 |
Aug 27 07:50:40 PM UTC 24 |
626781492 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.3623130654 |
|
|
Aug 27 07:50:00 PM UTC 24 |
Aug 27 07:50:40 PM UTC 24 |
2624306744 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.3217915398 |
|
|
Aug 27 07:50:38 PM UTC 24 |
Aug 27 07:50:40 PM UTC 24 |
18054365 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.796786797 |
|
|
Aug 27 07:51:07 PM UTC 24 |
Aug 27 07:51:14 PM UTC 24 |
309326182 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.588667794 |
|
|
Aug 27 07:50:38 PM UTC 24 |
Aug 27 07:50:42 PM UTC 24 |
1551466716 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.2262712415 |
|
|
Aug 27 07:50:40 PM UTC 24 |
Aug 27 07:50:42 PM UTC 24 |
35753887 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.2395376365 |
|
|
Aug 27 07:50:20 PM UTC 24 |
Aug 27 07:50:43 PM UTC 24 |
6110615793 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.491708338 |
|
|
Aug 27 07:50:40 PM UTC 24 |
Aug 27 07:50:45 PM UTC 24 |
66317669 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.3115043976 |
|
|
Aug 27 07:49:29 PM UTC 24 |
Aug 27 07:50:45 PM UTC 24 |
6776883862 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.3224888424 |
|
|
Aug 27 07:50:41 PM UTC 24 |
Aug 27 07:50:46 PM UTC 24 |
238190078 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode_ignore_cmds.1921866629 |
|
|
Aug 27 07:50:46 PM UTC 24 |
Aug 27 07:50:48 PM UTC 24 |
18983602 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.3211794352 |
|
|
Aug 27 07:50:24 PM UTC 24 |
Aug 27 07:50:49 PM UTC 24 |
24672316578 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.4037130476 |
|
|
Aug 27 07:50:42 PM UTC 24 |
Aug 27 07:50:50 PM UTC 24 |
275548828 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.2404121847 |
|
|
Aug 27 07:50:44 PM UTC 24 |
Aug 27 07:50:50 PM UTC 24 |
211948192 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.3879284127 |
|
|
Aug 27 07:50:40 PM UTC 24 |
Aug 27 07:50:52 PM UTC 24 |
169281251 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.1376490054 |
|
|
Aug 27 07:50:38 PM UTC 24 |
Aug 27 07:50:52 PM UTC 24 |
4397680951 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.2448267090 |
|
|
Aug 27 07:50:53 PM UTC 24 |
Aug 27 07:50:55 PM UTC 24 |
120700092 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.1252509385 |
|
|
Aug 27 07:50:53 PM UTC 24 |
Aug 27 07:50:55 PM UTC 24 |
37730412 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.222066413 |
|
|
Aug 27 07:50:46 PM UTC 24 |
Aug 27 07:50:58 PM UTC 24 |
5719572262 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.3590976026 |
|
|
Aug 27 07:50:21 PM UTC 24 |
Aug 27 07:50:58 PM UTC 24 |
2418737023 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.3478141983 |
|
|
Aug 27 07:43:52 PM UTC 24 |
Aug 27 07:50:59 PM UTC 24 |
93499331079 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.938788873 |
|
|
Aug 27 07:49:54 PM UTC 24 |
Aug 27 07:51:00 PM UTC 24 |
10173192461 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.4062602722 |
|
|
Aug 27 07:50:55 PM UTC 24 |
Aug 27 07:51:00 PM UTC 24 |
2416085670 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.1799012213 |
|
|
Aug 27 07:50:59 PM UTC 24 |
Aug 27 07:51:01 PM UTC 24 |
46688013 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.3113773192 |
|
|
Aug 27 07:50:59 PM UTC 24 |
Aug 27 07:51:02 PM UTC 24 |
75306128 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.3242854913 |
|
|
Aug 27 07:50:45 PM UTC 24 |
Aug 27 07:51:06 PM UTC 24 |
3337803453 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.802982929 |
|
|
Aug 27 07:51:01 PM UTC 24 |
Aug 27 07:51:06 PM UTC 24 |
157370977 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.3532673023 |
|
|
Aug 27 07:51:03 PM UTC 24 |
Aug 27 07:51:07 PM UTC 24 |
34924171 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_stress_all.1168615581 |
|
|
Aug 27 07:50:18 PM UTC 24 |
Aug 27 07:51:08 PM UTC 24 |
6649834744 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.1138196461 |
|
|
Aug 27 07:51:01 PM UTC 24 |
Aug 27 07:51:11 PM UTC 24 |
621999159 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.1343847144 |
|
|
Aug 27 07:50:30 PM UTC 24 |
Aug 27 07:51:12 PM UTC 24 |
5016167744 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.944758826 |
|
|
Aug 27 07:50:56 PM UTC 24 |
Aug 27 07:51:14 PM UTC 24 |
8527267448 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.714953221 |
|
|
Aug 27 07:51:16 PM UTC 24 |
Aug 27 07:51:18 PM UTC 24 |
10913366 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.1112703225 |
|
|
Aug 27 07:51:16 PM UTC 24 |
Aug 27 07:51:18 PM UTC 24 |
33063818 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.631505907 |
|
|
Aug 27 07:48:03 PM UTC 24 |
Aug 27 07:51:18 PM UTC 24 |
47292521768 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.318287161 |
|
|
Aug 27 07:51:07 PM UTC 24 |
Aug 27 07:51:19 PM UTC 24 |
749445075 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.15785533 |
|
|
Aug 27 07:50:50 PM UTC 24 |
Aug 27 07:51:20 PM UTC 24 |
1406371813 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.884550462 |
|
|
Aug 27 07:51:19 PM UTC 24 |
Aug 27 07:51:22 PM UTC 24 |
128948331 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.2393658784 |
|
|
Aug 27 07:51:03 PM UTC 24 |
Aug 27 07:51:22 PM UTC 24 |
517687860 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.1135982092 |
|
|
Aug 27 07:51:19 PM UTC 24 |
Aug 27 07:51:23 PM UTC 24 |
109599837 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.4189435489 |
|
|
Aug 27 07:46:41 PM UTC 24 |
Aug 27 07:51:23 PM UTC 24 |
34595355205 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.3852209272 |
|
|
Aug 27 07:51:03 PM UTC 24 |
Aug 27 07:51:25 PM UTC 24 |
2572619841 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.4194667800 |
|
|
Aug 27 07:47:34 PM UTC 24 |
Aug 27 07:51:25 PM UTC 24 |
22423616712 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.1568002641 |
|
|
Aug 27 07:50:44 PM UTC 24 |
Aug 27 07:51:26 PM UTC 24 |
11693892155 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.3432456571 |
|
|
Aug 27 07:51:20 PM UTC 24 |
Aug 27 07:51:27 PM UTC 24 |
684057724 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.405406713 |
|
|
Aug 27 07:51:25 PM UTC 24 |
Aug 27 07:51:29 PM UTC 24 |
416044698 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.799779917 |
|
|
Aug 27 07:51:00 PM UTC 24 |
Aug 27 07:51:29 PM UTC 24 |
46854597662 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode_ignore_cmds.3629610597 |
|
|
Aug 27 07:51:27 PM UTC 24 |
Aug 27 07:51:29 PM UTC 24 |
36733561 ps |
| T398 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_all.3438073307 |
|
|
Aug 27 07:50:49 PM UTC 24 |
Aug 27 07:51:30 PM UTC 24 |
45194557730 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.273972640 |
|
|
Aug 27 07:51:26 PM UTC 24 |
Aug 27 07:51:30 PM UTC 24 |
113660592 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.83234336 |
|
|
Aug 27 07:51:19 PM UTC 24 |
Aug 27 07:51:30 PM UTC 24 |
4700409928 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/21.spi_device_stress_all.2973502022 |
|
|
Aug 27 07:47:17 PM UTC 24 |
Aug 27 07:51:31 PM UTC 24 |
18605389275 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.456866909 |
|
|
Aug 27 07:49:26 PM UTC 24 |
Aug 27 07:51:31 PM UTC 24 |
28604313959 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.1793926625 |
|
|
Aug 27 07:51:19 PM UTC 24 |
Aug 27 07:51:31 PM UTC 24 |
1425674692 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.1905211404 |
|
|
Aug 27 07:50:50 PM UTC 24 |
Aug 27 07:51:31 PM UTC 24 |
21191408643 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.2131546783 |
|
|
Aug 27 07:48:41 PM UTC 24 |
Aug 27 07:51:32 PM UTC 24 |
10969377397 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.2021879928 |
|
|
Aug 27 07:51:30 PM UTC 24 |
Aug 27 07:51:32 PM UTC 24 |
12028185 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.4004444204 |
|
|
Aug 27 07:51:32 PM UTC 24 |
Aug 27 07:51:34 PM UTC 24 |
72814670 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.1640931983 |
|
|
Aug 27 07:51:32 PM UTC 24 |
Aug 27 07:51:34 PM UTC 24 |
41823720 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.652815637 |
|
|
Aug 27 07:51:32 PM UTC 24 |
Aug 27 07:51:34 PM UTC 24 |
23611124 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.3654169258 |
|
|
Aug 27 07:51:24 PM UTC 24 |
Aug 27 07:51:35 PM UTC 24 |
640258370 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.819263889 |
|
|
Aug 27 07:50:43 PM UTC 24 |
Aug 27 07:51:36 PM UTC 24 |
7473908458 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.4086483788 |
|
|
Aug 27 07:51:23 PM UTC 24 |
Aug 27 07:51:36 PM UTC 24 |
1913733289 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.2504543507 |
|
|
Aug 27 07:51:26 PM UTC 24 |
Aug 27 07:51:37 PM UTC 24 |
1137040412 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2051860054 |
|
|
Aug 27 07:51:33 PM UTC 24 |
Aug 27 07:51:37 PM UTC 24 |
151118528 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.2732613883 |
|
|
Aug 27 07:51:33 PM UTC 24 |
Aug 27 07:51:37 PM UTC 24 |
146774178 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.2045102731 |
|
|
Aug 27 07:51:32 PM UTC 24 |
Aug 27 07:51:38 PM UTC 24 |
689510300 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.2216076999 |
|
|
Aug 27 07:51:35 PM UTC 24 |
Aug 27 07:51:40 PM UTC 24 |
105996472 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.243556586 |
|
|
Aug 27 07:51:34 PM UTC 24 |
Aug 27 07:51:41 PM UTC 24 |
200747685 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_stress_all.1761649427 |
|
|
Aug 27 07:49:55 PM UTC 24 |
Aug 27 07:51:41 PM UTC 24 |
49305195339 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.2672331155 |
|
|
Aug 27 07:51:28 PM UTC 24 |
Aug 27 07:51:42 PM UTC 24 |
917086597 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_all.544188128 |
|
|
Aug 27 07:49:25 PM UTC 24 |
Aug 27 07:51:43 PM UTC 24 |
233304960607 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.728731076 |
|
|
Aug 27 07:51:23 PM UTC 24 |
Aug 27 07:51:44 PM UTC 24 |
3570177134 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.2724539089 |
|
|
Aug 27 07:51:42 PM UTC 24 |
Aug 27 07:51:44 PM UTC 24 |
57174934 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_all.2287723405 |
|
|
Aug 27 07:51:08 PM UTC 24 |
Aug 27 07:51:44 PM UTC 24 |
3448587821 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.569324638 |
|
|
Aug 27 07:51:42 PM UTC 24 |
Aug 27 07:51:44 PM UTC 24 |
40666157 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.2471754767 |
|
|
Aug 27 07:51:38 PM UTC 24 |
Aug 27 07:51:45 PM UTC 24 |
621680606 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_all.1535613960 |
|
|
Aug 27 07:50:14 PM UTC 24 |
Aug 27 07:51:45 PM UTC 24 |
4230195546 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.347943904 |
|
|
Aug 27 07:51:44 PM UTC 24 |
Aug 27 07:51:47 PM UTC 24 |
44984067 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.887386534 |
|
|
Aug 27 07:48:00 PM UTC 24 |
Aug 27 07:51:48 PM UTC 24 |
29798340570 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.148513827 |
|
|
Aug 27 07:51:46 PM UTC 24 |
Aug 27 07:51:48 PM UTC 24 |
17259771 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.3156530811 |
|
|
Aug 27 07:43:32 PM UTC 24 |
Aug 27 07:51:48 PM UTC 24 |
188800263628 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.3413297347 |
|
|
Aug 27 07:51:46 PM UTC 24 |
Aug 27 07:51:49 PM UTC 24 |
116762573 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.3101641583 |
|
|
Aug 27 07:47:32 PM UTC 24 |
Aug 27 07:51:51 PM UTC 24 |
52935345709 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.2284075690 |
|
|
Aug 27 07:51:46 PM UTC 24 |
Aug 27 07:51:52 PM UTC 24 |
883102181 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.1795553029 |
|
|
Aug 27 07:51:37 PM UTC 24 |
Aug 27 07:51:54 PM UTC 24 |
4391427479 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1190024375 |
|
|
Aug 27 07:51:49 PM UTC 24 |
Aug 27 07:51:55 PM UTC 24 |
314152100 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.859937838 |
|
|
Aug 27 07:51:46 PM UTC 24 |
Aug 27 07:51:55 PM UTC 24 |
1221383021 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.1969439782 |
|
|
Aug 27 07:51:50 PM UTC 24 |
Aug 27 07:51:56 PM UTC 24 |
85137308 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_all.816510806 |
|
|
Aug 27 07:49:49 PM UTC 24 |
Aug 27 07:51:56 PM UTC 24 |
69640449081 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_and_tpm_min_idle.876571945 |
|
|
Aug 27 07:50:35 PM UTC 24 |
Aug 27 07:51:56 PM UTC 24 |
2872450634 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.3864461495 |
|
|
Aug 27 07:51:56 PM UTC 24 |
Aug 27 07:51:58 PM UTC 24 |
15000303 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.2223493545 |
|
|
Aug 27 07:51:57 PM UTC 24 |
Aug 27 07:51:59 PM UTC 24 |
54876413 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_all.1199149890 |
|
|
Aug 27 07:49:03 PM UTC 24 |
Aug 27 07:52:00 PM UTC 24 |
22816033845 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm.3766670613 |
|
|
Aug 27 07:49:04 PM UTC 24 |
Aug 27 07:52:00 PM UTC 24 |
35222587819 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.377845417 |
|
|
Aug 27 07:51:58 PM UTC 24 |
Aug 27 07:52:00 PM UTC 24 |
143074076 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.2528439708 |
|
|
Aug 27 07:51:39 PM UTC 24 |
Aug 27 07:52:01 PM UTC 24 |
3161519481 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.2852328199 |
|
|
Aug 27 07:51:46 PM UTC 24 |
Aug 27 07:52:02 PM UTC 24 |
1894049073 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.2931472239 |
|
|
Aug 27 07:52:00 PM UTC 24 |
Aug 27 07:52:02 PM UTC 24 |
43066969 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.460566154 |
|
|
Aug 27 07:51:57 PM UTC 24 |
Aug 27 07:52:03 PM UTC 24 |
532071935 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.1487719998 |
|
|
Aug 27 07:50:15 PM UTC 24 |
Aug 27 07:52:04 PM UTC 24 |
41033791430 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.1122885076 |
|
|
Aug 27 07:51:42 PM UTC 24 |
Aug 27 07:52:04 PM UTC 24 |
7435052107 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.3344998259 |
|
|
Aug 27 07:52:02 PM UTC 24 |
Aug 27 07:52:06 PM UTC 24 |
70506566 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3138998424 |
|
|
Aug 27 07:52:03 PM UTC 24 |
Aug 27 07:52:07 PM UTC 24 |
656974818 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.1915929154 |
|
|
Aug 27 07:52:00 PM UTC 24 |
Aug 27 07:52:08 PM UTC 24 |
580651930 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_all.2970555870 |
|
|
Aug 27 07:51:51 PM UTC 24 |
Aug 27 07:52:09 PM UTC 24 |
6651875237 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.498443012 |
|
|
Aug 27 07:51:43 PM UTC 24 |
Aug 27 07:52:09 PM UTC 24 |
5775718518 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.948582342 |
|
|
Aug 27 07:52:00 PM UTC 24 |
Aug 27 07:52:10 PM UTC 24 |
200201396 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.3024384023 |
|
|
Aug 27 07:51:47 PM UTC 24 |
Aug 27 07:52:10 PM UTC 24 |
14131027393 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.2083107646 |
|
|
Aug 27 07:51:49 PM UTC 24 |
Aug 27 07:52:12 PM UTC 24 |
10217921257 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.1521474061 |
|
|
Aug 27 07:52:10 PM UTC 24 |
Aug 27 07:52:13 PM UTC 24 |
36477845 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.3053402063 |
|
|
Aug 27 07:52:11 PM UTC 24 |
Aug 27 07:52:13 PM UTC 24 |
45102487 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.1465661911 |
|
|
Aug 27 07:51:35 PM UTC 24 |
Aug 27 07:52:14 PM UTC 24 |
43123152432 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/45.spi_device_alert_test.2377817142 |
|
|
Aug 27 07:54:18 PM UTC 24 |
Aug 27 07:54:21 PM UTC 24 |
22731621 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.3312212506 |
|
|
Aug 27 07:52:04 PM UTC 24 |
Aug 27 07:52:15 PM UTC 24 |
1133377191 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.1851691458 |
|
|
Aug 27 07:52:14 PM UTC 24 |
Aug 27 07:52:16 PM UTC 24 |
24059816 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.4253111442 |
|
|
Aug 27 07:51:30 PM UTC 24 |
Aug 27 07:52:17 PM UTC 24 |
2744488637 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.3142697615 |
|
|
Aug 27 07:52:14 PM UTC 24 |
Aug 27 07:52:18 PM UTC 24 |
593304544 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.3043944078 |
|
|
Aug 27 07:51:34 PM UTC 24 |
Aug 27 07:52:19 PM UTC 24 |
8771558940 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.2434126862 |
|
|
Aug 27 07:52:15 PM UTC 24 |
Aug 27 07:52:20 PM UTC 24 |
375632602 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.350184411 |
|
|
Aug 27 07:51:32 PM UTC 24 |
Aug 27 07:52:20 PM UTC 24 |
6346665342 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.1955566069 |
|
|
Aug 27 07:52:01 PM UTC 24 |
Aug 27 07:52:23 PM UTC 24 |
3848622581 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1732617894 |
|
|
Aug 27 07:52:20 PM UTC 24 |
Aug 27 07:52:24 PM UTC 24 |
71579865 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.2862223852 |
|
|
Aug 27 07:51:57 PM UTC 24 |
Aug 27 07:52:25 PM UTC 24 |
4007480653 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.2667744072 |
|
|
Aug 27 07:52:03 PM UTC 24 |
Aug 27 07:52:25 PM UTC 24 |
5376444762 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_all.3121610973 |
|
|
Aug 27 07:52:23 PM UTC 24 |
Aug 27 07:52:25 PM UTC 24 |
73838939 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.364449726 |
|
|
Aug 27 07:52:05 PM UTC 24 |
Aug 27 07:52:25 PM UTC 24 |
2344118260 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.917206022 |
|
|
Aug 27 07:52:15 PM UTC 24 |
Aug 27 07:52:27 PM UTC 24 |
11463947302 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.3004531754 |
|
|
Aug 27 07:52:26 PM UTC 24 |
Aug 27 07:52:29 PM UTC 24 |
12878688 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.2700700525 |
|
|
Aug 27 07:52:17 PM UTC 24 |
Aug 27 07:52:29 PM UTC 24 |
1022593989 ps |
| T208 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_stress_all.4115475543 |
|
|
Aug 27 07:52:26 PM UTC 24 |
Aug 27 07:52:29 PM UTC 24 |
69894589 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.2751466000 |
|
|
Aug 27 07:52:27 PM UTC 24 |
Aug 27 07:52:29 PM UTC 24 |
16548640 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.910609644 |
|
|
Aug 27 07:52:20 PM UTC 24 |
Aug 27 07:52:29 PM UTC 24 |
1583199187 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_all.2405639640 |
|
|
Aug 27 07:51:38 PM UTC 24 |
Aug 27 07:52:29 PM UTC 24 |
2171483129 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.1988546232 |
|
|
Aug 27 07:51:37 PM UTC 24 |
Aug 27 07:52:30 PM UTC 24 |
13488847529 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.3530270420 |
|
|
Aug 27 07:51:38 PM UTC 24 |
Aug 27 07:52:30 PM UTC 24 |
7164857294 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.1285157393 |
|
|
Aug 27 07:52:21 PM UTC 24 |
Aug 27 07:52:31 PM UTC 24 |
1594878230 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_mailbox.1063041553 |
|
|
Aug 27 07:52:18 PM UTC 24 |
Aug 27 07:52:32 PM UTC 24 |
792435309 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.1032105587 |
|
|
Aug 27 07:52:30 PM UTC 24 |
Aug 27 07:52:33 PM UTC 24 |
399432662 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.2563973769 |
|
|
Aug 27 07:46:59 PM UTC 24 |
Aug 27 07:52:33 PM UTC 24 |
40577049117 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.1780366111 |
|
|
Aug 27 07:52:31 PM UTC 24 |
Aug 27 07:52:35 PM UTC 24 |
96733703 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.3046362797 |
|
|
Aug 27 07:52:30 PM UTC 24 |
Aug 27 07:52:35 PM UTC 24 |
427097062 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.541501699 |
|
|
Aug 27 07:52:20 PM UTC 24 |
Aug 27 07:52:37 PM UTC 24 |
15109231946 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.3967273242 |
|
|
Aug 27 07:52:32 PM UTC 24 |
Aug 27 07:52:37 PM UTC 24 |
56172550 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_upload.2686798445 |
|
|
Aug 27 07:52:31 PM UTC 24 |
Aug 27 07:52:37 PM UTC 24 |
129715997 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/45.spi_device_intercept.1368488061 |
|
|
Aug 27 07:54:08 PM UTC 24 |
Aug 27 07:54:20 PM UTC 24 |
673897353 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_all.797270453 |
|
|
Aug 27 07:42:54 PM UTC 24 |
Aug 27 07:52:39 PM UTC 24 |
294890609829 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.1080956692 |
|
|
Aug 27 07:46:23 PM UTC 24 |
Aug 27 07:52:40 PM UTC 24 |
162034298905 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.3279375019 |
|
|
Aug 27 07:52:38 PM UTC 24 |
Aug 27 07:52:40 PM UTC 24 |
48452892 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.829323203 |
|
|
Aug 27 07:52:39 PM UTC 24 |
Aug 27 07:52:42 PM UTC 24 |
69801545 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_all.1756450885 |
|
|
Aug 27 07:52:13 PM UTC 24 |
Aug 27 07:52:42 PM UTC 24 |
2092384265 ps |
| T834 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.3747482888 |
|
|
Aug 27 07:52:35 PM UTC 24 |
Aug 27 07:52:43 PM UTC 24 |
3425711585 ps |
| T835 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.3558586454 |
|
|
Aug 27 07:52:11 PM UTC 24 |
Aug 27 07:52:43 PM UTC 24 |
9888856790 ps |
| T836 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.1435718712 |
|
|
Aug 27 07:52:43 PM UTC 24 |
Aug 27 07:52:45 PM UTC 24 |
11161289 ps |
| T837 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_rw.3131413971 |
|
|
Aug 27 07:52:44 PM UTC 24 |
Aug 27 07:52:47 PM UTC 24 |
439914631 ps |
| T838 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_mailbox.3371479332 |
|
|
Aug 27 07:52:31 PM UTC 24 |
Aug 27 07:52:48 PM UTC 24 |
602603385 ps |
| T839 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.3957497657 |
|
|
Aug 27 07:52:44 PM UTC 24 |
Aug 27 07:52:49 PM UTC 24 |
3866748703 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_all.477627458 |
|
|
Aug 27 07:48:45 PM UTC 24 |
Aug 27 07:52:50 PM UTC 24 |
29113527471 ps |
| T840 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_intercept.1574368209 |
|
|
Aug 27 07:52:46 PM UTC 24 |
Aug 27 07:52:50 PM UTC 24 |
145642556 ps |
| T841 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_mode_ignore_cmds.2314045892 |
|
|
Aug 27 07:52:35 PM UTC 24 |
Aug 27 07:52:52 PM UTC 24 |
2088204101 ps |
| T842 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_mailbox.2683627750 |
|
|
Aug 27 07:52:48 PM UTC 24 |
Aug 27 07:52:53 PM UTC 24 |
112474691 ps |
| T843 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_and_tpm.3426599206 |
|
|
Aug 27 07:51:54 PM UTC 24 |
Aug 27 07:52:53 PM UTC 24 |
9041876996 ps |
| T844 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_cfg_cmd.3453758864 |
|
|
Aug 27 07:52:50 PM UTC 24 |
Aug 27 07:52:54 PM UTC 24 |
31090551 ps |
| T845 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/40.spi_device_upload.224604710 |
|
|
Aug 27 07:52:49 PM UTC 24 |
Aug 27 07:52:55 PM UTC 24 |
600555372 ps |
| T846 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.4135008312 |
|
|
Aug 27 07:52:30 PM UTC 24 |
Aug 27 07:52:56 PM UTC 24 |
6685533411 ps |
| T847 |
/workspaces/repo/scratch/os_regression_2024_08_26/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode_ignore_cmds.1621246101 |
|
|
Aug 27 07:50:10 PM UTC 24 |
Aug 27 07:52:56 PM UTC 24 |
153342076939 ps |