| T446 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/13.spi_device_alert_test.2334752896 |
|
|
Aug 29 12:36:56 PM UTC 24 |
Aug 29 12:36:59 PM UTC 24 |
17339399 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_csb_read.1636432942 |
|
|
Aug 29 12:36:58 PM UTC 24 |
Aug 29 12:37:00 PM UTC 24 |
86209274 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_all.150918695 |
|
|
Aug 29 12:32:02 PM UTC 24 |
Aug 29 12:37:01 PM UTC 24 |
162511755458 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mem_parity.2948977596 |
|
|
Aug 29 12:36:59 PM UTC 24 |
Aug 29 12:37:01 PM UTC 24 |
16039886 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode.1556599729 |
|
|
Aug 29 12:36:14 PM UTC 24 |
Aug 29 12:37:02 PM UTC 24 |
8694565717 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/12.spi_device_mailbox.54953747 |
|
|
Aug 29 12:36:09 PM UTC 24 |
Aug 29 12:37:03 PM UTC 24 |
4280310101 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_sts_read.4085066631 |
|
|
Aug 29 12:37:02 PM UTC 24 |
Aug 29 12:37:04 PM UTC 24 |
83412307 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_rw.664757700 |
|
|
Aug 29 12:37:02 PM UTC 24 |
Aug 29 12:37:05 PM UTC 24 |
25740509 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/12.spi_device_stress_all.1952562025 |
|
|
Aug 29 12:36:25 PM UTC 24 |
Aug 29 12:37:05 PM UTC 24 |
15159860019 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.1015644015 |
|
|
Aug 29 12:33:17 PM UTC 24 |
Aug 29 12:37:05 PM UTC 24 |
19039148771 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_read_hw_reg.1047668528 |
|
|
Aug 29 12:37:00 PM UTC 24 |
Aug 29 12:37:05 PM UTC 24 |
1027008682 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm_min_idle.2563731985 |
|
|
Aug 29 12:35:05 PM UTC 24 |
Aug 29 12:37:06 PM UTC 24 |
14466864108 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.1550275395 |
|
|
Aug 29 12:37:01 PM UTC 24 |
Aug 29 12:37:07 PM UTC 24 |
913226754 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.1602717002 |
|
|
Aug 29 12:37:05 PM UTC 24 |
Aug 29 12:37:10 PM UTC 24 |
35974854 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_mode.2490331880 |
|
|
Aug 29 12:36:47 PM UTC 24 |
Aug 29 12:37:10 PM UTC 24 |
8590719305 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.4218861204 |
|
|
Aug 29 12:37:05 PM UTC 24 |
Aug 29 12:37:10 PM UTC 24 |
169792042 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/8.spi_device_stress_all.4229647818 |
|
|
Aug 29 12:34:36 PM UTC 24 |
Aug 29 12:37:11 PM UTC 24 |
11550750728 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.835493800 |
|
|
Aug 29 12:37:06 PM UTC 24 |
Aug 29 12:37:11 PM UTC 24 |
2595984702 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.1345916841 |
|
|
Aug 29 12:37:06 PM UTC 24 |
Aug 29 12:37:12 PM UTC 24 |
96843551 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.67023315 |
|
|
Aug 29 12:38:17 PM UTC 24 |
Aug 29 12:38:20 PM UTC 24 |
26337068 ps |
| T252 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.1863394163 |
|
|
Aug 29 12:36:20 PM UTC 24 |
Aug 29 12:37:13 PM UTC 24 |
2511911992 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.525017159 |
|
|
Aug 29 12:37:12 PM UTC 24 |
Aug 29 12:37:14 PM UTC 24 |
11822732 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.1696429472 |
|
|
Aug 29 12:37:13 PM UTC 24 |
Aug 29 12:37:15 PM UTC 24 |
17668217 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.2751580689 |
|
|
Aug 29 12:37:14 PM UTC 24 |
Aug 29 12:37:17 PM UTC 24 |
15148461 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.302738028 |
|
|
Aug 29 12:37:03 PM UTC 24 |
Aug 29 12:37:17 PM UTC 24 |
1070425865 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.566156770 |
|
|
Aug 29 12:37:17 PM UTC 24 |
Aug 29 12:37:20 PM UTC 24 |
57833281 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.175355376 |
|
|
Aug 29 12:37:18 PM UTC 24 |
Aug 29 12:37:21 PM UTC 24 |
36087547 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/1.spi_device_stress_all.3924359680 |
|
|
Aug 29 12:30:37 PM UTC 24 |
Aug 29 12:37:22 PM UTC 24 |
387320150897 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.64483105 |
|
|
Aug 29 12:37:04 PM UTC 24 |
Aug 29 12:37:23 PM UTC 24 |
3272127102 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.3729679192 |
|
|
Aug 29 12:37:15 PM UTC 24 |
Aug 29 12:37:23 PM UTC 24 |
1252147002 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.2686424811 |
|
|
Aug 29 12:37:08 PM UTC 24 |
Aug 29 12:37:26 PM UTC 24 |
1018391187 ps |
| T224 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.4043416041 |
|
|
Aug 29 12:37:23 PM UTC 24 |
Aug 29 12:37:29 PM UTC 24 |
740709690 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.1079611124 |
|
|
Aug 29 12:37:22 PM UTC 24 |
Aug 29 12:37:30 PM UTC 24 |
659420172 ps |
| T245 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/4.spi_device_stress_all.2512090292 |
|
|
Aug 29 12:32:52 PM UTC 24 |
Aug 29 12:37:33 PM UTC 24 |
29220032705 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.3007300463 |
|
|
Aug 29 12:37:27 PM UTC 24 |
Aug 29 12:37:33 PM UTC 24 |
422788633 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3832382410 |
|
|
Aug 29 12:37:20 PM UTC 24 |
Aug 29 12:37:33 PM UTC 24 |
1467979703 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.1828375916 |
|
|
Aug 29 12:37:24 PM UTC 24 |
Aug 29 12:37:36 PM UTC 24 |
992568245 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_and_tpm_min_idle.1998574377 |
|
|
Aug 29 12:34:13 PM UTC 24 |
Aug 29 12:37:40 PM UTC 24 |
66305790918 ps |
| T212 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm.3949789022 |
|
|
Aug 29 12:35:30 PM UTC 24 |
Aug 29 12:37:42 PM UTC 24 |
23906439877 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.333257594 |
|
|
Aug 29 12:37:34 PM UTC 24 |
Aug 29 12:37:43 PM UTC 24 |
571920721 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.2221982514 |
|
|
Aug 29 12:37:06 PM UTC 24 |
Aug 29 12:37:44 PM UTC 24 |
15814914501 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.2236784563 |
|
|
Aug 29 12:37:42 PM UTC 24 |
Aug 29 12:37:44 PM UTC 24 |
59099431 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.2439159410 |
|
|
Aug 29 12:37:44 PM UTC 24 |
Aug 29 12:37:46 PM UTC 24 |
53015315 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.1829779115 |
|
|
Aug 29 12:37:44 PM UTC 24 |
Aug 29 12:37:46 PM UTC 24 |
74423491 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.3694691655 |
|
|
Aug 29 12:37:47 PM UTC 24 |
Aug 29 12:37:49 PM UTC 24 |
86069611 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.2273104545 |
|
|
Aug 29 12:37:47 PM UTC 24 |
Aug 29 12:37:49 PM UTC 24 |
95511381 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.2424788994 |
|
|
Aug 29 12:37:45 PM UTC 24 |
Aug 29 12:37:50 PM UTC 24 |
259674576 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.3597666250 |
|
|
Aug 29 12:35:54 PM UTC 24 |
Aug 29 12:37:51 PM UTC 24 |
13197052037 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.576293451 |
|
|
Aug 29 12:37:24 PM UTC 24 |
Aug 29 12:37:56 PM UTC 24 |
3886805606 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.3224651511 |
|
|
Aug 29 12:37:46 PM UTC 24 |
Aug 29 12:37:58 PM UTC 24 |
3612108747 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.2979086294 |
|
|
Aug 29 12:37:57 PM UTC 24 |
Aug 29 12:38:02 PM UTC 24 |
41646260 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/2.spi_device_stress_all.2113051611 |
|
|
Aug 29 12:31:18 PM UTC 24 |
Aug 29 12:38:04 PM UTC 24 |
259225122165 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.3491527738 |
|
|
Aug 29 12:37:59 PM UTC 24 |
Aug 29 12:38:05 PM UTC 24 |
418339188 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.392397604 |
|
|
Aug 29 12:36:51 PM UTC 24 |
Aug 29 12:38:08 PM UTC 24 |
7114155889 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1557314042 |
|
|
Aug 29 12:37:50 PM UTC 24 |
Aug 29 12:38:09 PM UTC 24 |
2158874945 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.2797803191 |
|
|
Aug 29 12:37:29 PM UTC 24 |
Aug 29 12:38:12 PM UTC 24 |
12308681456 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.1746154796 |
|
|
Aug 29 12:37:51 PM UTC 24 |
Aug 29 12:38:13 PM UTC 24 |
7765031469 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.730292245 |
|
|
Aug 29 12:37:16 PM UTC 24 |
Aug 29 12:38:15 PM UTC 24 |
67000413081 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.3218482081 |
|
|
Aug 29 12:38:14 PM UTC 24 |
Aug 29 12:38:16 PM UTC 24 |
152890669 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.4064139884 |
|
|
Aug 29 12:38:16 PM UTC 24 |
Aug 29 12:38:18 PM UTC 24 |
70394034 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.2191613311 |
|
|
Aug 29 12:37:50 PM UTC 24 |
Aug 29 12:38:22 PM UTC 24 |
2173115711 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.928220907 |
|
|
Aug 29 12:38:05 PM UTC 24 |
Aug 29 12:38:25 PM UTC 24 |
2721786342 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.2179926 |
|
|
Aug 29 12:38:22 PM UTC 24 |
Aug 29 12:38:25 PM UTC 24 |
48894776 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.3137165469 |
|
|
Aug 29 12:38:26 PM UTC 24 |
Aug 29 12:38:29 PM UTC 24 |
122343408 ps |
| T272 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.743824462 |
|
|
Aug 29 12:37:50 PM UTC 24 |
Aug 29 12:38:30 PM UTC 24 |
26876468895 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.191525040 |
|
|
Aug 29 12:38:30 PM UTC 24 |
Aug 29 12:38:37 PM UTC 24 |
963243851 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.3105175029 |
|
|
Aug 29 12:38:33 PM UTC 24 |
Aug 29 12:38:37 PM UTC 24 |
30896592 ps |
| T242 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.1771973566 |
|
|
Aug 29 12:38:26 PM UTC 24 |
Aug 29 12:38:38 PM UTC 24 |
2135527460 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.3870350487 |
|
|
Aug 29 12:38:38 PM UTC 24 |
Aug 29 12:38:43 PM UTC 24 |
31688543 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.3883970868 |
|
|
Aug 29 12:38:38 PM UTC 24 |
Aug 29 12:38:44 PM UTC 24 |
97101081 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.4127342598 |
|
|
Aug 29 12:38:19 PM UTC 24 |
Aug 29 12:38:45 PM UTC 24 |
15488529242 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_mode_ignore_cmds.1716837069 |
|
|
Aug 29 12:34:59 PM UTC 24 |
Aug 29 12:38:52 PM UTC 24 |
227841981895 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm_min_idle.152523474 |
|
|
Aug 29 12:35:59 PM UTC 24 |
Aug 29 12:38:54 PM UTC 24 |
12360918360 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.3683498992 |
|
|
Aug 29 12:38:20 PM UTC 24 |
Aug 29 12:38:54 PM UTC 24 |
14549816404 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.2821558052 |
|
|
Aug 29 12:38:55 PM UTC 24 |
Aug 29 12:38:57 PM UTC 24 |
59890683 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.2113765989 |
|
|
Aug 29 12:38:09 PM UTC 24 |
Aug 29 12:38:58 PM UTC 24 |
3461923128 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.302850170 |
|
|
Aug 29 12:38:58 PM UTC 24 |
Aug 29 12:39:00 PM UTC 24 |
42531047 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.1428907479 |
|
|
Aug 29 12:38:44 PM UTC 24 |
Aug 29 12:39:00 PM UTC 24 |
5461853132 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.4015156001 |
|
|
Aug 29 12:38:59 PM UTC 24 |
Aug 29 12:39:01 PM UTC 24 |
97038303 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.182922594 |
|
|
Aug 29 12:38:31 PM UTC 24 |
Aug 29 12:39:02 PM UTC 24 |
4992659833 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.3524255015 |
|
|
Aug 29 12:39:01 PM UTC 24 |
Aug 29 12:39:04 PM UTC 24 |
32007269 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.1875925640 |
|
|
Aug 29 12:39:02 PM UTC 24 |
Aug 29 12:39:05 PM UTC 24 |
319678186 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.1699866018 |
|
|
Aug 29 12:37:05 PM UTC 24 |
Aug 29 12:39:06 PM UTC 24 |
12614353339 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.1860667183 |
|
|
Aug 29 12:39:04 PM UTC 24 |
Aug 29 12:39:07 PM UTC 24 |
146534875 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.2668699129 |
|
|
Aug 29 12:38:39 PM UTC 24 |
Aug 29 12:39:11 PM UTC 24 |
5456047225 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/0.spi_device_stress_all.3093269491 |
|
|
Aug 29 12:30:12 PM UTC 24 |
Aug 29 12:39:14 PM UTC 24 |
48337454919 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.3216774336 |
|
|
Aug 29 12:39:08 PM UTC 24 |
Aug 29 12:39:16 PM UTC 24 |
1753388726 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.2960638269 |
|
|
Aug 29 12:39:05 PM UTC 24 |
Aug 29 12:39:17 PM UTC 24 |
1183913454 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.1356630826 |
|
|
Aug 29 12:39:06 PM UTC 24 |
Aug 29 12:39:19 PM UTC 24 |
389884165 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.2659609124 |
|
|
Aug 29 12:39:02 PM UTC 24 |
Aug 29 12:39:19 PM UTC 24 |
906302485 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.2004276797 |
|
|
Aug 29 12:39:14 PM UTC 24 |
Aug 29 12:39:20 PM UTC 24 |
277499380 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.4142713909 |
|
|
Aug 29 12:39:01 PM UTC 24 |
Aug 29 12:39:21 PM UTC 24 |
3004956571 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.2132638281 |
|
|
Aug 29 12:39:18 PM UTC 24 |
Aug 29 12:39:24 PM UTC 24 |
79508793 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.3362085284 |
|
|
Aug 29 12:39:25 PM UTC 24 |
Aug 29 12:39:27 PM UTC 24 |
16235243 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.601198521 |
|
|
Aug 29 12:39:28 PM UTC 24 |
Aug 29 12:39:30 PM UTC 24 |
21496025 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.1500219242 |
|
|
Aug 29 12:39:15 PM UTC 24 |
Aug 29 12:39:31 PM UTC 24 |
2112918134 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.1886534122 |
|
|
Aug 29 12:39:15 PM UTC 24 |
Aug 29 12:39:31 PM UTC 24 |
7279011071 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.820193989 |
|
|
Aug 29 12:39:13 PM UTC 24 |
Aug 29 12:39:31 PM UTC 24 |
934043471 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.3378943051 |
|
|
Aug 29 12:36:24 PM UTC 24 |
Aug 29 12:39:33 PM UTC 24 |
88264823844 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.3484618216 |
|
|
Aug 29 12:39:31 PM UTC 24 |
Aug 29 12:39:33 PM UTC 24 |
333388228 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.1404027655 |
|
|
Aug 29 12:39:32 PM UTC 24 |
Aug 29 12:39:35 PM UTC 24 |
251659125 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.3281951878 |
|
|
Aug 29 12:39:21 PM UTC 24 |
Aug 29 12:39:36 PM UTC 24 |
1420840751 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.1031333519 |
|
|
Aug 29 12:39:33 PM UTC 24 |
Aug 29 12:39:37 PM UTC 24 |
353762885 ps |
| T261 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.3253726860 |
|
|
Aug 29 12:39:35 PM UTC 24 |
Aug 29 12:39:48 PM UTC 24 |
768041487 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.1842578085 |
|
|
Aug 29 12:39:20 PM UTC 24 |
Aug 29 12:39:50 PM UTC 24 |
3349464227 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.626083510 |
|
|
Aug 29 12:39:37 PM UTC 24 |
Aug 29 12:39:50 PM UTC 24 |
2104519280 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.3944928316 |
|
|
Aug 29 12:37:36 PM UTC 24 |
Aug 29 12:39:51 PM UTC 24 |
13400837016 ps |
| T317 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.2524388913 |
|
|
Aug 29 12:39:49 PM UTC 24 |
Aug 29 12:39:54 PM UTC 24 |
329326052 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.320999766 |
|
|
Aug 29 12:39:52 PM UTC 24 |
Aug 29 12:39:54 PM UTC 24 |
12914078 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.18029491 |
|
|
Aug 29 12:39:51 PM UTC 24 |
Aug 29 12:39:55 PM UTC 24 |
121407953 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.2565041887 |
|
|
Aug 29 12:38:43 PM UTC 24 |
Aug 29 12:39:59 PM UTC 24 |
9359682340 ps |
| T108 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.3905687030 |
|
|
Aug 29 12:36:51 PM UTC 24 |
Aug 29 12:39:59 PM UTC 24 |
5740582390 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.2345656215 |
|
|
Aug 29 12:39:59 PM UTC 24 |
Aug 29 12:40:02 PM UTC 24 |
47396766 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.3345367059 |
|
|
Aug 29 12:40:00 PM UTC 24 |
Aug 29 12:40:02 PM UTC 24 |
14495866 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.788953923 |
|
|
Aug 29 12:39:32 PM UTC 24 |
Aug 29 12:40:03 PM UTC 24 |
8802809513 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.2560427865 |
|
|
Aug 29 12:40:03 PM UTC 24 |
Aug 29 12:40:05 PM UTC 24 |
76288673 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.3239395597 |
|
|
Aug 29 12:39:32 PM UTC 24 |
Aug 29 12:40:05 PM UTC 24 |
1793411499 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.1299573920 |
|
|
Aug 29 12:39:51 PM UTC 24 |
Aug 29 12:40:06 PM UTC 24 |
346586304 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm.2076333103 |
|
|
Aug 29 12:39:20 PM UTC 24 |
Aug 29 12:40:08 PM UTC 24 |
20190878267 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.64122275 |
|
|
Aug 29 12:40:06 PM UTC 24 |
Aug 29 12:40:08 PM UTC 24 |
25354148 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.297525943 |
|
|
Aug 29 12:40:04 PM UTC 24 |
Aug 29 12:40:08 PM UTC 24 |
648484524 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.30222481 |
|
|
Aug 29 12:40:06 PM UTC 24 |
Aug 29 12:40:09 PM UTC 24 |
50809213 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.3941589860 |
|
|
Aug 29 12:39:34 PM UTC 24 |
Aug 29 12:40:19 PM UTC 24 |
65192716156 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.456971436 |
|
|
Aug 29 12:39:52 PM UTC 24 |
Aug 29 12:40:20 PM UTC 24 |
4091373410 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.1389571078 |
|
|
Aug 29 12:40:22 PM UTC 24 |
Aug 29 12:40:24 PM UTC 24 |
195522231 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.3627304757 |
|
|
Aug 29 12:40:08 PM UTC 24 |
Aug 29 12:40:26 PM UTC 24 |
2691945153 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.4009805697 |
|
|
Aug 29 12:40:09 PM UTC 24 |
Aug 29 12:40:28 PM UTC 24 |
2381400464 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm.3873308365 |
|
|
Aug 29 12:39:55 PM UTC 24 |
Aug 29 12:40:31 PM UTC 24 |
1337866856 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.4197105760 |
|
|
Aug 29 12:40:25 PM UTC 24 |
Aug 29 12:40:32 PM UTC 24 |
1434149449 ps |
| T231 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.1944338916 |
|
|
Aug 29 12:35:59 PM UTC 24 |
Aug 29 12:40:33 PM UTC 24 |
79015634638 ps |
| T219 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.2282878505 |
|
|
Aug 29 12:40:09 PM UTC 24 |
Aug 29 12:40:33 PM UTC 24 |
23865783056 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.960689310 |
|
|
Aug 29 12:40:21 PM UTC 24 |
Aug 29 12:40:34 PM UTC 24 |
8806834236 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.89994318 |
|
|
Aug 29 12:40:37 PM UTC 24 |
Aug 29 12:40:39 PM UTC 24 |
15991811 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.2655520439 |
|
|
Aug 29 12:40:05 PM UTC 24 |
Aug 29 12:40:36 PM UTC 24 |
13935341304 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.2115330920 |
|
|
Aug 29 12:40:34 PM UTC 24 |
Aug 29 12:40:36 PM UTC 24 |
39750739 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.1747092019 |
|
|
Aug 29 12:40:34 PM UTC 24 |
Aug 29 12:40:36 PM UTC 24 |
20950718 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.2007103414 |
|
|
Aug 29 12:40:35 PM UTC 24 |
Aug 29 12:40:38 PM UTC 24 |
272082213 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode_ignore_cmds.3544125772 |
|
|
Aug 29 12:36:16 PM UTC 24 |
Aug 29 12:40:39 PM UTC 24 |
33042998422 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.1747106040 |
|
|
Aug 29 12:40:07 PM UTC 24 |
Aug 29 12:40:40 PM UTC 24 |
24486631224 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.2350142394 |
|
|
Aug 29 12:40:38 PM UTC 24 |
Aug 29 12:40:41 PM UTC 24 |
90740591 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.376537035 |
|
|
Aug 29 12:38:06 PM UTC 24 |
Aug 29 12:40:44 PM UTC 24 |
93530516797 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.4246833936 |
|
|
Aug 29 12:40:40 PM UTC 24 |
Aug 29 12:40:44 PM UTC 24 |
2429733199 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.2693373772 |
|
|
Aug 29 12:37:11 PM UTC 24 |
Aug 29 12:40:47 PM UTC 24 |
93528306900 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.3554497005 |
|
|
Aug 29 12:40:40 PM UTC 24 |
Aug 29 12:40:47 PM UTC 24 |
1072400801 ps |
| T296 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.2984192871 |
|
|
Aug 29 12:40:40 PM UTC 24 |
Aug 29 12:40:48 PM UTC 24 |
178825138 ps |
| T321 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.3478530566 |
|
|
Aug 29 12:40:39 PM UTC 24 |
Aug 29 12:40:51 PM UTC 24 |
14130559458 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.2305293748 |
|
|
Aug 29 12:40:20 PM UTC 24 |
Aug 29 12:40:52 PM UTC 24 |
10133679071 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.135027330 |
|
|
Aug 29 12:40:41 PM UTC 24 |
Aug 29 12:40:53 PM UTC 24 |
1370016339 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.1590088439 |
|
|
Aug 29 12:40:44 PM UTC 24 |
Aug 29 12:40:53 PM UTC 24 |
687501699 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.3438078705 |
|
|
Aug 29 12:40:53 PM UTC 24 |
Aug 29 12:40:55 PM UTC 24 |
11278552 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.3860149267 |
|
|
Aug 29 12:39:38 PM UTC 24 |
Aug 29 12:40:55 PM UTC 24 |
5532805925 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.3341027281 |
|
|
Aug 29 12:38:10 PM UTC 24 |
Aug 29 12:40:56 PM UTC 24 |
68759427886 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.3376165421 |
|
|
Aug 29 12:40:41 PM UTC 24 |
Aug 29 12:40:56 PM UTC 24 |
1348713925 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.2806706730 |
|
|
Aug 29 12:40:54 PM UTC 24 |
Aug 29 12:40:56 PM UTC 24 |
105024791 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.2411849148 |
|
|
Aug 29 12:40:09 PM UTC 24 |
Aug 29 12:40:56 PM UTC 24 |
8048283121 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.2914216229 |
|
|
Aug 29 12:40:48 PM UTC 24 |
Aug 29 12:40:56 PM UTC 24 |
711112051 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.2791543332 |
|
|
Aug 29 12:40:56 PM UTC 24 |
Aug 29 12:40:59 PM UTC 24 |
76154562 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.3110005351 |
|
|
Aug 29 12:40:58 PM UTC 24 |
Aug 29 12:41:00 PM UTC 24 |
26116521 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.1387424777 |
|
|
Aug 29 12:40:58 PM UTC 24 |
Aug 29 12:41:01 PM UTC 24 |
61876310 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.2094212075 |
|
|
Aug 29 12:40:56 PM UTC 24 |
Aug 29 12:41:06 PM UTC 24 |
1666098509 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.850557033 |
|
|
Aug 29 12:40:58 PM UTC 24 |
Aug 29 12:41:06 PM UTC 24 |
977109445 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.3677188538 |
|
|
Aug 29 12:40:37 PM UTC 24 |
Aug 29 12:41:09 PM UTC 24 |
9073456844 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.228541737 |
|
|
Aug 29 12:41:07 PM UTC 24 |
Aug 29 12:41:09 PM UTC 24 |
13053872 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.3284545606 |
|
|
Aug 29 12:39:20 PM UTC 24 |
Aug 29 12:41:12 PM UTC 24 |
4520144281 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.1894553203 |
|
|
Aug 29 12:40:48 PM UTC 24 |
Aug 29 12:41:12 PM UTC 24 |
1016341909 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.2291697385 |
|
|
Aug 29 12:37:34 PM UTC 24 |
Aug 29 12:41:13 PM UTC 24 |
115094036160 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.1449474643 |
|
|
Aug 29 12:38:12 PM UTC 24 |
Aug 29 12:41:16 PM UTC 24 |
16200487264 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.993223903 |
|
|
Aug 29 12:37:11 PM UTC 24 |
Aug 29 12:41:16 PM UTC 24 |
10354536689 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.2028300685 |
|
|
Aug 29 12:41:14 PM UTC 24 |
Aug 29 12:41:16 PM UTC 24 |
181825584 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1505848545 |
|
|
Aug 29 12:41:09 PM UTC 24 |
Aug 29 12:41:16 PM UTC 24 |
327368633 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.3240299223 |
|
|
Aug 29 12:41:17 PM UTC 24 |
Aug 29 12:41:19 PM UTC 24 |
43744118 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.2098046037 |
|
|
Aug 29 12:37:50 PM UTC 24 |
Aug 29 12:41:19 PM UTC 24 |
16721233513 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.419655876 |
|
|
Aug 29 12:41:17 PM UTC 24 |
Aug 29 12:41:19 PM UTC 24 |
56142442 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.3361891128 |
|
|
Aug 29 12:41:20 PM UTC 24 |
Aug 29 12:41:22 PM UTC 24 |
11587545 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.267882167 |
|
|
Aug 29 12:41:20 PM UTC 24 |
Aug 29 12:41:23 PM UTC 24 |
26117646 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.1536260023 |
|
|
Aug 29 12:41:01 PM UTC 24 |
Aug 29 12:41:24 PM UTC 24 |
3699514712 ps |
| T218 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.2670404875 |
|
|
Aug 29 12:37:34 PM UTC 24 |
Aug 29 12:41:24 PM UTC 24 |
48839746440 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.3912176598 |
|
|
Aug 29 12:41:20 PM UTC 24 |
Aug 29 12:41:25 PM UTC 24 |
130054882 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.2654778774 |
|
|
Aug 29 12:41:02 PM UTC 24 |
Aug 29 12:41:25 PM UTC 24 |
1395955577 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.4283577767 |
|
|
Aug 29 12:41:17 PM UTC 24 |
Aug 29 12:41:29 PM UTC 24 |
2026429048 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.1173326887 |
|
|
Aug 29 12:41:26 PM UTC 24 |
Aug 29 12:41:30 PM UTC 24 |
134061618 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.2830774667 |
|
|
Aug 29 12:40:58 PM UTC 24 |
Aug 29 12:41:33 PM UTC 24 |
16370868281 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/9.spi_device_stress_all.4109941086 |
|
|
Aug 29 12:35:05 PM UTC 24 |
Aug 29 12:41:34 PM UTC 24 |
193381819696 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.3939652336 |
|
|
Aug 29 12:41:27 PM UTC 24 |
Aug 29 12:41:35 PM UTC 24 |
436996676 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.2006634025 |
|
|
Aug 29 12:41:34 PM UTC 24 |
Aug 29 12:41:36 PM UTC 24 |
34433557 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.2537629161 |
|
|
Aug 29 12:41:26 PM UTC 24 |
Aug 29 12:41:36 PM UTC 24 |
2838505891 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.1329298174 |
|
|
Aug 29 12:41:24 PM UTC 24 |
Aug 29 12:41:37 PM UTC 24 |
3413579556 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.2378508939 |
|
|
Aug 29 12:40:56 PM UTC 24 |
Aug 29 12:41:37 PM UTC 24 |
15269533710 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.1740139127 |
|
|
Aug 29 12:41:06 PM UTC 24 |
Aug 29 12:41:38 PM UTC 24 |
10411966487 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.3404127460 |
|
|
Aug 29 12:41:37 PM UTC 24 |
Aug 29 12:41:39 PM UTC 24 |
14467246 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.4106220057 |
|
|
Aug 29 12:41:37 PM UTC 24 |
Aug 29 12:41:40 PM UTC 24 |
18062744 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.514412842 |
|
|
Aug 29 12:41:23 PM UTC 24 |
Aug 29 12:41:40 PM UTC 24 |
15147818950 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.2004856607 |
|
|
Aug 29 12:41:35 PM UTC 24 |
Aug 29 12:41:40 PM UTC 24 |
3427960196 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2427717118 |
|
|
Aug 29 12:41:31 PM UTC 24 |
Aug 29 12:41:40 PM UTC 24 |
331602010 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.3482891645 |
|
|
Aug 29 12:41:41 PM UTC 24 |
Aug 29 12:41:43 PM UTC 24 |
34654944 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.3096889840 |
|
|
Aug 29 12:41:41 PM UTC 24 |
Aug 29 12:41:44 PM UTC 24 |
215622703 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.688719007 |
|
|
Aug 29 12:41:41 PM UTC 24 |
Aug 29 12:41:44 PM UTC 24 |
174130567 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.3810379086 |
|
|
Aug 29 12:41:23 PM UTC 24 |
Aug 29 12:41:45 PM UTC 24 |
3365364407 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_and_tpm.3912922492 |
|
|
Aug 29 12:34:12 PM UTC 24 |
Aug 29 12:41:49 PM UTC 24 |
80322592133 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.4218906598 |
|
|
Aug 29 12:41:44 PM UTC 24 |
Aug 29 12:41:49 PM UTC 24 |
52862748 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.566218219 |
|
|
Aug 29 12:41:39 PM UTC 24 |
Aug 29 12:41:49 PM UTC 24 |
2043837019 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.3777340306 |
|
|
Aug 29 12:41:41 PM UTC 24 |
Aug 29 12:41:50 PM UTC 24 |
2042884881 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.424501076 |
|
|
Aug 29 12:41:17 PM UTC 24 |
Aug 29 12:41:50 PM UTC 24 |
26294030350 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.2923937351 |
|
|
Aug 29 12:41:45 PM UTC 24 |
Aug 29 12:41:51 PM UTC 24 |
381832400 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.2242700499 |
|
|
Aug 29 12:41:41 PM UTC 24 |
Aug 29 12:41:52 PM UTC 24 |
1116574218 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.220058222 |
|
|
Aug 29 12:38:55 PM UTC 24 |
Aug 29 12:41:54 PM UTC 24 |
14368760362 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.2432624563 |
|
|
Aug 29 12:41:53 PM UTC 24 |
Aug 29 12:41:55 PM UTC 24 |
31546421 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.2111509912 |
|
|
Aug 29 12:41:55 PM UTC 24 |
Aug 29 12:41:57 PM UTC 24 |
275383027 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.3397818059 |
|
|
Aug 29 12:39:56 PM UTC 24 |
Aug 29 12:41:58 PM UTC 24 |
31730044868 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3888854470 |
|
|
Aug 29 12:41:50 PM UTC 24 |
Aug 29 12:41:59 PM UTC 24 |
1760801917 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.2807588395 |
|
|
Aug 29 12:41:45 PM UTC 24 |
Aug 29 12:42:01 PM UTC 24 |
2837431919 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.826811094 |
|
|
Aug 29 12:41:56 PM UTC 24 |
Aug 29 12:42:02 PM UTC 24 |
787758482 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.3639122298 |
|
|
Aug 29 12:41:59 PM UTC 24 |
Aug 29 12:42:02 PM UTC 24 |
58783073 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.1020747848 |
|
|
Aug 29 12:41:58 PM UTC 24 |
Aug 29 12:42:02 PM UTC 24 |
2296511472 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.1318555269 |
|
|
Aug 29 12:42:00 PM UTC 24 |
Aug 29 12:42:02 PM UTC 24 |
59929833 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2327396937 |
|
|
Aug 29 12:42:02 PM UTC 24 |
Aug 29 12:42:06 PM UTC 24 |
87097543 ps |
| T199 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.3436620834 |
|
|
Aug 29 12:37:31 PM UTC 24 |
Aug 29 12:42:08 PM UTC 24 |
521226699680 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode_ignore_cmds.578768737 |
|
|
Aug 29 12:41:30 PM UTC 24 |
Aug 29 12:42:09 PM UTC 24 |
1465399447 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3456528023 |
|
|
Aug 29 12:42:03 PM UTC 24 |
Aug 29 12:42:09 PM UTC 24 |
273154736 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.427512255 |
|
|
Aug 29 12:42:03 PM UTC 24 |
Aug 29 12:42:11 PM UTC 24 |
1128774440 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.2038829971 |
|
|
Aug 29 12:42:09 PM UTC 24 |
Aug 29 12:42:11 PM UTC 24 |
46512036 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.3411676284 |
|
|
Aug 29 12:42:03 PM UTC 24 |
Aug 29 12:42:13 PM UTC 24 |
1545732890 ps |
| T168 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/3.spi_device_stress_all.4238776050 |
|
|
Aug 29 12:32:09 PM UTC 24 |
Aug 29 12:42:16 PM UTC 24 |
143739801854 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.1008380262 |
|
|
Aug 29 12:42:10 PM UTC 24 |
Aug 29 12:42:18 PM UTC 24 |
983317534 ps |
| T207 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.326745810 |
|
|
Aug 29 12:35:32 PM UTC 24 |
Aug 29 12:42:19 PM UTC 24 |
197350664741 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.2631447947 |
|
|
Aug 29 12:42:19 PM UTC 24 |
Aug 29 12:42:21 PM UTC 24 |
21141778 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.4019832612 |
|
|
Aug 29 12:42:20 PM UTC 24 |
Aug 29 12:42:22 PM UTC 24 |
19043782 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.3474508454 |
|
|
Aug 29 12:42:03 PM UTC 24 |
Aug 29 12:42:23 PM UTC 24 |
3107632146 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.3173788762 |
|
|
Aug 29 12:41:40 PM UTC 24 |
Aug 29 12:42:25 PM UTC 24 |
6238284040 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.595041348 |
|
|
Aug 29 12:42:24 PM UTC 24 |
Aug 29 12:42:27 PM UTC 24 |
291907166 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.499156216 |
|
|
Aug 29 12:35:32 PM UTC 24 |
Aug 29 12:42:29 PM UTC 24 |
79067997364 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.4070624941 |
|
|
Aug 29 12:42:26 PM UTC 24 |
Aug 29 12:42:29 PM UTC 24 |
51380423 ps |
| T220 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.1483100983 |
|
|
Aug 29 12:41:00 PM UTC 24 |
Aug 29 12:42:30 PM UTC 24 |
10020116550 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.667843730 |
|
|
Aug 29 12:41:36 PM UTC 24 |
Aug 29 12:42:31 PM UTC 24 |
10601227982 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.2912227809 |
|
|
Aug 29 12:42:07 PM UTC 24 |
Aug 29 12:42:31 PM UTC 24 |
3700746508 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.1621177849 |
|
|
Aug 29 12:42:27 PM UTC 24 |
Aug 29 12:42:31 PM UTC 24 |
555187334 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.2323123163 |
|
|
Aug 29 12:42:22 PM UTC 24 |
Aug 29 12:42:34 PM UTC 24 |
900070822 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.98719633 |
|
|
Aug 29 12:42:32 PM UTC 24 |
Aug 29 12:42:35 PM UTC 24 |
32894735 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.490676488 |
|
|
Aug 29 12:42:32 PM UTC 24 |
Aug 29 12:42:36 PM UTC 24 |
77704546 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.626617899 |
|
|
Aug 29 12:42:29 PM UTC 24 |
Aug 29 12:42:37 PM UTC 24 |
855629802 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.2205960019 |
|
|
Aug 29 12:42:09 PM UTC 24 |
Aug 29 12:42:39 PM UTC 24 |
1490098760 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.1487642094 |
|
|
Aug 29 12:40:29 PM UTC 24 |
Aug 29 12:42:39 PM UTC 24 |
12918874674 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.2351947240 |
|
|
Aug 29 12:42:32 PM UTC 24 |
Aug 29 12:42:40 PM UTC 24 |
161116923 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3425959168 |
|
|
Aug 29 12:42:35 PM UTC 24 |
Aug 29 12:42:41 PM UTC 24 |
1253812723 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.1034150165 |
|
|
Aug 29 12:38:54 PM UTC 24 |
Aug 29 12:42:41 PM UTC 24 |
21892340061 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.4109064737 |
|
|
Aug 29 12:42:31 PM UTC 24 |
Aug 29 12:42:42 PM UTC 24 |
1085811156 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.2997767491 |
|
|
Aug 29 12:40:32 PM UTC 24 |
Aug 29 12:42:43 PM UTC 24 |
92113276378 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.501983169 |
|
|
Aug 29 12:42:41 PM UTC 24 |
Aug 29 12:42:43 PM UTC 24 |
13182697 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.4237926043 |
|
|
Aug 29 12:42:41 PM UTC 24 |
Aug 29 12:42:43 PM UTC 24 |
47721292 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_28/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.3576200093 |
|
|
Aug 29 12:41:44 PM UTC 24 |
Aug 29 12:42:44 PM UTC 24 |
3639318449 ps |