| T37 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/10.spi_device_stress_all.434585186 |
|
|
Sep 01 08:35:56 PM UTC 24 |
Sep 01 08:37:00 PM UTC 24 |
4511270457 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/7.spi_device_flash_and_tpm.1285244077 |
|
|
Sep 01 08:35:12 PM UTC 24 |
Sep 01 08:37:00 PM UTC 24 |
7479474912 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_cmd_filtering.1642511692 |
|
|
Sep 01 08:36:57 PM UTC 24 |
Sep 01 08:37:01 PM UTC 24 |
902683057 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_pass_addr_payload_swap.3098349806 |
|
|
Sep 01 08:36:57 PM UTC 24 |
Sep 01 08:37:02 PM UTC 24 |
342734118 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_all.2943051140 |
|
|
Sep 01 08:36:07 PM UTC 24 |
Sep 01 08:37:02 PM UTC 24 |
32387895050 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_cfg_cmd.1153155802 |
|
|
Sep 01 08:37:00 PM UTC 24 |
Sep 01 08:37:04 PM UTC 24 |
29981892 ps |
| T255 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/13.spi_device_mailbox.605198168 |
|
|
Sep 01 08:36:34 PM UTC 24 |
Sep 01 08:37:04 PM UTC 24 |
3433943251 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_alert_test.2623314147 |
|
|
Sep 01 08:37:03 PM UTC 24 |
Sep 01 08:37:05 PM UTC 24 |
30635484 ps |
| T196 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_stress_all.2107763207 |
|
|
Sep 01 08:37:03 PM UTC 24 |
Sep 01 08:37:06 PM UTC 24 |
63939216 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_csb_read.4234389941 |
|
|
Sep 01 08:37:04 PM UTC 24 |
Sep 01 08:37:06 PM UTC 24 |
17765070 ps |
| T249 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_and_tpm.2785409380 |
|
|
Sep 01 08:34:27 PM UTC 24 |
Sep 01 08:37:07 PM UTC 24 |
19818676676 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mem_parity.2929965106 |
|
|
Sep 01 08:37:05 PM UTC 24 |
Sep 01 08:37:08 PM UTC 24 |
137606531 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_upload.836914105 |
|
|
Sep 01 08:36:59 PM UTC 24 |
Sep 01 08:37:08 PM UTC 24 |
1496962904 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_intercept.4087398897 |
|
|
Sep 01 08:36:58 PM UTC 24 |
Sep 01 08:37:09 PM UTC 24 |
2622118346 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_sts_read.946710294 |
|
|
Sep 01 08:37:07 PM UTC 24 |
Sep 01 08:37:10 PM UTC 24 |
69962015 ps |
| T206 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_and_tpm.3209287378 |
|
|
Sep 01 08:35:40 PM UTC 24 |
Sep 01 08:37:10 PM UTC 24 |
12095939334 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_rw.2163320615 |
|
|
Sep 01 08:37:08 PM UTC 24 |
Sep 01 08:37:12 PM UTC 24 |
200159365 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_read_buffer_direct.3794465541 |
|
|
Sep 01 08:37:01 PM UTC 24 |
Sep 01 08:37:13 PM UTC 24 |
6530742856 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_mode.339891773 |
|
|
Sep 01 08:36:18 PM UTC 24 |
Sep 01 08:37:14 PM UTC 24 |
10591532550 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_upload.190921725 |
|
|
Sep 01 08:37:11 PM UTC 24 |
Sep 01 08:37:16 PM UTC 24 |
445880708 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/13.spi_device_tpm_all.60108825 |
|
|
Sep 01 08:36:28 PM UTC 24 |
Sep 01 08:37:16 PM UTC 24 |
3439134983 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_mailbox.3280555073 |
|
|
Sep 01 08:37:11 PM UTC 24 |
Sep 01 08:37:17 PM UTC 24 |
267833386 ps |
| T318 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_intercept.1200954285 |
|
|
Sep 01 08:37:10 PM UTC 24 |
Sep 01 08:37:19 PM UTC 24 |
338837872 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_read_hw_reg.3047456400 |
|
|
Sep 01 08:37:06 PM UTC 24 |
Sep 01 08:37:20 PM UTC 24 |
5695339574 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_tpm_all.3563197725 |
|
|
Sep 01 08:36:55 PM UTC 24 |
Sep 01 08:37:21 PM UTC 24 |
3337613731 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_cmd_filtering.3943482592 |
|
|
Sep 01 08:37:09 PM UTC 24 |
Sep 01 08:37:22 PM UTC 24 |
2604518492 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_read_buffer_direct.2401554420 |
|
|
Sep 01 08:37:15 PM UTC 24 |
Sep 01 08:37:23 PM UTC 24 |
193081743 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_alert_test.2406815144 |
|
|
Sep 01 08:37:22 PM UTC 24 |
Sep 01 08:37:24 PM UTC 24 |
13522006 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_csb_read.868106993 |
|
|
Sep 01 08:37:22 PM UTC 24 |
Sep 01 08:37:24 PM UTC 24 |
40581379 ps |
| T403 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode.72886289 |
|
|
Sep 01 08:37:13 PM UTC 24 |
Sep 01 08:37:25 PM UTC 24 |
2557405536 ps |
| T348 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode_ignore_cmds.3934610873 |
|
|
Sep 01 08:37:01 PM UTC 24 |
Sep 01 08:37:25 PM UTC 24 |
1435848447 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mem_parity.2949766079 |
|
|
Sep 01 08:37:23 PM UTC 24 |
Sep 01 08:37:25 PM UTC 24 |
34942277 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_sts_read.1757520130 |
|
|
Sep 01 08:37:25 PM UTC 24 |
Sep 01 08:37:27 PM UTC 24 |
83737615 ps |
| T197 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/8.spi_device_stress_all.1511785423 |
|
|
Sep 01 08:35:28 PM UTC 24 |
Sep 01 08:37:28 PM UTC 24 |
8319482715 ps |
| T350 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_pass_addr_payload_swap.890010269 |
|
|
Sep 01 08:37:10 PM UTC 24 |
Sep 01 08:37:29 PM UTC 24 |
13943127028 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_rw.1916883018 |
|
|
Sep 01 08:37:26 PM UTC 24 |
Sep 01 08:37:30 PM UTC 24 |
270240669 ps |
| T324 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_cfg_cmd.2661911398 |
|
|
Sep 01 08:37:12 PM UTC 24 |
Sep 01 08:37:30 PM UTC 24 |
7432965813 ps |
| T286 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_cmd_filtering.3484487726 |
|
|
Sep 01 08:37:26 PM UTC 24 |
Sep 01 08:37:31 PM UTC 24 |
151801994 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_pass_addr_payload_swap.1362485615 |
|
|
Sep 01 08:37:26 PM UTC 24 |
Sep 01 08:37:33 PM UTC 24 |
251464494 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_read_hw_reg.837427409 |
|
|
Sep 01 08:37:24 PM UTC 24 |
Sep 01 08:37:34 PM UTC 24 |
1289214204 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_all.2028884454 |
|
|
Sep 01 08:36:21 PM UTC 24 |
Sep 01 08:37:34 PM UTC 24 |
17800373916 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_upload.4115983800 |
|
|
Sep 01 08:37:29 PM UTC 24 |
Sep 01 08:37:34 PM UTC 24 |
226797965 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_tpm_all.2746978990 |
|
|
Sep 01 08:37:06 PM UTC 24 |
Sep 01 08:37:36 PM UTC 24 |
7434882136 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_cfg_cmd.520678959 |
|
|
Sep 01 08:37:31 PM UTC 24 |
Sep 01 08:37:36 PM UTC 24 |
98182562 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_alert_test.2924395317 |
|
|
Sep 01 08:37:37 PM UTC 24 |
Sep 01 08:37:40 PM UTC 24 |
20088900 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_read_buffer_direct.1111494594 |
|
|
Sep 01 08:37:34 PM UTC 24 |
Sep 01 08:37:40 PM UTC 24 |
195962767 ps |
| T240 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_intercept.209709017 |
|
|
Sep 01 08:37:28 PM UTC 24 |
Sep 01 08:37:40 PM UTC 24 |
1753985575 ps |
| T399 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode.2677041457 |
|
|
Sep 01 08:37:31 PM UTC 24 |
Sep 01 08:37:41 PM UTC 24 |
255384271 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_csb_read.3223472064 |
|
|
Sep 01 08:37:40 PM UTC 24 |
Sep 01 08:37:42 PM UTC 24 |
69575318 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_mailbox.1451772945 |
|
|
Sep 01 08:37:28 PM UTC 24 |
Sep 01 08:37:43 PM UTC 24 |
627951511 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/12.spi_device_stress_all.2347601694 |
|
|
Sep 01 08:36:25 PM UTC 24 |
Sep 01 08:37:43 PM UTC 24 |
3516142007 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mem_parity.165821239 |
|
|
Sep 01 08:37:40 PM UTC 24 |
Sep 01 08:37:43 PM UTC 24 |
77267897 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_sts_read.216219966 |
|
|
Sep 01 08:37:43 PM UTC 24 |
Sep 01 08:37:46 PM UTC 24 |
270839098 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_rw.1572499551 |
|
|
Sep 01 08:37:43 PM UTC 24 |
Sep 01 08:37:46 PM UTC 24 |
62631258 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_tpm_all.461913651 |
|
|
Sep 01 08:37:25 PM UTC 24 |
Sep 01 08:37:47 PM UTC 24 |
1042722504 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_read_hw_reg.3583271446 |
|
|
Sep 01 08:37:41 PM UTC 24 |
Sep 01 08:37:49 PM UTC 24 |
962234221 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/0.spi_device_stress_all.1746776077 |
|
|
Sep 01 08:33:57 PM UTC 24 |
Sep 01 08:37:50 PM UTC 24 |
77412130426 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_intercept.4176047881 |
|
|
Sep 01 08:37:47 PM UTC 24 |
Sep 01 08:37:51 PM UTC 24 |
48203219 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_mailbox.1658354722 |
|
|
Sep 01 08:37:48 PM UTC 24 |
Sep 01 08:37:52 PM UTC 24 |
520143732 ps |
| T303 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_cmd_filtering.4291643320 |
|
|
Sep 01 08:37:44 PM UTC 24 |
Sep 01 08:37:54 PM UTC 24 |
1167071000 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode_ignore_cmds.4023395713 |
|
|
Sep 01 08:37:52 PM UTC 24 |
Sep 01 08:37:55 PM UTC 24 |
27501482 ps |
| T298 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/13.spi_device_stress_all.654100749 |
|
|
Sep 01 08:36:49 PM UTC 24 |
Sep 01 08:37:56 PM UTC 24 |
13495858116 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_pass_addr_payload_swap.2311596983 |
|
|
Sep 01 08:37:44 PM UTC 24 |
Sep 01 08:37:57 PM UTC 24 |
1370191380 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_mode.1739379741 |
|
|
Sep 01 08:37:51 PM UTC 24 |
Sep 01 08:37:58 PM UTC 24 |
496663671 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_cfg_cmd.2443538774 |
|
|
Sep 01 08:37:50 PM UTC 24 |
Sep 01 08:37:59 PM UTC 24 |
1502268959 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_mode_ignore_cmds.396730383 |
|
|
Sep 01 08:34:55 PM UTC 24 |
Sep 01 08:38:00 PM UTC 24 |
64888868547 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_tpm_all.220393115 |
|
|
Sep 01 08:37:41 PM UTC 24 |
Sep 01 08:38:00 PM UTC 24 |
2136194244 ps |
| T319 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_upload.3890691940 |
|
|
Sep 01 08:39:02 PM UTC 24 |
Sep 01 08:39:09 PM UTC 24 |
228010050 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/7.spi_device_stress_all.2529083623 |
|
|
Sep 01 08:35:13 PM UTC 24 |
Sep 01 08:38:01 PM UTC 24 |
33173755267 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_alert_test.155821153 |
|
|
Sep 01 08:38:00 PM UTC 24 |
Sep 01 08:38:02 PM UTC 24 |
46109986 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_csb_read.631592417 |
|
|
Sep 01 08:38:00 PM UTC 24 |
Sep 01 08:38:02 PM UTC 24 |
19119716 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_read_buffer_direct.1894739921 |
|
|
Sep 01 08:37:53 PM UTC 24 |
Sep 01 08:38:03 PM UTC 24 |
1146023732 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mem_parity.200243488 |
|
|
Sep 01 08:38:01 PM UTC 24 |
Sep 01 08:38:03 PM UTC 24 |
16076584 ps |
| T98 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_sts_read.3215551136 |
|
|
Sep 01 08:38:02 PM UTC 24 |
Sep 01 08:38:04 PM UTC 24 |
18967960 ps |
| T40 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/12.spi_device_flash_and_tpm_min_idle.1553916818 |
|
|
Sep 01 08:36:21 PM UTC 24 |
Sep 01 08:38:04 PM UTC 24 |
10356553755 ps |
| T99 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_read_hw_reg.2799791571 |
|
|
Sep 01 08:38:01 PM UTC 24 |
Sep 01 08:38:05 PM UTC 24 |
2716759143 ps |
| T100 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_mode.1471744250 |
|
|
Sep 01 08:37:01 PM UTC 24 |
Sep 01 08:38:07 PM UTC 24 |
39604475526 ps |
| T101 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_stress_all.2519294086 |
|
|
Sep 01 08:37:36 PM UTC 24 |
Sep 01 08:38:09 PM UTC 24 |
2032698503 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_upload.2151265141 |
|
|
Sep 01 08:38:05 PM UTC 24 |
Sep 01 08:38:09 PM UTC 24 |
47491345 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_rw.1093568755 |
|
|
Sep 01 08:38:03 PM UTC 24 |
Sep 01 08:38:11 PM UTC 24 |
252994807 ps |
| T293 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_intercept.3909028949 |
|
|
Sep 01 08:38:04 PM UTC 24 |
Sep 01 08:38:17 PM UTC 24 |
1819754415 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_read_buffer_direct.2927883603 |
|
|
Sep 01 08:38:10 PM UTC 24 |
Sep 01 08:38:17 PM UTC 24 |
836047891 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_cmd_filtering.883315825 |
|
|
Sep 01 08:38:03 PM UTC 24 |
Sep 01 08:38:17 PM UTC 24 |
1924421957 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/4.spi_device_stress_all.2453961380 |
|
|
Sep 01 08:34:29 PM UTC 24 |
Sep 01 08:38:18 PM UTC 24 |
16537576080 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode.990240170 |
|
|
Sep 01 08:38:08 PM UTC 24 |
Sep 01 08:38:19 PM UTC 24 |
283157724 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_alert_test.770131079 |
|
|
Sep 01 08:38:18 PM UTC 24 |
Sep 01 08:38:20 PM UTC 24 |
14485878 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_csb_read.3131976413 |
|
|
Sep 01 08:38:19 PM UTC 24 |
Sep 01 08:38:21 PM UTC 24 |
86778325 ps |
| T269 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_mailbox.3754458420 |
|
|
Sep 01 08:38:05 PM UTC 24 |
Sep 01 08:38:21 PM UTC 24 |
1530047118 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mem_parity.1898087493 |
|
|
Sep 01 08:38:19 PM UTC 24 |
Sep 01 08:38:22 PM UTC 24 |
450474330 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_sts_read.3113274682 |
|
|
Sep 01 08:38:22 PM UTC 24 |
Sep 01 08:38:25 PM UTC 24 |
517592760 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_rw.2866800839 |
|
|
Sep 01 08:38:23 PM UTC 24 |
Sep 01 08:38:26 PM UTC 24 |
92447081 ps |
| T200 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_all.905644084 |
|
|
Sep 01 08:35:26 PM UTC 24 |
Sep 01 08:38:28 PM UTC 24 |
28819317875 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_cfg_cmd.811936352 |
|
|
Sep 01 08:38:06 PM UTC 24 |
Sep 01 08:38:29 PM UTC 24 |
2890938949 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_all.2801380909 |
|
|
Sep 01 08:37:01 PM UTC 24 |
Sep 01 08:38:29 PM UTC 24 |
19054342891 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_tpm_all.255430542 |
|
|
Sep 01 08:38:02 PM UTC 24 |
Sep 01 08:38:30 PM UTC 24 |
11065212674 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/4.spi_device_flash_and_tpm_min_idle.4174208820 |
|
|
Sep 01 08:34:29 PM UTC 24 |
Sep 01 08:38:30 PM UTC 24 |
22530833970 ps |
| T294 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_upload.530581437 |
|
|
Sep 01 08:37:48 PM UTC 24 |
Sep 01 08:38:31 PM UTC 24 |
5720799921 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_intercept.1787637558 |
|
|
Sep 01 08:38:29 PM UTC 24 |
Sep 01 08:38:32 PM UTC 24 |
100956344 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/6.spi_device_flash_and_tpm.2086893289 |
|
|
Sep 01 08:34:56 PM UTC 24 |
Sep 01 08:38:32 PM UTC 24 |
104825078531 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_read_hw_reg.1759102538 |
|
|
Sep 01 08:38:21 PM UTC 24 |
Sep 01 08:38:33 PM UTC 24 |
43498218418 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode_ignore_cmds.3089656434 |
|
|
Sep 01 08:38:31 PM UTC 24 |
Sep 01 08:38:33 PM UTC 24 |
34390835 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_all.3916724967 |
|
|
Sep 01 08:37:17 PM UTC 24 |
Sep 01 08:38:34 PM UTC 24 |
17165157440 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_cfg_cmd.1306989610 |
|
|
Sep 01 08:38:30 PM UTC 24 |
Sep 01 08:38:34 PM UTC 24 |
67369411 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_upload.3794014658 |
|
|
Sep 01 08:38:30 PM UTC 24 |
Sep 01 08:38:34 PM UTC 24 |
247261511 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_all.1085953977 |
|
|
Sep 01 08:38:12 PM UTC 24 |
Sep 01 08:38:34 PM UTC 24 |
2881148804 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_alert_test.1738641173 |
|
|
Sep 01 08:38:35 PM UTC 24 |
Sep 01 08:38:37 PM UTC 24 |
79822640 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_csb_read.2049802901 |
|
|
Sep 01 08:38:35 PM UTC 24 |
Sep 01 08:38:37 PM UTC 24 |
52390419 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_read_buffer_direct.414205303 |
|
|
Sep 01 08:38:31 PM UTC 24 |
Sep 01 08:38:37 PM UTC 24 |
731523833 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_sts_read.3881327848 |
|
|
Sep 01 08:38:38 PM UTC 24 |
Sep 01 08:38:40 PM UTC 24 |
450925117 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm.2714772770 |
|
|
Sep 01 08:36:47 PM UTC 24 |
Sep 01 08:38:43 PM UTC 24 |
6927419670 ps |
| T340 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_pass_addr_payload_swap.2098264152 |
|
|
Sep 01 08:38:04 PM UTC 24 |
Sep 01 08:38:44 PM UTC 24 |
6973882109 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_mode.1893558855 |
|
|
Sep 01 08:38:31 PM UTC 24 |
Sep 01 08:38:45 PM UTC 24 |
373986647 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_rw.3544418186 |
|
|
Sep 01 08:38:38 PM UTC 24 |
Sep 01 08:38:46 PM UTC 24 |
368502119 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_addr_payload_swap.306813205 |
|
|
Sep 01 08:38:27 PM UTC 24 |
Sep 01 08:38:46 PM UTC 24 |
12347737500 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_intercept.3260571445 |
|
|
Sep 01 08:38:44 PM UTC 24 |
Sep 01 08:38:49 PM UTC 24 |
646008099 ps |
| T278 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_mode_ignore_cmds.3280536033 |
|
|
Sep 01 08:38:10 PM UTC 24 |
Sep 01 08:38:49 PM UTC 24 |
4745934442 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_read_hw_reg.1342682886 |
|
|
Sep 01 08:38:35 PM UTC 24 |
Sep 01 08:38:50 PM UTC 24 |
4943673615 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm_min_idle.4131286116 |
|
|
Sep 01 08:37:57 PM UTC 24 |
Sep 01 08:38:50 PM UTC 24 |
37329559913 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_tpm_all.1138735086 |
|
|
Sep 01 08:38:22 PM UTC 24 |
Sep 01 08:38:53 PM UTC 24 |
4993433336 ps |
| T301 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_cmd_filtering.3737243783 |
|
|
Sep 01 08:38:38 PM UTC 24 |
Sep 01 08:38:54 PM UTC 24 |
2757368012 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_cfg_cmd.3275591709 |
|
|
Sep 01 08:38:46 PM UTC 24 |
Sep 01 08:38:54 PM UTC 24 |
1007756975 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_tpm_all.92779619 |
|
|
Sep 01 08:38:36 PM UTC 24 |
Sep 01 08:38:54 PM UTC 24 |
17438282180 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_stress_all.1895796415 |
|
|
Sep 01 08:38:18 PM UTC 24 |
Sep 01 08:38:55 PM UTC 24 |
1257817176 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_alert_test.1778936952 |
|
|
Sep 01 08:38:54 PM UTC 24 |
Sep 01 08:38:56 PM UTC 24 |
14053602 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_read_buffer_direct.3812641124 |
|
|
Sep 01 08:38:50 PM UTC 24 |
Sep 01 08:38:57 PM UTC 24 |
874798518 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_csb_read.2355646091 |
|
|
Sep 01 08:38:55 PM UTC 24 |
Sep 01 08:38:57 PM UTC 24 |
50829864 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_upload.97803620 |
|
|
Sep 01 08:38:45 PM UTC 24 |
Sep 01 08:38:59 PM UTC 24 |
1054700061 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_sts_read.2023520660 |
|
|
Sep 01 08:38:57 PM UTC 24 |
Sep 01 08:39:00 PM UTC 24 |
98389900 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/9.spi_device_flash_all.3050622955 |
|
|
Sep 01 08:35:40 PM UTC 24 |
Sep 01 08:39:01 PM UTC 24 |
24358589828 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_mode_ignore_cmds.2638282929 |
|
|
Sep 01 08:37:33 PM UTC 24 |
Sep 01 08:39:01 PM UTC 24 |
7953057635 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_all.773880087 |
|
|
Sep 01 08:36:46 PM UTC 24 |
Sep 01 08:39:02 PM UTC 24 |
246834804288 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_rw.2496620806 |
|
|
Sep 01 08:38:58 PM UTC 24 |
Sep 01 08:39:02 PM UTC 24 |
897814277 ps |
| T351 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_pass_addr_payload_swap.2650022965 |
|
|
Sep 01 08:38:41 PM UTC 24 |
Sep 01 08:39:03 PM UTC 24 |
2392442498 ps |
| T327 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_cfg_cmd.3678376161 |
|
|
Sep 01 08:39:03 PM UTC 24 |
Sep 01 08:39:08 PM UTC 24 |
212653622 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm_min_idle.361004355 |
|
|
Sep 01 08:34:43 PM UTC 24 |
Sep 01 08:39:03 PM UTC 24 |
126637297965 ps |
| T349 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_addr_payload_swap.669373906 |
|
|
Sep 01 08:39:01 PM UTC 24 |
Sep 01 08:39:04 PM UTC 24 |
64368243 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_intercept.1243635883 |
|
|
Sep 01 08:39:01 PM UTC 24 |
Sep 01 08:39:05 PM UTC 24 |
45336979 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_pass_cmd_filtering.3387743454 |
|
|
Sep 01 08:38:59 PM UTC 24 |
Sep 01 08:39:06 PM UTC 24 |
2262302046 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode_ignore_cmds.308277648 |
|
|
Sep 01 08:38:49 PM UTC 24 |
Sep 01 08:39:05 PM UTC 24 |
839452591 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_mode.1798290755 |
|
|
Sep 01 08:38:47 PM UTC 24 |
Sep 01 08:39:10 PM UTC 24 |
1058859002 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_alert_test.1206053541 |
|
|
Sep 01 08:39:08 PM UTC 24 |
Sep 01 08:39:11 PM UTC 24 |
13117322 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_csb_read.1327899904 |
|
|
Sep 01 08:39:10 PM UTC 24 |
Sep 01 08:39:12 PM UTC 24 |
19937283 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_pass_cmd_filtering.1199419216 |
|
|
Sep 01 08:38:26 PM UTC 24 |
Sep 01 08:39:14 PM UTC 24 |
9102383926 ps |
| T226 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_mode_ignore_cmds.1112254737 |
|
|
Sep 01 08:37:14 PM UTC 24 |
Sep 01 08:39:15 PM UTC 24 |
15330629875 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_sts_read.3688461945 |
|
|
Sep 01 08:39:13 PM UTC 24 |
Sep 01 08:39:15 PM UTC 24 |
308667862 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_mailbox.2315048415 |
|
|
Sep 01 08:38:30 PM UTC 24 |
Sep 01 08:39:18 PM UTC 24 |
15013795898 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_stress_all.3625588072 |
|
|
Sep 01 08:39:06 PM UTC 24 |
Sep 01 08:39:18 PM UTC 24 |
707280623 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_mode.1996088846 |
|
|
Sep 01 08:39:03 PM UTC 24 |
Sep 01 08:39:19 PM UTC 24 |
3073894993 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_rw.1460793146 |
|
|
Sep 01 08:39:15 PM UTC 24 |
Sep 01 08:39:19 PM UTC 24 |
279362459 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_mailbox.15472239 |
|
|
Sep 01 08:38:45 PM UTC 24 |
Sep 01 08:39:20 PM UTC 24 |
3057441278 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_cmd_filtering.2396038354 |
|
|
Sep 01 08:39:16 PM UTC 24 |
Sep 01 08:39:20 PM UTC 24 |
1372533802 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_read_hw_reg.1099836943 |
|
|
Sep 01 08:38:55 PM UTC 24 |
Sep 01 08:39:21 PM UTC 24 |
16047470971 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_mailbox.2326634011 |
|
|
Sep 01 08:39:02 PM UTC 24 |
Sep 01 08:39:22 PM UTC 24 |
1047255325 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_mailbox.864128660 |
|
|
Sep 01 08:36:59 PM UTC 24 |
Sep 01 08:39:24 PM UTC 24 |
70074377509 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_read_buffer_direct.2033473212 |
|
|
Sep 01 08:39:04 PM UTC 24 |
Sep 01 08:39:25 PM UTC 24 |
1680533619 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_intercept.3747339423 |
|
|
Sep 01 08:39:18 PM UTC 24 |
Sep 01 08:39:25 PM UTC 24 |
681359341 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_cfg_cmd.3556087023 |
|
|
Sep 01 08:39:20 PM UTC 24 |
Sep 01 08:39:25 PM UTC 24 |
464949820 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_and_tpm_min_idle.663243824 |
|
|
Sep 01 08:38:35 PM UTC 24 |
Sep 01 08:39:26 PM UTC 24 |
7116012478 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_alert_test.3696949036 |
|
|
Sep 01 08:39:26 PM UTC 24 |
Sep 01 08:39:28 PM UTC 24 |
11117517 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_mailbox.2072150492 |
|
|
Sep 01 08:39:18 PM UTC 24 |
Sep 01 08:39:28 PM UTC 24 |
628343218 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_csb_read.3389591350 |
|
|
Sep 01 08:39:27 PM UTC 24 |
Sep 01 08:39:29 PM UTC 24 |
46033449 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_upload.4126760911 |
|
|
Sep 01 08:39:19 PM UTC 24 |
Sep 01 08:39:30 PM UTC 24 |
886126816 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_read_hw_reg.3543357648 |
|
|
Sep 01 08:39:12 PM UTC 24 |
Sep 01 08:39:32 PM UTC 24 |
5181988690 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_sts_read.1221207397 |
|
|
Sep 01 08:39:30 PM UTC 24 |
Sep 01 08:39:32 PM UTC 24 |
23960016 ps |
| T227 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_mode_ignore_cmds.3130320421 |
|
|
Sep 01 08:35:52 PM UTC 24 |
Sep 01 08:39:33 PM UTC 24 |
19769077596 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode.2958814125 |
|
|
Sep 01 08:39:21 PM UTC 24 |
Sep 01 08:39:34 PM UTC 24 |
636880050 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_rw.583043219 |
|
|
Sep 01 08:39:31 PM UTC 24 |
Sep 01 08:39:34 PM UTC 24 |
220680427 ps |
| T204 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm_min_idle.4191230465 |
|
|
Sep 01 08:35:27 PM UTC 24 |
Sep 01 08:39:35 PM UTC 24 |
30353088385 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_read_buffer_direct.1767038982 |
|
|
Sep 01 08:39:21 PM UTC 24 |
Sep 01 08:39:35 PM UTC 24 |
6296563419 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_cmd_filtering.4109628801 |
|
|
Sep 01 08:39:32 PM UTC 24 |
Sep 01 08:39:37 PM UTC 24 |
51301235 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_tpm_all.2931578061 |
|
|
Sep 01 08:38:56 PM UTC 24 |
Sep 01 08:39:40 PM UTC 24 |
8045810298 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_mailbox.1960623969 |
|
|
Sep 01 08:39:35 PM UTC 24 |
Sep 01 08:39:40 PM UTC 24 |
437260211 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_pass_addr_payload_swap.2067066589 |
|
|
Sep 01 08:39:33 PM UTC 24 |
Sep 01 08:39:42 PM UTC 24 |
5340456899 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_stress_all.3827483604 |
|
|
Sep 01 08:38:54 PM UTC 24 |
Sep 01 08:39:43 PM UTC 24 |
3001365969 ps |
| T292 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_intercept.1559414805 |
|
|
Sep 01 08:39:35 PM UTC 24 |
Sep 01 08:39:43 PM UTC 24 |
1009417732 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_tpm_all.3682229627 |
|
|
Sep 01 08:39:12 PM UTC 24 |
Sep 01 08:39:44 PM UTC 24 |
2582001621 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_cfg_cmd.3646255611 |
|
|
Sep 01 08:39:36 PM UTC 24 |
Sep 01 08:39:44 PM UTC 24 |
3380950481 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_read_hw_reg.1324473659 |
|
|
Sep 01 08:39:29 PM UTC 24 |
Sep 01 08:39:44 PM UTC 24 |
1474738107 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm.1549348764 |
|
|
Sep 01 08:38:51 PM UTC 24 |
Sep 01 08:39:47 PM UTC 24 |
6165016341 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_alert_test.1397589353 |
|
|
Sep 01 08:39:45 PM UTC 24 |
Sep 01 08:39:48 PM UTC 24 |
14343471 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_csb_read.2666971207 |
|
|
Sep 01 08:39:45 PM UTC 24 |
Sep 01 08:39:48 PM UTC 24 |
59102918 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm.1277444440 |
|
|
Sep 01 08:37:35 PM UTC 24 |
Sep 01 08:39:48 PM UTC 24 |
9254655515 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm_min_idle.1527828444 |
|
|
Sep 01 08:39:06 PM UTC 24 |
Sep 01 08:39:49 PM UTC 24 |
2289592390 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_sts_read.1002333372 |
|
|
Sep 01 08:39:49 PM UTC 24 |
Sep 01 08:39:51 PM UTC 24 |
141326335 ps |
| T232 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/5.spi_device_flash_and_tpm.1584322420 |
|
|
Sep 01 08:34:42 PM UTC 24 |
Sep 01 08:39:51 PM UTC 24 |
29383000891 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_addr_payload_swap.3100894919 |
|
|
Sep 01 08:39:50 PM UTC 24 |
Sep 01 08:39:53 PM UTC 24 |
89650362 ps |
| T347 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_pass_addr_payload_swap.737647659 |
|
|
Sep 01 08:39:16 PM UTC 24 |
Sep 01 08:39:54 PM UTC 24 |
5620164605 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_pass_cmd_filtering.2357878360 |
|
|
Sep 01 08:39:50 PM UTC 24 |
Sep 01 08:39:54 PM UTC 24 |
77296911 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_rw.1788656239 |
|
|
Sep 01 08:39:49 PM UTC 24 |
Sep 01 08:39:54 PM UTC 24 |
942143031 ps |
| T183 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_stress_all.3196462553 |
|
|
Sep 01 08:38:35 PM UTC 24 |
Sep 01 08:39:55 PM UTC 24 |
7415327352 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_read_hw_reg.1936169594 |
|
|
Sep 01 08:39:45 PM UTC 24 |
Sep 01 08:39:56 PM UTC 24 |
2987506928 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm_min_idle.4234750358 |
|
|
Sep 01 08:37:03 PM UTC 24 |
Sep 01 08:39:57 PM UTC 24 |
12670194314 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_upload.4028906864 |
|
|
Sep 01 08:39:54 PM UTC 24 |
Sep 01 08:39:59 PM UTC 24 |
129717134 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_read_buffer_direct.2098861498 |
|
|
Sep 01 08:39:41 PM UTC 24 |
Sep 01 08:40:00 PM UTC 24 |
17445610138 ps |
| T233 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_and_tpm_min_idle.1289049130 |
|
|
Sep 01 08:37:35 PM UTC 24 |
Sep 01 08:40:01 PM UTC 24 |
9002053830 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_cfg_cmd.2486541607 |
|
|
Sep 01 08:39:54 PM UTC 24 |
Sep 01 08:40:01 PM UTC 24 |
219103132 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_tpm_all.4126827791 |
|
|
Sep 01 08:39:29 PM UTC 24 |
Sep 01 08:40:02 PM UTC 24 |
8349685506 ps |
| T270 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/19.spi_device_flash_all.1749335132 |
|
|
Sep 01 08:38:33 PM UTC 24 |
Sep 01 08:40:03 PM UTC 24 |
9998560932 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode.340117007 |
|
|
Sep 01 08:39:55 PM UTC 24 |
Sep 01 08:40:03 PM UTC 24 |
477018915 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_alert_test.3646447395 |
|
|
Sep 01 08:40:02 PM UTC 24 |
Sep 01 08:40:04 PM UTC 24 |
23603642 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_csb_read.2806630722 |
|
|
Sep 01 08:40:02 PM UTC 24 |
Sep 01 08:40:04 PM UTC 24 |
15630829 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm_min_idle.1383807128 |
|
|
Sep 01 08:39:43 PM UTC 24 |
Sep 01 08:40:06 PM UTC 24 |
3693651174 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_sts_read.1255594630 |
|
|
Sep 01 08:40:04 PM UTC 24 |
Sep 01 08:40:07 PM UTC 24 |
252485800 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm.4079689568 |
|
|
Sep 01 08:39:25 PM UTC 24 |
Sep 01 08:40:07 PM UTC 24 |
5205869192 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_rw.2256755466 |
|
|
Sep 01 08:40:05 PM UTC 24 |
Sep 01 08:40:08 PM UTC 24 |
20109859 ps |
| T400 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_mode.62298934 |
|
|
Sep 01 08:39:36 PM UTC 24 |
Sep 01 08:40:08 PM UTC 24 |
2174737711 ps |
| T281 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_intercept.595304361 |
|
|
Sep 01 08:39:52 PM UTC 24 |
Sep 01 08:40:09 PM UTC 24 |
2104270351 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_read_buffer_direct.3050268958 |
|
|
Sep 01 08:39:55 PM UTC 24 |
Sep 01 08:40:11 PM UTC 24 |
4081773584 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_read_hw_reg.4192678341 |
|
|
Sep 01 08:40:03 PM UTC 24 |
Sep 01 08:40:11 PM UTC 24 |
664677159 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_stress_all.680382156 |
|
|
Sep 01 08:37:19 PM UTC 24 |
Sep 01 08:40:11 PM UTC 24 |
88207765111 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_intercept.2330605629 |
|
|
Sep 01 08:40:07 PM UTC 24 |
Sep 01 08:40:12 PM UTC 24 |
126931397 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_all.1825703139 |
|
|
Sep 01 08:39:05 PM UTC 24 |
Sep 01 08:40:12 PM UTC 24 |
7491436549 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_cfg_cmd.3487199880 |
|
|
Sep 01 08:40:10 PM UTC 24 |
Sep 01 08:40:14 PM UTC 24 |
478114448 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_addr_payload_swap.3642417370 |
|
|
Sep 01 08:40:07 PM UTC 24 |
Sep 01 08:40:15 PM UTC 24 |
982678452 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode.1231376792 |
|
|
Sep 01 08:40:10 PM UTC 24 |
Sep 01 08:40:16 PM UTC 24 |
110374424 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_pass_cmd_filtering.2691093822 |
|
|
Sep 01 08:40:05 PM UTC 24 |
Sep 01 08:40:16 PM UTC 24 |
2240878164 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_upload.1342579944 |
|
|
Sep 01 08:40:08 PM UTC 24 |
Sep 01 08:40:16 PM UTC 24 |
264620816 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_stress_all.2306106342 |
|
|
Sep 01 08:40:15 PM UTC 24 |
Sep 01 08:40:18 PM UTC 24 |
250430174 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_tpm_all.608789614 |
|
|
Sep 01 08:39:48 PM UTC 24 |
Sep 01 08:40:18 PM UTC 24 |
1083857060 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_mode_ignore_cmds.2082125069 |
|
|
Sep 01 08:36:06 PM UTC 24 |
Sep 01 08:40:18 PM UTC 24 |
30048573998 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm_min_idle.319291513 |
|
|
Sep 01 08:37:18 PM UTC 24 |
Sep 01 08:40:18 PM UTC 24 |
69500126807 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_alert_test.1929721686 |
|
|
Sep 01 08:40:16 PM UTC 24 |
Sep 01 08:40:18 PM UTC 24 |
22327957 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_csb_read.3133658726 |
|
|
Sep 01 08:40:16 PM UTC 24 |
Sep 01 08:40:18 PM UTC 24 |
27923259 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_all.3749777622 |
|
|
Sep 01 08:38:50 PM UTC 24 |
Sep 01 08:40:20 PM UTC 24 |
31351014242 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_sts_read.854581763 |
|
|
Sep 01 08:40:19 PM UTC 24 |
Sep 01 08:40:21 PM UTC 24 |
118777615 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_read_hw_reg.1912153106 |
|
|
Sep 01 08:40:17 PM UTC 24 |
Sep 01 08:40:21 PM UTC 24 |
244090438 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_rw.4121958359 |
|
|
Sep 01 08:40:19 PM UTC 24 |
Sep 01 08:40:21 PM UTC 24 |
75881952 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_upload.1175205183 |
|
|
Sep 01 08:39:36 PM UTC 24 |
Sep 01 08:40:21 PM UTC 24 |
8057866111 ps |
| T361 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_addr_payload_swap.1667130492 |
|
|
Sep 01 08:40:20 PM UTC 24 |
Sep 01 08:40:24 PM UTC 24 |
163986038 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode_ignore_cmds.347686231 |
|
|
Sep 01 08:40:22 PM UTC 24 |
Sep 01 08:40:24 PM UTC 24 |
57569973 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_cfg_cmd.3432830941 |
|
|
Sep 01 08:40:22 PM UTC 24 |
Sep 01 08:40:26 PM UTC 24 |
33483839 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_read_buffer_direct.545921817 |
|
|
Sep 01 08:40:12 PM UTC 24 |
Sep 01 08:40:29 PM UTC 24 |
4537492964 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_intercept.937281802 |
|
|
Sep 01 08:40:20 PM UTC 24 |
Sep 01 08:40:30 PM UTC 24 |
368126217 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_alert_test.3801978772 |
|
|
Sep 01 08:40:31 PM UTC 24 |
Sep 01 08:40:33 PM UTC 24 |
27678902 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_pass_cmd_filtering.3887151126 |
|
|
Sep 01 08:40:19 PM UTC 24 |
Sep 01 08:40:34 PM UTC 24 |
3534961728 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_read_buffer_direct.3786369733 |
|
|
Sep 01 08:40:22 PM UTC 24 |
Sep 01 08:40:35 PM UTC 24 |
778135214 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_tpm_all.2994124425 |
|
|
Sep 01 08:40:03 PM UTC 24 |
Sep 01 08:40:36 PM UTC 24 |
13753480727 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/15.spi_device_flash_and_tpm.767826332 |
|
|
Sep 01 08:37:17 PM UTC 24 |
Sep 01 08:40:36 PM UTC 24 |
73826867412 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_csb_read.437980654 |
|
|
Sep 01 08:40:34 PM UTC 24 |
Sep 01 08:40:37 PM UTC 24 |
16226839 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_read_hw_reg.2110585475 |
|
|
Sep 01 08:40:35 PM UTC 24 |
Sep 01 08:40:38 PM UTC 24 |
69454236 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_sts_read.3882389903 |
|
|
Sep 01 08:40:37 PM UTC 24 |
Sep 01 08:40:39 PM UTC 24 |
36960833 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_rw.3343924501 |
|
|
Sep 01 08:40:37 PM UTC 24 |
Sep 01 08:40:40 PM UTC 24 |
40573330 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_tpm_all.3264808477 |
|
|
Sep 01 08:40:17 PM UTC 24 |
Sep 01 08:40:41 PM UTC 24 |
6141071636 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_upload.3868759112 |
|
|
Sep 01 08:40:21 PM UTC 24 |
Sep 01 08:40:45 PM UTC 24 |
3282032013 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_mode.2496847427 |
|
|
Sep 01 08:40:22 PM UTC 24 |
Sep 01 08:40:45 PM UTC 24 |
1922459823 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_mailbox.1550196986 |
|
|
Sep 01 08:40:40 PM UTC 24 |
Sep 01 08:40:47 PM UTC 24 |
312509030 ps |
| T234 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_intercept.3515568087 |
|
|
Sep 01 08:40:40 PM UTC 24 |
Sep 01 08:40:49 PM UTC 24 |
221295802 ps |
| T282 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/5.spi_device_stress_all.3918007503 |
|
|
Sep 01 08:34:44 PM UTC 24 |
Sep 01 08:40:50 PM UTC 24 |
45539478293 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode.2211042447 |
|
|
Sep 01 08:40:46 PM UTC 24 |
Sep 01 08:40:51 PM UTC 24 |
192083287 ps |
| T354 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_cfg_cmd.2717843309 |
|
|
Sep 01 08:40:42 PM UTC 24 |
Sep 01 08:40:52 PM UTC 24 |
1212669454 ps |