| T629 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/13.spi_device_flash_and_tpm_min_idle.749428425 |
|
|
Sep 01 08:36:48 PM UTC 24 |
Sep 01 08:40:52 PM UTC 24 |
47490520950 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_mailbox.2171975625 |
|
|
Sep 01 08:40:07 PM UTC 24 |
Sep 01 08:40:54 PM UTC 24 |
10706540359 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_addr_payload_swap.1066703243 |
|
|
Sep 01 08:40:39 PM UTC 24 |
Sep 01 08:40:54 PM UTC 24 |
6221217217 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_read_buffer_direct.1016430728 |
|
|
Sep 01 08:40:48 PM UTC 24 |
Sep 01 08:40:54 PM UTC 24 |
807598433 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_mailbox.1537737507 |
|
|
Sep 01 08:39:52 PM UTC 24 |
Sep 01 08:40:54 PM UTC 24 |
13673308048 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/16.spi_device_flash_all.3320871082 |
|
|
Sep 01 08:37:35 PM UTC 24 |
Sep 01 08:40:55 PM UTC 24 |
23397259914 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_alert_test.4243182283 |
|
|
Sep 01 08:40:53 PM UTC 24 |
Sep 01 08:40:56 PM UTC 24 |
13464259 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_csb_read.3151860139 |
|
|
Sep 01 08:40:54 PM UTC 24 |
Sep 01 08:40:57 PM UTC 24 |
50083462 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_sts_read.8251947 |
|
|
Sep 01 08:40:55 PM UTC 24 |
Sep 01 08:40:58 PM UTC 24 |
227703730 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_mailbox.2515598387 |
|
|
Sep 01 08:40:20 PM UTC 24 |
Sep 01 08:40:58 PM UTC 24 |
3898606730 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_rw.1858488803 |
|
|
Sep 01 08:40:56 PM UTC 24 |
Sep 01 08:40:59 PM UTC 24 |
12904667 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_read_hw_reg.3974458161 |
|
|
Sep 01 08:40:54 PM UTC 24 |
Sep 01 08:40:59 PM UTC 24 |
222166474 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/20.spi_device_flash_and_tpm_min_idle.3942456443 |
|
|
Sep 01 08:38:51 PM UTC 24 |
Sep 01 08:41:02 PM UTC 24 |
7327784457 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_and_tpm_min_idle.2226120418 |
|
|
Sep 01 08:39:26 PM UTC 24 |
Sep 01 08:41:04 PM UTC 24 |
20939265351 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_intercept.164599081 |
|
|
Sep 01 08:40:58 PM UTC 24 |
Sep 01 08:41:05 PM UTC 24 |
143674430 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/14.spi_device_flash_and_tpm.1500184684 |
|
|
Sep 01 08:37:02 PM UTC 24 |
Sep 01 08:41:05 PM UTC 24 |
132358043745 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_upload.2157294665 |
|
|
Sep 01 08:40:59 PM UTC 24 |
Sep 01 08:41:05 PM UTC 24 |
999891828 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode.628932313 |
|
|
Sep 01 08:41:00 PM UTC 24 |
Sep 01 08:41:05 PM UTC 24 |
145249989 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_tpm_all.2461393100 |
|
|
Sep 01 08:40:36 PM UTC 24 |
Sep 01 08:41:06 PM UTC 24 |
1422108217 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_addr_payload_swap.3240028126 |
|
|
Sep 01 08:40:58 PM UTC 24 |
Sep 01 08:41:07 PM UTC 24 |
662626573 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_pass_cmd_filtering.4223656991 |
|
|
Sep 01 08:40:57 PM UTC 24 |
Sep 01 08:41:07 PM UTC 24 |
1830785379 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_alert_test.949424910 |
|
|
Sep 01 08:41:06 PM UTC 24 |
Sep 01 08:41:09 PM UTC 24 |
36867020 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_upload.1156995397 |
|
|
Sep 01 08:40:41 PM UTC 24 |
Sep 01 08:41:09 PM UTC 24 |
23478131507 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_pass_cmd_filtering.526554537 |
|
|
Sep 01 08:40:38 PM UTC 24 |
Sep 01 08:41:09 PM UTC 24 |
33583633708 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_cfg_cmd.253962961 |
|
|
Sep 01 08:41:00 PM UTC 24 |
Sep 01 08:41:10 PM UTC 24 |
577024439 ps |
| T646 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_csb_read.222042439 |
|
|
Sep 01 08:41:08 PM UTC 24 |
Sep 01 08:41:10 PM UTC 24 |
31947149 ps |
| T647 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_stress_all.1672424713 |
|
|
Sep 01 08:40:30 PM UTC 24 |
Sep 01 08:41:10 PM UTC 24 |
6927736340 ps |
| T648 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_tpm_all.2796106335 |
|
|
Sep 01 08:40:55 PM UTC 24 |
Sep 01 08:41:12 PM UTC 24 |
1995529915 ps |
| T254 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_and_tpm.349618318 |
|
|
Sep 01 08:39:42 PM UTC 24 |
Sep 01 08:41:12 PM UTC 24 |
4831763049 ps |
| T649 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_sts_read.368987837 |
|
|
Sep 01 08:41:11 PM UTC 24 |
Sep 01 08:41:13 PM UTC 24 |
26423646 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_mode_ignore_cmds.3306892006 |
|
|
Sep 01 08:40:46 PM UTC 24 |
Sep 01 08:41:14 PM UTC 24 |
13048331789 ps |
| T650 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_read_buffer_direct.4180573998 |
|
|
Sep 01 08:41:04 PM UTC 24 |
Sep 01 08:41:14 PM UTC 24 |
480159080 ps |
| T651 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_addr_payload_swap.2558049938 |
|
|
Sep 01 08:41:11 PM UTC 24 |
Sep 01 08:41:15 PM UTC 24 |
384129841 ps |
| T652 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_rw.823703360 |
|
|
Sep 01 08:41:11 PM UTC 24 |
Sep 01 08:41:17 PM UTC 24 |
689759663 ps |
| T653 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_pass_cmd_filtering.3314703312 |
|
|
Sep 01 08:41:11 PM UTC 24 |
Sep 01 08:41:17 PM UTC 24 |
948799259 ps |
| T654 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/11.spi_device_flash_and_tpm.2746658196 |
|
|
Sep 01 08:36:08 PM UTC 24 |
Sep 01 08:41:22 PM UTC 24 |
25886913380 ps |
| T256 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_flash_all.287319607 |
|
|
Sep 01 08:39:41 PM UTC 24 |
Sep 01 08:41:22 PM UTC 24 |
3034456676 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_all.1768419796 |
|
|
Sep 01 08:39:56 PM UTC 24 |
Sep 01 08:41:23 PM UTC 24 |
3405265806 ps |
| T655 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_alert_test.3576393187 |
|
|
Sep 01 08:41:23 PM UTC 24 |
Sep 01 08:41:25 PM UTC 24 |
13359873 ps |
| T656 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_cfg_cmd.3394789174 |
|
|
Sep 01 08:41:13 PM UTC 24 |
Sep 01 08:41:26 PM UTC 24 |
2897603714 ps |
| T657 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_csb_read.3030742822 |
|
|
Sep 01 08:41:24 PM UTC 24 |
Sep 01 08:41:26 PM UTC 24 |
17120316 ps |
| T658 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_mailbox.3795845271 |
|
|
Sep 01 08:41:12 PM UTC 24 |
Sep 01 08:41:27 PM UTC 24 |
1040838226 ps |
| T246 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/8.spi_device_flash_and_tpm.384325572 |
|
|
Sep 01 08:35:27 PM UTC 24 |
Sep 01 08:41:27 PM UTC 24 |
80643396024 ps |
| T304 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm.1429412929 |
|
|
Sep 01 08:39:58 PM UTC 24 |
Sep 01 08:41:28 PM UTC 24 |
7772037963 ps |
| T659 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_sts_read.481545170 |
|
|
Sep 01 08:41:27 PM UTC 24 |
Sep 01 08:41:29 PM UTC 24 |
111455182 ps |
| T660 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_rw.594213102 |
|
|
Sep 01 08:41:27 PM UTC 24 |
Sep 01 08:41:31 PM UTC 24 |
1399019938 ps |
| T184 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/11.spi_device_stress_all.1547267488 |
|
|
Sep 01 08:36:09 PM UTC 24 |
Sep 01 08:41:32 PM UTC 24 |
28164889096 ps |
| T661 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_read_hw_reg.2841140283 |
|
|
Sep 01 08:41:08 PM UTC 24 |
Sep 01 08:41:33 PM UTC 24 |
10537662362 ps |
| T662 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_and_tpm.296922718 |
|
|
Sep 01 08:40:13 PM UTC 24 |
Sep 01 08:41:33 PM UTC 24 |
147377373088 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_stress_all.3435574214 |
|
|
Sep 01 08:37:59 PM UTC 24 |
Sep 01 08:41:34 PM UTC 24 |
28462554627 ps |
| T663 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_addr_payload_swap.662626853 |
|
|
Sep 01 08:41:28 PM UTC 24 |
Sep 01 08:41:35 PM UTC 24 |
126399216 ps |
| T357 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_upload.4103660364 |
|
|
Sep 01 08:41:13 PM UTC 24 |
Sep 01 08:41:36 PM UTC 24 |
3667271791 ps |
| T664 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_intercept.929711750 |
|
|
Sep 01 08:41:30 PM UTC 24 |
Sep 01 08:41:36 PM UTC 24 |
158955064 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_mode_ignore_cmds.2992095111 |
|
|
Sep 01 08:41:03 PM UTC 24 |
Sep 01 08:41:36 PM UTC 24 |
1647363337 ps |
| T665 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_pass_cmd_filtering.520685773 |
|
|
Sep 01 08:41:28 PM UTC 24 |
Sep 01 08:41:37 PM UTC 24 |
200843418 ps |
| T666 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_all.964354969 |
|
|
Sep 01 08:41:36 PM UTC 24 |
Sep 01 08:41:38 PM UTC 24 |
107939705 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_all.3311772448 |
|
|
Sep 01 08:40:12 PM UTC 24 |
Sep 01 08:41:39 PM UTC 24 |
12375008921 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_intercept.2643581349 |
|
|
Sep 01 08:41:11 PM UTC 24 |
Sep 01 08:41:39 PM UTC 24 |
3308476892 ps |
| T667 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_tpm_all.4283257224 |
|
|
Sep 01 08:41:10 PM UTC 24 |
Sep 01 08:41:41 PM UTC 24 |
7033386286 ps |
| T668 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_alert_test.3860189752 |
|
|
Sep 01 08:41:39 PM UTC 24 |
Sep 01 08:41:41 PM UTC 24 |
25097926 ps |
| T669 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_csb_read.1434397954 |
|
|
Sep 01 08:41:39 PM UTC 24 |
Sep 01 08:41:41 PM UTC 24 |
15026784 ps |
| T670 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_sts_read.2286304620 |
|
|
Sep 01 08:41:43 PM UTC 24 |
Sep 01 08:41:45 PM UTC 24 |
42964228 ps |
| T671 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_all.2478642056 |
|
|
Sep 01 08:41:27 PM UTC 24 |
Sep 01 08:41:45 PM UTC 24 |
2325665843 ps |
| T672 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_cfg_cmd.1259059754 |
|
|
Sep 01 08:41:34 PM UTC 24 |
Sep 01 08:41:45 PM UTC 24 |
1435357736 ps |
| T248 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_all.2620508715 |
|
|
Sep 01 08:41:05 PM UTC 24 |
Sep 01 08:41:45 PM UTC 24 |
1790912925 ps |
| T673 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_read_buffer_direct.2134350181 |
|
|
Sep 01 08:41:15 PM UTC 24 |
Sep 01 08:41:45 PM UTC 24 |
11293676816 ps |
| T674 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_rw.4275069372 |
|
|
Sep 01 08:41:43 PM UTC 24 |
Sep 01 08:41:46 PM UTC 24 |
40487593 ps |
| T675 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_and_tpm.779289123 |
|
|
Sep 01 08:41:37 PM UTC 24 |
Sep 01 08:41:47 PM UTC 24 |
2102604552 ps |
| T267 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/0.spi_device_flash_all.1692074961 |
|
|
Sep 01 08:33:57 PM UTC 24 |
Sep 01 08:41:49 PM UTC 24 |
119361790524 ps |
| T676 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_cfg_cmd.2126742070 |
|
|
Sep 01 08:41:47 PM UTC 24 |
Sep 01 08:41:51 PM UTC 24 |
258219640 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/18.spi_device_flash_and_tpm_min_idle.2612487860 |
|
|
Sep 01 08:38:18 PM UTC 24 |
Sep 01 08:41:51 PM UTC 24 |
167737420361 ps |
| T677 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_upload.1497862061 |
|
|
Sep 01 08:41:46 PM UTC 24 |
Sep 01 08:41:52 PM UTC 24 |
231070436 ps |
| T678 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_upload.76885193 |
|
|
Sep 01 08:41:33 PM UTC 24 |
Sep 01 08:41:52 PM UTC 24 |
5668394216 ps |
| T679 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_read_hw_reg.2025278288 |
|
|
Sep 01 08:41:40 PM UTC 24 |
Sep 01 08:41:53 PM UTC 24 |
2574140686 ps |
| T680 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode.1866289855 |
|
|
Sep 01 08:41:48 PM UTC 24 |
Sep 01 08:41:53 PM UTC 24 |
121121251 ps |
| T681 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_intercept.3733954232 |
|
|
Sep 01 08:41:46 PM UTC 24 |
Sep 01 08:41:54 PM UTC 24 |
856599171 ps |
| T682 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/25.spi_device_flash_mode_ignore_cmds.3463313706 |
|
|
Sep 01 08:40:12 PM UTC 24 |
Sep 01 08:41:56 PM UTC 24 |
171035739859 ps |
| T683 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_alert_test.1958804782 |
|
|
Sep 01 08:41:54 PM UTC 24 |
Sep 01 08:41:56 PM UTC 24 |
37982428 ps |
| T684 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_mailbox.2032576823 |
|
|
Sep 01 08:41:32 PM UTC 24 |
Sep 01 08:41:56 PM UTC 24 |
989502288 ps |
| T685 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_stress_all.4140395155 |
|
|
Sep 01 08:41:54 PM UTC 24 |
Sep 01 08:41:56 PM UTC 24 |
59749132 ps |
| T686 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_csb_read.1130860018 |
|
|
Sep 01 08:41:55 PM UTC 24 |
Sep 01 08:41:57 PM UTC 24 |
71108349 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_mode_ignore_cmds.1081546533 |
|
|
Sep 01 08:39:55 PM UTC 24 |
Sep 01 08:41:57 PM UTC 24 |
5438904866 ps |
| T687 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_read_buffer_direct.1260184516 |
|
|
Sep 01 08:41:36 PM UTC 24 |
Sep 01 08:41:57 PM UTC 24 |
1378077131 ps |
| T688 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_sts_read.1520141103 |
|
|
Sep 01 08:41:57 PM UTC 24 |
Sep 01 08:41:59 PM UTC 24 |
119564978 ps |
| T689 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_rw.3633854723 |
|
|
Sep 01 08:41:57 PM UTC 24 |
Sep 01 08:42:00 PM UTC 24 |
19317041 ps |
| T690 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_cmd_filtering.119785150 |
|
|
Sep 01 08:41:46 PM UTC 24 |
Sep 01 08:42:00 PM UTC 24 |
3157129710 ps |
| T691 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_addr_payload_swap.3857664014 |
|
|
Sep 01 08:41:58 PM UTC 24 |
Sep 01 08:42:04 PM UTC 24 |
1192763834 ps |
| T692 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_upload.1683912314 |
|
|
Sep 01 08:42:00 PM UTC 24 |
Sep 01 08:42:04 PM UTC 24 |
222988456 ps |
| T693 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_mailbox.3747862636 |
|
|
Sep 01 08:41:46 PM UTC 24 |
Sep 01 08:42:05 PM UTC 24 |
787259689 ps |
| T694 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_read_hw_reg.473589052 |
|
|
Sep 01 08:41:57 PM UTC 24 |
Sep 01 08:42:05 PM UTC 24 |
1666614781 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_cfg_cmd.879353940 |
|
|
Sep 01 08:42:00 PM UTC 24 |
Sep 01 08:42:07 PM UTC 24 |
166072875 ps |
| T695 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm_min_idle.173378827 |
|
|
Sep 01 08:41:05 PM UTC 24 |
Sep 01 08:42:08 PM UTC 24 |
9637797745 ps |
| T185 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_stress_all.321391780 |
|
|
Sep 01 08:39:26 PM UTC 24 |
Sep 01 08:42:09 PM UTC 24 |
238602820019 ps |
| T696 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_intercept.2394553079 |
|
|
Sep 01 08:41:58 PM UTC 24 |
Sep 01 08:42:11 PM UTC 24 |
3660460173 ps |
| T697 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_pass_addr_payload_swap.1083821867 |
|
|
Sep 01 08:41:46 PM UTC 24 |
Sep 01 08:42:11 PM UTC 24 |
3322880436 ps |
| T698 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_alert_test.2989039896 |
|
|
Sep 01 08:42:09 PM UTC 24 |
Sep 01 08:42:11 PM UTC 24 |
13078758 ps |
| T699 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_tpm_all.1858055049 |
|
|
Sep 01 08:41:41 PM UTC 24 |
Sep 01 08:42:11 PM UTC 24 |
10511778132 ps |
| T305 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/21.spi_device_flash_and_tpm.1069005007 |
|
|
Sep 01 08:39:06 PM UTC 24 |
Sep 01 08:42:12 PM UTC 24 |
41703287720 ps |
| T700 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_read_buffer_direct.3103728622 |
|
|
Sep 01 08:42:06 PM UTC 24 |
Sep 01 08:42:12 PM UTC 24 |
1543498782 ps |
| T701 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_mailbox.3141638799 |
|
|
Sep 01 08:42:00 PM UTC 24 |
Sep 01 08:42:13 PM UTC 24 |
664778494 ps |
| T702 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_tpm_all.403883648 |
|
|
Sep 01 08:41:57 PM UTC 24 |
Sep 01 08:42:13 PM UTC 24 |
554580901 ps |
| T703 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_flash_mode.1737269704 |
|
|
Sep 01 08:41:34 PM UTC 24 |
Sep 01 08:42:14 PM UTC 24 |
2012290424 ps |
| T704 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_csb_read.2866574758 |
|
|
Sep 01 08:42:21 PM UTC 24 |
Sep 01 08:42:24 PM UTC 24 |
27349725 ps |
| T705 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_pass_cmd_filtering.318589758 |
|
|
Sep 01 08:41:58 PM UTC 24 |
Sep 01 08:42:14 PM UTC 24 |
1153159796 ps |
| T706 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_csb_read.4290097580 |
|
|
Sep 01 08:42:12 PM UTC 24 |
Sep 01 08:42:15 PM UTC 24 |
31170991 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_mode.1890513473 |
|
|
Sep 01 08:42:06 PM UTC 24 |
Sep 01 08:42:15 PM UTC 24 |
102276124 ps |
| T707 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_sts_read.3211416615 |
|
|
Sep 01 08:42:12 PM UTC 24 |
Sep 01 08:42:15 PM UTC 24 |
229828995 ps |
| T708 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_rw.830652472 |
|
|
Sep 01 08:42:13 PM UTC 24 |
Sep 01 08:42:16 PM UTC 24 |
41813555 ps |
| T709 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_read_buffer_direct.2035630908 |
|
|
Sep 01 08:41:52 PM UTC 24 |
Sep 01 08:42:17 PM UTC 24 |
1499936937 ps |
| T710 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_all.2454786184 |
|
|
Sep 01 08:39:23 PM UTC 24 |
Sep 01 08:42:17 PM UTC 24 |
23581676682 ps |
| T711 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_flash_and_tpm_min_idle.722586145 |
|
|
Sep 01 08:40:00 PM UTC 24 |
Sep 01 08:42:17 PM UTC 24 |
29972116311 ps |
| T712 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_cmd_filtering.1322722929 |
|
|
Sep 01 08:42:13 PM UTC 24 |
Sep 01 08:42:18 PM UTC 24 |
222111519 ps |
| T713 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_pass_addr_payload_swap.2097666153 |
|
|
Sep 01 08:42:13 PM UTC 24 |
Sep 01 08:42:19 PM UTC 24 |
126059711 ps |
| T714 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode.1198336666 |
|
|
Sep 01 08:42:16 PM UTC 24 |
Sep 01 08:42:21 PM UTC 24 |
50563175 ps |
| T715 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_cfg_cmd.518000652 |
|
|
Sep 01 08:42:16 PM UTC 24 |
Sep 01 08:42:21 PM UTC 24 |
520506185 ps |
| T716 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm_min_idle.1087936625 |
|
|
Sep 01 08:41:20 PM UTC 24 |
Sep 01 08:42:23 PM UTC 24 |
17088913891 ps |
| T717 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_read_buffer_direct.2320297901 |
|
|
Sep 01 08:42:17 PM UTC 24 |
Sep 01 08:42:23 PM UTC 24 |
181088137 ps |
| T718 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_alert_test.1079387810 |
|
|
Sep 01 08:42:21 PM UTC 24 |
Sep 01 08:42:23 PM UTC 24 |
12853093 ps |
| T719 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_mailbox.2760081320 |
|
|
Sep 01 08:42:15 PM UTC 24 |
Sep 01 08:42:24 PM UTC 24 |
386630547 ps |
| T238 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_intercept.2796568031 |
|
|
Sep 01 08:42:15 PM UTC 24 |
Sep 01 08:42:24 PM UTC 24 |
254989417 ps |
| T720 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_rw.1891468910 |
|
|
Sep 01 08:43:24 PM UTC 24 |
Sep 01 08:43:27 PM UTC 24 |
81248196 ps |
| T721 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_flash_mode_ignore_cmds.3837653165 |
|
|
Sep 01 08:42:16 PM UTC 24 |
Sep 01 08:42:25 PM UTC 24 |
1051351084 ps |
| T722 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_sts_read.427100624 |
|
|
Sep 01 08:42:24 PM UTC 24 |
Sep 01 08:42:26 PM UTC 24 |
121724261 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_upload.3880196064 |
|
|
Sep 01 08:42:15 PM UTC 24 |
Sep 01 08:42:26 PM UTC 24 |
274611401 ps |
| T723 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_tpm_read_hw_reg.3439759412 |
|
|
Sep 01 08:41:26 PM UTC 24 |
Sep 01 08:42:27 PM UTC 24 |
10470850778 ps |
| T724 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_rw.528699216 |
|
|
Sep 01 08:42:25 PM UTC 24 |
Sep 01 08:42:28 PM UTC 24 |
21893938 ps |
| T725 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_cmd_filtering.4259655486 |
|
|
Sep 01 08:42:25 PM UTC 24 |
Sep 01 08:42:29 PM UTC 24 |
98038790 ps |
| T726 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_read_hw_reg.1837717179 |
|
|
Sep 01 08:42:22 PM UTC 24 |
Sep 01 08:42:31 PM UTC 24 |
911530329 ps |
| T727 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_read_hw_reg.2876031403 |
|
|
Sep 01 08:42:12 PM UTC 24 |
Sep 01 08:42:32 PM UTC 24 |
3089217027 ps |
| T728 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_intercept.1177731980 |
|
|
Sep 01 08:42:25 PM UTC 24 |
Sep 01 08:42:33 PM UTC 24 |
1056279583 ps |
| T729 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode_ignore_cmds.1428168144 |
|
|
Sep 01 08:41:14 PM UTC 24 |
Sep 01 08:42:33 PM UTC 24 |
28179985452 ps |
| T730 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/22.spi_device_flash_mode_ignore_cmds.3170729296 |
|
|
Sep 01 08:39:21 PM UTC 24 |
Sep 01 08:42:35 PM UTC 24 |
38123345525 ps |
| T731 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_alert_test.2272105989 |
|
|
Sep 01 08:42:34 PM UTC 24 |
Sep 01 08:42:36 PM UTC 24 |
164625682 ps |
| T732 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_mailbox.4191293145 |
|
|
Sep 01 08:40:59 PM UTC 24 |
Sep 01 08:42:36 PM UTC 24 |
42158684758 ps |
| T733 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_mode.864494428 |
|
|
Sep 01 08:42:27 PM UTC 24 |
Sep 01 08:42:37 PM UTC 24 |
565959111 ps |
| T734 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_mode.1613529301 |
|
|
Sep 01 08:41:14 PM UTC 24 |
Sep 01 08:42:37 PM UTC 24 |
10695013668 ps |
| T735 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_all.2367000541 |
|
|
Sep 01 08:41:52 PM UTC 24 |
Sep 01 08:42:38 PM UTC 24 |
7651742076 ps |
| T736 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_csb_read.3810059559 |
|
|
Sep 01 08:42:36 PM UTC 24 |
Sep 01 08:42:38 PM UTC 24 |
26148436 ps |
| T737 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_cfg_cmd.2897862013 |
|
|
Sep 01 08:42:27 PM UTC 24 |
Sep 01 08:42:38 PM UTC 24 |
756007382 ps |
| T738 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_all.3021005865 |
|
|
Sep 01 08:41:18 PM UTC 24 |
Sep 01 08:42:40 PM UTC 24 |
3419792179 ps |
| T739 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_sts_read.1518467526 |
|
|
Sep 01 08:42:38 PM UTC 24 |
Sep 01 08:42:40 PM UTC 24 |
16941374 ps |
| T260 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/31.spi_device_flash_mode_ignore_cmds.929106155 |
|
|
Sep 01 08:41:50 PM UTC 24 |
Sep 01 08:42:40 PM UTC 24 |
1558104360 ps |
| T740 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_rw.686626951 |
|
|
Sep 01 08:42:38 PM UTC 24 |
Sep 01 08:42:40 PM UTC 24 |
54296377 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/3.spi_device_flash_mode_ignore_cmds.1270526185 |
|
|
Sep 01 08:34:15 PM UTC 24 |
Sep 01 08:42:41 PM UTC 24 |
195652305349 ps |
| T741 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_flash_and_tpm_min_idle.2220940607 |
|
|
Sep 01 08:42:33 PM UTC 24 |
Sep 01 08:42:42 PM UTC 24 |
852181946 ps |
| T742 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_read_hw_reg.1005428883 |
|
|
Sep 01 08:42:37 PM UTC 24 |
Sep 01 08:42:43 PM UTC 24 |
1557538246 ps |
| T743 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_upload.3165646488 |
|
|
Sep 01 08:42:27 PM UTC 24 |
Sep 01 08:42:44 PM UTC 24 |
1408766462 ps |
| T744 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_mailbox.345233033 |
|
|
Sep 01 08:42:26 PM UTC 24 |
Sep 01 08:42:44 PM UTC 24 |
3498919666 ps |
| T186 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/30.spi_device_stress_all.641380444 |
|
|
Sep 01 08:41:38 PM UTC 24 |
Sep 01 08:42:45 PM UTC 24 |
8106376421 ps |
| T745 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_read_buffer_direct.2240405216 |
|
|
Sep 01 08:42:28 PM UTC 24 |
Sep 01 08:42:46 PM UTC 24 |
3322645070 ps |
| T746 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_stress_all.4284552747 |
|
|
Sep 01 08:42:09 PM UTC 24 |
Sep 01 08:42:46 PM UTC 24 |
16022689126 ps |
| T747 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_mailbox.4095685086 |
|
|
Sep 01 08:42:41 PM UTC 24 |
Sep 01 08:42:46 PM UTC 24 |
78274025 ps |
| T748 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_upload.2549613595 |
|
|
Sep 01 08:42:42 PM UTC 24 |
Sep 01 08:42:47 PM UTC 24 |
562230590 ps |
| T749 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_tpm_all.3731677702 |
|
|
Sep 01 08:42:12 PM UTC 24 |
Sep 01 08:42:49 PM UTC 24 |
1597217447 ps |
| T750 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_cfg_cmd.581283952 |
|
|
Sep 01 08:42:42 PM UTC 24 |
Sep 01 08:42:49 PM UTC 24 |
154574085 ps |
| T751 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_alert_test.3582047690 |
|
|
Sep 01 08:42:47 PM UTC 24 |
Sep 01 08:42:50 PM UTC 24 |
18876810 ps |
| T752 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_csb_read.4048999783 |
|
|
Sep 01 08:42:47 PM UTC 24 |
Sep 01 08:42:50 PM UTC 24 |
65019722 ps |
| T753 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_read_buffer_direct.1630161032 |
|
|
Sep 01 08:42:43 PM UTC 24 |
Sep 01 08:42:51 PM UTC 24 |
185570594 ps |
| T754 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_sts_read.652869522 |
|
|
Sep 01 08:42:49 PM UTC 24 |
Sep 01 08:42:52 PM UTC 24 |
25046503 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_addr_payload_swap.3627136815 |
|
|
Sep 01 08:42:39 PM UTC 24 |
Sep 01 08:42:52 PM UTC 24 |
1800039566 ps |
| T337 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_pass_addr_payload_swap.3397969249 |
|
|
Sep 01 08:42:25 PM UTC 24 |
Sep 01 08:42:52 PM UTC 24 |
3581557404 ps |
| T755 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_all.2229756098 |
|
|
Sep 01 08:37:55 PM UTC 24 |
Sep 01 08:42:52 PM UTC 24 |
26533946933 ps |
| T756 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode.1870242973 |
|
|
Sep 01 08:42:42 PM UTC 24 |
Sep 01 08:42:53 PM UTC 24 |
569972927 ps |
| T757 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_rw.2931513516 |
|
|
Sep 01 08:42:50 PM UTC 24 |
Sep 01 08:42:55 PM UTC 24 |
187780376 ps |
| T758 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_intercept.2621278872 |
|
|
Sep 01 08:42:39 PM UTC 24 |
Sep 01 08:42:55 PM UTC 24 |
1135999422 ps |
| T759 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/34.spi_device_tpm_all.2146696783 |
|
|
Sep 01 08:42:24 PM UTC 24 |
Sep 01 08:42:57 PM UTC 24 |
1481963471 ps |
| T760 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_cfg_cmd.1925243149 |
|
|
Sep 01 08:42:53 PM UTC 24 |
Sep 01 08:42:58 PM UTC 24 |
101480319 ps |
| T761 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/27.spi_device_flash_and_tpm_min_idle.901116788 |
|
|
Sep 01 08:40:52 PM UTC 24 |
Sep 01 08:42:59 PM UTC 24 |
10812745777 ps |
| T762 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_all.3723001413 |
|
|
Sep 01 08:42:48 PM UTC 24 |
Sep 01 08:42:59 PM UTC 24 |
478189132 ps |
| T763 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm.977947823 |
|
|
Sep 01 08:42:08 PM UTC 24 |
Sep 01 08:42:59 PM UTC 24 |
4118492058 ps |
| T764 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_stress_all.306358038 |
|
|
Sep 01 08:42:58 PM UTC 24 |
Sep 01 08:43:01 PM UTC 24 |
207890121 ps |
| T765 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_alert_test.1093329329 |
|
|
Sep 01 08:43:00 PM UTC 24 |
Sep 01 08:43:02 PM UTC 24 |
39046790 ps |
| T766 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_csb_read.1246531295 |
|
|
Sep 01 08:43:00 PM UTC 24 |
Sep 01 08:43:02 PM UTC 24 |
40518916 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_addr_payload_swap.1945117846 |
|
|
Sep 01 08:42:51 PM UTC 24 |
Sep 01 08:43:03 PM UTC 24 |
1771872454 ps |
| T767 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_rw.869227825 |
|
|
Sep 01 08:43:03 PM UTC 24 |
Sep 01 08:43:05 PM UTC 24 |
19332379 ps |
| T768 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_sts_read.3552703097 |
|
|
Sep 01 08:43:03 PM UTC 24 |
Sep 01 08:43:06 PM UTC 24 |
111059319 ps |
| T769 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/33.spi_device_stress_all.4255944461 |
|
|
Sep 01 08:42:19 PM UTC 24 |
Sep 01 08:43:06 PM UTC 24 |
14982320536 ps |
| T770 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_pass_cmd_filtering.1243863167 |
|
|
Sep 01 08:42:51 PM UTC 24 |
Sep 01 08:43:08 PM UTC 24 |
550558552 ps |
| T771 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_read_buffer_direct.636515224 |
|
|
Sep 01 08:42:54 PM UTC 24 |
Sep 01 08:43:08 PM UTC 24 |
1719561725 ps |
| T772 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_mode.691656615 |
|
|
Sep 01 08:42:53 PM UTC 24 |
Sep 01 08:43:08 PM UTC 24 |
8906042820 ps |
| T773 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_mode_ignore_cmds.39322160 |
|
|
Sep 01 08:42:42 PM UTC 24 |
Sep 01 08:43:09 PM UTC 24 |
1370564851 ps |
| T774 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_read_hw_reg.3741823011 |
|
|
Sep 01 08:43:01 PM UTC 24 |
Sep 01 08:43:10 PM UTC 24 |
1254642116 ps |
| T775 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_mailbox.2752398307 |
|
|
Sep 01 08:43:07 PM UTC 24 |
Sep 01 08:43:11 PM UTC 24 |
29160101 ps |
| T776 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_tpm_read_hw_reg.1382841702 |
|
|
Sep 01 08:42:47 PM UTC 24 |
Sep 01 08:43:15 PM UTC 24 |
4254328089 ps |
| T777 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_pass_cmd_filtering.2740381240 |
|
|
Sep 01 08:42:39 PM UTC 24 |
Sep 01 08:43:17 PM UTC 24 |
7567365613 ps |
| T778 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_cfg_cmd.3408268543 |
|
|
Sep 01 08:43:08 PM UTC 24 |
Sep 01 08:43:17 PM UTC 24 |
512297494 ps |
| T779 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_tpm_all.4221954784 |
|
|
Sep 01 08:42:37 PM UTC 24 |
Sep 01 08:43:19 PM UTC 24 |
61639374367 ps |
| T780 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_alert_test.3900029122 |
|
|
Sep 01 08:43:20 PM UTC 24 |
Sep 01 08:43:22 PM UTC 24 |
19330875 ps |
| T781 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_all.3861654270 |
|
|
Sep 01 08:42:07 PM UTC 24 |
Sep 01 08:43:22 PM UTC 24 |
17932605801 ps |
| T342 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_addr_payload_swap.861744144 |
|
|
Sep 01 08:43:06 PM UTC 24 |
Sep 01 08:43:22 PM UTC 24 |
6655758286 ps |
| T359 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_intercept.1626444132 |
|
|
Sep 01 08:43:06 PM UTC 24 |
Sep 01 08:43:22 PM UTC 24 |
1888467588 ps |
| T782 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_intercept.621698473 |
|
|
Sep 01 08:42:52 PM UTC 24 |
Sep 01 08:43:23 PM UTC 24 |
13031162576 ps |
| T783 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_csb_read.2495988802 |
|
|
Sep 01 08:43:23 PM UTC 24 |
Sep 01 08:43:25 PM UTC 24 |
13143766 ps |
| T784 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_sts_read.3436656923 |
|
|
Sep 01 08:43:23 PM UTC 24 |
Sep 01 08:43:26 PM UTC 24 |
78589533 ps |
| T41 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/32.spi_device_flash_and_tpm_min_idle.1207897665 |
|
|
Sep 01 08:42:09 PM UTC 24 |
Sep 01 08:43:26 PM UTC 24 |
49086622786 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/28.spi_device_flash_and_tpm.1455771362 |
|
|
Sep 01 08:41:05 PM UTC 24 |
Sep 01 08:43:28 PM UTC 24 |
7646021022 ps |
| T785 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_pass_cmd_filtering.3480030118 |
|
|
Sep 01 08:43:04 PM UTC 24 |
Sep 01 08:43:28 PM UTC 24 |
8718030143 ps |
| T786 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_cmd_filtering.984693436 |
|
|
Sep 01 08:43:25 PM UTC 24 |
Sep 01 08:43:28 PM UTC 24 |
140593221 ps |
| T787 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_all.1449118623 |
|
|
Sep 01 08:43:23 PM UTC 24 |
Sep 01 08:43:28 PM UTC 24 |
1137128741 ps |
| T788 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_intercept.594420345 |
|
|
Sep 01 08:43:27 PM UTC 24 |
Sep 01 08:43:30 PM UTC 24 |
107930058 ps |
| T789 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_flash_mode.3033726369 |
|
|
Sep 01 08:43:09 PM UTC 24 |
Sep 01 08:43:31 PM UTC 24 |
3393730011 ps |
| T790 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_read_buffer_direct.1915037858 |
|
|
Sep 01 08:43:11 PM UTC 24 |
Sep 01 08:43:31 PM UTC 24 |
3014491771 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/26.spi_device_flash_and_tpm.2542548308 |
|
|
Sep 01 08:40:25 PM UTC 24 |
Sep 01 08:43:31 PM UTC 24 |
40730341655 ps |
| T791 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_upload.1847872833 |
|
|
Sep 01 08:43:08 PM UTC 24 |
Sep 01 08:43:31 PM UTC 24 |
3279552379 ps |
| T792 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm_min_idle.1918892822 |
|
|
Sep 01 08:42:45 PM UTC 24 |
Sep 01 08:43:33 PM UTC 24 |
2170207280 ps |
| T793 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_tpm_read_hw_reg.1777767358 |
|
|
Sep 01 08:43:23 PM UTC 24 |
Sep 01 08:43:33 PM UTC 24 |
3034555464 ps |
| T794 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/37.spi_device_tpm_all.3340393932 |
|
|
Sep 01 08:43:02 PM UTC 24 |
Sep 01 08:43:33 PM UTC 24 |
18968694858 ps |
| T795 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_read_buffer_direct.2780835439 |
|
|
Sep 01 08:43:29 PM UTC 24 |
Sep 01 08:43:35 PM UTC 24 |
260415534 ps |
| T796 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_alert_test.3134749905 |
|
|
Sep 01 08:43:33 PM UTC 24 |
Sep 01 08:43:35 PM UTC 24 |
16437375 ps |
| T797 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_read_hw_reg.3091196240 |
|
|
Sep 01 08:43:34 PM UTC 24 |
Sep 01 08:43:36 PM UTC 24 |
37134539 ps |
| T798 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_csb_read.681030986 |
|
|
Sep 01 08:43:34 PM UTC 24 |
Sep 01 08:43:36 PM UTC 24 |
16924905 ps |
| T228 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_all.2569317059 |
|
|
Sep 01 08:42:44 PM UTC 24 |
Sep 01 08:43:37 PM UTC 24 |
3538191417 ps |
| T799 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_upload.1899947810 |
|
|
Sep 01 08:43:28 PM UTC 24 |
Sep 01 08:43:38 PM UTC 24 |
1282726120 ps |
| T800 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_sts_read.1116256495 |
|
|
Sep 01 08:43:36 PM UTC 24 |
Sep 01 08:43:39 PM UTC 24 |
97417732 ps |
| T801 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_rw.686623251 |
|
|
Sep 01 08:43:36 PM UTC 24 |
Sep 01 08:43:39 PM UTC 24 |
115436201 ps |
| T802 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_cfg_cmd.1078430852 |
|
|
Sep 01 08:43:29 PM UTC 24 |
Sep 01 08:43:40 PM UTC 24 |
790443547 ps |
| T803 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_upload.729820536 |
|
|
Sep 01 08:42:53 PM UTC 24 |
Sep 01 08:43:43 PM UTC 24 |
9517640984 ps |
| T804 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_addr_payload_swap.2128151481 |
|
|
Sep 01 08:43:37 PM UTC 24 |
Sep 01 08:43:44 PM UTC 24 |
1666444865 ps |
| T805 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/23.spi_device_stress_all.1865608624 |
|
|
Sep 01 08:39:44 PM UTC 24 |
Sep 01 08:43:45 PM UTC 24 |
14103540575 ps |
| T806 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/24.spi_device_stress_all.76907296 |
|
|
Sep 01 08:40:01 PM UTC 24 |
Sep 01 08:43:45 PM UTC 24 |
91973510692 ps |
| T807 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_mailbox.2759331904 |
|
|
Sep 01 08:42:52 PM UTC 24 |
Sep 01 08:43:47 PM UTC 24 |
6163320983 ps |
| T808 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_pass_cmd_filtering.3244608339 |
|
|
Sep 01 08:43:37 PM UTC 24 |
Sep 01 08:43:48 PM UTC 24 |
479121321 ps |
| T809 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_upload.1501828785 |
|
|
Sep 01 08:43:39 PM UTC 24 |
Sep 01 08:43:50 PM UTC 24 |
9637484441 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_all.169006535 |
|
|
Sep 01 08:43:31 PM UTC 24 |
Sep 01 08:43:53 PM UTC 24 |
2414129735 ps |
| T810 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_mailbox.1345003813 |
|
|
Sep 01 08:43:38 PM UTC 24 |
Sep 01 08:43:53 PM UTC 24 |
1589827879 ps |
| T811 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/35.spi_device_flash_and_tpm.110030264 |
|
|
Sep 01 08:42:45 PM UTC 24 |
Sep 01 08:43:53 PM UTC 24 |
38512905735 ps |
| T812 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_alert_test.3787247556 |
|
|
Sep 01 08:43:51 PM UTC 24 |
Sep 01 08:43:54 PM UTC 24 |
13030519 ps |
| T813 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_read_buffer_direct.2118634731 |
|
|
Sep 01 08:43:45 PM UTC 24 |
Sep 01 08:43:54 PM UTC 24 |
914448953 ps |
| T814 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_tpm_all.747908781 |
|
|
Sep 01 08:43:34 PM UTC 24 |
Sep 01 08:43:55 PM UTC 24 |
10023189728 ps |
| T815 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_cfg_cmd.497317693 |
|
|
Sep 01 08:43:39 PM UTC 24 |
Sep 01 08:43:55 PM UTC 24 |
1047138019 ps |
| T816 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_flash_mode.2616359693 |
|
|
Sep 01 08:43:29 PM UTC 24 |
Sep 01 08:43:56 PM UTC 24 |
1685947569 ps |
| T817 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_sts_read.1547616414 |
|
|
Sep 01 08:43:54 PM UTC 24 |
Sep 01 08:43:56 PM UTC 24 |
20243718 ps |
| T818 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_csb_read.284695929 |
|
|
Sep 01 08:43:54 PM UTC 24 |
Sep 01 08:43:56 PM UTC 24 |
47103301 ps |
| T819 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/36.spi_device_flash_all.3432511749 |
|
|
Sep 01 08:42:55 PM UTC 24 |
Sep 01 08:43:59 PM UTC 24 |
4285486067 ps |
| T820 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_intercept.3121789028 |
|
|
Sep 01 08:43:38 PM UTC 24 |
Sep 01 08:44:00 PM UTC 24 |
1307593978 ps |
| T821 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_rw.152875054 |
|
|
Sep 01 08:43:55 PM UTC 24 |
Sep 01 08:44:00 PM UTC 24 |
176233442 ps |
| T822 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/29.spi_device_flash_and_tpm.2177146931 |
|
|
Sep 01 08:41:18 PM UTC 24 |
Sep 01 08:44:00 PM UTC 24 |
17892628734 ps |
| T823 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_all.3724791351 |
|
|
Sep 01 08:43:54 PM UTC 24 |
Sep 01 08:44:01 PM UTC 24 |
530095228 ps |
| T824 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_addr_payload_swap.4002560472 |
|
|
Sep 01 08:43:57 PM UTC 24 |
Sep 01 08:44:01 PM UTC 24 |
32170675 ps |
| T825 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_tpm_read_hw_reg.430074688 |
|
|
Sep 01 08:43:54 PM UTC 24 |
Sep 01 08:44:02 PM UTC 24 |
2013576564 ps |
| T826 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/39.spi_device_flash_all.2737383409 |
|
|
Sep 01 08:43:46 PM UTC 24 |
Sep 01 08:44:02 PM UTC 24 |
6094044117 ps |
| T827 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_pass_cmd_filtering.2534390879 |
|
|
Sep 01 08:43:55 PM UTC 24 |
Sep 01 08:44:03 PM UTC 24 |
426140950 ps |
| T828 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_intercept.3448723734 |
|
|
Sep 01 08:43:57 PM UTC 24 |
Sep 01 08:44:04 PM UTC 24 |
1434768165 ps |
| T829 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/17.spi_device_flash_and_tpm.4093187504 |
|
|
Sep 01 08:37:55 PM UTC 24 |
Sep 01 08:44:05 PM UTC 24 |
695676768680 ps |
| T830 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_flash_mode.3552904293 |
|
|
Sep 01 08:44:01 PM UTC 24 |
Sep 01 08:44:06 PM UTC 24 |
148106664 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/38.spi_device_pass_addr_payload_swap.3512862977 |
|
|
Sep 01 08:43:27 PM UTC 24 |
Sep 01 08:44:06 PM UTC 24 |
6881144135 ps |
| T831 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/40.spi_device_alert_test.2088543014 |
|
|
Sep 01 08:44:04 PM UTC 24 |
Sep 01 08:44:07 PM UTC 24 |
14266619 ps |
| T236 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/10.spi_device_flash_and_tpm_min_idle.889486623 |
|
|
Sep 01 08:35:54 PM UTC 24 |
Sep 01 08:44:07 PM UTC 24 |
222451573623 ps |
| T832 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/41.spi_device_tpm_read_hw_reg.2970649619 |
|
|
Sep 01 08:44:06 PM UTC 24 |
Sep 01 08:44:08 PM UTC 24 |
10565146 ps |
| T833 |
/workspaces/repo/scratch/os_regression_2024_08_31/spi_device_2p-sim-vcs/coverage/default/41.spi_device_csb_read.2701364884 |
|
|
Sep 01 08:44:05 PM UTC 24 |
Sep 01 08:44:08 PM UTC 24 |
44422867 ps |