| T507 |
/workspace/coverage/default/11.sram_ctrl_smoke.3834780349 |
|
|
Dec 20 01:05:19 PM PST 23 |
Dec 20 01:06:34 PM PST 23 |
915694889 ps |
| T508 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1094034160 |
|
|
Dec 20 01:05:04 PM PST 23 |
Dec 20 01:05:43 PM PST 23 |
349785031 ps |
| T509 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2312799516 |
|
|
Dec 20 01:05:00 PM PST 23 |
Dec 20 01:05:57 PM PST 23 |
5836386430 ps |
| T510 |
/workspace/coverage/default/16.sram_ctrl_regwen.2736410810 |
|
|
Dec 20 01:05:33 PM PST 23 |
Dec 20 01:12:17 PM PST 23 |
11125237766 ps |
| T511 |
/workspace/coverage/default/3.sram_ctrl_smoke.2104975930 |
|
|
Dec 20 01:05:03 PM PST 23 |
Dec 20 01:06:45 PM PST 23 |
1948046510 ps |
| T512 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.2187016553 |
|
|
Dec 20 01:05:34 PM PST 23 |
Dec 20 01:07:16 PM PST 23 |
3682513232 ps |
| T513 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1269120280 |
|
|
Dec 20 01:05:06 PM PST 23 |
Dec 20 01:05:31 PM PST 23 |
56456080 ps |
| T514 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.2754403369 |
|
|
Dec 20 01:06:14 PM PST 23 |
Dec 20 01:07:02 PM PST 23 |
27752161347 ps |
| T515 |
/workspace/coverage/default/14.sram_ctrl_bijection.3280580923 |
|
|
Dec 20 01:05:25 PM PST 23 |
Dec 20 01:21:02 PM PST 23 |
15111085956 ps |
| T516 |
/workspace/coverage/default/33.sram_ctrl_bijection.1328414757 |
|
|
Dec 20 01:06:14 PM PST 23 |
Dec 20 01:24:11 PM PST 23 |
259407644951 ps |
| T517 |
/workspace/coverage/default/43.sram_ctrl_smoke.1502356092 |
|
|
Dec 20 01:06:47 PM PST 23 |
Dec 20 01:07:38 PM PST 23 |
5334092973 ps |
| T518 |
/workspace/coverage/default/23.sram_ctrl_smoke.1823510677 |
|
|
Dec 20 01:05:39 PM PST 23 |
Dec 20 01:06:04 PM PST 23 |
959987963 ps |
| T519 |
/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3672381165 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:09:41 PM PST 23 |
2116505435 ps |
| T520 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.4032268951 |
|
|
Dec 20 01:05:17 PM PST 23 |
Dec 20 01:18:57 PM PST 23 |
22475995494 ps |
| T521 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1759132584 |
|
|
Dec 20 01:06:00 PM PST 23 |
Dec 20 01:10:20 PM PST 23 |
14766611199 ps |
| T522 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.913877263 |
|
|
Dec 20 01:06:15 PM PST 23 |
Dec 20 01:10:38 PM PST 23 |
45588343621 ps |
| T523 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.130426997 |
|
|
Dec 20 01:06:10 PM PST 23 |
Dec 20 01:07:32 PM PST 23 |
784497929 ps |
| T524 |
/workspace/coverage/default/19.sram_ctrl_regwen.2970030883 |
|
|
Dec 20 01:05:40 PM PST 23 |
Dec 20 01:16:47 PM PST 23 |
4401010523 ps |
| T525 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.668503378 |
|
|
Dec 20 01:05:15 PM PST 23 |
Dec 20 01:05:51 PM PST 23 |
350036135 ps |
| T526 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3916166277 |
|
|
Dec 20 01:06:01 PM PST 23 |
Dec 20 01:06:40 PM PST 23 |
2803797518 ps |
| T527 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2840136881 |
|
|
Dec 20 01:06:16 PM PST 23 |
Dec 20 01:14:17 PM PST 23 |
7367350810 ps |
| T528 |
/workspace/coverage/default/49.sram_ctrl_smoke.3846115429 |
|
|
Dec 20 01:06:58 PM PST 23 |
Dec 20 01:07:49 PM PST 23 |
2791177409 ps |
| T529 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1190042656 |
|
|
Dec 20 01:05:25 PM PST 23 |
Dec 20 02:16:05 PM PST 23 |
4531931045 ps |
| T530 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1057463216 |
|
|
Dec 20 01:06:56 PM PST 23 |
Dec 20 01:09:29 PM PST 23 |
11608669412 ps |
| T531 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.926439862 |
|
|
Dec 20 01:06:15 PM PST 23 |
Dec 20 01:47:08 PM PST 23 |
815741796 ps |
| T532 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.3947253382 |
|
|
Dec 20 01:06:20 PM PST 23 |
Dec 20 01:07:13 PM PST 23 |
2621006571 ps |
| T533 |
/workspace/coverage/default/34.sram_ctrl_smoke.3486277475 |
|
|
Dec 20 01:06:23 PM PST 23 |
Dec 20 01:06:38 PM PST 23 |
383832828 ps |
| T534 |
/workspace/coverage/default/6.sram_ctrl_bijection.1244642104 |
|
|
Dec 20 01:04:58 PM PST 23 |
Dec 20 01:46:11 PM PST 23 |
112715684145 ps |
| T535 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1298177405 |
|
|
Dec 20 01:05:09 PM PST 23 |
Dec 20 01:06:04 PM PST 23 |
1483225232 ps |
| T536 |
/workspace/coverage/default/44.sram_ctrl_executable.4050840091 |
|
|
Dec 20 01:06:34 PM PST 23 |
Dec 20 01:25:28 PM PST 23 |
93523214494 ps |
| T537 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2162648813 |
|
|
Dec 20 01:06:58 PM PST 23 |
Dec 20 01:14:43 PM PST 23 |
6995587911 ps |
| T538 |
/workspace/coverage/default/22.sram_ctrl_alert_test.3153925536 |
|
|
Dec 20 01:05:30 PM PST 23 |
Dec 20 01:05:48 PM PST 23 |
16392202 ps |
| T539 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3170303070 |
|
|
Dec 20 01:07:04 PM PST 23 |
Dec 20 01:14:22 PM PST 23 |
63701151274 ps |
| T540 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3223584146 |
|
|
Dec 20 01:05:06 PM PST 23 |
Dec 20 01:26:57 PM PST 23 |
35164343223 ps |
| T541 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3450252967 |
|
|
Dec 20 01:05:17 PM PST 23 |
Dec 20 01:05:39 PM PST 23 |
15161177 ps |
| T542 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.168576204 |
|
|
Dec 20 01:06:41 PM PST 23 |
Dec 20 01:09:30 PM PST 23 |
8892991173 ps |
| T543 |
/workspace/coverage/default/9.sram_ctrl_smoke.1090995168 |
|
|
Dec 20 01:05:36 PM PST 23 |
Dec 20 01:06:11 PM PST 23 |
1835952275 ps |
| T544 |
/workspace/coverage/default/13.sram_ctrl_regwen.797079986 |
|
|
Dec 20 01:05:23 PM PST 23 |
Dec 20 01:12:33 PM PST 23 |
2918620128 ps |
| T545 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3344285518 |
|
|
Dec 20 01:04:59 PM PST 23 |
Dec 20 02:38:44 PM PST 23 |
494332411870 ps |
| T546 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.118935208 |
|
|
Dec 20 01:05:36 PM PST 23 |
Dec 20 01:11:20 PM PST 23 |
71745628858 ps |
| T85 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.3394383561 |
|
|
Dec 20 01:05:51 PM PST 23 |
Dec 20 01:07:23 PM PST 23 |
3014508503 ps |
| T547 |
/workspace/coverage/default/47.sram_ctrl_stress_all.4242172814 |
|
|
Dec 20 01:06:56 PM PST 23 |
Dec 20 01:22:34 PM PST 23 |
139554708490 ps |
| T548 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1949052461 |
|
|
Dec 20 01:05:14 PM PST 23 |
Dec 20 01:05:37 PM PST 23 |
14197403 ps |
| T549 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2125120702 |
|
|
Dec 20 01:05:17 PM PST 23 |
Dec 20 01:12:14 PM PST 23 |
11085517662 ps |
| T550 |
/workspace/coverage/default/12.sram_ctrl_bijection.2703116850 |
|
|
Dec 20 01:05:23 PM PST 23 |
Dec 20 01:27:03 PM PST 23 |
19591914925 ps |
| T551 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3690102754 |
|
|
Dec 20 01:06:54 PM PST 23 |
Dec 20 01:10:03 PM PST 23 |
10567993547 ps |
| T552 |
/workspace/coverage/default/3.sram_ctrl_partial_access.3913787631 |
|
|
Dec 20 01:05:01 PM PST 23 |
Dec 20 01:05:57 PM PST 23 |
1720232246 ps |
| T553 |
/workspace/coverage/default/16.sram_ctrl_bijection.1946936670 |
|
|
Dec 20 01:05:04 PM PST 23 |
Dec 20 01:46:17 PM PST 23 |
607158072667 ps |
| T554 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3372625652 |
|
|
Dec 20 01:06:15 PM PST 23 |
Dec 20 01:55:45 PM PST 23 |
7882617055 ps |
| T555 |
/workspace/coverage/default/0.sram_ctrl_smoke.3145853056 |
|
|
Dec 20 01:04:50 PM PST 23 |
Dec 20 01:05:22 PM PST 23 |
356346051 ps |
| T556 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3448673906 |
|
|
Dec 20 01:06:57 PM PST 23 |
Dec 20 01:07:27 PM PST 23 |
1405044961 ps |
| T557 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1116701637 |
|
|
Dec 20 01:06:32 PM PST 23 |
Dec 20 01:24:34 PM PST 23 |
60888072267 ps |
| T558 |
/workspace/coverage/default/36.sram_ctrl_alert_test.2590649743 |
|
|
Dec 20 01:06:13 PM PST 23 |
Dec 20 01:06:25 PM PST 23 |
51552979 ps |
| T559 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3089665993 |
|
|
Dec 20 01:05:38 PM PST 23 |
Dec 20 01:09:55 PM PST 23 |
4065841236 ps |
| T560 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.800463112 |
|
|
Dec 20 01:05:59 PM PST 23 |
Dec 20 01:08:34 PM PST 23 |
35898412633 ps |
| T561 |
/workspace/coverage/default/22.sram_ctrl_smoke.1541491329 |
|
|
Dec 20 01:05:29 PM PST 23 |
Dec 20 01:06:25 PM PST 23 |
2085342521 ps |
| T562 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.646413018 |
|
|
Dec 20 01:05:58 PM PST 23 |
Dec 20 01:15:37 PM PST 23 |
98616772009 ps |
| T563 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.60507312 |
|
|
Dec 20 01:05:07 PM PST 23 |
Dec 20 01:09:33 PM PST 23 |
28132262298 ps |
| T564 |
/workspace/coverage/default/10.sram_ctrl_regwen.3717300083 |
|
|
Dec 20 01:05:31 PM PST 23 |
Dec 20 01:27:35 PM PST 23 |
17322514888 ps |
| T565 |
/workspace/coverage/default/40.sram_ctrl_alert_test.538587566 |
|
|
Dec 20 01:06:45 PM PST 23 |
Dec 20 01:07:12 PM PST 23 |
80584919 ps |
| T566 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2638651841 |
|
|
Dec 20 01:05:14 PM PST 23 |
Dec 20 01:07:00 PM PST 23 |
11863465295 ps |
| T567 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1338508240 |
|
|
Dec 20 01:06:54 PM PST 23 |
Dec 20 02:26:16 PM PST 23 |
1437895757 ps |
| T568 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2685792844 |
|
|
Dec 20 01:05:09 PM PST 23 |
Dec 20 01:05:47 PM PST 23 |
761618949 ps |
| T569 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2029463861 |
|
|
Dec 20 01:06:16 PM PST 23 |
Dec 20 01:09:02 PM PST 23 |
2817392032 ps |
| T570 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.3728778271 |
|
|
Dec 20 01:06:19 PM PST 23 |
Dec 20 01:08:09 PM PST 23 |
7103833146 ps |
| T571 |
/workspace/coverage/default/37.sram_ctrl_regwen.39900809 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:29:49 PM PST 23 |
77769360376 ps |
| T572 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.532151440 |
|
|
Dec 20 01:05:08 PM PST 23 |
Dec 20 01:23:27 PM PST 23 |
15488435256 ps |
| T573 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1719239934 |
|
|
Dec 20 01:05:08 PM PST 23 |
Dec 20 01:05:34 PM PST 23 |
22406726 ps |
| T574 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2184826746 |
|
|
Dec 20 01:05:38 PM PST 23 |
Dec 20 01:16:21 PM PST 23 |
9361225877 ps |
| T575 |
/workspace/coverage/default/26.sram_ctrl_partial_access.346971071 |
|
|
Dec 20 01:05:45 PM PST 23 |
Dec 20 01:06:18 PM PST 23 |
2018025731 ps |
| T576 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.2742533723 |
|
|
Dec 20 01:05:46 PM PST 23 |
Dec 20 01:06:08 PM PST 23 |
453298691 ps |
| T577 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2239248798 |
|
|
Dec 20 01:04:59 PM PST 23 |
Dec 20 01:10:05 PM PST 23 |
5114078813 ps |
| T578 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.3807964504 |
|
|
Dec 20 01:05:24 PM PST 23 |
Dec 20 01:23:23 PM PST 23 |
17005572068 ps |
| T579 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3281608322 |
|
|
Dec 20 01:06:50 PM PST 23 |
Dec 20 01:20:06 PM PST 23 |
15602998885 ps |
| T580 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.648898062 |
|
|
Dec 20 01:05:39 PM PST 23 |
Dec 20 01:10:44 PM PST 23 |
3440494194 ps |
| T581 |
/workspace/coverage/default/15.sram_ctrl_bijection.2230168952 |
|
|
Dec 20 01:05:33 PM PST 23 |
Dec 20 01:24:45 PM PST 23 |
50781331002 ps |
| T582 |
/workspace/coverage/default/12.sram_ctrl_smoke.1640159155 |
|
|
Dec 20 01:05:17 PM PST 23 |
Dec 20 01:05:53 PM PST 23 |
989384420 ps |
| T583 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.462692565 |
|
|
Dec 20 01:05:05 PM PST 23 |
Dec 20 01:05:43 PM PST 23 |
346665378 ps |
| T584 |
/workspace/coverage/default/10.sram_ctrl_smoke.180885468 |
|
|
Dec 20 01:05:23 PM PST 23 |
Dec 20 01:07:19 PM PST 23 |
794396063 ps |
| T585 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.187189404 |
|
|
Dec 20 01:05:30 PM PST 23 |
Dec 20 01:07:01 PM PST 23 |
964194737 ps |
| T586 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2161300336 |
|
|
Dec 20 01:05:19 PM PST 23 |
Dec 20 01:05:40 PM PST 23 |
40094243 ps |
| T587 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.2280094137 |
|
|
Dec 20 01:05:50 PM PST 23 |
Dec 20 01:09:16 PM PST 23 |
2066085561 ps |
| T588 |
/workspace/coverage/default/20.sram_ctrl_smoke.1374208499 |
|
|
Dec 20 01:05:31 PM PST 23 |
Dec 20 01:05:57 PM PST 23 |
2327059095 ps |
| T589 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2853256663 |
|
|
Dec 20 01:04:55 PM PST 23 |
Dec 20 01:05:22 PM PST 23 |
15326421 ps |
| T24 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.4237532176 |
|
|
Dec 20 01:05:06 PM PST 23 |
Dec 20 01:05:33 PM PST 23 |
907109573 ps |
| T590 |
/workspace/coverage/default/17.sram_ctrl_executable.2090844259 |
|
|
Dec 20 01:05:31 PM PST 23 |
Dec 20 01:19:42 PM PST 23 |
71409261336 ps |
| T591 |
/workspace/coverage/default/5.sram_ctrl_partial_access.2720631756 |
|
|
Dec 20 01:05:00 PM PST 23 |
Dec 20 01:05:46 PM PST 23 |
1071453161 ps |
| T592 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3505546854 |
|
|
Dec 20 01:06:10 PM PST 23 |
Dec 20 01:07:42 PM PST 23 |
2664048779 ps |
| T593 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.998851576 |
|
|
Dec 20 01:06:55 PM PST 23 |
Dec 20 01:09:53 PM PST 23 |
68877114409 ps |
| T594 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1002021996 |
|
|
Dec 20 01:04:58 PM PST 23 |
Dec 20 01:06:20 PM PST 23 |
1759340652 ps |
| T595 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.2294941906 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:20:19 PM PST 23 |
8608107615 ps |
| T596 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.154984062 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:13:39 PM PST 23 |
7938194259 ps |
| T597 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.561732193 |
|
|
Dec 20 01:06:43 PM PST 23 |
Dec 20 01:39:48 PM PST 23 |
1666766818 ps |
| T598 |
/workspace/coverage/default/8.sram_ctrl_bijection.271726566 |
|
|
Dec 20 01:05:08 PM PST 23 |
Dec 20 01:41:30 PM PST 23 |
96740600811 ps |
| T599 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2642480522 |
|
|
Dec 20 01:06:48 PM PST 23 |
Dec 20 01:09:27 PM PST 23 |
4847553638 ps |
| T600 |
/workspace/coverage/default/35.sram_ctrl_regwen.2799651802 |
|
|
Dec 20 01:06:08 PM PST 23 |
Dec 20 01:19:56 PM PST 23 |
10963922619 ps |
| T601 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3762390965 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:10:27 PM PST 23 |
9694761422 ps |
| T602 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.415657883 |
|
|
Dec 20 01:06:57 PM PST 23 |
Dec 20 01:07:35 PM PST 23 |
4178143388 ps |
| T25 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.3815259611 |
|
|
Dec 20 01:05:19 PM PST 23 |
Dec 20 01:05:42 PM PST 23 |
842751686 ps |
| T603 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.131435997 |
|
|
Dec 20 01:05:35 PM PST 23 |
Dec 20 01:10:26 PM PST 23 |
15382520019 ps |
| T604 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3363361233 |
|
|
Dec 20 01:06:09 PM PST 23 |
Dec 20 01:08:36 PM PST 23 |
4119441015 ps |
| T605 |
/workspace/coverage/default/18.sram_ctrl_bijection.2759109020 |
|
|
Dec 20 01:05:30 PM PST 23 |
Dec 20 01:21:03 PM PST 23 |
26908122941 ps |
| T606 |
/workspace/coverage/default/21.sram_ctrl_executable.1051038271 |
|
|
Dec 20 01:05:42 PM PST 23 |
Dec 20 01:18:47 PM PST 23 |
47234722657 ps |
| T607 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2630309384 |
|
|
Dec 20 01:06:54 PM PST 23 |
Dec 20 01:17:33 PM PST 23 |
5742359621 ps |
| T608 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.576208574 |
|
|
Dec 20 01:04:56 PM PST 23 |
Dec 20 02:08:48 PM PST 23 |
569834437 ps |
| T609 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2642821880 |
|
|
Dec 20 01:06:43 PM PST 23 |
Dec 20 01:07:24 PM PST 23 |
1527504454 ps |
| T610 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1884142569 |
|
|
Dec 20 01:05:37 PM PST 23 |
Dec 20 01:19:24 PM PST 23 |
5354171825 ps |
| T611 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.844016809 |
|
|
Dec 20 01:05:08 PM PST 23 |
Dec 20 01:12:07 PM PST 23 |
52094736508 ps |
| T612 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1777981047 |
|
|
Dec 20 01:05:36 PM PST 23 |
Dec 20 01:10:42 PM PST 23 |
16400755917 ps |
| T613 |
/workspace/coverage/default/30.sram_ctrl_partial_access.2383385255 |
|
|
Dec 20 01:06:06 PM PST 23 |
Dec 20 01:06:37 PM PST 23 |
1615063960 ps |
| T614 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2751255681 |
|
|
Dec 20 01:04:54 PM PST 23 |
Dec 20 01:24:00 PM PST 23 |
25406304344 ps |
| T615 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.281890114 |
|
|
Dec 20 01:05:42 PM PST 23 |
Dec 20 01:08:27 PM PST 23 |
57620150628 ps |
| T616 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.962531968 |
|
|
Dec 20 01:05:49 PM PST 23 |
Dec 20 01:07:15 PM PST 23 |
18217006807 ps |
| T617 |
/workspace/coverage/default/33.sram_ctrl_smoke.1779535685 |
|
|
Dec 20 01:06:15 PM PST 23 |
Dec 20 01:06:43 PM PST 23 |
1093838238 ps |
| T618 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1626264516 |
|
|
Dec 20 01:05:25 PM PST 23 |
Dec 20 01:05:58 PM PST 23 |
1537123335 ps |
| T619 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.336883772 |
|
|
Dec 20 01:05:19 PM PST 23 |
Dec 20 01:08:34 PM PST 23 |
3126151326 ps |
| T620 |
/workspace/coverage/default/43.sram_ctrl_executable.353320598 |
|
|
Dec 20 01:06:46 PM PST 23 |
Dec 20 01:11:33 PM PST 23 |
9323281462 ps |
| T621 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2536364292 |
|
|
Dec 20 01:05:21 PM PST 23 |
Dec 20 01:11:03 PM PST 23 |
8377175200 ps |
| T622 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1894938817 |
|
|
Dec 20 01:05:29 PM PST 23 |
Dec 20 01:05:59 PM PST 23 |
704522727 ps |
| T623 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1517221658 |
|
|
Dec 20 01:06:13 PM PST 23 |
Dec 20 01:34:40 PM PST 23 |
450994322 ps |
| T624 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2606138202 |
|
|
Dec 20 01:05:48 PM PST 23 |
Dec 20 01:12:05 PM PST 23 |
17655037382 ps |
| T625 |
/workspace/coverage/default/2.sram_ctrl_smoke.1148941462 |
|
|
Dec 20 01:05:27 PM PST 23 |
Dec 20 01:06:07 PM PST 23 |
1166490114 ps |
| T626 |
/workspace/coverage/default/21.sram_ctrl_bijection.2921344541 |
|
|
Dec 20 01:05:37 PM PST 23 |
Dec 20 01:40:36 PM PST 23 |
231798587840 ps |
| T627 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3805678971 |
|
|
Dec 20 01:06:58 PM PST 23 |
Dec 20 01:10:04 PM PST 23 |
7097860065 ps |
| T628 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3785984021 |
|
|
Dec 20 01:05:21 PM PST 23 |
Dec 20 01:07:58 PM PST 23 |
3194966730 ps |
| T629 |
/workspace/coverage/default/46.sram_ctrl_smoke.852570800 |
|
|
Dec 20 01:06:55 PM PST 23 |
Dec 20 01:07:35 PM PST 23 |
352199287 ps |
| T630 |
/workspace/coverage/default/0.sram_ctrl_alert_test.712495878 |
|
|
Dec 20 01:05:11 PM PST 23 |
Dec 20 01:05:35 PM PST 23 |
33293695 ps |
| T86 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2113050538 |
|
|
Dec 20 01:06:16 PM PST 23 |
Dec 20 01:07:42 PM PST 23 |
2431741056 ps |
| T631 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.75801129 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:10:58 PM PST 23 |
41452040133 ps |
| T632 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3447116441 |
|
|
Dec 20 01:05:21 PM PST 23 |
Dec 20 01:13:40 PM PST 23 |
18764316901 ps |
| T633 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.898923479 |
|
|
Dec 20 01:05:39 PM PST 23 |
Dec 20 01:06:24 PM PST 23 |
2691784757 ps |
| T634 |
/workspace/coverage/default/14.sram_ctrl_smoke.463881021 |
|
|
Dec 20 01:05:20 PM PST 23 |
Dec 20 01:06:17 PM PST 23 |
1103750095 ps |
| T635 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.96676112 |
|
|
Dec 20 01:05:08 PM PST 23 |
Dec 20 02:16:54 PM PST 23 |
624437354 ps |
| T636 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1059628069 |
|
|
Dec 20 01:06:32 PM PST 23 |
Dec 20 02:13:52 PM PST 23 |
212828464043 ps |
| T637 |
/workspace/coverage/default/32.sram_ctrl_executable.4246366537 |
|
|
Dec 20 01:06:13 PM PST 23 |
Dec 20 01:24:17 PM PST 23 |
68250496851 ps |
| T638 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.2390643508 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:07:55 PM PST 23 |
6233240097 ps |
| T639 |
/workspace/coverage/default/42.sram_ctrl_executable.1441480185 |
|
|
Dec 20 01:06:44 PM PST 23 |
Dec 20 01:18:04 PM PST 23 |
22883942302 ps |
| T640 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3975288553 |
|
|
Dec 20 01:06:16 PM PST 23 |
Dec 20 01:21:17 PM PST 23 |
145265439034 ps |
| T641 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1865134168 |
|
|
Dec 20 01:05:10 PM PST 23 |
Dec 20 01:06:51 PM PST 23 |
4321597970 ps |
| T642 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2698399892 |
|
|
Dec 20 01:04:56 PM PST 23 |
Dec 20 01:07:39 PM PST 23 |
6451291104 ps |
| T643 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.195393277 |
|
|
Dec 20 01:05:04 PM PST 23 |
Dec 20 01:06:47 PM PST 23 |
738119279 ps |
| T644 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2561020395 |
|
|
Dec 20 01:04:56 PM PST 23 |
Dec 20 01:05:34 PM PST 23 |
639979225 ps |
| T645 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.881168784 |
|
|
Dec 20 01:05:11 PM PST 23 |
Dec 20 01:10:44 PM PST 23 |
4818733910 ps |
| T646 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.1374780529 |
|
|
Dec 20 01:06:10 PM PST 23 |
Dec 20 01:09:41 PM PST 23 |
4814629080 ps |
| T647 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.2084473797 |
|
|
Dec 20 01:06:43 PM PST 23 |
Dec 20 01:08:51 PM PST 23 |
739418861 ps |
| T648 |
/workspace/coverage/default/19.sram_ctrl_stress_all.3832745570 |
|
|
Dec 20 01:05:39 PM PST 23 |
Dec 20 01:52:45 PM PST 23 |
169541209666 ps |
| T649 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1116045374 |
|
|
Dec 20 01:06:12 PM PST 23 |
Dec 20 01:35:58 PM PST 23 |
372881664 ps |
| T650 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.473631837 |
|
|
Dec 20 01:05:43 PM PST 23 |
Dec 20 01:56:52 PM PST 23 |
229474390 ps |
| T651 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3464209345 |
|
|
Dec 20 01:06:54 PM PST 23 |
Dec 20 01:09:42 PM PST 23 |
23260241172 ps |
| T652 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1642713651 |
|
|
Dec 20 01:06:01 PM PST 23 |
Dec 20 01:09:26 PM PST 23 |
19454161887 ps |
| T653 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2244304365 |
|
|
Dec 20 01:07:19 PM PST 23 |
Dec 20 01:41:58 PM PST 23 |
274820103 ps |
| T654 |
/workspace/coverage/default/43.sram_ctrl_bijection.2169710221 |
|
|
Dec 20 01:06:42 PM PST 23 |
Dec 20 01:32:18 PM PST 23 |
23161039823 ps |
| T655 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1234926190 |
|
|
Dec 20 01:04:58 PM PST 23 |
Dec 20 01:05:32 PM PST 23 |
353007179 ps |
| T656 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2860077477 |
|
|
Dec 20 01:06:06 PM PST 23 |
Dec 20 01:06:21 PM PST 23 |
357764826 ps |
| T657 |
/workspace/coverage/default/49.sram_ctrl_partial_access.2799957558 |
|
|
Dec 20 01:06:57 PM PST 23 |
Dec 20 01:07:35 PM PST 23 |
1441654930 ps |
| T658 |
/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1958085407 |
|
|
Dec 20 01:06:25 PM PST 23 |
Dec 20 01:07:31 PM PST 23 |
2272072987 ps |
| T659 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1345738986 |
|
|
Dec 20 01:05:32 PM PST 23 |
Dec 20 01:19:52 PM PST 23 |
119702773022 ps |
| T660 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3560242300 |
|
|
Dec 20 01:06:33 PM PST 23 |
Dec 20 01:09:40 PM PST 23 |
35868429717 ps |
| T661 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.2765911013 |
|
|
Dec 20 01:06:41 PM PST 23 |
Dec 20 01:22:20 PM PST 23 |
40450797623 ps |
| T662 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1411218361 |
|
|
Dec 20 01:06:16 PM PST 23 |
Dec 20 01:06:49 PM PST 23 |
1225912677 ps |
| T663 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.2281534597 |
|
|
Dec 20 01:06:17 PM PST 23 |
Dec 20 01:14:29 PM PST 23 |
40446660439 ps |
| T664 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.4187226043 |
|
|
Dec 20 01:05:12 PM PST 23 |
Dec 20 01:10:20 PM PST 23 |
14510030538 ps |
| T665 |
/workspace/coverage/default/35.sram_ctrl_bijection.2128196465 |
|
|
Dec 20 01:06:13 PM PST 23 |
Dec 20 01:25:57 PM PST 23 |
17738017839 ps |
| T666 |
/workspace/coverage/default/35.sram_ctrl_smoke.2134341942 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:06:53 PM PST 23 |
1841983731 ps |
| T667 |
/workspace/coverage/default/21.sram_ctrl_alert_test.2470608078 |
|
|
Dec 20 01:05:50 PM PST 23 |
Dec 20 01:06:06 PM PST 23 |
117204410 ps |
| T668 |
/workspace/coverage/default/24.sram_ctrl_smoke.3814305091 |
|
|
Dec 20 01:05:45 PM PST 23 |
Dec 20 01:08:12 PM PST 23 |
967857704 ps |
| T669 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1070790674 |
|
|
Dec 20 01:05:15 PM PST 23 |
Dec 20 01:11:56 PM PST 23 |
52604207801 ps |
| T670 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.2876434428 |
|
|
Dec 20 01:06:13 PM PST 23 |
Dec 20 01:11:43 PM PST 23 |
44898770473 ps |
| T671 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.2942469612 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:06:27 PM PST 23 |
2596003316 ps |
| T672 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.719432021 |
|
|
Dec 20 01:05:29 PM PST 23 |
Dec 20 01:07:55 PM PST 23 |
756236496 ps |
| T673 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1889085679 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:35:44 PM PST 23 |
1584724184 ps |
| T674 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.632131559 |
|
|
Dec 20 01:05:17 PM PST 23 |
Dec 20 01:59:54 PM PST 23 |
1229658728 ps |
| T675 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2254788155 |
|
|
Dec 20 01:05:24 PM PST 23 |
Dec 20 01:06:34 PM PST 23 |
754314821 ps |
| T676 |
/workspace/coverage/default/0.sram_ctrl_executable.1586576196 |
|
|
Dec 20 01:05:02 PM PST 23 |
Dec 20 01:06:02 PM PST 23 |
2890010022 ps |
| T677 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1671287035 |
|
|
Dec 20 01:05:19 PM PST 23 |
Dec 20 01:10:01 PM PST 23 |
17991071246 ps |
| T678 |
/workspace/coverage/default/17.sram_ctrl_bijection.765030657 |
|
|
Dec 20 01:05:31 PM PST 23 |
Dec 20 01:43:53 PM PST 23 |
655406244499 ps |
| T679 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2614906721 |
|
|
Dec 20 01:06:49 PM PST 23 |
Dec 20 01:25:36 PM PST 23 |
6014274060 ps |
| T680 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.703434629 |
|
|
Dec 20 01:06:10 PM PST 23 |
Dec 20 01:07:39 PM PST 23 |
22038826785 ps |
| T681 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.3966786621 |
|
|
Dec 20 01:05:34 PM PST 23 |
Dec 20 01:06:03 PM PST 23 |
1406953914 ps |
| T682 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3676697789 |
|
|
Dec 20 01:05:24 PM PST 23 |
Dec 20 01:11:01 PM PST 23 |
200259321404 ps |
| T683 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.754912787 |
|
|
Dec 20 01:05:14 PM PST 23 |
Dec 20 01:08:52 PM PST 23 |
36875010167 ps |
| T684 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1304385165 |
|
|
Dec 20 01:05:20 PM PST 23 |
Dec 20 01:05:45 PM PST 23 |
1686316292 ps |
| T685 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.832428702 |
|
|
Dec 20 01:06:17 PM PST 23 |
Dec 20 01:14:07 PM PST 23 |
5502745524 ps |
| T686 |
/workspace/coverage/default/34.sram_ctrl_bijection.475601340 |
|
|
Dec 20 01:06:17 PM PST 23 |
Dec 20 01:24:14 PM PST 23 |
62482517381 ps |
| T687 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.2299140942 |
|
|
Dec 20 01:05:27 PM PST 23 |
Dec 20 01:08:18 PM PST 23 |
17360070006 ps |
| T688 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.1396204156 |
|
|
Dec 20 01:05:31 PM PST 23 |
Dec 20 01:05:54 PM PST 23 |
4176594954 ps |
| T689 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.1322493231 |
|
|
Dec 20 01:06:15 PM PST 23 |
Dec 20 01:12:20 PM PST 23 |
4957798022 ps |
| T690 |
/workspace/coverage/default/25.sram_ctrl_alert_test.1776470060 |
|
|
Dec 20 01:05:52 PM PST 23 |
Dec 20 01:06:08 PM PST 23 |
18980492 ps |
| T691 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.986856994 |
|
|
Dec 20 01:06:43 PM PST 23 |
Dec 20 01:21:42 PM PST 23 |
24401533448 ps |
| T692 |
/workspace/coverage/default/48.sram_ctrl_partial_access.940063731 |
|
|
Dec 20 01:06:58 PM PST 23 |
Dec 20 01:09:23 PM PST 23 |
4412731670 ps |
| T693 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2737574503 |
|
|
Dec 20 01:05:42 PM PST 23 |
Dec 20 01:08:12 PM PST 23 |
1620326607 ps |
| T694 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.2354768450 |
|
|
Dec 20 01:06:04 PM PST 23 |
Dec 20 01:18:53 PM PST 23 |
32413088530 ps |
| T695 |
/workspace/coverage/default/7.sram_ctrl_partial_access.1549080351 |
|
|
Dec 20 01:04:56 PM PST 23 |
Dec 20 01:05:59 PM PST 23 |
1767255212 ps |
| T696 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.3478200987 |
|
|
Dec 20 01:04:51 PM PST 23 |
Dec 20 01:07:08 PM PST 23 |
806897572 ps |
| T697 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.748812713 |
|
|
Dec 20 01:06:31 PM PST 23 |
Dec 20 01:14:49 PM PST 23 |
28979917077 ps |
| T698 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1743635531 |
|
|
Dec 20 01:05:29 PM PST 23 |
Dec 20 01:09:50 PM PST 23 |
11114755974 ps |
| T699 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.1147076668 |
|
|
Dec 20 01:05:29 PM PST 23 |
Dec 20 01:07:46 PM PST 23 |
10083757817 ps |
| T700 |
/workspace/coverage/default/20.sram_ctrl_bijection.3271502211 |
|
|
Dec 20 01:05:41 PM PST 23 |
Dec 20 01:28:05 PM PST 23 |
41532278780 ps |
| T701 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.3101873946 |
|
|
Dec 20 01:05:44 PM PST 23 |
Dec 20 01:07:49 PM PST 23 |
1543938583 ps |
| T702 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1453196268 |
|
|
Dec 20 01:05:41 PM PST 23 |
Dec 20 01:11:52 PM PST 23 |
5989459168 ps |
| T703 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2904409486 |
|
|
Dec 20 01:07:08 PM PST 23 |
Dec 20 01:08:48 PM PST 23 |
2453035379 ps |
| T704 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3876590080 |
|
|
Dec 20 01:05:51 PM PST 23 |
Dec 20 01:11:02 PM PST 23 |
24380978906 ps |
| T705 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1680596890 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:14:19 PM PST 23 |
80524283991 ps |
| T706 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.849291588 |
|
|
Dec 20 01:05:24 PM PST 23 |
Dec 20 01:06:12 PM PST 23 |
5603614358 ps |
| T707 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.2814515338 |
|
|
Dec 20 01:06:09 PM PST 23 |
Dec 20 01:12:55 PM PST 23 |
20187186843 ps |
| T708 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3838217448 |
|
|
Dec 20 01:07:00 PM PST 23 |
Dec 20 01:12:27 PM PST 23 |
21999869727 ps |
| T709 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1373654755 |
|
|
Dec 20 01:06:12 PM PST 23 |
Dec 20 01:07:34 PM PST 23 |
758574678 ps |
| T710 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.941690970 |
|
|
Dec 20 01:04:58 PM PST 23 |
Dec 20 01:11:24 PM PST 23 |
19726454095 ps |
| T711 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.3723691161 |
|
|
Dec 20 01:06:04 PM PST 23 |
Dec 20 01:08:22 PM PST 23 |
12161254186 ps |
| T712 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2310759726 |
|
|
Dec 20 01:05:16 PM PST 23 |
Dec 20 01:05:51 PM PST 23 |
353925912 ps |
| T713 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4256104769 |
|
|
Dec 20 01:07:08 PM PST 23 |
Dec 20 01:08:28 PM PST 23 |
3042203708 ps |
| T714 |
/workspace/coverage/default/25.sram_ctrl_regwen.2695141137 |
|
|
Dec 20 01:06:06 PM PST 23 |
Dec 20 01:21:36 PM PST 23 |
100737517330 ps |
| T715 |
/workspace/coverage/default/14.sram_ctrl_executable.2170091288 |
|
|
Dec 20 01:05:26 PM PST 23 |
Dec 20 01:19:26 PM PST 23 |
37783721572 ps |
| T716 |
/workspace/coverage/default/5.sram_ctrl_alert_test.3574519921 |
|
|
Dec 20 01:05:22 PM PST 23 |
Dec 20 01:05:42 PM PST 23 |
15039979 ps |
| T717 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1090486924 |
|
|
Dec 20 01:04:58 PM PST 23 |
Dec 20 01:07:26 PM PST 23 |
3611308686 ps |
| T718 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.95174580 |
|
|
Dec 20 01:05:01 PM PST 23 |
Dec 20 01:18:15 PM PST 23 |
5049663079 ps |
| T719 |
/workspace/coverage/default/37.sram_ctrl_stress_all.176595469 |
|
|
Dec 20 01:06:14 PM PST 23 |
Dec 20 01:46:43 PM PST 23 |
168405774057 ps |
| T720 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2328681187 |
|
|
Dec 20 01:06:05 PM PST 23 |
Dec 20 01:10:27 PM PST 23 |
4106530434 ps |
| T721 |
/workspace/coverage/default/32.sram_ctrl_smoke.2465785250 |
|
|
Dec 20 01:06:05 PM PST 23 |
Dec 20 01:06:50 PM PST 23 |
1828553015 ps |
| T722 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.232136174 |
|
|
Dec 20 01:06:47 PM PST 23 |
Dec 20 01:11:48 PM PST 23 |
14338387830 ps |
| T723 |
/workspace/coverage/default/43.sram_ctrl_alert_test.137107912 |
|
|
Dec 20 01:06:46 PM PST 23 |
Dec 20 01:07:15 PM PST 23 |
40592271 ps |
| T724 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3703445086 |
|
|
Dec 20 01:06:04 PM PST 23 |
Dec 20 01:07:29 PM PST 23 |
2621721833 ps |
| T725 |
/workspace/coverage/default/34.sram_ctrl_regwen.2262347947 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:19:11 PM PST 23 |
11295887465 ps |
| T726 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3724354406 |
|
|
Dec 20 01:06:53 PM PST 23 |
Dec 20 01:37:19 PM PST 23 |
3436297063 ps |
| T727 |
/workspace/coverage/default/19.sram_ctrl_bijection.1622393767 |
|
|
Dec 20 01:05:36 PM PST 23 |
Dec 20 01:14:46 PM PST 23 |
105681230732 ps |
| T728 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2596827516 |
|
|
Dec 20 01:04:58 PM PST 23 |
Dec 20 01:07:27 PM PST 23 |
3730707876 ps |
| T729 |
/workspace/coverage/default/5.sram_ctrl_regwen.4104884923 |
|
|
Dec 20 01:05:02 PM PST 23 |
Dec 20 01:17:05 PM PST 23 |
6424629380 ps |
| T730 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.3446340325 |
|
|
Dec 20 01:06:41 PM PST 23 |
Dec 20 01:07:18 PM PST 23 |
1407947854 ps |
| T731 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2027937484 |
|
|
Dec 20 01:05:20 PM PST 23 |
Dec 20 01:05:47 PM PST 23 |
2094893464 ps |
| T732 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3240240610 |
|
|
Dec 20 01:05:24 PM PST 23 |
Dec 20 02:07:10 PM PST 23 |
676791102 ps |
| T733 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.54535298 |
|
|
Dec 20 01:04:48 PM PST 23 |
Dec 20 01:05:21 PM PST 23 |
1354700396 ps |
| T734 |
/workspace/coverage/default/24.sram_ctrl_alert_test.25260082 |
|
|
Dec 20 01:05:55 PM PST 23 |
Dec 20 01:06:10 PM PST 23 |
19018876 ps |
| T735 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1552734766 |
|
|
Dec 20 01:05:59 PM PST 23 |
Dec 20 02:20:33 PM PST 23 |
429405365531 ps |
| T736 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1668764076 |
|
|
Dec 20 01:05:34 PM PST 23 |
Dec 20 01:07:49 PM PST 23 |
822476106 ps |
| T737 |
/workspace/coverage/default/7.sram_ctrl_bijection.1692266082 |
|
|
Dec 20 01:05:13 PM PST 23 |
Dec 20 01:45:17 PM PST 23 |
632079107733 ps |
| T738 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1551227255 |
|
|
Dec 20 01:05:00 PM PST 23 |
Dec 20 01:05:40 PM PST 23 |
4177748009 ps |
| T739 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3403072161 |
|
|
Dec 20 01:05:38 PM PST 23 |
Dec 20 01:18:30 PM PST 23 |
6789379815 ps |
| T740 |
/workspace/coverage/default/26.sram_ctrl_alert_test.1550776418 |
|
|
Dec 20 01:05:50 PM PST 23 |
Dec 20 01:06:07 PM PST 23 |
31045848 ps |
| T741 |
/workspace/coverage/default/24.sram_ctrl_regwen.1767578253 |
|
|
Dec 20 01:05:52 PM PST 23 |
Dec 20 01:22:56 PM PST 23 |
38797758404 ps |
| T742 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.3503063501 |
|
|
Dec 20 01:05:43 PM PST 23 |
Dec 20 01:12:22 PM PST 23 |
6180021893 ps |
| T743 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1629769846 |
|
|
Dec 20 01:05:39 PM PST 23 |
Dec 20 01:05:55 PM PST 23 |
16728121 ps |
| T744 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.2153142290 |
|
|
Dec 20 01:05:25 PM PST 23 |
Dec 20 01:20:48 PM PST 23 |
12235167726 ps |
| T745 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2499348550 |
|
|
Dec 20 01:05:50 PM PST 23 |
Dec 20 01:11:29 PM PST 23 |
4382370686 ps |
| T746 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3954814481 |
|
|
Dec 20 01:06:06 PM PST 23 |
Dec 20 01:07:20 PM PST 23 |
7639251601 ps |
| T747 |
/workspace/coverage/default/48.sram_ctrl_alert_test.720585564 |
|
|
Dec 20 01:07:04 PM PST 23 |
Dec 20 01:07:28 PM PST 23 |
10665817 ps |
| T748 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1090262183 |
|
|
Dec 20 01:05:03 PM PST 23 |
Dec 20 01:16:07 PM PST 23 |
17922149147 ps |
| T749 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.231049765 |
|
|
Dec 20 01:05:08 PM PST 23 |
Dec 20 01:06:14 PM PST 23 |
3001691623 ps |
| T750 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.3391990626 |
|
|
Dec 20 01:06:43 PM PST 23 |
Dec 20 01:13:57 PM PST 23 |
21094648647 ps |
| T751 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1692755649 |
|
|
Dec 20 01:06:47 PM PST 23 |
Dec 20 01:11:23 PM PST 23 |
16412943757 ps |
| T752 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3261430860 |
|
|
Dec 20 01:06:11 PM PST 23 |
Dec 20 01:08:45 PM PST 23 |
1655780914 ps |