Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14944082	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

134072184

1

T1

134975

T2

147580

T3

9772

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	73160526	1			T1	74486		T2	81116		T3	1757
values[0x0]	36448565	1			T1	35648		T2	38918		T3	4105
values[0x1]	39407175	1			T1	38361		T2	42336		T3	3951

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7614301	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

141401965

1

T1

141771

T2

155107

T3

9796

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	443426	1			T2	588		T3	44		T9	120
valid_sources[0x01]	502527	1			T2	696		T3	29		T9	125
valid_sources[0x02]	459110	1			T2	730		T3	41		T9	122
valid_sources[0x03]	459758	1			T2	532		T3	35		T9	131
valid_sources[0x04]	478931	1			T2	520		T3	30		T9	129
valid_sources[0x05]	485757	1			T2	702		T3	37		T9	147
valid_sources[0x06]	662270	1			T2	606		T3	48		T9	132
valid_sources[0x07]	475526	1			T2	623		T3	31		T9	96
valid_sources[0x08]	546027	1			T1	5689		T2	782		T3	44
valid_sources[0x09]	493653	1			T1	24455		T2	632		T3	34
valid_sources[0x0a]	485690	1			T2	519		T3	32		T9	150
valid_sources[0x0b]	456836	1			T2	592		T3	25		T9	118
valid_sources[0x0c]	707588	1			T2	622		T3	23		T9	104
valid_sources[0x0d]	473278	1			T2	702		T3	40		T9	113
valid_sources[0x0e]	473225	1			T2	591		T3	30		T9	126
valid_sources[0x0f]	440442	1			T2	663		T3	28		T9	143
valid_sources[0x10]	456981	1			T2	641		T3	38		T9	135
valid_sources[0x11]	524907	1			T2	629		T3	33		T9	134
valid_sources[0x12]	463965	1			T2	663		T3	26		T9	91
valid_sources[0x13]	662248	1			T2	592		T3	48		T9	112
valid_sources[0x14]	506354	1			T2	689		T3	37		T9	144
valid_sources[0x15]	522703	1			T2	576		T3	54		T9	143
valid_sources[0x16]	524429	1			T2	538		T3	43		T9	118
valid_sources[0x17]	466302	1			T2	577		T3	43		T9	113
valid_sources[0x18]	484502	1			T2	609		T3	45		T9	111
valid_sources[0x19]	485967	1			T1	502		T2	618		T3	42
valid_sources[0x1a]	439445	1			T2	640		T3	43		T9	148
valid_sources[0x1b]	462293	1			T2	626		T3	28		T9	136
valid_sources[0x1c]	464418	1			T2	602		T3	37		T9	95
valid_sources[0x1d]	446993	1			T2	605		T3	37		T9	136
valid_sources[0x1e]	3612929	1			T2	624		T3	33		T9	111
valid_sources[0x1f]	499089	1			T2	566		T3	42		T9	138
valid_sources[0x20]	499375	1			T2	637		T3	37		T9	129
valid_sources[0x21]	459943	1			T2	620		T3	35		T9	144
valid_sources[0x22]	483239	1			T2	612		T3	39		T9	154
valid_sources[0x23]	501433	1			T2	512		T3	28		T9	107
valid_sources[0x24]	442161	1			T2	492		T3	35		T9	129
valid_sources[0x25]	498677	1			T2	683		T3	33		T9	120
valid_sources[0x26]	535043	1			T2	744		T3	34		T9	129
valid_sources[0x27]	489984	1			T2	656		T3	41		T9	131
valid_sources[0x28]	455638	1			T2	636		T3	34		T9	112
valid_sources[0x29]	445114	1			T2	681		T3	31		T9	130
valid_sources[0x2a]	578347	1			T1	1505		T2	569		T3	26
valid_sources[0x2b]	465273	1			T2	552		T3	33		T9	118
valid_sources[0x2c]	1169218	1			T2	672		T3	39		T9	114
valid_sources[0x2d]	557545	1			T2	645		T3	45		T9	140
valid_sources[0x2e]	481932	1			T2	504		T3	34		T9	131
valid_sources[0x2f]	456168	1			T2	625		T3	52		T9	137
valid_sources[0x30]	465312	1			T2	599		T3	30		T9	136
valid_sources[0x31]	491093	1			T2	689		T3	41		T9	115
valid_sources[0x32]	491112	1			T2	672		T3	41		T9	127
valid_sources[0x33]	520461	1			T2	770		T3	49		T9	100
valid_sources[0x34]	504114	1			T2	641		T3	42		T9	82
valid_sources[0x35]	465596	1			T2	615		T3	50		T9	133
valid_sources[0x36]	506575	1			T2	527		T3	44		T9	143
valid_sources[0x37]	445708	1			T2	691		T3	40		T9	119
valid_sources[0x38]	653605	1			T2	608		T3	42		T9	113
valid_sources[0x39]	480495	1			T2	590		T3	44		T9	117
valid_sources[0x3a]	1667671	1			T2	591		T3	40		T9	107
valid_sources[0x3b]	444401	1			T2	735		T3	34		T9	113
valid_sources[0x3c]	816736	1			T2	635		T3	37		T9	118
valid_sources[0x3d]	448104	1			T2	741		T3	35		T9	109
valid_sources[0x3e]	443806	1			T2	585		T3	30		T9	166
valid_sources[0x3f]	491208	1			T2	739		T3	40		T9	114
valid_sources[0x40]	454010	1			T2	607		T3	64		T9	118
valid_sources[0x41]	472932	1			T2	576		T3	29		T9	137
valid_sources[0x42]	494252	1			T1	24546		T2	752		T3	40
valid_sources[0x43]	445140	1			T2	714		T3	27		T9	130
valid_sources[0x44]	471152	1			T2	604		T3	36		T9	97
valid_sources[0x45]	467772	1			T2	684		T3	22		T9	140
valid_sources[0x46]	651566	1			T2	618		T3	37		T9	112
valid_sources[0x47]	480020	1			T2	721		T3	35		T9	116
valid_sources[0x48]	446732	1			T2	670		T3	37		T9	146
valid_sources[0x49]	472734	1			T2	657		T3	35		T9	133
valid_sources[0x4a]	460104	1			T2	547		T3	30		T9	128
valid_sources[0x4b]	459563	1			T2	664		T3	39		T9	115
valid_sources[0x4c]	557554	1			T2	680		T3	34		T9	139
valid_sources[0x4d]	487860	1			T2	612		T3	39		T9	127
valid_sources[0x4e]	472506	1			T2	571		T3	39		T9	102
valid_sources[0x4f]	461065	1			T2	622		T3	36		T9	148
valid_sources[0x50]	476650	1			T2	678		T3	53		T9	116
valid_sources[0x51]	467282	1			T2	583		T3	45		T9	111
valid_sources[0x52]	1479242	1			T2	560		T3	39		T9	106
valid_sources[0x53]	447799	1			T2	540		T3	50		T9	124
valid_sources[0x54]	478205	1			T2	583		T3	48		T9	120
valid_sources[0x55]	1194559	1			T2	602		T3	40		T9	109
valid_sources[0x56]	536729	1			T2	799		T3	33		T9	126
valid_sources[0x57]	1587253	1			T2	661		T3	36		T9	126
valid_sources[0x58]	498258	1			T2	599		T3	38		T9	123
valid_sources[0x59]	474490	1			T2	632		T3	44		T9	129
valid_sources[0x5a]	454988	1			T2	642		T3	45		T9	130
valid_sources[0x5b]	476827	1			T2	659		T3	50		T9	127
valid_sources[0x5c]	456478	1			T2	731		T3	50		T9	104
valid_sources[0x5d]	1529662	1			T2	659		T3	33		T9	112
valid_sources[0x5e]	454544	1			T2	657		T3	43		T9	145
valid_sources[0x5f]	441027	1			T2	714		T3	36		T9	122
valid_sources[0x60]	475588	1			T2	577		T3	39		T9	128
valid_sources[0x61]	537283	1			T2	708		T3	41		T9	124
valid_sources[0x62]	454164	1			T2	631		T3	29		T9	107
valid_sources[0x63]	442282	1			T2	645		T3	43		T9	121
valid_sources[0x64]	440618	1			T2	527		T3	39		T9	112
valid_sources[0x65]	477738	1			T2	501		T3	26		T9	95
valid_sources[0x66]	1384508	1			T2	626		T3	28		T9	116
valid_sources[0x67]	568661	1			T2	452		T3	32		T9	115
valid_sources[0x68]	533611	1			T2	532		T3	34		T9	110
valid_sources[0x69]	502239	1			T1	1094		T2	682		T3	39
valid_sources[0x6a]	446413	1			T2	687		T3	30		T9	127
valid_sources[0x6b]	2034372	1			T2	587		T3	31		T9	141
valid_sources[0x6c]	469359	1			T1	5492		T2	607		T3	43
valid_sources[0x6d]	459797	1			T2	645		T3	41		T9	123
valid_sources[0x6e]	468255	1			T2	631		T3	44		T9	148
valid_sources[0x6f]	458309	1			T1	3787		T2	602		T3	40
valid_sources[0x70]	500192	1			T2	669		T3	41		T9	124
valid_sources[0x71]	538997	1			T2	817		T3	25		T9	120
valid_sources[0x72]	463638	1			T2	623		T3	38		T9	132
valid_sources[0x73]	524820	1			T2	625		T3	35		T9	130
valid_sources[0x74]	486749	1			T2	614		T3	28		T9	112
valid_sources[0x75]	443744	1			T2	511		T3	33		T9	126
valid_sources[0x76]	465667	1			T2	643		T3	32		T9	111
valid_sources[0x77]	479542	1			T2	571		T3	31		T9	133
valid_sources[0x78]	712369	1			T2	637		T3	33		T9	140
valid_sources[0x79]	471995	1			T2	714		T3	41		T9	131
valid_sources[0x7a]	477841	1			T2	724		T3	35		T9	145
valid_sources[0x7b]	453683	1			T1	7592		T2	633		T3	35
valid_sources[0x7c]	507208	1			T2	527		T3	44		T9	136
valid_sources[0x7d]	451151	1			T2	595		T3	32		T9	100
valid_sources[0x7e]	485706	1			T2	577		T3	37		T9	107
valid_sources[0x7f]	500226	1			T2	650		T3	37		T9	109
valid_sources[0x80]	1062906	1			T2	765		T3	43		T9	106

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

65644833

1

T1

67599

T2

73700

T3

1741

values[0x0]

all_enables

biggest_size

34220538

1

T1

33647

T2

36806

T3

4099

values[0x1]

all_enables

biggest_size

34206813

1

T1

33729

T2

37074

T3

3932

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46412133	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

131721

1

T1

5

T2

9

T3

3245

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	46430774	1			T1	70196		T2	278681		T3	10894
values[0x0]	54989	1			T1	13		T2	19		T3	1221
values[0x1]	58091	1			T1	9		T2	15		T3	1288

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30945229	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

15598625

1

T1

23455

T2

93061

T3

6691

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	144603	1			T1	303		T2	1205		T3	90
valid_sources[0x01]	250295	1			T1	274		T2	1125		T3	92
valid_sources[0x02]	142121	1			T1	285		T2	1076		T3	35
valid_sources[0x03]	144404	1			T1	298		T2	1060		T3	34
valid_sources[0x04]	143981	1			T1	293		T2	1052		T3	34
valid_sources[0x05]	147664	1			T1	258		T2	1051		T3	75
valid_sources[0x06]	145557	1			T1	284		T2	1100		T3	18
valid_sources[0x07]	142745	1			T1	262		T2	1128		T3	60
valid_sources[0x08]	258083	1			T1	299		T2	1081		T3	63
valid_sources[0x09]	142901	1			T1	298		T2	1144		T3	74
valid_sources[0x0a]	160992	1			T1	258		T2	1093		T3	38
valid_sources[0x0b]	192431	1			T1	281		T2	1093		T3	27
valid_sources[0x0c]	146241	1			T1	279		T2	1090		T3	58
valid_sources[0x0d]	146565	1			T1	267		T2	1114		T3	60
valid_sources[0x0e]	145266	1			T1	264		T2	1033		T3	28
valid_sources[0x0f]	141648	1			T1	239		T2	1070		T3	64
valid_sources[0x10]	144911	1			T1	306		T2	1064		T3	69
valid_sources[0x11]	146805	1			T1	278		T2	1078		T3	65
valid_sources[0x12]	143596	1			T1	260		T2	1105		T3	68
valid_sources[0x13]	143608	1			T1	265		T2	1057		T3	46
valid_sources[0x14]	158779	1			T1	279		T2	1104		T3	54
valid_sources[0x15]	301471	1			T1	250		T2	1074		T3	55
valid_sources[0x16]	175932	1			T1	301		T2	1013		T3	84
valid_sources[0x17]	261155	1			T1	286		T2	1053		T3	69
valid_sources[0x18]	226280	1			T1	232		T2	1064		T3	77
valid_sources[0x19]	160268	1			T1	240		T2	1034		T3	37
valid_sources[0x1a]	209192	1			T1	282		T2	1081		T3	87
valid_sources[0x1b]	209191	1			T1	247		T2	1073		T3	31
valid_sources[0x1c]	142741	1			T1	319		T2	1061		T3	87
valid_sources[0x1d]	144185	1			T1	279		T2	1111		T3	72
valid_sources[0x1e]	176573	1			T1	260		T2	1106		T3	97
valid_sources[0x1f]	161497	1			T1	246		T2	1078		T3	39
valid_sources[0x20]	218833	1			T1	264		T2	1141		T3	84
valid_sources[0x21]	193967	1			T1	261		T2	1087		T3	50
valid_sources[0x22]	147026	1			T1	224		T2	1093		T3	37
valid_sources[0x23]	143477	1			T1	269		T2	1120		T3	46
valid_sources[0x24]	208090	1			T1	259		T2	1126		T3	95
valid_sources[0x25]	159618	1			T1	305		T2	1113		T3	61
valid_sources[0x26]	145891	1			T1	303		T2	1100		T3	82
valid_sources[0x27]	141915	1			T1	272		T2	1102		T3	18
valid_sources[0x28]	159754	1			T1	258		T2	1074		T3	47
valid_sources[0x29]	180503	1			T1	280		T2	1124		T3	26
valid_sources[0x2a]	158780	1			T1	265		T2	1070		T3	40
valid_sources[0x2b]	145816	1			T1	265		T2	1063		T3	98
valid_sources[0x2c]	143337	1			T1	310		T2	1086		T3	33
valid_sources[0x2d]	153077	1			T1	273		T2	1055		T3	33
valid_sources[0x2e]	200378	1			T1	315		T2	1114		T3	46
valid_sources[0x2f]	145864	1			T1	260		T2	1031		T3	79
valid_sources[0x30]	180404	1			T1	279		T2	1054		T3	32
valid_sources[0x31]	192866	1			T1	247		T2	1154		T3	80
valid_sources[0x32]	141218	1			T1	244		T2	1074		T3	28
valid_sources[0x33]	150611	1			T1	298		T2	1061		T3	32
valid_sources[0x34]	143692	1			T1	230		T2	1085		T3	48
valid_sources[0x35]	198509	1			T1	251		T2	1042		T3	45
valid_sources[0x36]	197850	1			T1	257		T2	1115		T3	55
valid_sources[0x37]	243295	1			T1	257		T2	1132		T3	39
valid_sources[0x38]	145915	1			T1	275		T2	1036		T3	45
valid_sources[0x39]	144411	1			T1	275		T2	1179		T3	75
valid_sources[0x3a]	142881	1			T1	281		T2	1063		T3	85
valid_sources[0x3b]	157837	1			T1	316		T2	1031		T3	64
valid_sources[0x3c]	181668	1			T1	280		T2	1097		T3	27
valid_sources[0x3d]	254259	1			T1	305		T2	1100		T3	65
valid_sources[0x3e]	176421	1			T1	269		T2	1065		T3	41
valid_sources[0x3f]	142721	1			T1	275		T2	1007		T3	94
valid_sources[0x40]	423632	1			T1	243		T2	1021		T3	40
valid_sources[0x41]	159418	1			T1	300		T2	1067		T3	66
valid_sources[0x42]	159018	1			T1	239		T2	1127		T3	64
valid_sources[0x43]	236885	1			T1	217		T2	1062		T3	44
valid_sources[0x44]	145630	1			T1	258		T2	1128		T3	51
valid_sources[0x45]	154673	1			T1	282		T2	1087		T3	20
valid_sources[0x46]	142736	1			T1	294		T2	1121		T3	47
valid_sources[0x47]	148939	1			T1	299		T2	1040		T3	36
valid_sources[0x48]	143544	1			T1	256		T2	1101		T3	58
valid_sources[0x49]	192612	1			T1	251		T2	1115		T3	60
valid_sources[0x4a]	175828	1			T1	276		T2	1068		T3	66
valid_sources[0x4b]	161480	1			T1	314		T2	1027		T3	50
valid_sources[0x4c]	161028	1			T1	298		T2	1137		T3	64
valid_sources[0x4d]	414264	1			T1	299		T2	1083		T3	47
valid_sources[0x4e]	146625	1			T1	305		T2	1092		T3	17
valid_sources[0x4f]	160632	1			T1	298		T2	1100		T3	90
valid_sources[0x50]	188657	1			T1	289		T2	1151		T3	20
valid_sources[0x51]	143221	1			T1	275		T2	1076		T3	40
valid_sources[0x52]	159981	1			T1	287		T2	1065		T3	53
valid_sources[0x53]	144306	1			T1	294		T2	1156		T3	47
valid_sources[0x54]	143018	1			T1	255		T2	1091		T3	29
valid_sources[0x55]	160728	1			T1	242		T2	1081		T3	64
valid_sources[0x56]	143735	1			T1	263		T2	1138		T3	37
valid_sources[0x57]	259108	1			T1	290		T2	1104		T3	71
valid_sources[0x58]	144087	1			T1	264		T2	1107		T3	74
valid_sources[0x59]	148754	1			T1	242		T2	1065		T3	83
valid_sources[0x5a]	144746	1			T1	309		T2	1129		T3	65
valid_sources[0x5b]	147091	1			T1	283		T2	1097		T3	39
valid_sources[0x5c]	151783	1			T1	312		T2	1102		T3	71
valid_sources[0x5d]	146065	1			T1	309		T2	1097		T3	67
valid_sources[0x5e]	226479	1			T1	276		T2	1098		T3	56
valid_sources[0x5f]	373912	1			T1	242		T2	1179		T3	20
valid_sources[0x60]	144694	1			T1	250		T2	1066		T3	87
valid_sources[0x61]	146880	1			T1	275		T2	1023		T3	15
valid_sources[0x62]	143455	1			T1	272		T2	1068		T3	48
valid_sources[0x63]	143760	1			T1	238		T2	1081		T3	87
valid_sources[0x64]	209558	1			T1	289		T2	1163		T3	65
valid_sources[0x65]	144078	1			T1	277		T2	1085		T3	18
valid_sources[0x66]	274142	1			T1	283		T2	1092		T3	46
valid_sources[0x67]	209262	1			T1	277		T2	1144		T3	76
valid_sources[0x68]	252673	1			T1	283		T2	1115		T3	35
valid_sources[0x69]	324607	1			T1	284		T2	1122		T3	19
valid_sources[0x6a]	143689	1			T1	273		T2	1102		T3	26
valid_sources[0x6b]	142548	1			T1	287		T2	1116		T3	58
valid_sources[0x6c]	142243	1			T1	271		T2	1131		T3	104
valid_sources[0x6d]	181839	1			T1	290		T2	1213		T3	43
valid_sources[0x6e]	144673	1			T1	233		T2	1060		T3	50
valid_sources[0x6f]	191317	1			T1	258		T2	1050		T3	65
valid_sources[0x70]	143397	1			T1	241		T2	1143		T3	56
valid_sources[0x71]	156838	1			T1	333		T2	1102		T3	49
valid_sources[0x72]	161865	1			T1	273		T2	1069		T3	70
valid_sources[0x73]	142939	1			T1	272		T2	1089		T3	68
valid_sources[0x74]	177016	1			T1	296		T2	1048		T3	83
valid_sources[0x75]	147023	1			T1	271		T2	1054		T3	53
valid_sources[0x76]	155217	1			T1	252		T2	1091		T3	37
valid_sources[0x77]	199864	1			T1	283		T2	1053		T3	16
valid_sources[0x78]	356192	1			T1	220		T2	1002		T3	46
valid_sources[0x79]	144641	1			T1	270		T2	1135		T3	55
valid_sources[0x7a]	143745	1			T1	300		T2	1036		T3	61
valid_sources[0x7b]	143792	1			T1	280		T2	1118		T3	55
valid_sources[0x7c]	148093	1			T1	287		T2	1082		T3	48
valid_sources[0x7d]	319043	1			T1	291		T2	1063		T3	69
valid_sources[0x7e]	323413	1			T1	324		T2	1082		T3	76
valid_sources[0x7f]	143702	1			T1	309		T2	1162		T3	41
valid_sources[0x80]	249915	1			T1	287		T2	1056		T3	57

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

35865

1

T3

858

T11

3

T13

10

values[0x0]

all_enables

biggest_size

48693

1

T1

3

T2

6

T3

1211

values[0x1]

all_enables

biggest_size

47163

1

T1

2

T2

3

T3

1176