| T504 |
/workspace/coverage/default/23.sram_ctrl_regwen.872531335 |
|
|
Dec 27 12:45:07 PM PST 23 |
Dec 27 12:56:35 PM PST 23 |
9581463939 ps |
| T505 |
/workspace/coverage/default/26.sram_ctrl_bijection.244063196 |
|
|
Dec 27 12:44:57 PM PST 23 |
Dec 27 01:03:55 PM PST 23 |
69153504087 ps |
| T506 |
/workspace/coverage/default/44.sram_ctrl_smoke.2703299460 |
|
|
Dec 27 12:45:25 PM PST 23 |
Dec 27 12:46:07 PM PST 23 |
3294621464 ps |
| T507 |
/workspace/coverage/default/24.sram_ctrl_bijection.1304085843 |
|
|
Dec 27 12:45:04 PM PST 23 |
Dec 27 01:12:13 PM PST 23 |
288102690617 ps |
| T508 |
/workspace/coverage/default/37.sram_ctrl_bijection.2990069686 |
|
|
Dec 27 12:45:40 PM PST 23 |
Dec 27 01:05:45 PM PST 23 |
99681824883 ps |
| T509 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.471380452 |
|
|
Dec 27 12:45:52 PM PST 23 |
Dec 27 12:49:23 PM PST 23 |
13068170989 ps |
| T510 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.2514956018 |
|
|
Dec 27 12:45:16 PM PST 23 |
Dec 27 12:46:36 PM PST 23 |
772085308 ps |
| T511 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.2932043844 |
|
|
Dec 27 12:44:10 PM PST 23 |
Dec 27 01:00:30 PM PST 23 |
46625086842 ps |
| T512 |
/workspace/coverage/default/12.sram_ctrl_smoke.1739167161 |
|
|
Dec 27 12:44:24 PM PST 23 |
Dec 27 12:44:52 PM PST 23 |
1097541273 ps |
| T513 |
/workspace/coverage/default/29.sram_ctrl_alert_test.4250863075 |
|
|
Dec 27 12:44:56 PM PST 23 |
Dec 27 12:45:05 PM PST 23 |
25009832 ps |
| T514 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3986105022 |
|
|
Dec 27 12:45:30 PM PST 23 |
Dec 27 12:47:55 PM PST 23 |
1547870064 ps |
| T515 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1599239223 |
|
|
Dec 27 12:44:47 PM PST 23 |
Dec 27 12:49:48 PM PST 23 |
11592116561 ps |
| T516 |
/workspace/coverage/default/40.sram_ctrl_partial_access.3113545317 |
|
|
Dec 27 12:45:27 PM PST 23 |
Dec 27 12:45:45 PM PST 23 |
2367664372 ps |
| T517 |
/workspace/coverage/default/49.sram_ctrl_partial_access.4039254352 |
|
|
Dec 27 12:45:30 PM PST 23 |
Dec 27 12:46:19 PM PST 23 |
971382352 ps |
| T518 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.915836824 |
|
|
Dec 27 12:44:20 PM PST 23 |
Dec 27 12:51:00 PM PST 23 |
9488285692 ps |
| T519 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3399350681 |
|
|
Dec 27 12:45:20 PM PST 23 |
Dec 27 02:18:38 PM PST 23 |
3016040282 ps |
| T520 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.785656623 |
|
|
Dec 27 12:44:34 PM PST 23 |
Dec 27 12:53:54 PM PST 23 |
26043597329 ps |
| T521 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.1631200480 |
|
|
Dec 27 12:45:06 PM PST 23 |
Dec 27 12:48:36 PM PST 23 |
2264827186 ps |
| T522 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1604078296 |
|
|
Dec 27 12:45:50 PM PST 23 |
Dec 27 02:28:18 PM PST 23 |
786002960 ps |
| T523 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2963952839 |
|
|
Dec 27 12:44:54 PM PST 23 |
Dec 27 12:49:03 PM PST 23 |
4111023829 ps |
| T524 |
/workspace/coverage/default/28.sram_ctrl_alert_test.3092101172 |
|
|
Dec 27 12:45:08 PM PST 23 |
Dec 27 12:45:14 PM PST 23 |
12368786 ps |
| T525 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2080514658 |
|
|
Dec 27 12:44:39 PM PST 23 |
Dec 27 01:49:47 PM PST 23 |
5589538500 ps |
| T526 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1495508963 |
|
|
Dec 27 12:45:06 PM PST 23 |
Dec 27 01:43:10 PM PST 23 |
254385635 ps |
| T527 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3400255133 |
|
|
Dec 27 12:45:29 PM PST 23 |
Dec 27 12:50:23 PM PST 23 |
14066806268 ps |
| T528 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3417484245 |
|
|
Dec 27 12:44:43 PM PST 23 |
Dec 27 12:46:26 PM PST 23 |
769369385 ps |
| T529 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1384434425 |
|
|
Dec 27 12:45:00 PM PST 23 |
Dec 27 12:47:07 PM PST 23 |
21549683931 ps |
| T530 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.162688339 |
|
|
Dec 27 12:45:44 PM PST 23 |
Dec 27 12:50:06 PM PST 23 |
4434361049 ps |
| T531 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.3739980497 |
|
|
Dec 27 12:45:26 PM PST 23 |
Dec 27 12:50:21 PM PST 23 |
8147194309 ps |
| T532 |
/workspace/coverage/default/2.sram_ctrl_regwen.1110285327 |
|
|
Dec 27 12:44:39 PM PST 23 |
Dec 27 12:51:44 PM PST 23 |
30070312896 ps |
| T533 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.464612743 |
|
|
Dec 27 12:45:09 PM PST 23 |
Dec 27 12:48:05 PM PST 23 |
68955852644 ps |
| T534 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.3635908716 |
|
|
Dec 27 12:45:25 PM PST 23 |
Dec 27 12:47:00 PM PST 23 |
34365328494 ps |
| T535 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.3388368146 |
|
|
Dec 27 12:45:19 PM PST 23 |
Dec 27 12:50:33 PM PST 23 |
275576859545 ps |
| T536 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.586071017 |
|
|
Dec 27 12:45:21 PM PST 23 |
Dec 27 12:45:45 PM PST 23 |
5608204337 ps |
| T537 |
/workspace/coverage/default/17.sram_ctrl_bijection.2038709222 |
|
|
Dec 27 12:44:37 PM PST 23 |
Dec 27 01:05:17 PM PST 23 |
76048442913 ps |
| T538 |
/workspace/coverage/default/34.sram_ctrl_bijection.3373366176 |
|
|
Dec 27 12:45:06 PM PST 23 |
Dec 27 01:26:32 PM PST 23 |
852664909756 ps |
| T539 |
/workspace/coverage/default/29.sram_ctrl_bijection.2032185459 |
|
|
Dec 27 12:44:51 PM PST 23 |
Dec 27 12:54:30 PM PST 23 |
62866245136 ps |
| T540 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.1684638429 |
|
|
Dec 27 12:44:44 PM PST 23 |
Dec 27 12:50:12 PM PST 23 |
9985369468 ps |
| T541 |
/workspace/coverage/default/15.sram_ctrl_bijection.2976945088 |
|
|
Dec 27 12:44:32 PM PST 23 |
Dec 27 01:03:08 PM PST 23 |
60007909919 ps |
| T542 |
/workspace/coverage/default/6.sram_ctrl_bijection.1511940181 |
|
|
Dec 27 12:44:47 PM PST 23 |
Dec 27 01:14:58 PM PST 23 |
74243988249 ps |
| T543 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.2730300917 |
|
|
Dec 27 12:45:13 PM PST 23 |
Dec 27 01:09:05 PM PST 23 |
37472135571 ps |
| T544 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4001789411 |
|
|
Dec 27 12:44:11 PM PST 23 |
Dec 27 12:54:04 PM PST 23 |
25935437558 ps |
| T545 |
/workspace/coverage/default/14.sram_ctrl_alert_test.1097669359 |
|
|
Dec 27 12:44:53 PM PST 23 |
Dec 27 12:45:01 PM PST 23 |
19916520 ps |
| T546 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.204932823 |
|
|
Dec 27 12:45:28 PM PST 23 |
Dec 27 01:21:01 PM PST 23 |
218807450 ps |
| T547 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.4196837802 |
|
|
Dec 27 12:44:59 PM PST 23 |
Dec 27 12:47:33 PM PST 23 |
5232354808 ps |
| T548 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.1917857104 |
|
|
Dec 27 12:45:15 PM PST 23 |
Dec 27 12:46:49 PM PST 23 |
20500417890 ps |
| T549 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3928407240 |
|
|
Dec 27 12:45:31 PM PST 23 |
Dec 27 12:50:17 PM PST 23 |
7448462603 ps |
| T550 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1759558730 |
|
|
Dec 27 12:44:20 PM PST 23 |
Dec 27 12:46:58 PM PST 23 |
27905694506 ps |
| T551 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3983226811 |
|
|
Dec 27 12:44:08 PM PST 23 |
Dec 27 01:04:47 PM PST 23 |
15821761580 ps |
| T552 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1148763064 |
|
|
Dec 27 12:44:55 PM PST 23 |
Dec 27 01:03:51 PM PST 23 |
8355929724 ps |
| T553 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.1623787794 |
|
|
Dec 27 12:44:50 PM PST 23 |
Dec 27 12:47:03 PM PST 23 |
2104153464 ps |
| T554 |
/workspace/coverage/default/33.sram_ctrl_alert_test.982974853 |
|
|
Dec 27 12:45:08 PM PST 23 |
Dec 27 12:45:15 PM PST 23 |
48101574 ps |
| T555 |
/workspace/coverage/default/42.sram_ctrl_stress_all.1739145769 |
|
|
Dec 27 12:45:10 PM PST 23 |
Dec 27 01:35:15 PM PST 23 |
328518230444 ps |
| T556 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2538807390 |
|
|
Dec 27 12:45:37 PM PST 23 |
Dec 27 12:51:18 PM PST 23 |
14727988747 ps |
| T557 |
/workspace/coverage/default/42.sram_ctrl_smoke.1400298771 |
|
|
Dec 27 12:45:23 PM PST 23 |
Dec 27 12:46:16 PM PST 23 |
7899242191 ps |
| T558 |
/workspace/coverage/default/10.sram_ctrl_regwen.3716132079 |
|
|
Dec 27 12:44:50 PM PST 23 |
Dec 27 12:45:49 PM PST 23 |
2106047331 ps |
| T559 |
/workspace/coverage/default/10.sram_ctrl_partial_access.1074959898 |
|
|
Dec 27 12:45:00 PM PST 23 |
Dec 27 12:45:27 PM PST 23 |
1202544953 ps |
| T560 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.4228549030 |
|
|
Dec 27 12:44:46 PM PST 23 |
Dec 27 12:45:22 PM PST 23 |
1379498583 ps |
| T561 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.845406958 |
|
|
Dec 27 12:44:30 PM PST 23 |
Dec 27 12:51:48 PM PST 23 |
18446610256 ps |
| T562 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3746392452 |
|
|
Dec 27 12:44:39 PM PST 23 |
Dec 27 01:11:24 PM PST 23 |
518154490 ps |
| T563 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2917408215 |
|
|
Dec 27 12:45:03 PM PST 23 |
Dec 27 12:56:44 PM PST 23 |
5889010152 ps |
| T564 |
/workspace/coverage/default/19.sram_ctrl_bijection.3625264296 |
|
|
Dec 27 12:44:52 PM PST 23 |
Dec 27 01:23:48 PM PST 23 |
492875236982 ps |
| T565 |
/workspace/coverage/default/42.sram_ctrl_partial_access.327931546 |
|
|
Dec 27 12:45:50 PM PST 23 |
Dec 27 12:47:30 PM PST 23 |
1235690915 ps |
| T566 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3310535252 |
|
|
Dec 27 12:45:38 PM PST 23 |
Dec 27 12:47:25 PM PST 23 |
798767074 ps |
| T567 |
/workspace/coverage/default/14.sram_ctrl_bijection.1894403840 |
|
|
Dec 27 12:44:31 PM PST 23 |
Dec 27 01:16:53 PM PST 23 |
48051906069 ps |
| T568 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1712010471 |
|
|
Dec 27 12:45:12 PM PST 23 |
Dec 27 12:45:58 PM PST 23 |
2801839922 ps |
| T569 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.313832332 |
|
|
Dec 27 12:45:02 PM PST 23 |
Dec 27 12:47:58 PM PST 23 |
7103566303 ps |
| T570 |
/workspace/coverage/default/21.sram_ctrl_regwen.1908904991 |
|
|
Dec 27 12:45:07 PM PST 23 |
Dec 27 12:49:38 PM PST 23 |
39585952934 ps |
| T571 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2881811237 |
|
|
Dec 27 12:45:37 PM PST 23 |
Dec 27 12:45:53 PM PST 23 |
1410372926 ps |
| T572 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.2641820059 |
|
|
Dec 27 12:44:29 PM PST 23 |
Dec 27 12:45:13 PM PST 23 |
10723870798 ps |
| T573 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1921647836 |
|
|
Dec 27 12:44:40 PM PST 23 |
Dec 27 12:46:19 PM PST 23 |
4646372243 ps |
| T574 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1819241452 |
|
|
Dec 27 12:45:39 PM PST 23 |
Dec 27 12:46:49 PM PST 23 |
29147851283 ps |
| T575 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.410387399 |
|
|
Dec 27 12:45:29 PM PST 23 |
Dec 27 12:46:05 PM PST 23 |
695247054 ps |
| T576 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3556891403 |
|
|
Dec 27 12:44:13 PM PST 23 |
Dec 27 12:47:12 PM PST 23 |
892337130 ps |
| T577 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.187444809 |
|
|
Dec 27 12:44:35 PM PST 23 |
Dec 27 12:46:57 PM PST 23 |
6256746088 ps |
| T578 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.850406025 |
|
|
Dec 27 12:45:51 PM PST 23 |
Dec 27 12:51:29 PM PST 23 |
4813133857 ps |
| T579 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.4212511650 |
|
|
Dec 27 12:44:28 PM PST 23 |
Dec 27 12:49:20 PM PST 23 |
15840292879 ps |
| T580 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3756092448 |
|
|
Dec 27 12:45:22 PM PST 23 |
Dec 27 12:46:14 PM PST 23 |
3248628265 ps |
| T581 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1149683854 |
|
|
Dec 27 12:44:37 PM PST 23 |
Dec 27 12:48:44 PM PST 23 |
3329090253 ps |
| T582 |
/workspace/coverage/default/17.sram_ctrl_executable.3091910510 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 01:02:25 PM PST 23 |
21768024516 ps |
| T583 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2881930435 |
|
|
Dec 27 12:44:28 PM PST 23 |
Dec 27 12:46:43 PM PST 23 |
5339373598 ps |
| T584 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1873407559 |
|
|
Dec 27 12:44:48 PM PST 23 |
Dec 27 12:45:38 PM PST 23 |
1084606317 ps |
| T585 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2304411066 |
|
|
Dec 27 12:45:27 PM PST 23 |
Dec 27 12:47:48 PM PST 23 |
6459534101 ps |
| T586 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.4013344743 |
|
|
Dec 27 12:45:21 PM PST 23 |
Dec 27 12:45:37 PM PST 23 |
2110136228 ps |
| T587 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.664483993 |
|
|
Dec 27 12:45:38 PM PST 23 |
Dec 27 01:39:02 PM PST 23 |
3684756074 ps |
| T588 |
/workspace/coverage/default/2.sram_ctrl_bijection.2841614138 |
|
|
Dec 27 12:44:24 PM PST 23 |
Dec 27 01:14:57 PM PST 23 |
100779964570 ps |
| T589 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2851828425 |
|
|
Dec 27 12:45:25 PM PST 23 |
Dec 27 01:35:52 PM PST 23 |
2193752101 ps |
| T590 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.388805583 |
|
|
Dec 27 12:44:18 PM PST 23 |
Dec 27 12:45:05 PM PST 23 |
2928890904 ps |
| T591 |
/workspace/coverage/default/1.sram_ctrl_executable.3932993101 |
|
|
Dec 27 12:44:40 PM PST 23 |
Dec 27 01:09:27 PM PST 23 |
22368973102 ps |
| T592 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1240945162 |
|
|
Dec 27 12:45:33 PM PST 23 |
Dec 27 12:46:15 PM PST 23 |
2575958884 ps |
| T593 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1063683146 |
|
|
Dec 27 12:45:21 PM PST 23 |
Dec 27 12:45:30 PM PST 23 |
37211322 ps |
| T594 |
/workspace/coverage/default/26.sram_ctrl_alert_test.945443206 |
|
|
Dec 27 12:44:51 PM PST 23 |
Dec 27 12:44:58 PM PST 23 |
13171635 ps |
| T595 |
/workspace/coverage/default/13.sram_ctrl_bijection.1472270784 |
|
|
Dec 27 12:44:36 PM PST 23 |
Dec 27 01:11:46 PM PST 23 |
141172445734 ps |
| T596 |
/workspace/coverage/default/17.sram_ctrl_regwen.2839628614 |
|
|
Dec 27 12:44:53 PM PST 23 |
Dec 27 12:47:17 PM PST 23 |
6515106178 ps |
| T597 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.3989584146 |
|
|
Dec 27 12:44:51 PM PST 23 |
Dec 27 12:47:01 PM PST 23 |
2085931001 ps |
| T598 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2743186262 |
|
|
Dec 27 12:45:13 PM PST 23 |
Dec 27 01:23:23 PM PST 23 |
435582481 ps |
| T599 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.3524271936 |
|
|
Dec 27 12:45:21 PM PST 23 |
Dec 27 12:52:02 PM PST 23 |
26488160271 ps |
| T600 |
/workspace/coverage/default/45.sram_ctrl_executable.2948858329 |
|
|
Dec 27 12:45:29 PM PST 23 |
Dec 27 12:59:30 PM PST 23 |
24906535066 ps |
| T601 |
/workspace/coverage/default/4.sram_ctrl_alert_test.2130681792 |
|
|
Dec 27 12:44:46 PM PST 23 |
Dec 27 12:44:53 PM PST 23 |
14449386 ps |
| T602 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2772812599 |
|
|
Dec 27 12:44:50 PM PST 23 |
Dec 27 12:45:02 PM PST 23 |
1346876403 ps |
| T603 |
/workspace/coverage/default/33.sram_ctrl_smoke.415445271 |
|
|
Dec 27 12:45:17 PM PST 23 |
Dec 27 12:45:55 PM PST 23 |
569750529 ps |
| T604 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3374923673 |
|
|
Dec 27 12:44:20 PM PST 23 |
Dec 27 12:44:54 PM PST 23 |
2978120947 ps |
| T605 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.272056389 |
|
|
Dec 27 12:44:15 PM PST 23 |
Dec 27 12:51:51 PM PST 23 |
39946979864 ps |
| T606 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1944823627 |
|
|
Dec 27 12:44:54 PM PST 23 |
Dec 27 12:49:46 PM PST 23 |
16216797225 ps |
| T607 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.2811762666 |
|
|
Dec 27 12:45:08 PM PST 23 |
Dec 27 12:47:59 PM PST 23 |
32900255934 ps |
| T608 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3563966228 |
|
|
Dec 27 12:45:15 PM PST 23 |
Dec 27 12:47:38 PM PST 23 |
2020196415 ps |
| T609 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.346673714 |
|
|
Dec 27 12:44:34 PM PST 23 |
Dec 27 12:46:55 PM PST 23 |
19333777126 ps |
| T610 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.3972497056 |
|
|
Dec 27 12:44:26 PM PST 23 |
Dec 27 12:44:46 PM PST 23 |
2606126823 ps |
| T611 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3550368239 |
|
|
Dec 27 12:44:28 PM PST 23 |
Dec 27 12:44:37 PM PST 23 |
14041266 ps |
| T612 |
/workspace/coverage/default/28.sram_ctrl_smoke.3541133142 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 12:45:15 PM PST 23 |
438285585 ps |
| T613 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1843976474 |
|
|
Dec 27 12:44:40 PM PST 23 |
Dec 27 12:58:50 PM PST 23 |
81745256086 ps |
| T614 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1636569873 |
|
|
Dec 27 12:45:37 PM PST 23 |
Dec 27 12:53:38 PM PST 23 |
15150336521 ps |
| T615 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.430880271 |
|
|
Dec 27 12:45:01 PM PST 23 |
Dec 27 12:47:12 PM PST 23 |
1977590857 ps |
| T616 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1090307430 |
|
|
Dec 27 12:45:06 PM PST 23 |
Dec 27 12:46:52 PM PST 23 |
1557106741 ps |
| T617 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1353338785 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 12:47:05 PM PST 23 |
4122126305 ps |
| T618 |
/workspace/coverage/default/16.sram_ctrl_stress_all.52403178 |
|
|
Dec 27 12:44:42 PM PST 23 |
Dec 27 01:43:19 PM PST 23 |
248782081431 ps |
| T619 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.1187059635 |
|
|
Dec 27 12:44:44 PM PST 23 |
Dec 27 01:49:59 PM PST 23 |
4215540332 ps |
| T620 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.4159182041 |
|
|
Dec 27 12:45:26 PM PST 23 |
Dec 27 12:50:53 PM PST 23 |
8643065273 ps |
| T621 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2387864514 |
|
|
Dec 27 12:44:18 PM PST 23 |
Dec 27 12:46:55 PM PST 23 |
4977830918 ps |
| T622 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.3386300690 |
|
|
Dec 27 12:44:56 PM PST 23 |
Dec 27 12:48:37 PM PST 23 |
5808442212 ps |
| T623 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1499346233 |
|
|
Dec 27 12:45:47 PM PST 23 |
Dec 27 12:47:14 PM PST 23 |
909084811 ps |
| T624 |
/workspace/coverage/default/46.sram_ctrl_stress_all.2657433594 |
|
|
Dec 27 12:45:38 PM PST 23 |
Dec 27 01:50:14 PM PST 23 |
809981575753 ps |
| T625 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1633389816 |
|
|
Dec 27 12:45:28 PM PST 23 |
Dec 27 12:47:48 PM PST 23 |
11031361487 ps |
| T626 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2089310581 |
|
|
Dec 27 12:44:15 PM PST 23 |
Dec 27 12:44:45 PM PST 23 |
832280531 ps |
| T627 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.4013104064 |
|
|
Dec 27 12:45:22 PM PST 23 |
Dec 27 12:46:22 PM PST 23 |
1422422795 ps |
| T628 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1525878916 |
|
|
Dec 27 12:44:42 PM PST 23 |
Dec 27 12:45:27 PM PST 23 |
4542697955 ps |
| T629 |
/workspace/coverage/default/47.sram_ctrl_regwen.3667875852 |
|
|
Dec 27 12:45:45 PM PST 23 |
Dec 27 01:03:32 PM PST 23 |
5496135076 ps |
| T630 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.199581893 |
|
|
Dec 27 12:44:59 PM PST 23 |
Dec 27 12:47:34 PM PST 23 |
55163420328 ps |
| T631 |
/workspace/coverage/default/14.sram_ctrl_regwen.2083685193 |
|
|
Dec 27 12:44:06 PM PST 23 |
Dec 27 01:02:41 PM PST 23 |
74892308600 ps |
| T632 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.850314890 |
|
|
Dec 27 12:44:48 PM PST 23 |
Dec 27 12:47:25 PM PST 23 |
2245649167 ps |
| T633 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.2726496664 |
|
|
Dec 27 12:44:47 PM PST 23 |
Dec 27 12:47:26 PM PST 23 |
17401778374 ps |
| T634 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.2046566437 |
|
|
Dec 27 12:45:22 PM PST 23 |
Dec 27 12:47:34 PM PST 23 |
2065640199 ps |
| T635 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2329686456 |
|
|
Dec 27 12:45:14 PM PST 23 |
Dec 27 12:46:46 PM PST 23 |
10884297946 ps |
| T636 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2680208261 |
|
|
Dec 27 12:44:25 PM PST 23 |
Dec 27 12:58:30 PM PST 23 |
5416889860 ps |
| T637 |
/workspace/coverage/default/3.sram_ctrl_regwen.2212549556 |
|
|
Dec 27 12:44:52 PM PST 23 |
Dec 27 01:03:42 PM PST 23 |
9432688981 ps |
| T638 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3176773731 |
|
|
Dec 27 12:45:13 PM PST 23 |
Dec 27 12:46:15 PM PST 23 |
5096306178 ps |
| T639 |
/workspace/coverage/default/36.sram_ctrl_regwen.3668115857 |
|
|
Dec 27 12:45:44 PM PST 23 |
Dec 27 01:00:45 PM PST 23 |
47438034853 ps |
| T640 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.776396471 |
|
|
Dec 27 12:45:41 PM PST 23 |
Dec 27 12:46:33 PM PST 23 |
6558622038 ps |
| T641 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3322809190 |
|
|
Dec 27 12:44:28 PM PST 23 |
Dec 27 12:50:20 PM PST 23 |
102674257054 ps |
| T642 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.2450532092 |
|
|
Dec 27 12:44:22 PM PST 23 |
Dec 27 12:47:06 PM PST 23 |
10754812733 ps |
| T643 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.110185759 |
|
|
Dec 27 12:44:32 PM PST 23 |
Dec 27 12:47:07 PM PST 23 |
9203208811 ps |
| T644 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.607189063 |
|
|
Dec 27 12:44:26 PM PST 23 |
Dec 27 12:45:54 PM PST 23 |
2457159788 ps |
| T645 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1419196656 |
|
|
Dec 27 12:44:53 PM PST 23 |
Dec 27 12:58:21 PM PST 23 |
6892098955 ps |
| T646 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2104486000 |
|
|
Dec 27 12:45:55 PM PST 23 |
Dec 27 12:48:33 PM PST 23 |
9983825987 ps |
| T647 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.445634793 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 12:45:00 PM PST 23 |
352919402 ps |
| T648 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1456960443 |
|
|
Dec 27 12:44:56 PM PST 23 |
Dec 27 02:19:49 PM PST 23 |
1092212727 ps |
| T649 |
/workspace/coverage/default/11.sram_ctrl_smoke.2306461257 |
|
|
Dec 27 12:44:37 PM PST 23 |
Dec 27 12:44:59 PM PST 23 |
778701813 ps |
| T650 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.3561941587 |
|
|
Dec 27 12:44:22 PM PST 23 |
Dec 27 12:48:02 PM PST 23 |
2808351528 ps |
| T651 |
/workspace/coverage/default/18.sram_ctrl_alert_test.3818484770 |
|
|
Dec 27 12:44:45 PM PST 23 |
Dec 27 12:44:51 PM PST 23 |
19120945 ps |
| T652 |
/workspace/coverage/default/39.sram_ctrl_bijection.699752055 |
|
|
Dec 27 12:45:16 PM PST 23 |
Dec 27 01:19:11 PM PST 23 |
126816940685 ps |
| T653 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1622037090 |
|
|
Dec 27 12:44:25 PM PST 23 |
Dec 27 01:21:31 PM PST 23 |
5074030434 ps |
| T654 |
/workspace/coverage/default/31.sram_ctrl_regwen.3492836131 |
|
|
Dec 27 12:45:30 PM PST 23 |
Dec 27 01:10:48 PM PST 23 |
16629804370 ps |
| T655 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.656827450 |
|
|
Dec 27 12:45:14 PM PST 23 |
Dec 27 01:08:58 PM PST 23 |
22206593020 ps |
| T656 |
/workspace/coverage/default/43.sram_ctrl_partial_access.973343370 |
|
|
Dec 27 12:45:21 PM PST 23 |
Dec 27 12:45:56 PM PST 23 |
1507129027 ps |
| T657 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.1503418486 |
|
|
Dec 27 12:44:56 PM PST 23 |
Dec 27 12:47:23 PM PST 23 |
3333818791 ps |
| T658 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2690898589 |
|
|
Dec 27 12:45:01 PM PST 23 |
Dec 27 12:46:29 PM PST 23 |
9403266103 ps |
| T659 |
/workspace/coverage/default/17.sram_ctrl_smoke.93103374 |
|
|
Dec 27 12:44:31 PM PST 23 |
Dec 27 12:45:22 PM PST 23 |
1585200701 ps |
| T660 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1429540761 |
|
|
Dec 27 12:45:28 PM PST 23 |
Dec 27 12:51:53 PM PST 23 |
4194164745 ps |
| T661 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.588188778 |
|
|
Dec 27 12:45:41 PM PST 23 |
Dec 27 12:47:00 PM PST 23 |
2899912557 ps |
| T662 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1822631849 |
|
|
Dec 27 12:45:25 PM PST 23 |
Dec 27 12:51:31 PM PST 23 |
64296774092 ps |
| T663 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.3665030855 |
|
|
Dec 27 12:44:55 PM PST 23 |
Dec 27 12:48:21 PM PST 23 |
5633653454 ps |
| T664 |
/workspace/coverage/default/37.sram_ctrl_stress_all.3817641901 |
|
|
Dec 27 12:45:39 PM PST 23 |
Dec 27 02:08:28 PM PST 23 |
323268563019 ps |
| T665 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2534442575 |
|
|
Dec 27 12:45:16 PM PST 23 |
Dec 27 12:49:17 PM PST 23 |
6062672654 ps |
| T666 |
/workspace/coverage/default/47.sram_ctrl_partial_access.2332066134 |
|
|
Dec 27 12:45:39 PM PST 23 |
Dec 27 12:48:06 PM PST 23 |
2789648117 ps |
| T667 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1739321477 |
|
|
Dec 27 12:45:28 PM PST 23 |
Dec 27 12:47:21 PM PST 23 |
3363213428 ps |
| T668 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.2931619241 |
|
|
Dec 27 12:44:21 PM PST 23 |
Dec 27 12:46:44 PM PST 23 |
796796834 ps |
| T669 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2274889439 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 12:47:30 PM PST 23 |
9932744117 ps |
| T670 |
/workspace/coverage/default/47.sram_ctrl_bijection.3025375018 |
|
|
Dec 27 12:45:39 PM PST 23 |
Dec 27 01:07:50 PM PST 23 |
74752578080 ps |
| T671 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.156855447 |
|
|
Dec 27 12:45:27 PM PST 23 |
Dec 27 12:48:55 PM PST 23 |
4275099875 ps |
| T672 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.390688770 |
|
|
Dec 27 12:45:26 PM PST 23 |
Dec 27 12:48:01 PM PST 23 |
4613556148 ps |
| T673 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3296060788 |
|
|
Dec 27 12:44:47 PM PST 23 |
Dec 27 12:46:29 PM PST 23 |
77117097786 ps |
| T674 |
/workspace/coverage/default/38.sram_ctrl_stress_all.1980348616 |
|
|
Dec 27 12:45:22 PM PST 23 |
Dec 27 02:24:55 PM PST 23 |
646137274917 ps |
| T675 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.3062751476 |
|
|
Dec 27 12:44:42 PM PST 23 |
Dec 27 12:49:10 PM PST 23 |
15764661516 ps |
| T676 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1051332817 |
|
|
Dec 27 12:44:17 PM PST 23 |
Dec 27 12:46:26 PM PST 23 |
2882378961 ps |
| T677 |
/workspace/coverage/default/20.sram_ctrl_smoke.1737537986 |
|
|
Dec 27 12:44:31 PM PST 23 |
Dec 27 12:45:03 PM PST 23 |
3977225879 ps |
| T678 |
/workspace/coverage/default/13.sram_ctrl_alert_test.3189310210 |
|
|
Dec 27 12:44:43 PM PST 23 |
Dec 27 12:44:49 PM PST 23 |
37572699 ps |
| T679 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3875976839 |
|
|
Dec 27 12:44:54 PM PST 23 |
Dec 27 12:49:23 PM PST 23 |
11426094210 ps |
| T680 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.411012613 |
|
|
Dec 27 12:45:11 PM PST 23 |
Dec 27 12:48:48 PM PST 23 |
3091276607 ps |
| T681 |
/workspace/coverage/default/30.sram_ctrl_regwen.3988074542 |
|
|
Dec 27 12:45:00 PM PST 23 |
Dec 27 01:01:56 PM PST 23 |
57883601691 ps |
| T682 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1362086056 |
|
|
Dec 27 12:44:51 PM PST 23 |
Dec 27 12:47:23 PM PST 23 |
4745310021 ps |
| T683 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.2899169448 |
|
|
Dec 27 12:45:15 PM PST 23 |
Dec 27 12:45:36 PM PST 23 |
1354816233 ps |
| T684 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4279038391 |
|
|
Dec 27 12:44:08 PM PST 23 |
Dec 27 12:51:27 PM PST 23 |
111311240615 ps |
| T685 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2812819113 |
|
|
Dec 27 12:44:42 PM PST 23 |
Dec 27 12:56:40 PM PST 23 |
56197541111 ps |
| T686 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.118131934 |
|
|
Dec 27 12:44:23 PM PST 23 |
Dec 27 12:48:05 PM PST 23 |
2315492248 ps |
| T687 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1480778570 |
|
|
Dec 27 12:45:18 PM PST 23 |
Dec 27 12:54:15 PM PST 23 |
65314605944 ps |
| T688 |
/workspace/coverage/default/2.sram_ctrl_smoke.2626837688 |
|
|
Dec 27 12:44:30 PM PST 23 |
Dec 27 12:44:56 PM PST 23 |
6900116625 ps |
| T689 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.2536313184 |
|
|
Dec 27 12:45:33 PM PST 23 |
Dec 27 01:13:37 PM PST 23 |
49194220673 ps |
| T690 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.62410163 |
|
|
Dec 27 12:45:23 PM PST 23 |
Dec 27 01:53:05 PM PST 23 |
5020993212 ps |
| T691 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2909811083 |
|
|
Dec 27 12:45:17 PM PST 23 |
Dec 27 12:46:36 PM PST 23 |
3935259490 ps |
| T692 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.1982678891 |
|
|
Dec 27 12:45:15 PM PST 23 |
Dec 27 12:45:50 PM PST 23 |
11993406270 ps |
| T693 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.1785060200 |
|
|
Dec 27 12:44:42 PM PST 23 |
Dec 27 01:03:44 PM PST 23 |
50216902225 ps |
| T694 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.4015640790 |
|
|
Dec 27 12:45:14 PM PST 23 |
Dec 27 12:48:03 PM PST 23 |
54240550686 ps |
| T695 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1772594614 |
|
|
Dec 27 12:44:39 PM PST 23 |
Dec 27 01:58:08 PM PST 23 |
2892501116 ps |
| T696 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3088247568 |
|
|
Dec 27 12:44:53 PM PST 23 |
Dec 27 01:05:49 PM PST 23 |
13241625917 ps |
| T697 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3460051874 |
|
|
Dec 27 12:45:00 PM PST 23 |
Dec 27 12:54:02 PM PST 23 |
10558695481 ps |
| T698 |
/workspace/coverage/default/10.sram_ctrl_bijection.547994275 |
|
|
Dec 27 12:45:02 PM PST 23 |
Dec 27 01:07:26 PM PST 23 |
37507104962 ps |
| T699 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.1621582130 |
|
|
Dec 27 12:44:35 PM PST 23 |
Dec 27 12:51:10 PM PST 23 |
5133936555 ps |
| T700 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4027638636 |
|
|
Dec 27 12:45:02 PM PST 23 |
Dec 27 12:48:55 PM PST 23 |
42431773583 ps |
| T701 |
/workspace/coverage/default/34.sram_ctrl_partial_access.1849941159 |
|
|
Dec 27 12:45:03 PM PST 23 |
Dec 27 12:45:39 PM PST 23 |
2852950044 ps |
| T702 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2866176633 |
|
|
Dec 27 12:45:19 PM PST 23 |
Dec 27 12:45:41 PM PST 23 |
1347981531 ps |
| T703 |
/workspace/coverage/default/8.sram_ctrl_smoke.2672618108 |
|
|
Dec 27 12:44:27 PM PST 23 |
Dec 27 12:45:01 PM PST 23 |
1345320994 ps |
| T704 |
/workspace/coverage/default/11.sram_ctrl_alert_test.218774096 |
|
|
Dec 27 12:44:17 PM PST 23 |
Dec 27 12:44:28 PM PST 23 |
14468268 ps |
| T705 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3924590820 |
|
|
Dec 27 12:45:27 PM PST 23 |
Dec 27 12:45:35 PM PST 23 |
43212471 ps |
| T706 |
/workspace/coverage/default/30.sram_ctrl_bijection.1340069775 |
|
|
Dec 27 12:45:04 PM PST 23 |
Dec 27 01:16:05 PM PST 23 |
38492344808 ps |
| T707 |
/workspace/coverage/default/10.sram_ctrl_executable.2699425511 |
|
|
Dec 27 12:44:55 PM PST 23 |
Dec 27 12:47:32 PM PST 23 |
1192232642 ps |
| T708 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.785804904 |
|
|
Dec 27 12:45:24 PM PST 23 |
Dec 27 12:45:39 PM PST 23 |
368505856 ps |
| T709 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4175215341 |
|
|
Dec 27 12:45:38 PM PST 23 |
Dec 27 12:46:59 PM PST 23 |
2994992227 ps |
| T710 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2167244944 |
|
|
Dec 27 12:44:40 PM PST 23 |
Dec 27 12:50:29 PM PST 23 |
17684052076 ps |
| T711 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3353796234 |
|
|
Dec 27 12:44:56 PM PST 23 |
Dec 27 12:47:40 PM PST 23 |
72552893250 ps |
| T712 |
/workspace/coverage/default/25.sram_ctrl_alert_test.1869113373 |
|
|
Dec 27 12:44:51 PM PST 23 |
Dec 27 12:44:59 PM PST 23 |
15314625 ps |
| T713 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2980000428 |
|
|
Dec 27 12:44:53 PM PST 23 |
Dec 27 12:49:06 PM PST 23 |
39412187114 ps |
| T714 |
/workspace/coverage/default/49.sram_ctrl_smoke.3566496970 |
|
|
Dec 27 12:45:26 PM PST 23 |
Dec 27 12:47:04 PM PST 23 |
3595586049 ps |
| T715 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.413102386 |
|
|
Dec 27 12:45:36 PM PST 23 |
Dec 27 01:51:45 PM PST 23 |
4008578406 ps |
| T716 |
/workspace/coverage/default/12.sram_ctrl_bijection.2993257929 |
|
|
Dec 27 12:44:31 PM PST 23 |
Dec 27 01:01:01 PM PST 23 |
42502926444 ps |
| T717 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2803236487 |
|
|
Dec 27 12:44:46 PM PST 23 |
Dec 27 01:04:10 PM PST 23 |
7133606984 ps |
| T718 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.4254699039 |
|
|
Dec 27 12:45:38 PM PST 23 |
Dec 27 12:50:55 PM PST 23 |
57379870779 ps |
| T719 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3450760331 |
|
|
Dec 27 12:45:40 PM PST 23 |
Dec 27 12:52:17 PM PST 23 |
6350275689 ps |
| T720 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1154961165 |
|
|
Dec 27 12:45:06 PM PST 23 |
Dec 27 01:44:44 PM PST 23 |
1017723676 ps |
| T721 |
/workspace/coverage/default/23.sram_ctrl_stress_all.666388826 |
|
|
Dec 27 12:45:01 PM PST 23 |
Dec 27 02:38:35 PM PST 23 |
989291904935 ps |
| T722 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4238030069 |
|
|
Dec 27 12:44:41 PM PST 23 |
Dec 27 01:08:21 PM PST 23 |
22885351905 ps |
| T723 |
/workspace/coverage/default/9.sram_ctrl_regwen.3920308295 |
|
|
Dec 27 12:45:00 PM PST 23 |
Dec 27 01:05:37 PM PST 23 |
11639583915 ps |
| T724 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2755358735 |
|
|
Dec 27 12:45:36 PM PST 23 |
Dec 27 01:15:01 PM PST 23 |
2892446640 ps |
| T725 |
/workspace/coverage/default/25.sram_ctrl_stress_all.3530615083 |
|
|
Dec 27 12:44:47 PM PST 23 |
Dec 27 02:20:50 PM PST 23 |
177784933851 ps |
| T726 |
/workspace/coverage/default/0.sram_ctrl_bijection.427792910 |
|
|
Dec 27 12:44:28 PM PST 23 |
Dec 27 01:15:40 PM PST 23 |
315595497730 ps |
| T727 |
/workspace/coverage/default/3.sram_ctrl_smoke.3909944595 |
|
|
Dec 27 12:44:31 PM PST 23 |
Dec 27 12:45:18 PM PST 23 |
3848967401 ps |
| T728 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.4006782653 |
|
|
Dec 27 12:44:35 PM PST 23 |
Dec 27 12:47:07 PM PST 23 |
19876301137 ps |
| T729 |
/workspace/coverage/default/32.sram_ctrl_bijection.2522953756 |
|
|
Dec 27 12:45:44 PM PST 23 |
Dec 27 01:30:20 PM PST 23 |
533467199109 ps |
| T730 |
/workspace/coverage/default/35.sram_ctrl_partial_access.3430352081 |
|
|
Dec 27 12:45:34 PM PST 23 |
Dec 27 12:46:29 PM PST 23 |
3078603066 ps |
| T731 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3382042705 |
|
|
Dec 27 12:45:39 PM PST 23 |
Dec 27 12:49:13 PM PST 23 |
13168885534 ps |
| T732 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1153591760 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 12:45:09 PM PST 23 |
367252136 ps |
| T733 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.1517372137 |
|
|
Dec 27 12:45:08 PM PST 23 |
Dec 27 12:59:31 PM PST 23 |
14877508307 ps |
| T734 |
/workspace/coverage/default/13.sram_ctrl_partial_access.4254042376 |
|
|
Dec 27 12:44:40 PM PST 23 |
Dec 27 12:45:08 PM PST 23 |
6957923658 ps |
| T735 |
/workspace/coverage/default/29.sram_ctrl_regwen.827859519 |
|
|
Dec 27 12:45:13 PM PST 23 |
Dec 27 12:47:14 PM PST 23 |
3124845202 ps |
| T736 |
/workspace/coverage/default/41.sram_ctrl_smoke.542677828 |
|
|
Dec 27 12:45:12 PM PST 23 |
Dec 27 12:45:37 PM PST 23 |
4015880838 ps |
| T737 |
/workspace/coverage/default/4.sram_ctrl_executable.3116758167 |
|
|
Dec 27 12:44:46 PM PST 23 |
Dec 27 12:50:40 PM PST 23 |
5677258266 ps |
| T738 |
/workspace/coverage/default/23.sram_ctrl_bijection.2054620301 |
|
|
Dec 27 12:45:31 PM PST 23 |
Dec 27 01:11:30 PM PST 23 |
90488554160 ps |
| T739 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3235825566 |
|
|
Dec 27 12:45:37 PM PST 23 |
Dec 27 12:47:47 PM PST 23 |
772205722 ps |
| T740 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3615251507 |
|
|
Dec 27 12:45:31 PM PST 23 |
Dec 27 02:25:22 PM PST 23 |
4953519129 ps |
| T741 |
/workspace/coverage/default/24.sram_ctrl_smoke.3408498109 |
|
|
Dec 27 12:45:01 PM PST 23 |
Dec 27 12:46:16 PM PST 23 |
768165496 ps |
| T742 |
/workspace/coverage/default/32.sram_ctrl_alert_test.3027281189 |
|
|
Dec 27 12:45:23 PM PST 23 |
Dec 27 12:45:33 PM PST 23 |
16476888 ps |
| T743 |
/workspace/coverage/default/38.sram_ctrl_bijection.2173137218 |
|
|
Dec 27 12:45:52 PM PST 23 |
Dec 27 01:08:17 PM PST 23 |
86496140211 ps |
| T744 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.807191073 |
|
|
Dec 27 12:44:25 PM PST 23 |
Dec 27 12:48:18 PM PST 23 |
12885075983 ps |
| T745 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.3346807417 |
|
|
Dec 27 12:44:49 PM PST 23 |
Dec 27 12:45:58 PM PST 23 |
741529503 ps |
| T746 |
/workspace/coverage/default/25.sram_ctrl_partial_access.3764249363 |
|
|
Dec 27 12:45:03 PM PST 23 |
Dec 27 12:45:27 PM PST 23 |
3850197389 ps |
| T747 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1453094778 |
|
|
Dec 27 12:45:27 PM PST 23 |
Dec 27 12:45:35 PM PST 23 |
34463524 ps |
| T748 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.881420637 |
|
|
Dec 27 12:44:36 PM PST 23 |
Dec 27 12:46:55 PM PST 23 |
6271206579 ps |
| T749 |
/workspace/coverage/default/37.sram_ctrl_regwen.3337113167 |
|
|
Dec 27 12:45:35 PM PST 23 |
Dec 27 01:14:17 PM PST 23 |
87165559800 ps |
| T750 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.66799103 |
|
|
Dec 27 12:44:28 PM PST 23 |
Dec 27 12:45:27 PM PST 23 |
10207150688 ps |
| T751 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1881056906 |
|
|
Dec 27 12:45:00 PM PST 23 |
Dec 27 01:29:11 PM PST 23 |
144284432605 ps |
| T752 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2865647400 |
|
|
Dec 27 12:45:08 PM PST 23 |
Dec 27 12:45:27 PM PST 23 |
422891895 ps |
| T753 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1017270714 |
|
|
Dec 27 12:45:12 PM PST 23 |
Dec 27 01:03:25 PM PST 23 |
59619236018 ps |