Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.67 100.00 98.27 100.00 100.00 99.71 99.70 100.00


Total tests in report: 990
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
86.45 86.45 97.90 97.90 76.62 76.62 85.64 85.64 100.00 100.00 91.07 91.07 94.80 94.80 59.10 59.10 /workspace/coverage/default/5.sram_ctrl_lc_escalation.3053582893
91.07 4.62 98.81 0.91 86.00 9.38 95.66 10.02 100.00 0.00 95.39 4.32 94.80 0.00 66.79 7.69 /workspace/coverage/default/19.sram_ctrl_regwen.2643670549
93.82 2.76 99.36 0.55 88.89 2.89 96.73 1.07 100.00 0.00 96.25 0.86 95.99 1.19 79.55 12.76 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2057935949
95.48 1.65 99.36 0.00 91.63 2.74 97.90 1.17 100.00 0.00 96.25 0.00 96.14 0.15 87.05 7.50 /workspace/coverage/default/17.sram_ctrl_lc_escalation.2139390545
96.38 0.90 99.36 0.00 92.78 1.15 98.44 0.53 100.00 0.00 96.54 0.29 96.73 0.59 90.81 3.75 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.588479094
97.27 0.89 99.64 0.27 95.67 2.89 98.79 0.36 100.00 0.00 98.27 1.73 97.33 0.59 91.18 0.38 /workspace/coverage/default/1.sram_ctrl_sec_cm.3415723275
97.96 0.69 99.91 0.27 95.82 0.14 99.18 0.39 100.00 0.00 98.56 0.29 97.47 0.15 94.75 3.56 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3390333458
98.33 0.38 99.91 0.00 95.82 0.00 99.18 0.00 100.00 0.00 98.56 0.00 97.47 0.00 97.37 2.63 /workspace/coverage/default/15.sram_ctrl_stress_all.1409710780
98.68 0.35 99.91 0.00 96.54 0.72 99.18 0.00 100.00 0.00 98.85 0.29 98.37 0.89 97.94 0.56 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2011862354
98.89 0.21 99.91 0.00 97.26 0.72 99.18 0.00 100.00 0.00 99.42 0.58 98.37 0.00 98.12 0.19 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2329108567
99.09 0.19 99.91 0.00 97.26 0.00 99.18 0.00 100.00 0.00 99.42 0.00 99.70 1.34 98.12 0.00 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3974055032
99.22 0.13 100.00 0.09 97.26 0.00 100.00 0.82 100.00 0.00 99.42 0.00 99.70 0.00 98.12 0.00 /workspace/coverage/default/35.sram_ctrl_ram_cfg.1561155154
99.34 0.12 100.00 0.00 97.55 0.29 100.00 0.00 100.00 0.00 99.42 0.00 99.70 0.00 98.69 0.56 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2081940833
99.44 0.11 100.00 0.00 97.55 0.00 100.00 0.00 100.00 0.00 99.42 0.00 99.70 0.00 99.44 0.75 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3171220905
99.53 0.09 100.00 0.00 97.69 0.14 100.00 0.00 100.00 0.00 99.71 0.29 99.70 0.00 99.62 0.19 /workspace/coverage/default/23.sram_ctrl_regwen.3529540633
99.57 0.04 100.00 0.00 97.98 0.29 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 99.62 0.00 /workspace/coverage/default/17.sram_ctrl_alert_test.3761591346
99.60 0.03 100.00 0.00 97.98 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 99.81 0.19 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3916130363
99.63 0.03 100.00 0.00 97.98 0.00 100.00 0.00 100.00 0.00 99.71 0.00 99.70 0.00 100.00 0.19 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2861966967

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4122819987
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.994295200
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1857893234
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1155378366
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1734546612
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3184524854
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2747289996
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1925457725
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2581645066
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1018595075
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3457605592
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4102039355
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.719229222
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1203685997
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3118801652
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1818396001
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.318494903
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2501918032
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2150852703
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1947140476
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.629811248
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2431239227
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2897029238
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.328844668
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1556975922
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3962950815
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.189189093
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3613008007
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3983166870
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1855276527
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3108451880
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1834861290
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1019489964
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4192195098
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2450442186
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2138857683
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.425353205
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.182364020
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.139831002
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1937012021
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.923806636
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1479021504
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3588456588
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1327328175
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.157711436
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.669088932
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2891565429
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2309203867
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.93280528
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1737412538
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2107210976
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.4103610004
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3791289752
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1276488482
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2086174866
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.892806737
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1820637142
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4013825076
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.562746012
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.161476137
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.4060443011
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.179954048
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3280295296
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4281147685
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1221927439
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1689704772
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2650261556
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2076359248
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.458969255
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1211592987
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2192412384
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3938080664
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.13997815
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1051840167
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2760331148
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1412229786
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.508533358
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1232727116
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2324636124
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.69711565
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2275765486
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2094512328
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2181085714
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.4012526223
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2363366462
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2876311181
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1074675232
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1924549670
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2645663640
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.858460354
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2295404931
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.260589318
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2903600265
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2867663254
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3365410121
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1617514181
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2892569330
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.659485004
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1342915141
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1383543284
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2166225137
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1305711727
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.450084244
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2793682186
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.337730146
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3333705257
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.245809449
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1320707631
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2866103983
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.120085797
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2178028759
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1100499026
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3070600487
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1959634653
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.646152138
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3652791592
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2816066791
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2000058887
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.228972070
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.196924184
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1052448478
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4035345598
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.736206296
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.882349820
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.257426937
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.924409689
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2389537220
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.115086142
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.215365192
/workspace/coverage/default/0.sram_ctrl_alert_test.3755769540
/workspace/coverage/default/0.sram_ctrl_bijection.1825434626
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2635486638
/workspace/coverage/default/0.sram_ctrl_max_throughput.3448272411
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1806981506
/workspace/coverage/default/0.sram_ctrl_mem_walk.1624630901
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1972030547
/workspace/coverage/default/0.sram_ctrl_partial_access.3211309676
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1801278615
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3585101261
/workspace/coverage/default/0.sram_ctrl_regwen.1535826770
/workspace/coverage/default/0.sram_ctrl_sec_cm.4174901337
/workspace/coverage/default/0.sram_ctrl_smoke.2778431597
/workspace/coverage/default/0.sram_ctrl_stress_all.247721098
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4145303275
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2029177254
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2726829497
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2450691705
/workspace/coverage/default/1.sram_ctrl_alert_test.4111011701
/workspace/coverage/default/1.sram_ctrl_bijection.2693176562
/workspace/coverage/default/1.sram_ctrl_max_throughput.1936629350
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3340131883
/workspace/coverage/default/1.sram_ctrl_mem_walk.1713644840
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3296537836
/workspace/coverage/default/1.sram_ctrl_partial_access.2029714184
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3692510081
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2255410620
/workspace/coverage/default/1.sram_ctrl_regwen.3608574759
/workspace/coverage/default/1.sram_ctrl_smoke.2883293972
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3005611929
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3343236980
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1623815607
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2646871106
/workspace/coverage/default/10.sram_ctrl_alert_test.1358941664
/workspace/coverage/default/10.sram_ctrl_bijection.1988723647
/workspace/coverage/default/10.sram_ctrl_executable.567160701
/workspace/coverage/default/10.sram_ctrl_lc_escalation.53622164
/workspace/coverage/default/10.sram_ctrl_max_throughput.2394215989
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.898760158
/workspace/coverage/default/10.sram_ctrl_mem_walk.4254474052
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3258811296
/workspace/coverage/default/10.sram_ctrl_partial_access.2352341088
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1688917454
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3478371582
/workspace/coverage/default/10.sram_ctrl_regwen.1735343258
/workspace/coverage/default/10.sram_ctrl_smoke.2308588634
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1945912860
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1947832807
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1332942341
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2558813762
/workspace/coverage/default/11.sram_ctrl_alert_test.115223590
/workspace/coverage/default/11.sram_ctrl_bijection.1649230610
/workspace/coverage/default/11.sram_ctrl_executable.4110479469
/workspace/coverage/default/11.sram_ctrl_max_throughput.1210097582
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2368626307
/workspace/coverage/default/11.sram_ctrl_mem_walk.3581037346
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3134591545
/workspace/coverage/default/11.sram_ctrl_partial_access.1535412198
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.387487224
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3495446632
/workspace/coverage/default/11.sram_ctrl_regwen.4140711199
/workspace/coverage/default/11.sram_ctrl_smoke.4094902438
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3377658373
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.433052927
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3206290302
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3813124497
/workspace/coverage/default/12.sram_ctrl_alert_test.1342045485
/workspace/coverage/default/12.sram_ctrl_bijection.2564331440
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3582562881
/workspace/coverage/default/12.sram_ctrl_max_throughput.1979495488
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.947461713
/workspace/coverage/default/12.sram_ctrl_mem_walk.4215012917
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3146345719
/workspace/coverage/default/12.sram_ctrl_partial_access.4114051958
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1854168370
/workspace/coverage/default/12.sram_ctrl_ram_cfg.235380099
/workspace/coverage/default/12.sram_ctrl_regwen.921077891
/workspace/coverage/default/12.sram_ctrl_smoke.2334445882
/workspace/coverage/default/12.sram_ctrl_stress_all.3752578457
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.314901353
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/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2849211753
/workspace/coverage/default/45.sram_ctrl_alert_test.3025004569
/workspace/coverage/default/45.sram_ctrl_bijection.1006529361
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3243583384
/workspace/coverage/default/45.sram_ctrl_max_throughput.1563067351
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3383849357
/workspace/coverage/default/45.sram_ctrl_mem_walk.531692547
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3202616636
/workspace/coverage/default/45.sram_ctrl_partial_access.1011827677
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3861887194
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3505045423
/workspace/coverage/default/45.sram_ctrl_regwen.2346970148
/workspace/coverage/default/45.sram_ctrl_smoke.14346937
/workspace/coverage/default/45.sram_ctrl_stress_all.945622423
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2300561544
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1527530463
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.403483479
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1304179850
/workspace/coverage/default/46.sram_ctrl_alert_test.1622056168
/workspace/coverage/default/46.sram_ctrl_bijection.122020114
/workspace/coverage/default/46.sram_ctrl_executable.3819479441
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3908513687
/workspace/coverage/default/46.sram_ctrl_max_throughput.3482668060
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2246777713
/workspace/coverage/default/46.sram_ctrl_mem_walk.317392866
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1153863586
/workspace/coverage/default/46.sram_ctrl_partial_access.949447637
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3414750267
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2262436337
/workspace/coverage/default/46.sram_ctrl_regwen.3919430472
/workspace/coverage/default/46.sram_ctrl_smoke.2635342228
/workspace/coverage/default/46.sram_ctrl_stress_all.193755914
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2809483824
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1844082327
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3889269769
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2158088315
/workspace/coverage/default/47.sram_ctrl_alert_test.1434910022
/workspace/coverage/default/47.sram_ctrl_bijection.2226315149
/workspace/coverage/default/47.sram_ctrl_executable.2511083488
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2299945552
/workspace/coverage/default/47.sram_ctrl_max_throughput.2545964336
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1693771186
/workspace/coverage/default/47.sram_ctrl_mem_walk.1569532082
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3842887278
/workspace/coverage/default/47.sram_ctrl_partial_access.2828111834
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4219178917
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1406079931
/workspace/coverage/default/47.sram_ctrl_regwen.3088151557
/workspace/coverage/default/47.sram_ctrl_smoke.2277045401
/workspace/coverage/default/47.sram_ctrl_stress_all.1506576150
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1805905072
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2211464256
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.734790372
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1620490964
/workspace/coverage/default/48.sram_ctrl_alert_test.2405579711
/workspace/coverage/default/48.sram_ctrl_bijection.3720305841
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1972524500
/workspace/coverage/default/48.sram_ctrl_max_throughput.1660975556
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1100651521
/workspace/coverage/default/48.sram_ctrl_mem_walk.2548851329
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2121929640
/workspace/coverage/default/48.sram_ctrl_partial_access.3352206748
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1139394851
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1442123500
/workspace/coverage/default/48.sram_ctrl_regwen.1091047074
/workspace/coverage/default/48.sram_ctrl_smoke.1064280331
/workspace/coverage/default/48.sram_ctrl_stress_all.2303582753
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3788420113
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3672176220
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3134986668
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.861584554
/workspace/coverage/default/49.sram_ctrl_alert_test.341917970
/workspace/coverage/default/49.sram_ctrl_bijection.3507143604
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2782614314
/workspace/coverage/default/49.sram_ctrl_max_throughput.176218391
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1941044632
/workspace/coverage/default/49.sram_ctrl_mem_walk.2723611674
/workspace/coverage/default/49.sram_ctrl_multiple_keys.733896062
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3555932304
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4260865991
/workspace/coverage/default/49.sram_ctrl_regwen.393345629
/workspace/coverage/default/49.sram_ctrl_smoke.1773531514
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3573075270
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4033978004
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1419464741
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1490868383
/workspace/coverage/default/5.sram_ctrl_alert_test.2558579483
/workspace/coverage/default/5.sram_ctrl_bijection.84417534
/workspace/coverage/default/5.sram_ctrl_executable.3696582309
/workspace/coverage/default/5.sram_ctrl_max_throughput.2920036066
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1950189158
/workspace/coverage/default/5.sram_ctrl_mem_walk.3420299135
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3968506516
/workspace/coverage/default/5.sram_ctrl_partial_access.3647838135
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.882659660
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4155242952
/workspace/coverage/default/5.sram_ctrl_regwen.3084280093
/workspace/coverage/default/5.sram_ctrl_smoke.3013489854
/workspace/coverage/default/5.sram_ctrl_stress_all.3845850762
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2815110372
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.90645354
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3923129835
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.4149597946
/workspace/coverage/default/6.sram_ctrl_alert_test.3423001040
/workspace/coverage/default/6.sram_ctrl_bijection.2885835527
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1606132382
/workspace/coverage/default/6.sram_ctrl_max_throughput.165505246
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.437055613
/workspace/coverage/default/6.sram_ctrl_mem_walk.497966319
/workspace/coverage/default/6.sram_ctrl_multiple_keys.476793060
/workspace/coverage/default/6.sram_ctrl_partial_access.1798887568
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4093581103
/workspace/coverage/default/6.sram_ctrl_ram_cfg.859683025
/workspace/coverage/default/6.sram_ctrl_regwen.3675508093
/workspace/coverage/default/6.sram_ctrl_smoke.281653079
/workspace/coverage/default/6.sram_ctrl_stress_all.2541285109
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1817300174
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.909506021
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3464220974
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3856665753
/workspace/coverage/default/7.sram_ctrl_alert_test.3103211606
/workspace/coverage/default/7.sram_ctrl_bijection.289617284
/workspace/coverage/default/7.sram_ctrl_executable.2999155112
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1710339370
/workspace/coverage/default/7.sram_ctrl_max_throughput.152535662
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2925038900
/workspace/coverage/default/7.sram_ctrl_mem_walk.147550630
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2716166764
/workspace/coverage/default/7.sram_ctrl_partial_access.2062625568
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2838364700
/workspace/coverage/default/7.sram_ctrl_ram_cfg.450710
/workspace/coverage/default/7.sram_ctrl_regwen.2097545061
/workspace/coverage/default/7.sram_ctrl_smoke.3034024976
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.867717932
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3677990895
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1391904445
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2533223973
/workspace/coverage/default/8.sram_ctrl_alert_test.3065071507
/workspace/coverage/default/8.sram_ctrl_executable.369749155
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1124618521
/workspace/coverage/default/8.sram_ctrl_max_throughput.2789498180
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1263927971
/workspace/coverage/default/8.sram_ctrl_mem_walk.2389925069
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3998034928
/workspace/coverage/default/8.sram_ctrl_partial_access.2028198178
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2148383801
/workspace/coverage/default/8.sram_ctrl_ram_cfg.871880664
/workspace/coverage/default/8.sram_ctrl_regwen.2603275433
/workspace/coverage/default/8.sram_ctrl_smoke.2450029165
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1243848644
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2796659135
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1727456277
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.894905162
/workspace/coverage/default/9.sram_ctrl_alert_test.4014828123
/workspace/coverage/default/9.sram_ctrl_bijection.4190056694
/workspace/coverage/default/9.sram_ctrl_executable.1891488166
/workspace/coverage/default/9.sram_ctrl_max_throughput.2539247197
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2400337442
/workspace/coverage/default/9.sram_ctrl_mem_walk.1863568939
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2922585234
/workspace/coverage/default/9.sram_ctrl_partial_access.1933678084
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.43021694
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1287128638
/workspace/coverage/default/9.sram_ctrl_regwen.2070665340
/workspace/coverage/default/9.sram_ctrl_smoke.1048084258
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4119543601
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1753464877
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3646182846



Total test records in report: 990
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.403483479 Jan 14 02:32:41 PM PST 24 Jan 14 02:33:18 PM PST 24 722780723 ps
T2 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1537484742 Jan 14 02:23:07 PM PST 24 Jan 14 02:35:59 PM PST 24 7743184691 ps
T3 /workspace/coverage/default/5.sram_ctrl_lc_escalation.3053582893 Jan 14 02:15:02 PM PST 24 Jan 14 02:16:12 PM PST 24 2648856082 ps
T4 /workspace/coverage/default/43.sram_ctrl_multiple_keys.2935076136 Jan 14 02:31:51 PM PST 24 Jan 14 02:52:25 PM PST 24 24040038888 ps
T5 /workspace/coverage/default/48.sram_ctrl_partial_access.3352206748 Jan 14 02:33:33 PM PST 24 Jan 14 02:33:57 PM PST 24 5100886109 ps
T8 /workspace/coverage/default/15.sram_ctrl_max_throughput.632236259 Jan 14 02:19:40 PM PST 24 Jan 14 02:22:23 PM PST 24 3455815680 ps
T9 /workspace/coverage/default/33.sram_ctrl_smoke.3499262013 Jan 14 02:27:55 PM PST 24 Jan 14 02:28:25 PM PST 24 568786695 ps
T10 /workspace/coverage/default/14.sram_ctrl_bijection.1446678158 Jan 14 02:19:02 PM PST 24 Jan 14 02:53:17 PM PST 24 30090723470 ps
T11 /workspace/coverage/default/17.sram_ctrl_smoke.4249477139 Jan 14 02:20:31 PM PST 24 Jan 14 02:21:08 PM PST 24 847547378 ps
T12 /workspace/coverage/default/18.sram_ctrl_bijection.1568831336 Jan 14 02:21:01 PM PST 24 Jan 14 02:29:43 PM PST 24 24237161072 ps
T15 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.3342593836 Jan 14 02:22:44 PM PST 24 Jan 14 02:31:04 PM PST 24 35641414993 ps
T14 /workspace/coverage/default/11.sram_ctrl_mem_walk.3581037346 Jan 14 02:17:59 PM PST 24 Jan 14 02:20:35 PM PST 24 21522295566 ps
T30 /workspace/coverage/default/35.sram_ctrl_ram_cfg.1561155154 Jan 14 02:28:53 PM PST 24 Jan 14 02:29:01 PM PST 24 363937350 ps
T6 /workspace/coverage/default/17.sram_ctrl_lc_escalation.2139390545 Jan 14 02:20:36 PM PST 24 Jan 14 02:22:48 PM PST 24 10062814656 ps
T108 /workspace/coverage/default/21.sram_ctrl_bijection.2938746146 Jan 14 02:22:28 PM PST 24 Jan 14 02:55:14 PM PST 24 101772601016 ps
T7 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1297052592 Jan 14 02:28:02 PM PST 24 Jan 14 02:29:15 PM PST 24 34523174298 ps
T104 /workspace/coverage/default/47.sram_ctrl_smoke.2277045401 Jan 14 02:33:27 PM PST 24 Jan 14 02:33:48 PM PST 24 873779482 ps
T20 /workspace/coverage/default/33.sram_ctrl_alert_test.2534881970 Jan 14 02:28:14 PM PST 24 Jan 14 02:28:15 PM PST 24 133338811 ps
T134 /workspace/coverage/default/49.sram_ctrl_bijection.3507143604 Jan 14 02:33:57 PM PST 24 Jan 14 02:43:27 PM PST 24 16741834380 ps
T77 /workspace/coverage/default/29.sram_ctrl_smoke.1697702654 Jan 14 02:26:04 PM PST 24 Jan 14 02:26:39 PM PST 24 3737748323 ps
T48 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1176223251 Jan 14 02:19:39 PM PST 24 Jan 14 02:24:36 PM PST 24 11185390530 ps
T96 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.942107631 Jan 14 02:28:00 PM PST 24 Jan 14 02:30:17 PM PST 24 1610302594 ps
T16 /workspace/coverage/default/23.sram_ctrl_regwen.3529540633 Jan 14 02:23:42 PM PST 24 Jan 14 02:34:29 PM PST 24 20570274289 ps
T19 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2011862354 Jan 14 02:30:47 PM PST 24 Jan 14 02:41:51 PM PST 24 5498997844 ps
T78 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.894905162 Jan 14 02:16:49 PM PST 24 Jan 14 02:20:10 PM PST 24 3500864521 ps
T49 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3718296811 Jan 14 02:31:52 PM PST 24 Jan 14 02:36:48 PM PST 24 3737953537 ps
T97 /workspace/coverage/default/3.sram_ctrl_mem_walk.374447641 Jan 14 02:13:38 PM PST 24 Jan 14 02:16:10 PM PST 24 7845610277 ps
T98 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3394839451 Jan 14 02:24:24 PM PST 24 Jan 14 02:34:22 PM PST 24 88962604378 ps
T99 /workspace/coverage/default/47.sram_ctrl_mem_walk.1569532082 Jan 14 02:33:28 PM PST 24 Jan 14 02:36:05 PM PST 24 10756155847 ps
T100 /workspace/coverage/default/7.sram_ctrl_mem_walk.147550630 Jan 14 02:16:12 PM PST 24 Jan 14 02:19:03 PM PST 24 21496439363 ps
T79 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.861584554 Jan 14 02:33:56 PM PST 24 Jan 14 02:42:05 PM PST 24 15274271251 ps
T135 /workspace/coverage/default/25.sram_ctrl_smoke.2980864128 Jan 14 02:24:14 PM PST 24 Jan 14 02:24:28 PM PST 24 823355619 ps
T80 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3221446807 Jan 14 02:13:39 PM PST 24 Jan 14 02:14:02 PM PST 24 1725870198 ps
T37 /workspace/coverage/default/41.sram_ctrl_ram_cfg.341276297 Jan 14 02:31:16 PM PST 24 Jan 14 02:31:30 PM PST 24 343687255 ps
T23 /workspace/coverage/default/1.sram_ctrl_sec_cm.3415723275 Jan 14 02:12:33 PM PST 24 Jan 14 02:12:37 PM PST 24 219853044 ps
T41 /workspace/coverage/default/4.sram_ctrl_max_throughput.1831582549 Jan 14 02:14:02 PM PST 24 Jan 14 02:16:40 PM PST 24 3039298942 ps
T42 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2880478987 Jan 14 02:29:14 PM PST 24 Jan 14 02:30:30 PM PST 24 3955266085 ps
T17 /workspace/coverage/default/38.sram_ctrl_stress_all.4261735114 Jan 14 02:30:18 PM PST 24 Jan 14 04:29:43 PM PST 24 222055034440 ps
T43 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3856665753 Jan 14 02:16:02 PM PST 24 Jan 14 02:24:49 PM PST 24 3170260889 ps
T44 /workspace/coverage/default/5.sram_ctrl_smoke.3013489854 Jan 14 02:14:33 PM PST 24 Jan 14 02:14:46 PM PST 24 1357511813 ps
T13 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.1430975630 Jan 14 02:28:52 PM PST 24 Jan 14 02:30:14 PM PST 24 5043897437 ps
T38 /workspace/coverage/default/40.sram_ctrl_ram_cfg.1013049416 Jan 14 02:31:06 PM PST 24 Jan 14 02:31:21 PM PST 24 373285634 ps
T136 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3373702850 Jan 14 02:28:19 PM PST 24 Jan 14 02:29:25 PM PST 24 2939729949 ps
T87 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.947461713 Jan 14 02:18:22 PM PST 24 Jan 14 02:20:35 PM PST 24 1665826125 ps
T102 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3390333458 Jan 14 02:28:51 PM PST 24 Jan 14 02:31:56 PM PST 24 7788686649 ps
T103 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3618968988 Jan 14 02:30:04 PM PST 24 Jan 14 02:35:19 PM PST 24 6679319401 ps
T18 /workspace/coverage/default/19.sram_ctrl_regwen.2643670549 Jan 14 02:21:48 PM PST 24 Jan 14 02:41:47 PM PST 24 83021219453 ps
T24 /workspace/coverage/default/0.sram_ctrl_sec_cm.4174901337 Jan 14 02:11:53 PM PST 24 Jan 14 02:11:56 PM PST 24 340747980 ps
T45 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1250388730 Jan 14 02:23:58 PM PST 24 Jan 14 02:29:07 PM PST 24 12069013158 ps
T46 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.1383105448 Jan 14 02:22:36 PM PST 24 Jan 14 02:28:06 PM PST 24 70968299113 ps
T47 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1625472878 Jan 14 02:13:05 PM PST 24 Jan 14 02:15:45 PM PST 24 9567787639 ps
T137 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1974519049 Jan 14 02:25:26 PM PST 24 Jan 14 02:25:33 PM PST 24 1406729428 ps
T26 /workspace/coverage/default/4.sram_ctrl_lc_escalation.2170866501 Jan 14 02:14:02 PM PST 24 Jan 14 02:17:35 PM PST 24 22385755594 ps
T138 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3081486941 Jan 14 02:19:01 PM PST 24 Jan 14 02:23:16 PM PST 24 20251313104 ps
T139 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2255410620 Jan 14 02:12:20 PM PST 24 Jan 14 02:12:34 PM PST 24 661195685 ps
T51 /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3974055032 Jan 14 01:14:54 PM PST 24 Jan 14 01:19:27 PM PST 24 15088892754 ps
T52 /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3333705257 Jan 14 01:14:49 PM PST 24 Jan 14 01:14:52 PM PST 24 43213371 ps
T31 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2057935949 Jan 14 01:15:00 PM PST 24 Jan 14 01:15:08 PM PST 24 170752961 ps
T73 /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2324636124 Jan 14 01:14:53 PM PST 24 Jan 14 01:16:44 PM PST 24 15646859267 ps
T101 /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1074675232 Jan 14 01:15:02 PM PST 24 Jan 14 01:17:09 PM PST 24 24322445716 ps
T34 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.646152138 Jan 14 01:14:59 PM PST 24 Jan 14 01:15:08 PM PST 24 220565797 ps
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T184 /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1820637142 Jan 14 01:15:10 PM PST 24 Jan 14 01:15:20 PM PST 24 1739962631 ps
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T213 /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2363366462 Jan 14 01:15:03 PM PST 24 Jan 14 01:15:12 PM PST 24 1328065796 ps
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T217 /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2867663254 Jan 14 01:15:02 PM PST 24 Jan 14 01:15:07 PM PST 24 14227211 ps
T218 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.550183620 Jan 14 02:31:57 PM PST 24 Jan 14 02:44:51 PM PST 24 20555221409 ps
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