| T277 |
/workspace/coverage/default/42.sram_ctrl_alert_test.2084179417 |
|
|
Jan 17 02:45:31 PM PST 24 |
Jan 17 02:45:32 PM PST 24 |
42580520 ps |
| T278 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.1391154750 |
|
|
Jan 17 02:40:39 PM PST 24 |
Jan 17 02:46:55 PM PST 24 |
40165065422 ps |
| T279 |
/workspace/coverage/default/38.sram_ctrl_regwen.2523922257 |
|
|
Jan 17 02:43:58 PM PST 24 |
Jan 17 03:00:19 PM PST 24 |
4458963760 ps |
| T280 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2307724812 |
|
|
Jan 17 02:38:53 PM PST 24 |
Jan 17 02:41:23 PM PST 24 |
780127887 ps |
| T281 |
/workspace/coverage/default/30.sram_ctrl_bijection.3537284763 |
|
|
Jan 17 02:41:21 PM PST 24 |
Jan 17 03:03:26 PM PST 24 |
19286094871 ps |
| T282 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2519912135 |
|
|
Jan 17 02:43:39 PM PST 24 |
Jan 17 02:44:56 PM PST 24 |
9785899676 ps |
| T283 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1211506437 |
|
|
Jan 17 02:33:24 PM PST 24 |
Jan 17 02:33:38 PM PST 24 |
347293677 ps |
| T140 |
/workspace/coverage/default/33.sram_ctrl_stress_all.1943276327 |
|
|
Jan 17 02:42:28 PM PST 24 |
Jan 17 03:23:43 PM PST 24 |
905611996395 ps |
| T284 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2653505511 |
|
|
Jan 17 02:33:00 PM PST 24 |
Jan 17 02:37:16 PM PST 24 |
10479634582 ps |
| T285 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.4290660095 |
|
|
Jan 17 02:41:12 PM PST 24 |
Jan 17 02:43:26 PM PST 24 |
1552138817 ps |
| T286 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1639893602 |
|
|
Jan 17 02:33:26 PM PST 24 |
Jan 17 02:34:51 PM PST 24 |
21397906114 ps |
| T287 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2292690687 |
|
|
Jan 17 02:33:19 PM PST 24 |
Jan 17 02:33:34 PM PST 24 |
1273544874 ps |
| T288 |
/workspace/coverage/default/35.sram_ctrl_bijection.77432878 |
|
|
Jan 17 02:42:53 PM PST 24 |
Jan 17 03:12:17 PM PST 24 |
103612868348 ps |
| T289 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.2668464107 |
|
|
Jan 17 02:40:48 PM PST 24 |
Jan 17 02:41:57 PM PST 24 |
746449583 ps |
| T290 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2395988585 |
|
|
Jan 17 02:33:50 PM PST 24 |
Jan 17 02:41:50 PM PST 24 |
55598380889 ps |
| T291 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.457098149 |
|
|
Jan 17 02:47:34 PM PST 24 |
Jan 17 02:57:47 PM PST 24 |
3844724268 ps |
| T292 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1514007803 |
|
|
Jan 17 02:38:02 PM PST 24 |
Jan 17 03:28:46 PM PST 24 |
1247911298 ps |
| T144 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3067446075 |
|
|
Jan 17 02:42:09 PM PST 24 |
Jan 17 02:43:37 PM PST 24 |
2461296717 ps |
| T293 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1934555061 |
|
|
Jan 17 02:34:37 PM PST 24 |
Jan 17 03:37:28 PM PST 24 |
2165276919 ps |
| T294 |
/workspace/coverage/default/1.sram_ctrl_smoke.1481726814 |
|
|
Jan 17 02:33:24 PM PST 24 |
Jan 17 02:35:01 PM PST 24 |
4947107731 ps |
| T143 |
/workspace/coverage/default/14.sram_ctrl_regwen.2396801672 |
|
|
Jan 17 02:35:23 PM PST 24 |
Jan 17 02:48:19 PM PST 24 |
12626377254 ps |
| T295 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3287854896 |
|
|
Jan 17 02:33:40 PM PST 24 |
Jan 17 02:33:55 PM PST 24 |
2238894268 ps |
| T296 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.2895124838 |
|
|
Jan 17 02:33:28 PM PST 24 |
Jan 17 02:37:46 PM PST 24 |
7040494397 ps |
| T297 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.3881839147 |
|
|
Jan 17 02:39:54 PM PST 24 |
Jan 17 02:41:24 PM PST 24 |
33318649402 ps |
| T298 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.347338544 |
|
|
Jan 17 02:40:53 PM PST 24 |
Jan 17 02:46:20 PM PST 24 |
187863297326 ps |
| T299 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4042701536 |
|
|
Jan 17 02:33:35 PM PST 24 |
Jan 17 02:40:54 PM PST 24 |
26210975280 ps |
| T300 |
/workspace/coverage/default/40.sram_ctrl_smoke.3785095800 |
|
|
Jan 17 02:44:14 PM PST 24 |
Jan 17 02:44:26 PM PST 24 |
502725440 ps |
| T301 |
/workspace/coverage/default/10.sram_ctrl_executable.3634531980 |
|
|
Jan 17 02:34:30 PM PST 24 |
Jan 17 02:52:22 PM PST 24 |
60834997455 ps |
| T302 |
/workspace/coverage/default/32.sram_ctrl_partial_access.2685782540 |
|
|
Jan 17 02:42:02 PM PST 24 |
Jan 17 02:42:15 PM PST 24 |
1450013150 ps |
| T303 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2449504348 |
|
|
Jan 17 02:37:39 PM PST 24 |
Jan 17 02:39:03 PM PST 24 |
1318179019 ps |
| T304 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1252605703 |
|
|
Jan 17 02:37:54 PM PST 24 |
Jan 17 02:40:32 PM PST 24 |
4515581645 ps |
| T305 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2652490918 |
|
|
Jan 17 02:39:26 PM PST 24 |
Jan 17 02:48:18 PM PST 24 |
12594556890 ps |
| T306 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2127171806 |
|
|
Jan 17 02:35:31 PM PST 24 |
Jan 17 02:35:39 PM PST 24 |
349940931 ps |
| T307 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2723070672 |
|
|
Jan 17 02:45:48 PM PST 24 |
Jan 17 02:51:00 PM PST 24 |
7226516125 ps |
| T308 |
/workspace/coverage/default/26.sram_ctrl_alert_test.4134859872 |
|
|
Jan 17 02:40:17 PM PST 24 |
Jan 17 02:40:19 PM PST 24 |
32421812 ps |
| T309 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2804783935 |
|
|
Jan 17 02:46:23 PM PST 24 |
Jan 17 03:58:02 PM PST 24 |
1107148327 ps |
| T310 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1679336302 |
|
|
Jan 17 02:44:12 PM PST 24 |
Jan 17 03:41:14 PM PST 24 |
1362911783 ps |
| T311 |
/workspace/coverage/default/31.sram_ctrl_regwen.2663606176 |
|
|
Jan 17 02:41:58 PM PST 24 |
Jan 17 03:03:02 PM PST 24 |
18623526842 ps |
| T312 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3446763384 |
|
|
Jan 17 02:34:52 PM PST 24 |
Jan 17 02:35:01 PM PST 24 |
3372955744 ps |
| T313 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.658380781 |
|
|
Jan 17 02:32:33 PM PST 24 |
Jan 17 02:34:28 PM PST 24 |
755325676 ps |
| T141 |
/workspace/coverage/default/26.sram_ctrl_regwen.501990632 |
|
|
Jan 17 02:40:14 PM PST 24 |
Jan 17 02:48:22 PM PST 24 |
1969830683 ps |
| T314 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2368809299 |
|
|
Jan 17 02:40:54 PM PST 24 |
Jan 17 04:08:33 PM PST 24 |
6092931120 ps |
| T315 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.666332736 |
|
|
Jan 17 02:38:52 PM PST 24 |
Jan 17 02:43:49 PM PST 24 |
3457289167 ps |
| T316 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.421535241 |
|
|
Jan 17 02:34:17 PM PST 24 |
Jan 17 04:09:22 PM PST 24 |
7619284562 ps |
| T317 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.3031317198 |
|
|
Jan 17 02:40:13 PM PST 24 |
Jan 17 02:42:29 PM PST 24 |
107853680854 ps |
| T318 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1189854553 |
|
|
Jan 17 02:46:53 PM PST 24 |
Jan 17 02:48:02 PM PST 24 |
770294676 ps |
| T319 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.297238018 |
|
|
Jan 17 02:35:50 PM PST 24 |
Jan 17 02:35:58 PM PST 24 |
539749967 ps |
| T145 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.483084988 |
|
|
Jan 17 02:40:38 PM PST 24 |
Jan 17 02:43:14 PM PST 24 |
4978085682 ps |
| T320 |
/workspace/coverage/default/46.sram_ctrl_smoke.683878140 |
|
|
Jan 17 02:46:29 PM PST 24 |
Jan 17 02:47:07 PM PST 24 |
1619729883 ps |
| T321 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4270733449 |
|
|
Jan 17 02:45:08 PM PST 24 |
Jan 17 02:48:52 PM PST 24 |
17077305109 ps |
| T35 |
/workspace/coverage/default/4.sram_ctrl_stress_all.2154448149 |
|
|
Jan 17 02:32:54 PM PST 24 |
Jan 17 02:56:25 PM PST 24 |
156711993447 ps |
| T322 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1999944666 |
|
|
Jan 17 02:44:36 PM PST 24 |
Jan 17 02:48:43 PM PST 24 |
17126855391 ps |
| T323 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1787570575 |
|
|
Jan 17 02:40:30 PM PST 24 |
Jan 17 02:44:12 PM PST 24 |
31572333676 ps |
| T324 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.703323756 |
|
|
Jan 17 02:40:37 PM PST 24 |
Jan 17 02:48:36 PM PST 24 |
22299522290 ps |
| T325 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.3840335112 |
|
|
Jan 17 02:37:37 PM PST 24 |
Jan 17 02:38:59 PM PST 24 |
6083878663 ps |
| T326 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2270933769 |
|
|
Jan 17 02:37:41 PM PST 24 |
Jan 17 02:38:00 PM PST 24 |
1914227024 ps |
| T327 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1327447305 |
|
|
Jan 17 02:46:15 PM PST 24 |
Jan 17 02:46:58 PM PST 24 |
1489037601 ps |
| T147 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3125432455 |
|
|
Jan 17 02:38:35 PM PST 24 |
Jan 17 03:03:24 PM PST 24 |
106557474934 ps |
| T328 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1130996288 |
|
|
Jan 17 02:46:34 PM PST 24 |
Jan 17 03:04:14 PM PST 24 |
13218234306 ps |
| T329 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.183243114 |
|
|
Jan 17 02:35:26 PM PST 24 |
Jan 17 02:37:47 PM PST 24 |
8627926072 ps |
| T330 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1467460002 |
|
|
Jan 17 02:36:12 PM PST 24 |
Jan 17 02:41:10 PM PST 24 |
7100738053 ps |
| T331 |
/workspace/coverage/default/16.sram_ctrl_regwen.1492368170 |
|
|
Jan 17 02:36:24 PM PST 24 |
Jan 17 02:54:07 PM PST 24 |
3218654091 ps |
| T332 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2902573157 |
|
|
Jan 17 02:41:25 PM PST 24 |
Jan 17 02:42:13 PM PST 24 |
720430700 ps |
| T333 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.2179469562 |
|
|
Jan 17 02:37:54 PM PST 24 |
Jan 17 02:40:10 PM PST 24 |
6364747991 ps |
| T148 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1325105903 |
|
|
Jan 17 02:41:48 PM PST 24 |
Jan 17 02:48:17 PM PST 24 |
17841839864 ps |
| T334 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3666306119 |
|
|
Jan 17 02:38:19 PM PST 24 |
Jan 17 02:38:26 PM PST 24 |
348616948 ps |
| T335 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2688734502 |
|
|
Jan 17 02:47:08 PM PST 24 |
Jan 17 02:52:49 PM PST 24 |
16487838964 ps |
| T336 |
/workspace/coverage/default/49.sram_ctrl_bijection.2477991115 |
|
|
Jan 17 02:47:34 PM PST 24 |
Jan 17 02:57:05 PM PST 24 |
9445977850 ps |
| T337 |
/workspace/coverage/default/23.sram_ctrl_regwen.783710967 |
|
|
Jan 17 02:39:13 PM PST 24 |
Jan 17 02:52:14 PM PST 24 |
27958978229 ps |
| T338 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.874440216 |
|
|
Jan 17 02:36:36 PM PST 24 |
Jan 17 02:48:04 PM PST 24 |
152852464990 ps |
| T339 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3405367593 |
|
|
Jan 17 02:37:10 PM PST 24 |
Jan 17 02:43:50 PM PST 24 |
64239976550 ps |
| T340 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.4095552102 |
|
|
Jan 17 02:33:27 PM PST 24 |
Jan 17 02:34:36 PM PST 24 |
751104652 ps |
| T341 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.2457326012 |
|
|
Jan 17 02:42:49 PM PST 24 |
Jan 17 02:44:51 PM PST 24 |
2038180725 ps |
| T342 |
/workspace/coverage/default/2.sram_ctrl_partial_access.454036751 |
|
|
Jan 17 02:32:34 PM PST 24 |
Jan 17 02:32:45 PM PST 24 |
773851983 ps |
| T343 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.3790539211 |
|
|
Jan 17 02:39:37 PM PST 24 |
Jan 17 02:39:53 PM PST 24 |
8080725384 ps |
| T344 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4239709931 |
|
|
Jan 17 02:33:08 PM PST 24 |
Jan 17 02:42:14 PM PST 24 |
8905550898 ps |
| T345 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.1574149160 |
|
|
Jan 17 02:35:47 PM PST 24 |
Jan 17 02:36:19 PM PST 24 |
2761489450 ps |
| T346 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.106410115 |
|
|
Jan 17 02:39:56 PM PST 24 |
Jan 17 02:40:25 PM PST 24 |
1340543500 ps |
| T347 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2336857302 |
|
|
Jan 17 02:41:56 PM PST 24 |
Jan 17 04:10:02 PM PST 24 |
4110297551 ps |
| T348 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1065246475 |
|
|
Jan 17 02:32:13 PM PST 24 |
Jan 17 03:00:16 PM PST 24 |
35110573929 ps |
| T349 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3076626176 |
|
|
Jan 17 02:34:19 PM PST 24 |
Jan 17 02:35:36 PM PST 24 |
15826998527 ps |
| T350 |
/workspace/coverage/default/43.sram_ctrl_smoke.2651697563 |
|
|
Jan 17 02:45:32 PM PST 24 |
Jan 17 02:45:41 PM PST 24 |
879799848 ps |
| T351 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2294234435 |
|
|
Jan 17 02:36:26 PM PST 24 |
Jan 17 02:38:38 PM PST 24 |
4029187572 ps |
| T149 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1607522947 |
|
|
Jan 17 02:43:09 PM PST 24 |
Jan 17 02:48:33 PM PST 24 |
55909506092 ps |
| T352 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3084177316 |
|
|
Jan 17 02:46:48 PM PST 24 |
Jan 17 02:54:02 PM PST 24 |
5782641751 ps |
| T353 |
/workspace/coverage/default/16.sram_ctrl_stress_all.3880051884 |
|
|
Jan 17 02:36:32 PM PST 24 |
Jan 17 03:33:54 PM PST 24 |
589504425484 ps |
| T354 |
/workspace/coverage/default/42.sram_ctrl_bijection.1625821949 |
|
|
Jan 17 02:45:02 PM PST 24 |
Jan 17 02:54:26 PM PST 24 |
54159358083 ps |
| T355 |
/workspace/coverage/default/6.sram_ctrl_partial_access.468071703 |
|
|
Jan 17 02:33:44 PM PST 24 |
Jan 17 02:34:18 PM PST 24 |
2636900130 ps |
| T356 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.573953248 |
|
|
Jan 17 02:47:14 PM PST 24 |
Jan 17 03:16:33 PM PST 24 |
8841578884 ps |
| T357 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3137510814 |
|
|
Jan 17 02:46:14 PM PST 24 |
Jan 17 02:55:14 PM PST 24 |
23490970356 ps |
| T358 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.872376788 |
|
|
Jan 17 02:35:09 PM PST 24 |
Jan 17 03:38:27 PM PST 24 |
318505322 ps |
| T359 |
/workspace/coverage/default/23.sram_ctrl_executable.4172536138 |
|
|
Jan 17 02:39:15 PM PST 24 |
Jan 17 02:48:14 PM PST 24 |
16819531517 ps |
| T360 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.2295140568 |
|
|
Jan 17 02:33:54 PM PST 24 |
Jan 17 02:36:29 PM PST 24 |
8688354475 ps |
| T361 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.605002308 |
|
|
Jan 17 02:42:49 PM PST 24 |
Jan 17 03:13:25 PM PST 24 |
46056258961 ps |
| T362 |
/workspace/coverage/default/24.sram_ctrl_partial_access.3060912349 |
|
|
Jan 17 02:39:32 PM PST 24 |
Jan 17 02:40:30 PM PST 24 |
795352963 ps |
| T363 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.110708705 |
|
|
Jan 17 02:45:02 PM PST 24 |
Jan 17 03:09:43 PM PST 24 |
66396996609 ps |
| T364 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.1728165921 |
|
|
Jan 17 02:43:10 PM PST 24 |
Jan 17 02:44:54 PM PST 24 |
11264430253 ps |
| T365 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1774153598 |
|
|
Jan 17 02:46:54 PM PST 24 |
Jan 17 02:47:03 PM PST 24 |
752487734 ps |
| T366 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.3262309898 |
|
|
Jan 17 02:42:20 PM PST 24 |
Jan 17 02:52:17 PM PST 24 |
18946307195 ps |
| T367 |
/workspace/coverage/default/29.sram_ctrl_regwen.2132820266 |
|
|
Jan 17 02:41:11 PM PST 24 |
Jan 17 03:04:35 PM PST 24 |
36168442512 ps |
| T368 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3068691558 |
|
|
Jan 17 02:38:19 PM PST 24 |
Jan 17 02:39:00 PM PST 24 |
718775140 ps |
| T369 |
/workspace/coverage/default/28.sram_ctrl_smoke.1405107629 |
|
|
Jan 17 02:40:37 PM PST 24 |
Jan 17 02:41:27 PM PST 24 |
683209022 ps |
| T370 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.1553993958 |
|
|
Jan 17 02:43:20 PM PST 24 |
Jan 17 02:47:28 PM PST 24 |
5800181376 ps |
| T371 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1809914724 |
|
|
Jan 17 02:32:57 PM PST 24 |
Jan 17 02:37:12 PM PST 24 |
17906460779 ps |
| T372 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.4216632882 |
|
|
Jan 17 02:37:13 PM PST 24 |
Jan 17 02:39:54 PM PST 24 |
5148586621 ps |
| T373 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.304098845 |
|
|
Jan 17 02:38:46 PM PST 24 |
Jan 17 03:13:01 PM PST 24 |
24226181292 ps |
| T374 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2417994135 |
|
|
Jan 17 02:44:58 PM PST 24 |
Jan 17 02:48:09 PM PST 24 |
74731705326 ps |
| T375 |
/workspace/coverage/default/31.sram_ctrl_bijection.1759453397 |
|
|
Jan 17 02:41:42 PM PST 24 |
Jan 17 02:57:35 PM PST 24 |
173466436198 ps |
| T376 |
/workspace/coverage/default/5.sram_ctrl_bijection.390594455 |
|
|
Jan 17 02:32:54 PM PST 24 |
Jan 17 03:01:21 PM PST 24 |
123005474382 ps |
| T377 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1664676905 |
|
|
Jan 17 02:46:47 PM PST 24 |
Jan 17 02:50:55 PM PST 24 |
40023900113 ps |
| T378 |
/workspace/coverage/default/41.sram_ctrl_stress_all.1907282858 |
|
|
Jan 17 02:45:02 PM PST 24 |
Jan 17 04:40:04 PM PST 24 |
1161904908568 ps |
| T379 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.4252938750 |
|
|
Jan 17 02:37:53 PM PST 24 |
Jan 17 03:57:00 PM PST 24 |
913992412 ps |
| T380 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.992017312 |
|
|
Jan 17 02:37:39 PM PST 24 |
Jan 17 02:38:33 PM PST 24 |
1507899862 ps |
| T381 |
/workspace/coverage/default/44.sram_ctrl_stress_all.2317850486 |
|
|
Jan 17 02:46:13 PM PST 24 |
Jan 17 03:20:56 PM PST 24 |
150860419084 ps |
| T382 |
/workspace/coverage/default/34.sram_ctrl_smoke.3418001120 |
|
|
Jan 17 02:42:28 PM PST 24 |
Jan 17 02:42:58 PM PST 24 |
717344344 ps |
| T383 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2006617396 |
|
|
Jan 17 02:47:43 PM PST 24 |
Jan 17 02:50:21 PM PST 24 |
9970113738 ps |
| T384 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3545930090 |
|
|
Jan 17 02:32:29 PM PST 24 |
Jan 17 03:42:41 PM PST 24 |
137298353260 ps |
| T385 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2092628653 |
|
|
Jan 17 02:34:21 PM PST 24 |
Jan 17 04:07:55 PM PST 24 |
1018343094 ps |
| T386 |
/workspace/coverage/default/24.sram_ctrl_regwen.3271942896 |
|
|
Jan 17 02:39:43 PM PST 24 |
Jan 17 03:08:38 PM PST 24 |
15283672750 ps |
| T387 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1700626418 |
|
|
Jan 17 02:45:53 PM PST 24 |
Jan 17 02:52:56 PM PST 24 |
17090456276 ps |
| T388 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1022164289 |
|
|
Jan 17 02:33:51 PM PST 24 |
Jan 17 04:08:12 PM PST 24 |
921181554 ps |
| T389 |
/workspace/coverage/default/34.sram_ctrl_alert_test.4199380437 |
|
|
Jan 17 02:42:52 PM PST 24 |
Jan 17 02:42:53 PM PST 24 |
17347866 ps |
| T390 |
/workspace/coverage/default/41.sram_ctrl_regwen.653848196 |
|
|
Jan 17 02:44:57 PM PST 24 |
Jan 17 02:57:49 PM PST 24 |
24439385174 ps |
| T391 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4215262154 |
|
|
Jan 17 02:47:44 PM PST 24 |
Jan 17 03:58:07 PM PST 24 |
5116101759 ps |
| T392 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.3177820633 |
|
|
Jan 17 02:46:48 PM PST 24 |
Jan 17 02:47:57 PM PST 24 |
773173408 ps |
| T393 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3096841444 |
|
|
Jan 17 02:47:35 PM PST 24 |
Jan 17 02:56:12 PM PST 24 |
8029346741 ps |
| T394 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3133620855 |
|
|
Jan 17 02:42:19 PM PST 24 |
Jan 17 02:43:24 PM PST 24 |
731039755 ps |
| T395 |
/workspace/coverage/default/4.sram_ctrl_bijection.1169094817 |
|
|
Jan 17 02:34:31 PM PST 24 |
Jan 17 02:52:46 PM PST 24 |
71270883438 ps |
| T396 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2395868774 |
|
|
Jan 17 02:32:14 PM PST 24 |
Jan 17 02:32:47 PM PST 24 |
1404172788 ps |
| T397 |
/workspace/coverage/default/43.sram_ctrl_alert_test.787426789 |
|
|
Jan 17 02:45:45 PM PST 24 |
Jan 17 02:45:46 PM PST 24 |
12393836 ps |
| T398 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3666418186 |
|
|
Jan 17 02:35:45 PM PST 24 |
Jan 17 02:35:47 PM PST 24 |
51351482 ps |
| T399 |
/workspace/coverage/default/28.sram_ctrl_regwen.1546811334 |
|
|
Jan 17 02:40:54 PM PST 24 |
Jan 17 02:54:01 PM PST 24 |
9341328415 ps |
| T400 |
/workspace/coverage/default/8.sram_ctrl_regwen.2734227867 |
|
|
Jan 17 02:33:23 PM PST 24 |
Jan 17 02:41:33 PM PST 24 |
9002160225 ps |
| T401 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1879160256 |
|
|
Jan 17 02:37:06 PM PST 24 |
Jan 17 02:39:26 PM PST 24 |
807669735 ps |
| T402 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1955470390 |
|
|
Jan 17 02:32:12 PM PST 24 |
Jan 17 02:49:56 PM PST 24 |
9387263083 ps |
| T403 |
/workspace/coverage/default/20.sram_ctrl_partial_access.2951499357 |
|
|
Jan 17 02:37:57 PM PST 24 |
Jan 17 02:38:15 PM PST 24 |
3262811660 ps |
| T404 |
/workspace/coverage/default/42.sram_ctrl_partial_access.2662775419 |
|
|
Jan 17 02:45:07 PM PST 24 |
Jan 17 02:47:19 PM PST 24 |
1843348854 ps |
| T405 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3912209495 |
|
|
Jan 17 02:37:41 PM PST 24 |
Jan 17 02:37:49 PM PST 24 |
683894734 ps |
| T406 |
/workspace/coverage/default/21.sram_ctrl_bijection.1774060880 |
|
|
Jan 17 02:38:32 PM PST 24 |
Jan 17 03:15:58 PM PST 24 |
121999900081 ps |
| T407 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3011425957 |
|
|
Jan 17 02:38:02 PM PST 24 |
Jan 17 02:39:19 PM PST 24 |
2393371679 ps |
| T408 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1706167501 |
|
|
Jan 17 02:45:22 PM PST 24 |
Jan 17 02:46:01 PM PST 24 |
1474615663 ps |
| T409 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3157129268 |
|
|
Jan 17 02:32:18 PM PST 24 |
Jan 17 04:13:53 PM PST 24 |
1673888793 ps |
| T410 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1944924574 |
|
|
Jan 17 02:38:18 PM PST 24 |
Jan 17 02:38:20 PM PST 24 |
15512649 ps |
| T411 |
/workspace/coverage/default/29.sram_ctrl_bijection.3354943718 |
|
|
Jan 17 02:41:01 PM PST 24 |
Jan 17 02:57:34 PM PST 24 |
27447870074 ps |
| T412 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4102757080 |
|
|
Jan 17 02:37:58 PM PST 24 |
Jan 17 02:44:13 PM PST 24 |
15764437164 ps |
| T413 |
/workspace/coverage/default/27.sram_ctrl_regwen.3732522756 |
|
|
Jan 17 02:40:28 PM PST 24 |
Jan 17 02:59:37 PM PST 24 |
30855555783 ps |
| T414 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.280825945 |
|
|
Jan 17 02:42:37 PM PST 24 |
Jan 17 02:48:37 PM PST 24 |
6180602248 ps |
| T415 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.458887086 |
|
|
Jan 17 02:39:15 PM PST 24 |
Jan 17 02:45:21 PM PST 24 |
21293413412 ps |
| T416 |
/workspace/coverage/default/8.sram_ctrl_smoke.2346141379 |
|
|
Jan 17 02:33:17 PM PST 24 |
Jan 17 02:33:34 PM PST 24 |
4946982216 ps |
| T417 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.433758178 |
|
|
Jan 17 02:42:01 PM PST 24 |
Jan 17 02:46:13 PM PST 24 |
3266647009 ps |
| T418 |
/workspace/coverage/default/37.sram_ctrl_smoke.1500699878 |
|
|
Jan 17 02:43:28 PM PST 24 |
Jan 17 02:43:37 PM PST 24 |
389424512 ps |
| T419 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.2677733500 |
|
|
Jan 17 02:39:13 PM PST 24 |
Jan 17 02:39:43 PM PST 24 |
715423024 ps |
| T420 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.3949347965 |
|
|
Jan 17 02:34:53 PM PST 24 |
Jan 17 02:35:01 PM PST 24 |
366527106 ps |
| T421 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2816600787 |
|
|
Jan 17 02:43:05 PM PST 24 |
Jan 17 03:59:34 PM PST 24 |
1234462462 ps |
| T422 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3257148468 |
|
|
Jan 17 02:38:04 PM PST 24 |
Jan 17 02:38:15 PM PST 24 |
345873241 ps |
| T423 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.999411212 |
|
|
Jan 17 02:36:27 PM PST 24 |
Jan 17 02:40:49 PM PST 24 |
15767231433 ps |
| T424 |
/workspace/coverage/default/46.sram_ctrl_alert_test.4042526961 |
|
|
Jan 17 02:46:47 PM PST 24 |
Jan 17 02:46:49 PM PST 24 |
48856055 ps |
| T425 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.3551085503 |
|
|
Jan 17 02:34:57 PM PST 24 |
Jan 17 02:37:15 PM PST 24 |
3113770731 ps |
| T426 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3613817657 |
|
|
Jan 17 02:32:12 PM PST 24 |
Jan 17 02:34:46 PM PST 24 |
10569949336 ps |
| T427 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.235468218 |
|
|
Jan 17 02:32:34 PM PST 24 |
Jan 17 02:34:05 PM PST 24 |
2487278924 ps |
| T428 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.502700146 |
|
|
Jan 17 02:37:40 PM PST 24 |
Jan 17 02:39:10 PM PST 24 |
786363926 ps |
| T429 |
/workspace/coverage/default/16.sram_ctrl_partial_access.434178811 |
|
|
Jan 17 02:37:41 PM PST 24 |
Jan 17 02:38:32 PM PST 24 |
1509417773 ps |
| T430 |
/workspace/coverage/default/24.sram_ctrl_executable.3457163793 |
|
|
Jan 17 02:39:37 PM PST 24 |
Jan 17 02:59:27 PM PST 24 |
18319355825 ps |
| T431 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.23948104 |
|
|
Jan 17 02:39:43 PM PST 24 |
Jan 17 02:42:20 PM PST 24 |
28728412990 ps |
| T432 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2938787222 |
|
|
Jan 17 02:32:12 PM PST 24 |
Jan 17 03:25:28 PM PST 24 |
54162273585 ps |
| T433 |
/workspace/coverage/default/6.sram_ctrl_executable.4186657066 |
|
|
Jan 17 02:33:32 PM PST 24 |
Jan 17 02:43:05 PM PST 24 |
2416724044 ps |
| T434 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.3694142456 |
|
|
Jan 17 02:41:20 PM PST 24 |
Jan 17 02:47:15 PM PST 24 |
20142948292 ps |
| T435 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.936061050 |
|
|
Jan 17 02:37:59 PM PST 24 |
Jan 17 02:38:34 PM PST 24 |
3788659509 ps |
| T436 |
/workspace/coverage/default/18.sram_ctrl_smoke.948675326 |
|
|
Jan 17 02:37:02 PM PST 24 |
Jan 17 02:39:42 PM PST 24 |
3058291958 ps |
| T437 |
/workspace/coverage/default/19.sram_ctrl_stress_all.1715161124 |
|
|
Jan 17 02:37:54 PM PST 24 |
Jan 17 04:04:56 PM PST 24 |
590233094117 ps |
| T438 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.591509887 |
|
|
Jan 17 02:36:31 PM PST 24 |
Jan 17 02:42:48 PM PST 24 |
24076902328 ps |
| T439 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.914043788 |
|
|
Jan 17 02:46:24 PM PST 24 |
Jan 17 02:48:34 PM PST 24 |
8225251258 ps |
| T440 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.2366052469 |
|
|
Jan 17 02:44:11 PM PST 24 |
Jan 17 02:45:29 PM PST 24 |
992685722 ps |
| T441 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2927350998 |
|
|
Jan 17 02:40:54 PM PST 24 |
Jan 17 02:52:10 PM PST 24 |
5883664413 ps |
| T442 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.1160079174 |
|
|
Jan 17 02:37:06 PM PST 24 |
Jan 17 02:39:40 PM PST 24 |
13540303700 ps |
| T443 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1163233932 |
|
|
Jan 17 02:36:36 PM PST 24 |
Jan 17 02:39:28 PM PST 24 |
3259885501 ps |
| T444 |
/workspace/coverage/default/9.sram_ctrl_alert_test.545827277 |
|
|
Jan 17 02:36:00 PM PST 24 |
Jan 17 02:36:01 PM PST 24 |
12013975 ps |
| T445 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.429245374 |
|
|
Jan 17 02:35:43 PM PST 24 |
Jan 17 02:38:03 PM PST 24 |
3085297722 ps |
| T446 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1519579329 |
|
|
Jan 17 02:34:10 PM PST 24 |
Jan 17 02:59:23 PM PST 24 |
95523256235 ps |
| T447 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.2767181023 |
|
|
Jan 17 02:45:23 PM PST 24 |
Jan 17 02:47:21 PM PST 24 |
760975112 ps |
| T448 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.569454194 |
|
|
Jan 17 02:41:11 PM PST 24 |
Jan 17 02:41:31 PM PST 24 |
846862916 ps |
| T449 |
/workspace/coverage/default/14.sram_ctrl_partial_access.916942123 |
|
|
Jan 17 02:35:16 PM PST 24 |
Jan 17 02:35:51 PM PST 24 |
7140399635 ps |
| T450 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2637613859 |
|
|
Jan 17 02:47:34 PM PST 24 |
Jan 17 02:48:15 PM PST 24 |
2800992533 ps |
| T451 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.4231839431 |
|
|
Jan 17 02:34:26 PM PST 24 |
Jan 17 02:41:07 PM PST 24 |
21537995379 ps |
| T452 |
/workspace/coverage/default/12.sram_ctrl_stress_all.986941034 |
|
|
Jan 17 02:34:38 PM PST 24 |
Jan 17 03:16:01 PM PST 24 |
35337447030 ps |
| T453 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.727843650 |
|
|
Jan 17 02:32:56 PM PST 24 |
Jan 17 02:35:50 PM PST 24 |
5999593307 ps |
| T454 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2263675217 |
|
|
Jan 17 02:42:36 PM PST 24 |
Jan 17 03:11:19 PM PST 24 |
21998072436 ps |
| T455 |
/workspace/coverage/default/39.sram_ctrl_smoke.3391116906 |
|
|
Jan 17 02:44:03 PM PST 24 |
Jan 17 02:44:43 PM PST 24 |
1006893168 ps |
| T456 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2414221595 |
|
|
Jan 17 02:36:32 PM PST 24 |
Jan 17 03:56:59 PM PST 24 |
1462147842 ps |
| T457 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.2510003959 |
|
|
Jan 17 02:37:31 PM PST 24 |
Jan 17 02:46:03 PM PST 24 |
6284874953 ps |
| T150 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3967734157 |
|
|
Jan 17 02:43:32 PM PST 24 |
Jan 17 02:48:55 PM PST 24 |
14414266909 ps |
| T458 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3326173781 |
|
|
Jan 17 02:33:46 PM PST 24 |
Jan 17 02:33:47 PM PST 24 |
36617555 ps |
| T459 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.4139751050 |
|
|
Jan 17 02:36:14 PM PST 24 |
Jan 17 02:37:06 PM PST 24 |
2813123579 ps |
| T460 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.3686548857 |
|
|
Jan 17 02:41:33 PM PST 24 |
Jan 17 02:45:45 PM PST 24 |
15766799851 ps |
| T461 |
/workspace/coverage/default/17.sram_ctrl_regwen.2925830915 |
|
|
Jan 17 02:36:44 PM PST 24 |
Jan 17 03:05:03 PM PST 24 |
44545234413 ps |
| T462 |
/workspace/coverage/default/19.sram_ctrl_executable.2411650879 |
|
|
Jan 17 02:37:40 PM PST 24 |
Jan 17 02:47:59 PM PST 24 |
115232301387 ps |
| T30 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.2328294021 |
|
|
Jan 17 02:34:04 PM PST 24 |
Jan 17 02:34:09 PM PST 24 |
144297796 ps |
| T42 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2604993340 |
|
|
Jan 17 02:45:55 PM PST 24 |
Jan 17 02:48:12 PM PST 24 |
13742752226 ps |
| T43 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.2761602717 |
|
|
Jan 17 02:43:43 PM PST 24 |
Jan 17 02:52:30 PM PST 24 |
41997239755 ps |
| T44 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2893032651 |
|
|
Jan 17 02:34:29 PM PST 24 |
Jan 17 02:36:41 PM PST 24 |
4263879200 ps |
| T45 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.627621128 |
|
|
Jan 17 02:43:31 PM PST 24 |
Jan 17 02:50:16 PM PST 24 |
3216884507 ps |
| T46 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.3540158323 |
|
|
Jan 17 02:40:39 PM PST 24 |
Jan 17 02:40:52 PM PST 24 |
350944116 ps |
| T47 |
/workspace/coverage/default/8.sram_ctrl_executable.836263797 |
|
|
Jan 17 02:34:11 PM PST 24 |
Jan 17 02:43:51 PM PST 24 |
9198963774 ps |
| T48 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3017946602 |
|
|
Jan 17 02:42:09 PM PST 24 |
Jan 17 02:44:37 PM PST 24 |
9999936472 ps |
| T49 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3564253145 |
|
|
Jan 17 02:32:40 PM PST 24 |
Jan 17 02:37:50 PM PST 24 |
3942656968 ps |
| T50 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.459227197 |
|
|
Jan 17 02:43:57 PM PST 24 |
Jan 17 02:44:04 PM PST 24 |
362561067 ps |
| T463 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.4131127700 |
|
|
Jan 17 02:42:57 PM PST 24 |
Jan 17 02:47:54 PM PST 24 |
30249198969 ps |
| T464 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.2066686374 |
|
|
Jan 17 02:44:24 PM PST 24 |
Jan 17 03:03:01 PM PST 24 |
5829501854 ps |
| T465 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3250906221 |
|
|
Jan 17 02:44:57 PM PST 24 |
Jan 17 02:47:34 PM PST 24 |
13778489450 ps |
| T466 |
/workspace/coverage/default/16.sram_ctrl_alert_test.1751733653 |
|
|
Jan 17 02:36:29 PM PST 24 |
Jan 17 02:36:31 PM PST 24 |
14631178 ps |
| T467 |
/workspace/coverage/default/36.sram_ctrl_regwen.58051316 |
|
|
Jan 17 02:43:20 PM PST 24 |
Jan 17 03:01:42 PM PST 24 |
44649291141 ps |
| T468 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.4262336283 |
|
|
Jan 17 02:33:33 PM PST 24 |
Jan 17 02:35:16 PM PST 24 |
768258565 ps |
| T469 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1888554378 |
|
|
Jan 17 02:38:02 PM PST 24 |
Jan 17 02:41:29 PM PST 24 |
6778972680 ps |
| T470 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.271170897 |
|
|
Jan 17 02:47:37 PM PST 24 |
Jan 17 03:17:36 PM PST 24 |
112463403393 ps |
| T471 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1074745540 |
|
|
Jan 17 02:33:44 PM PST 24 |
Jan 17 02:36:18 PM PST 24 |
5185873667 ps |
| T472 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3201129100 |
|
|
Jan 17 02:33:15 PM PST 24 |
Jan 17 03:50:36 PM PST 24 |
181864793375 ps |
| T473 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.908440978 |
|
|
Jan 17 02:36:25 PM PST 24 |
Jan 17 02:46:25 PM PST 24 |
24134608706 ps |
| T474 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.1533104222 |
|
|
Jan 17 02:42:23 PM PST 24 |
Jan 17 02:42:31 PM PST 24 |
436585000 ps |
| T475 |
/workspace/coverage/default/4.sram_ctrl_regwen.824596149 |
|
|
Jan 17 02:34:02 PM PST 24 |
Jan 17 02:46:07 PM PST 24 |
23993102283 ps |
| T476 |
/workspace/coverage/default/26.sram_ctrl_bijection.2321311723 |
|
|
Jan 17 02:40:06 PM PST 24 |
Jan 17 03:27:16 PM PST 24 |
324590500112 ps |
| T477 |
/workspace/coverage/default/38.sram_ctrl_executable.2108450088 |
|
|
Jan 17 02:43:49 PM PST 24 |
Jan 17 03:07:54 PM PST 24 |
102592182784 ps |
| T478 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.2132900567 |
|
|
Jan 17 02:43:40 PM PST 24 |
Jan 17 02:45:48 PM PST 24 |
2021865270 ps |
| T479 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3592089409 |
|
|
Jan 17 02:32:56 PM PST 24 |
Jan 17 02:41:32 PM PST 24 |
14939797288 ps |
| T480 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1816037402 |
|
|
Jan 17 02:46:38 PM PST 24 |
Jan 17 02:46:46 PM PST 24 |
354863262 ps |
| T481 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1873060328 |
|
|
Jan 17 02:47:28 PM PST 24 |
Jan 17 02:47:30 PM PST 24 |
14290250 ps |
| T482 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3049195965 |
|
|
Jan 17 02:46:02 PM PST 24 |
Jan 17 02:46:17 PM PST 24 |
1355538705 ps |
| T483 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3622092389 |
|
|
Jan 17 02:39:45 PM PST 24 |
Jan 17 03:23:46 PM PST 24 |
955169284 ps |
| T484 |
/workspace/coverage/default/19.sram_ctrl_smoke.3583552677 |
|
|
Jan 17 02:37:17 PM PST 24 |
Jan 17 02:37:49 PM PST 24 |
2588972312 ps |
| T485 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.2434647539 |
|
|
Jan 17 02:32:27 PM PST 24 |
Jan 17 02:37:59 PM PST 24 |
4479737723 ps |
| T486 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.2478881325 |
|
|
Jan 17 02:39:06 PM PST 24 |
Jan 17 02:41:38 PM PST 24 |
5181543357 ps |
| T487 |
/workspace/coverage/default/6.sram_ctrl_bijection.660358993 |
|
|
Jan 17 02:33:02 PM PST 24 |
Jan 17 03:19:37 PM PST 24 |
179578722556 ps |
| T488 |
/workspace/coverage/default/34.sram_ctrl_partial_access.678251348 |
|
|
Jan 17 02:42:36 PM PST 24 |
Jan 17 02:42:54 PM PST 24 |
4357422759 ps |
| T489 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.911446907 |
|
|
Jan 17 02:47:20 PM PST 24 |
Jan 17 04:13:32 PM PST 24 |
4156693061 ps |
| T490 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1579718959 |
|
|
Jan 17 02:35:37 PM PST 24 |
Jan 17 02:55:18 PM PST 24 |
27124389792 ps |
| T491 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.2624547727 |
|
|
Jan 17 02:37:54 PM PST 24 |
Jan 17 02:38:01 PM PST 24 |
346008325 ps |
| T492 |
/workspace/coverage/default/21.sram_ctrl_regwen.1213962861 |
|
|
Jan 17 02:38:43 PM PST 24 |
Jan 17 02:42:46 PM PST 24 |
4530538270 ps |
| T493 |
/workspace/coverage/default/11.sram_ctrl_bijection.1291267918 |
|
|
Jan 17 02:34:30 PM PST 24 |
Jan 17 02:45:50 PM PST 24 |
45290531656 ps |
| T494 |
/workspace/coverage/default/0.sram_ctrl_regwen.2189107846 |
|
|
Jan 17 02:32:23 PM PST 24 |
Jan 17 02:45:56 PM PST 24 |
52393443117 ps |
| T495 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2288447924 |
|
|
Jan 17 02:43:00 PM PST 24 |
Jan 17 02:47:11 PM PST 24 |
5736925835 ps |
| T496 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.1040275879 |
|
|
Jan 17 02:42:17 PM PST 24 |
Jan 17 03:02:12 PM PST 24 |
113856370654 ps |
| T497 |
/workspace/coverage/default/21.sram_ctrl_smoke.3633537002 |
|
|
Jan 17 02:38:25 PM PST 24 |
Jan 17 02:38:40 PM PST 24 |
812751502 ps |
| T498 |
/workspace/coverage/default/8.sram_ctrl_bijection.1411467481 |
|
|
Jan 17 02:38:20 PM PST 24 |
Jan 17 03:01:49 PM PST 24 |
81121201927 ps |
| T499 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3825223793 |
|
|
Jan 17 02:35:09 PM PST 24 |
Jan 17 02:41:09 PM PST 24 |
17774296579 ps |
| T500 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.3763703331 |
|
|
Jan 17 02:39:45 PM PST 24 |
Jan 17 02:39:57 PM PST 24 |
1538560039 ps |
| T501 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1392596850 |
|
|
Jan 17 02:38:18 PM PST 24 |
Jan 17 03:28:35 PM PST 24 |
615755588 ps |
| T502 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.2277506713 |
|
|
Jan 17 02:44:58 PM PST 24 |
Jan 17 02:46:15 PM PST 24 |
771529078 ps |
| T503 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.206852263 |
|
|
Jan 17 02:45:10 PM PST 24 |
Jan 17 02:47:39 PM PST 24 |
19032123398 ps |
| T504 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3156235280 |
|
|
Jan 17 02:32:10 PM PST 24 |
Jan 17 02:32:38 PM PST 24 |
698712719 ps |
| T505 |
/workspace/coverage/default/18.sram_ctrl_executable.356975981 |
|
|
Jan 17 02:37:16 PM PST 24 |
Jan 17 03:03:54 PM PST 24 |
102532770222 ps |
| T506 |
/workspace/coverage/default/25.sram_ctrl_partial_access.652905368 |
|
|
Jan 17 02:39:50 PM PST 24 |
Jan 17 02:40:18 PM PST 24 |
4013594751 ps |