| T39 |
/workspace/coverage/default/16.sram_ctrl_smoke.2115959412 |
|
|
Mar 07 01:12:25 PM PST 24 |
Mar 07 01:12:38 PM PST 24 |
2771994600 ps |
| T40 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3914185089 |
|
|
Mar 07 01:16:24 PM PST 24 |
Mar 07 01:20:31 PM PST 24 |
4381882676 ps |
| T41 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3358028487 |
|
|
Mar 07 01:14:08 PM PST 24 |
Mar 07 01:21:09 PM PST 24 |
78847756740 ps |
| T42 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.954094737 |
|
|
Mar 07 01:12:44 PM PST 24 |
Mar 07 01:13:39 PM PST 24 |
1211859213 ps |
| T43 |
/workspace/coverage/default/43.sram_ctrl_smoke.3754717745 |
|
|
Mar 07 01:15:16 PM PST 24 |
Mar 07 01:15:47 PM PST 24 |
3894306896 ps |
| T304 |
/workspace/coverage/default/43.sram_ctrl_partial_access.3678371246 |
|
|
Mar 07 01:15:16 PM PST 24 |
Mar 07 01:15:30 PM PST 24 |
919380234 ps |
| T305 |
/workspace/coverage/default/3.sram_ctrl_smoke.3097744527 |
|
|
Mar 07 01:11:37 PM PST 24 |
Mar 07 01:11:51 PM PST 24 |
941653750 ps |
| T306 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3523374148 |
|
|
Mar 07 01:14:22 PM PST 24 |
Mar 07 01:45:56 PM PST 24 |
20993738315 ps |
| T307 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3334884900 |
|
|
Mar 07 01:12:12 PM PST 24 |
Mar 07 01:15:21 PM PST 24 |
11355640026 ps |
| T308 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2039623664 |
|
|
Mar 07 01:14:01 PM PST 24 |
Mar 07 01:15:17 PM PST 24 |
5558907285 ps |
| T309 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.4187190083 |
|
|
Mar 07 01:12:05 PM PST 24 |
Mar 07 01:13:30 PM PST 24 |
4614778097 ps |
| T310 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3157958273 |
|
|
Mar 07 01:13:26 PM PST 24 |
Mar 07 01:17:22 PM PST 24 |
14046565052 ps |
| T311 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.2233131500 |
|
|
Mar 07 01:14:07 PM PST 24 |
Mar 07 01:14:35 PM PST 24 |
3410319232 ps |
| T312 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1173207740 |
|
|
Mar 07 01:15:06 PM PST 24 |
Mar 07 01:15:18 PM PST 24 |
5674466395 ps |
| T313 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2198499414 |
|
|
Mar 07 01:14:57 PM PST 24 |
Mar 07 01:16:44 PM PST 24 |
1023701398 ps |
| T314 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.4191638541 |
|
|
Mar 07 01:13:37 PM PST 24 |
Mar 07 01:15:03 PM PST 24 |
750201017 ps |
| T315 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.235815995 |
|
|
Mar 07 01:15:51 PM PST 24 |
Mar 07 01:18:47 PM PST 24 |
15597135716 ps |
| T316 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2980730077 |
|
|
Mar 07 01:12:28 PM PST 24 |
Mar 07 01:16:44 PM PST 24 |
3710356575 ps |
| T317 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.812085692 |
|
|
Mar 07 01:16:27 PM PST 24 |
Mar 07 01:17:32 PM PST 24 |
781386670 ps |
| T318 |
/workspace/coverage/default/49.sram_ctrl_executable.871653826 |
|
|
Mar 07 01:16:23 PM PST 24 |
Mar 07 01:27:09 PM PST 24 |
43031502761 ps |
| T319 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.554131091 |
|
|
Mar 07 01:15:43 PM PST 24 |
Mar 07 01:22:19 PM PST 24 |
20571198671 ps |
| T320 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4110027258 |
|
|
Mar 07 01:11:58 PM PST 24 |
Mar 07 01:19:37 PM PST 24 |
21319459253 ps |
| T321 |
/workspace/coverage/default/3.sram_ctrl_partial_access.2305648327 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:13:17 PM PST 24 |
5200735215 ps |
| T322 |
/workspace/coverage/default/20.sram_ctrl_smoke.3182313759 |
|
|
Mar 07 01:12:36 PM PST 24 |
Mar 07 01:12:40 PM PST 24 |
679816421 ps |
| T323 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.2941946343 |
|
|
Mar 07 01:12:30 PM PST 24 |
Mar 07 01:16:43 PM PST 24 |
4173893017 ps |
| T324 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2997281907 |
|
|
Mar 07 01:16:24 PM PST 24 |
Mar 07 01:17:31 PM PST 24 |
996768859 ps |
| T325 |
/workspace/coverage/default/35.sram_ctrl_executable.3602489806 |
|
|
Mar 07 01:14:23 PM PST 24 |
Mar 07 01:38:06 PM PST 24 |
26181504321 ps |
| T326 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1039642353 |
|
|
Mar 07 01:11:28 PM PST 24 |
Mar 07 01:18:17 PM PST 24 |
32539492043 ps |
| T327 |
/workspace/coverage/default/37.sram_ctrl_regwen.25032465 |
|
|
Mar 07 01:14:35 PM PST 24 |
Mar 07 01:23:36 PM PST 24 |
12874846000 ps |
| T328 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2642907543 |
|
|
Mar 07 01:12:25 PM PST 24 |
Mar 07 01:20:12 PM PST 24 |
300432883537 ps |
| T329 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2182300500 |
|
|
Mar 07 01:15:39 PM PST 24 |
Mar 07 01:15:43 PM PST 24 |
357807086 ps |
| T330 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.3551106267 |
|
|
Mar 07 01:14:48 PM PST 24 |
Mar 07 01:17:07 PM PST 24 |
7116608832 ps |
| T331 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2554270290 |
|
|
Mar 07 01:14:35 PM PST 24 |
Mar 07 01:17:14 PM PST 24 |
18887772829 ps |
| T332 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.214738153 |
|
|
Mar 07 01:11:40 PM PST 24 |
Mar 07 01:15:19 PM PST 24 |
2912159516 ps |
| T333 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2798674046 |
|
|
Mar 07 01:15:44 PM PST 24 |
Mar 07 01:20:57 PM PST 24 |
25731994761 ps |
| T334 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.398746805 |
|
|
Mar 07 01:13:04 PM PST 24 |
Mar 07 01:14:16 PM PST 24 |
2372226454 ps |
| T335 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.966078395 |
|
|
Mar 07 01:11:51 PM PST 24 |
Mar 07 01:13:54 PM PST 24 |
2061936243 ps |
| T336 |
/workspace/coverage/default/14.sram_ctrl_smoke.1964161363 |
|
|
Mar 07 01:12:14 PM PST 24 |
Mar 07 01:14:53 PM PST 24 |
3883922421 ps |
| T337 |
/workspace/coverage/default/41.sram_ctrl_stress_all.2540747761 |
|
|
Mar 07 01:15:07 PM PST 24 |
Mar 07 02:31:11 PM PST 24 |
128018039803 ps |
| T338 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1132645929 |
|
|
Mar 07 01:16:24 PM PST 24 |
Mar 07 01:20:17 PM PST 24 |
8571177106 ps |
| T339 |
/workspace/coverage/default/45.sram_ctrl_partial_access.4254734638 |
|
|
Mar 07 01:15:39 PM PST 24 |
Mar 07 01:15:44 PM PST 24 |
639672532 ps |
| T340 |
/workspace/coverage/default/12.sram_ctrl_stress_all.3186677004 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:27:05 PM PST 24 |
22480530043 ps |
| T341 |
/workspace/coverage/default/13.sram_ctrl_executable.239106340 |
|
|
Mar 07 01:12:10 PM PST 24 |
Mar 07 01:12:25 PM PST 24 |
891134902 ps |
| T342 |
/workspace/coverage/default/22.sram_ctrl_smoke.1672753108 |
|
|
Mar 07 01:12:39 PM PST 24 |
Mar 07 01:13:12 PM PST 24 |
733337073 ps |
| T343 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.748923093 |
|
|
Mar 07 01:15:28 PM PST 24 |
Mar 07 01:15:35 PM PST 24 |
1326235793 ps |
| T344 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.1628506040 |
|
|
Mar 07 01:12:26 PM PST 24 |
Mar 07 01:15:08 PM PST 24 |
776366617 ps |
| T345 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.635919636 |
|
|
Mar 07 01:14:32 PM PST 24 |
Mar 07 01:24:37 PM PST 24 |
9440430871 ps |
| T346 |
/workspace/coverage/default/36.sram_ctrl_alert_test.1203073203 |
|
|
Mar 07 01:14:22 PM PST 24 |
Mar 07 01:14:23 PM PST 24 |
39249297 ps |
| T347 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1515220606 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:11:50 PM PST 24 |
1865606880 ps |
| T348 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3688390916 |
|
|
Mar 07 01:13:56 PM PST 24 |
Mar 07 01:16:55 PM PST 24 |
2901017640 ps |
| T349 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1045279275 |
|
|
Mar 07 01:12:28 PM PST 24 |
Mar 07 01:16:38 PM PST 24 |
9218776392 ps |
| T350 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3245863750 |
|
|
Mar 07 01:16:12 PM PST 24 |
Mar 07 01:16:30 PM PST 24 |
4889111674 ps |
| T351 |
/workspace/coverage/default/10.sram_ctrl_executable.3966613309 |
|
|
Mar 07 01:11:58 PM PST 24 |
Mar 07 01:41:44 PM PST 24 |
26270380741 ps |
| T352 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.2728830438 |
|
|
Mar 07 01:14:22 PM PST 24 |
Mar 07 01:14:48 PM PST 24 |
1713788463 ps |
| T353 |
/workspace/coverage/default/38.sram_ctrl_smoke.2834814587 |
|
|
Mar 07 01:14:48 PM PST 24 |
Mar 07 01:14:58 PM PST 24 |
9213521585 ps |
| T354 |
/workspace/coverage/default/15.sram_ctrl_bijection.596061499 |
|
|
Mar 07 01:12:24 PM PST 24 |
Mar 07 01:20:22 PM PST 24 |
14065172223 ps |
| T355 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2530814001 |
|
|
Mar 07 01:12:26 PM PST 24 |
Mar 07 01:12:33 PM PST 24 |
2697575926 ps |
| T356 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2563848203 |
|
|
Mar 07 01:12:14 PM PST 24 |
Mar 07 01:14:05 PM PST 24 |
7880434675 ps |
| T357 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3102889125 |
|
|
Mar 07 01:16:23 PM PST 24 |
Mar 07 01:17:02 PM PST 24 |
4181972980 ps |
| T358 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2379998631 |
|
|
Mar 07 01:12:10 PM PST 24 |
Mar 07 01:20:14 PM PST 24 |
34638129189 ps |
| T359 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1428815174 |
|
|
Mar 07 01:11:57 PM PST 24 |
Mar 07 01:12:01 PM PST 24 |
707646303 ps |
| T360 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1942669157 |
|
|
Mar 07 01:12:04 PM PST 24 |
Mar 07 01:26:37 PM PST 24 |
9063436583 ps |
| T361 |
/workspace/coverage/default/35.sram_ctrl_smoke.3609268164 |
|
|
Mar 07 01:14:09 PM PST 24 |
Mar 07 01:14:21 PM PST 24 |
470888531 ps |
| T362 |
/workspace/coverage/default/43.sram_ctrl_executable.2855048991 |
|
|
Mar 07 01:15:34 PM PST 24 |
Mar 07 01:49:19 PM PST 24 |
24940433090 ps |
| T363 |
/workspace/coverage/default/31.sram_ctrl_bijection.1344187419 |
|
|
Mar 07 01:13:43 PM PST 24 |
Mar 07 01:57:10 PM PST 24 |
317181733182 ps |
| T364 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.2239430537 |
|
|
Mar 07 01:14:08 PM PST 24 |
Mar 07 01:15:40 PM PST 24 |
9767419400 ps |
| T365 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.3005300346 |
|
|
Mar 07 01:11:35 PM PST 24 |
Mar 07 01:12:54 PM PST 24 |
2401981622 ps |
| T366 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1390670730 |
|
|
Mar 07 01:14:55 PM PST 24 |
Mar 07 01:21:39 PM PST 24 |
68782266902 ps |
| T367 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1076141407 |
|
|
Mar 07 01:12:51 PM PST 24 |
Mar 07 01:13:09 PM PST 24 |
743483324 ps |
| T368 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1346288292 |
|
|
Mar 07 01:13:57 PM PST 24 |
Mar 07 01:14:55 PM PST 24 |
1143455937 ps |
| T369 |
/workspace/coverage/default/0.sram_ctrl_executable.2560081238 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:22:45 PM PST 24 |
36429721806 ps |
| T370 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2644235217 |
|
|
Mar 07 01:14:22 PM PST 24 |
Mar 07 01:16:48 PM PST 24 |
5066952318 ps |
| T371 |
/workspace/coverage/default/25.sram_ctrl_smoke.4068689399 |
|
|
Mar 07 01:13:05 PM PST 24 |
Mar 07 01:13:22 PM PST 24 |
3039619926 ps |
| T372 |
/workspace/coverage/default/9.sram_ctrl_executable.3243638414 |
|
|
Mar 07 01:11:55 PM PST 24 |
Mar 07 01:30:48 PM PST 24 |
6079678079 ps |
| T373 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.945520280 |
|
|
Mar 07 01:12:12 PM PST 24 |
Mar 07 01:12:25 PM PST 24 |
985123661 ps |
| T374 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.4239100718 |
|
|
Mar 07 01:14:44 PM PST 24 |
Mar 07 01:19:45 PM PST 24 |
18242248270 ps |
| T375 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1924526929 |
|
|
Mar 07 01:11:38 PM PST 24 |
Mar 07 01:12:57 PM PST 24 |
2586172400 ps |
| T376 |
/workspace/coverage/default/16.sram_ctrl_partial_access.1286818430 |
|
|
Mar 07 01:12:29 PM PST 24 |
Mar 07 01:13:59 PM PST 24 |
815683785 ps |
| T377 |
/workspace/coverage/default/37.sram_ctrl_partial_access.1771183781 |
|
|
Mar 07 01:14:33 PM PST 24 |
Mar 07 01:14:55 PM PST 24 |
1892441469 ps |
| T378 |
/workspace/coverage/default/24.sram_ctrl_executable.2467593643 |
|
|
Mar 07 01:13:03 PM PST 24 |
Mar 07 01:13:28 PM PST 24 |
8834594329 ps |
| T379 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3307232306 |
|
|
Mar 07 01:13:59 PM PST 24 |
Mar 07 01:18:33 PM PST 24 |
50937553840 ps |
| T380 |
/workspace/coverage/default/36.sram_ctrl_stress_all.1777523748 |
|
|
Mar 07 01:14:22 PM PST 24 |
Mar 07 03:14:10 PM PST 24 |
440345943827 ps |
| T381 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.39253299 |
|
|
Mar 07 01:16:00 PM PST 24 |
Mar 07 01:20:28 PM PST 24 |
21184634463 ps |
| T382 |
/workspace/coverage/default/27.sram_ctrl_stress_all.2955181456 |
|
|
Mar 07 01:13:40 PM PST 24 |
Mar 07 02:42:56 PM PST 24 |
300685006451 ps |
| T383 |
/workspace/coverage/default/44.sram_ctrl_stress_all.316427930 |
|
|
Mar 07 01:15:39 PM PST 24 |
Mar 07 02:23:24 PM PST 24 |
145078706903 ps |
| T384 |
/workspace/coverage/default/24.sram_ctrl_stress_all.295715385 |
|
|
Mar 07 01:13:07 PM PST 24 |
Mar 07 03:32:26 PM PST 24 |
1410437741431 ps |
| T385 |
/workspace/coverage/default/7.sram_ctrl_smoke.3187892839 |
|
|
Mar 07 01:11:48 PM PST 24 |
Mar 07 01:12:06 PM PST 24 |
629824387 ps |
| T386 |
/workspace/coverage/default/23.sram_ctrl_bijection.3271708449 |
|
|
Mar 07 01:12:51 PM PST 24 |
Mar 07 01:38:03 PM PST 24 |
88797044993 ps |
| T387 |
/workspace/coverage/default/28.sram_ctrl_executable.3533326294 |
|
|
Mar 07 01:13:23 PM PST 24 |
Mar 07 01:22:30 PM PST 24 |
174458627529 ps |
| T388 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.2386046384 |
|
|
Mar 07 01:13:38 PM PST 24 |
Mar 07 01:15:39 PM PST 24 |
6449185363 ps |
| T389 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.337535222 |
|
|
Mar 07 01:14:20 PM PST 24 |
Mar 07 01:14:24 PM PST 24 |
694277323 ps |
| T390 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2968914194 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:12:56 PM PST 24 |
1509386819 ps |
| T391 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4007964413 |
|
|
Mar 07 01:11:36 PM PST 24 |
Mar 07 01:12:21 PM PST 24 |
3086250336 ps |
| T392 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.388822830 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:15:31 PM PST 24 |
25679631901 ps |
| T393 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2936617729 |
|
|
Mar 07 01:12:26 PM PST 24 |
Mar 07 01:26:14 PM PST 24 |
25277576971 ps |
| T394 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3862625202 |
|
|
Mar 07 01:14:31 PM PST 24 |
Mar 07 01:14:40 PM PST 24 |
1326068285 ps |
| T395 |
/workspace/coverage/default/27.sram_ctrl_alert_test.2566061606 |
|
|
Mar 07 01:13:24 PM PST 24 |
Mar 07 01:13:25 PM PST 24 |
15322270 ps |
| T396 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2669295281 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:12:11 PM PST 24 |
32456067 ps |
| T397 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2480087827 |
|
|
Mar 07 01:16:13 PM PST 24 |
Mar 07 01:16:19 PM PST 24 |
2371168892 ps |
| T398 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.2583875931 |
|
|
Mar 07 01:13:38 PM PST 24 |
Mar 07 01:13:41 PM PST 24 |
366622130 ps |
| T399 |
/workspace/coverage/default/37.sram_ctrl_stress_all.2088490723 |
|
|
Mar 07 01:14:36 PM PST 24 |
Mar 07 01:28:54 PM PST 24 |
21309902272 ps |
| T400 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1285565383 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:12:12 PM PST 24 |
45945754 ps |
| T401 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3414049037 |
|
|
Mar 07 01:11:47 PM PST 24 |
Mar 07 01:53:57 PM PST 24 |
370611990079 ps |
| T402 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.1515051403 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:46:11 PM PST 24 |
185951677035 ps |
| T403 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2936236673 |
|
|
Mar 07 01:11:37 PM PST 24 |
Mar 07 01:11:38 PM PST 24 |
24377405 ps |
| T404 |
/workspace/coverage/default/2.sram_ctrl_smoke.718113241 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:11:57 PM PST 24 |
4590180628 ps |
| T405 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1486357945 |
|
|
Mar 07 01:12:09 PM PST 24 |
Mar 07 01:13:11 PM PST 24 |
1141615896 ps |
| T406 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.4064223818 |
|
|
Mar 07 01:13:37 PM PST 24 |
Mar 07 01:14:05 PM PST 24 |
1491881284 ps |
| T407 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.3460521366 |
|
|
Mar 07 01:12:30 PM PST 24 |
Mar 07 01:12:41 PM PST 24 |
715570962 ps |
| T408 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2185282479 |
|
|
Mar 07 01:14:25 PM PST 24 |
Mar 07 01:19:41 PM PST 24 |
13623993751 ps |
| T409 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3247520799 |
|
|
Mar 07 01:13:59 PM PST 24 |
Mar 07 01:16:21 PM PST 24 |
36278232544 ps |
| T410 |
/workspace/coverage/default/31.sram_ctrl_partial_access.2305330295 |
|
|
Mar 07 01:13:36 PM PST 24 |
Mar 07 01:13:47 PM PST 24 |
491798570 ps |
| T411 |
/workspace/coverage/default/37.sram_ctrl_bijection.1658210811 |
|
|
Mar 07 01:14:35 PM PST 24 |
Mar 07 01:42:11 PM PST 24 |
239319067301 ps |
| T412 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1771478855 |
|
|
Mar 07 01:16:21 PM PST 24 |
Mar 07 01:16:52 PM PST 24 |
831213290 ps |
| T413 |
/workspace/coverage/default/11.sram_ctrl_smoke.1109812032 |
|
|
Mar 07 01:12:12 PM PST 24 |
Mar 07 01:12:54 PM PST 24 |
3630081045 ps |
| T414 |
/workspace/coverage/default/35.sram_ctrl_bijection.1906053592 |
|
|
Mar 07 01:14:06 PM PST 24 |
Mar 07 01:24:18 PM PST 24 |
217012467239 ps |
| T415 |
/workspace/coverage/default/26.sram_ctrl_regwen.4202306984 |
|
|
Mar 07 01:13:11 PM PST 24 |
Mar 07 01:30:30 PM PST 24 |
12843354908 ps |
| T416 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1863088223 |
|
|
Mar 07 01:11:29 PM PST 24 |
Mar 07 01:13:07 PM PST 24 |
9219845442 ps |
| T417 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.4102327447 |
|
|
Mar 07 01:14:48 PM PST 24 |
Mar 07 01:14:52 PM PST 24 |
3063268458 ps |
| T418 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.2161738988 |
|
|
Mar 07 01:14:05 PM PST 24 |
Mar 07 01:23:12 PM PST 24 |
60627675537 ps |
| T419 |
/workspace/coverage/default/20.sram_ctrl_stress_all.3308913805 |
|
|
Mar 07 01:12:40 PM PST 24 |
Mar 07 02:51:50 PM PST 24 |
260043020033 ps |
| T420 |
/workspace/coverage/default/46.sram_ctrl_alert_test.4187474145 |
|
|
Mar 07 01:16:01 PM PST 24 |
Mar 07 01:16:02 PM PST 24 |
11810549 ps |
| T421 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2221629180 |
|
|
Mar 07 01:14:34 PM PST 24 |
Mar 07 01:19:05 PM PST 24 |
77232604253 ps |
| T422 |
/workspace/coverage/default/14.sram_ctrl_bijection.1144788154 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:43:28 PM PST 24 |
164889148323 ps |
| T423 |
/workspace/coverage/default/35.sram_ctrl_partial_access.3522156052 |
|
|
Mar 07 01:14:10 PM PST 24 |
Mar 07 01:14:19 PM PST 24 |
13816596021 ps |
| T424 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.1174347550 |
|
|
Mar 07 01:13:41 PM PST 24 |
Mar 07 01:17:54 PM PST 24 |
15759420907 ps |
| T425 |
/workspace/coverage/default/16.sram_ctrl_alert_test.4109714148 |
|
|
Mar 07 01:12:25 PM PST 24 |
Mar 07 01:12:26 PM PST 24 |
21559607 ps |
| T426 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.718581170 |
|
|
Mar 07 01:14:20 PM PST 24 |
Mar 07 01:14:29 PM PST 24 |
1176699409 ps |
| T427 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.904737499 |
|
|
Mar 07 01:12:23 PM PST 24 |
Mar 07 01:35:31 PM PST 24 |
77839749611 ps |
| T428 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.214569589 |
|
|
Mar 07 01:12:28 PM PST 24 |
Mar 07 01:12:51 PM PST 24 |
751766499 ps |
| T102 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.289719439 |
|
|
Mar 07 01:11:56 PM PST 24 |
Mar 07 01:12:23 PM PST 24 |
6063279009 ps |
| T429 |
/workspace/coverage/default/40.sram_ctrl_bijection.3274285349 |
|
|
Mar 07 01:14:44 PM PST 24 |
Mar 07 01:47:40 PM PST 24 |
116146483319 ps |
| T430 |
/workspace/coverage/default/5.sram_ctrl_executable.243578421 |
|
|
Mar 07 01:11:47 PM PST 24 |
Mar 07 01:13:28 PM PST 24 |
5440629277 ps |
| T431 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1269250295 |
|
|
Mar 07 01:12:14 PM PST 24 |
Mar 07 01:18:44 PM PST 24 |
32760901930 ps |
| T432 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3779692557 |
|
|
Mar 07 01:14:13 PM PST 24 |
Mar 07 01:14:26 PM PST 24 |
1457680943 ps |
| T433 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.798566098 |
|
|
Mar 07 01:13:37 PM PST 24 |
Mar 07 01:14:45 PM PST 24 |
5281172372 ps |
| T434 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3738728287 |
|
|
Mar 07 01:11:59 PM PST 24 |
Mar 07 01:12:08 PM PST 24 |
1418229122 ps |
| T435 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2290533707 |
|
|
Mar 07 01:11:51 PM PST 24 |
Mar 07 01:11:54 PM PST 24 |
1403531607 ps |
| T436 |
/workspace/coverage/default/43.sram_ctrl_alert_test.2739227936 |
|
|
Mar 07 01:15:28 PM PST 24 |
Mar 07 01:15:29 PM PST 24 |
46803103 ps |
| T437 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.528797649 |
|
|
Mar 07 01:11:41 PM PST 24 |
Mar 07 01:16:31 PM PST 24 |
91687452097 ps |
| T438 |
/workspace/coverage/default/39.sram_ctrl_smoke.539575763 |
|
|
Mar 07 01:14:43 PM PST 24 |
Mar 07 01:15:05 PM PST 24 |
4311583114 ps |
| T439 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2101076368 |
|
|
Mar 07 01:11:39 PM PST 24 |
Mar 07 01:11:48 PM PST 24 |
1424296452 ps |
| T440 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.2123888150 |
|
|
Mar 07 01:11:40 PM PST 24 |
Mar 07 01:25:27 PM PST 24 |
7325460265 ps |
| T441 |
/workspace/coverage/default/30.sram_ctrl_bijection.106579005 |
|
|
Mar 07 01:13:40 PM PST 24 |
Mar 07 01:58:57 PM PST 24 |
661862867543 ps |
| T442 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.911268023 |
|
|
Mar 07 01:14:21 PM PST 24 |
Mar 07 01:15:46 PM PST 24 |
9764470156 ps |
| T443 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.4106875941 |
|
|
Mar 07 01:12:44 PM PST 24 |
Mar 07 01:36:47 PM PST 24 |
57645424791 ps |
| T444 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.1951027269 |
|
|
Mar 07 01:14:36 PM PST 24 |
Mar 07 01:18:28 PM PST 24 |
3946942467 ps |
| T445 |
/workspace/coverage/default/27.sram_ctrl_bijection.3187201393 |
|
|
Mar 07 01:13:24 PM PST 24 |
Mar 07 01:24:16 PM PST 24 |
38051780854 ps |
| T446 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.2378826635 |
|
|
Mar 07 01:12:24 PM PST 24 |
Mar 07 01:12:27 PM PST 24 |
358740589 ps |
| T447 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.492391233 |
|
|
Mar 07 01:15:32 PM PST 24 |
Mar 07 01:21:10 PM PST 24 |
5614864646 ps |
| T448 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.1489186971 |
|
|
Mar 07 01:13:54 PM PST 24 |
Mar 07 01:16:55 PM PST 24 |
11549139402 ps |
| T449 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.3343392213 |
|
|
Mar 07 01:13:06 PM PST 24 |
Mar 07 01:14:59 PM PST 24 |
3424270640 ps |
| T450 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2277276245 |
|
|
Mar 07 01:11:56 PM PST 24 |
Mar 07 01:13:43 PM PST 24 |
5081291468 ps |
| T451 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3127538678 |
|
|
Mar 07 01:14:56 PM PST 24 |
Mar 07 01:15:57 PM PST 24 |
747512178 ps |
| T452 |
/workspace/coverage/default/31.sram_ctrl_regwen.2509185766 |
|
|
Mar 07 01:13:41 PM PST 24 |
Mar 07 01:28:21 PM PST 24 |
33318118241 ps |
| T453 |
/workspace/coverage/default/26.sram_ctrl_mem_walk.3733378282 |
|
|
Mar 07 01:13:23 PM PST 24 |
Mar 07 01:16:04 PM PST 24 |
63960918263 ps |
| T454 |
/workspace/coverage/default/36.sram_ctrl_bijection.2719321250 |
|
|
Mar 07 01:14:20 PM PST 24 |
Mar 07 01:26:15 PM PST 24 |
253365889054 ps |
| T455 |
/workspace/coverage/default/30.sram_ctrl_alert_test.2276464485 |
|
|
Mar 07 01:13:38 PM PST 24 |
Mar 07 01:13:39 PM PST 24 |
13096801 ps |
| T456 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.2618637325 |
|
|
Mar 07 01:13:04 PM PST 24 |
Mar 07 01:13:10 PM PST 24 |
677641283 ps |
| T457 |
/workspace/coverage/default/13.sram_ctrl_bijection.101339799 |
|
|
Mar 07 01:12:14 PM PST 24 |
Mar 07 01:41:22 PM PST 24 |
159971580818 ps |
| T458 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.150617203 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:27:18 PM PST 24 |
51681551453 ps |
| T459 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3909503916 |
|
|
Mar 07 01:11:49 PM PST 24 |
Mar 07 01:29:40 PM PST 24 |
22213426738 ps |
| T460 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3195039816 |
|
|
Mar 07 01:14:42 PM PST 24 |
Mar 07 01:17:26 PM PST 24 |
2796145285 ps |
| T461 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3679989726 |
|
|
Mar 07 01:12:25 PM PST 24 |
Mar 07 01:13:56 PM PST 24 |
8153204860 ps |
| T462 |
/workspace/coverage/default/30.sram_ctrl_regwen.964692363 |
|
|
Mar 07 01:13:38 PM PST 24 |
Mar 07 01:16:09 PM PST 24 |
19319758358 ps |
| T463 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.356848188 |
|
|
Mar 07 01:12:15 PM PST 24 |
Mar 07 01:13:18 PM PST 24 |
995208037 ps |
| T464 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1710976003 |
|
|
Mar 07 01:12:09 PM PST 24 |
Mar 07 01:34:25 PM PST 24 |
81256981976 ps |
| T465 |
/workspace/coverage/default/15.sram_ctrl_regwen.2703634237 |
|
|
Mar 07 01:12:24 PM PST 24 |
Mar 07 01:32:43 PM PST 24 |
19983660220 ps |
| T466 |
/workspace/coverage/default/42.sram_ctrl_smoke.928639505 |
|
|
Mar 07 01:15:06 PM PST 24 |
Mar 07 01:15:13 PM PST 24 |
1389707064 ps |
| T467 |
/workspace/coverage/default/45.sram_ctrl_executable.1697112273 |
|
|
Mar 07 01:15:39 PM PST 24 |
Mar 07 01:21:23 PM PST 24 |
9747889410 ps |
| T468 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1476758466 |
|
|
Mar 07 01:11:29 PM PST 24 |
Mar 07 01:11:53 PM PST 24 |
784032644 ps |
| T469 |
/workspace/coverage/default/21.sram_ctrl_partial_access.316092402 |
|
|
Mar 07 01:12:40 PM PST 24 |
Mar 07 01:14:08 PM PST 24 |
994255992 ps |
| T470 |
/workspace/coverage/default/41.sram_ctrl_executable.2451497627 |
|
|
Mar 07 01:15:04 PM PST 24 |
Mar 07 01:33:04 PM PST 24 |
51466904463 ps |
| T471 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3986073342 |
|
|
Mar 07 01:16:01 PM PST 24 |
Mar 07 01:16:05 PM PST 24 |
1342265088 ps |
| T472 |
/workspace/coverage/default/15.sram_ctrl_smoke.3191929812 |
|
|
Mar 07 01:12:23 PM PST 24 |
Mar 07 01:12:56 PM PST 24 |
791236704 ps |
| T473 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3322438256 |
|
|
Mar 07 01:15:09 PM PST 24 |
Mar 07 01:17:14 PM PST 24 |
1590708603 ps |
| T474 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.3768877913 |
|
|
Mar 07 01:12:37 PM PST 24 |
Mar 07 01:13:33 PM PST 24 |
3309727759 ps |
| T475 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.976835322 |
|
|
Mar 07 01:13:42 PM PST 24 |
Mar 07 01:16:15 PM PST 24 |
3561678791 ps |
| T476 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.3115084085 |
|
|
Mar 07 01:14:57 PM PST 24 |
Mar 07 01:19:52 PM PST 24 |
21273613493 ps |
| T477 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.3971733381 |
|
|
Mar 07 01:13:38 PM PST 24 |
Mar 07 01:27:45 PM PST 24 |
11983086673 ps |
| T478 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3000856509 |
|
|
Mar 07 01:11:59 PM PST 24 |
Mar 07 01:14:37 PM PST 24 |
9013250073 ps |
| T479 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1943243498 |
|
|
Mar 07 01:14:55 PM PST 24 |
Mar 07 01:17:48 PM PST 24 |
13530196877 ps |
| T480 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1565943554 |
|
|
Mar 07 01:12:13 PM PST 24 |
Mar 07 01:12:26 PM PST 24 |
3315880629 ps |
| T481 |
/workspace/coverage/default/12.sram_ctrl_executable.2065392473 |
|
|
Mar 07 01:12:16 PM PST 24 |
Mar 07 01:24:46 PM PST 24 |
64576329164 ps |
| T482 |
/workspace/coverage/default/42.sram_ctrl_bijection.1754942602 |
|
|
Mar 07 01:15:05 PM PST 24 |
Mar 07 01:33:13 PM PST 24 |
64263508362 ps |
| T483 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.2547624533 |
|
|
Mar 07 01:12:30 PM PST 24 |
Mar 07 01:18:37 PM PST 24 |
30464053303 ps |
| T484 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3599064686 |
|
|
Mar 07 01:12:25 PM PST 24 |
Mar 07 01:35:18 PM PST 24 |
218274753032 ps |
| T485 |
/workspace/coverage/default/26.sram_ctrl_bijection.1605458302 |
|
|
Mar 07 01:13:04 PM PST 24 |
Mar 07 01:44:55 PM PST 24 |
331829869412 ps |
| T486 |
/workspace/coverage/default/1.sram_ctrl_executable.3364503530 |
|
|
Mar 07 01:11:44 PM PST 24 |
Mar 07 01:18:16 PM PST 24 |
12624821190 ps |
| T487 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2467743217 |
|
|
Mar 07 01:15:05 PM PST 24 |
Mar 07 01:16:29 PM PST 24 |
1760229437 ps |
| T488 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4200748134 |
|
|
Mar 07 01:15:06 PM PST 24 |
Mar 07 01:22:15 PM PST 24 |
70150080192 ps |
| T489 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.1989401399 |
|
|
Mar 07 01:14:21 PM PST 24 |
Mar 07 01:15:16 PM PST 24 |
4693912169 ps |
| T490 |
/workspace/coverage/default/25.sram_ctrl_bijection.248476979 |
|
|
Mar 07 01:13:05 PM PST 24 |
Mar 07 01:23:29 PM PST 24 |
111590591711 ps |
| T491 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3252802005 |
|
|
Mar 07 01:11:59 PM PST 24 |
Mar 07 01:15:58 PM PST 24 |
3946534486 ps |
| T492 |
/workspace/coverage/default/24.sram_ctrl_regwen.3989649715 |
|
|
Mar 07 01:13:05 PM PST 24 |
Mar 07 01:31:48 PM PST 24 |
35240844959 ps |
| T493 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2902449784 |
|
|
Mar 07 01:13:56 PM PST 24 |
Mar 07 01:45:57 PM PST 24 |
121512892101 ps |
| T494 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.2692495281 |
|
|
Mar 07 01:13:41 PM PST 24 |
Mar 07 01:17:44 PM PST 24 |
7302829927 ps |
| T495 |
/workspace/coverage/default/22.sram_ctrl_bijection.1961041825 |
|
|
Mar 07 01:12:41 PM PST 24 |
Mar 07 01:46:36 PM PST 24 |
31159204762 ps |
| T496 |
/workspace/coverage/default/9.sram_ctrl_bijection.2061681216 |
|
|
Mar 07 01:11:56 PM PST 24 |
Mar 07 01:36:13 PM PST 24 |
54665863615 ps |
| T497 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3204554960 |
|
|
Mar 07 01:13:56 PM PST 24 |
Mar 07 01:16:10 PM PST 24 |
810214233 ps |
| T498 |
/workspace/coverage/default/7.sram_ctrl_regwen.3193456592 |
|
|
Mar 07 01:11:47 PM PST 24 |
Mar 07 01:41:03 PM PST 24 |
23504735433 ps |
| T499 |
/workspace/coverage/default/45.sram_ctrl_smoke.2097173151 |
|
|
Mar 07 01:15:48 PM PST 24 |
Mar 07 01:18:11 PM PST 24 |
5059652191 ps |
| T500 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.1751230069 |
|
|
Mar 07 01:13:04 PM PST 24 |
Mar 07 01:16:06 PM PST 24 |
6748724374 ps |
| T501 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.3132390307 |
|
|
Mar 07 01:12:26 PM PST 24 |
Mar 07 01:14:26 PM PST 24 |
1604564533 ps |
| T502 |
/workspace/coverage/default/1.sram_ctrl_smoke.838537048 |
|
|
Mar 07 01:11:28 PM PST 24 |
Mar 07 01:12:45 PM PST 24 |
3440458596 ps |
| T503 |
/workspace/coverage/default/47.sram_ctrl_regwen.2128482536 |
|
|
Mar 07 01:16:12 PM PST 24 |
Mar 07 01:25:40 PM PST 24 |
5072399368 ps |
| T504 |
/workspace/coverage/default/10.sram_ctrl_regwen.2106000936 |
|
|
Mar 07 01:11:58 PM PST 24 |
Mar 07 01:25:01 PM PST 24 |
69384788740 ps |
| T505 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3397572444 |
|
|
Mar 07 01:14:41 PM PST 24 |
Mar 07 01:15:46 PM PST 24 |
2679534644 ps |
| T103 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3977285101 |
|
|
Mar 07 01:15:38 PM PST 24 |
Mar 07 01:16:07 PM PST 24 |
1092399793 ps |
| T506 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2613101012 |
|
|
Mar 07 01:12:23 PM PST 24 |
Mar 07 01:16:24 PM PST 24 |
77633683994 ps |
| T507 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1133647255 |
|
|
Mar 07 01:11:50 PM PST 24 |
Mar 07 01:12:25 PM PST 24 |
3291068145 ps |
| T508 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.3123013870 |
|
|
Mar 07 01:12:43 PM PST 24 |
Mar 07 01:13:42 PM PST 24 |
3042780614 ps |
| T509 |
/workspace/coverage/default/11.sram_ctrl_executable.543150256 |
|
|
Mar 07 01:12:13 PM PST 24 |
Mar 07 01:16:44 PM PST 24 |
7473676664 ps |
| T510 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.404988181 |
|
|
Mar 07 01:12:47 PM PST 24 |
Mar 07 01:16:23 PM PST 24 |
33810432290 ps |
| T511 |
/workspace/coverage/default/3.sram_ctrl_stress_all.3336227204 |
|
|
Mar 07 01:11:40 PM PST 24 |
Mar 07 02:13:46 PM PST 24 |
33750053987 ps |
| T104 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3486731786 |
|
|
Mar 07 01:14:10 PM PST 24 |
Mar 07 01:14:32 PM PST 24 |
3447556487 ps |
| T512 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2964462634 |
|
|
Mar 07 01:12:13 PM PST 24 |
Mar 07 01:15:31 PM PST 24 |
21339248776 ps |
| T513 |
/workspace/coverage/default/17.sram_ctrl_smoke.2602716082 |
|
|
Mar 07 01:12:29 PM PST 24 |
Mar 07 01:12:44 PM PST 24 |
1246755575 ps |
| T514 |
/workspace/coverage/default/36.sram_ctrl_regwen.1086700376 |
|
|
Mar 07 01:14:22 PM PST 24 |
Mar 07 01:31:07 PM PST 24 |
13682857047 ps |
| T515 |
/workspace/coverage/default/23.sram_ctrl_regwen.3065988957 |
|
|
Mar 07 01:12:52 PM PST 24 |
Mar 07 01:30:25 PM PST 24 |
4744889385 ps |
| T516 |
/workspace/coverage/default/48.sram_ctrl_executable.3392185346 |
|
|
Mar 07 01:16:12 PM PST 24 |
Mar 07 01:25:39 PM PST 24 |
13520071795 ps |
| T517 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1273841552 |
|
|
Mar 07 01:11:57 PM PST 24 |
Mar 07 01:16:12 PM PST 24 |
11594449664 ps |
| T518 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3781053126 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:15:33 PM PST 24 |
2966257408 ps |
| T519 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1002313565 |
|
|
Mar 07 01:13:23 PM PST 24 |
Mar 07 01:25:02 PM PST 24 |
21885682280 ps |
| T520 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1766455549 |
|
|
Mar 07 01:16:00 PM PST 24 |
Mar 07 01:17:14 PM PST 24 |
2373335557 ps |
| T521 |
/workspace/coverage/default/46.sram_ctrl_stress_all.934225033 |
|
|
Mar 07 01:15:59 PM PST 24 |
Mar 07 03:14:13 PM PST 24 |
242342384865 ps |
| T522 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.530039477 |
|
|
Mar 07 01:11:43 PM PST 24 |
Mar 07 01:11:47 PM PST 24 |
346199874 ps |
| T523 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1812436 |
|
|
Mar 07 01:15:59 PM PST 24 |
Mar 07 01:45:47 PM PST 24 |
20966621512 ps |
| T524 |
/workspace/coverage/default/18.sram_ctrl_smoke.2321728547 |
|
|
Mar 07 01:12:29 PM PST 24 |
Mar 07 01:12:39 PM PST 24 |
724949283 ps |
| T525 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3797288140 |
|
|
Mar 07 01:11:59 PM PST 24 |
Mar 07 01:30:50 PM PST 24 |
47464699950 ps |
| T526 |
/workspace/coverage/default/18.sram_ctrl_partial_access.2753875041 |
|
|
Mar 07 01:12:27 PM PST 24 |
Mar 07 01:12:53 PM PST 24 |
6366320290 ps |
| T527 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.615436154 |
|
|
Mar 07 01:11:58 PM PST 24 |
Mar 07 01:14:33 PM PST 24 |
15071324053 ps |
| T528 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.3059967813 |
|
|
Mar 07 01:12:15 PM PST 24 |
Mar 07 01:14:42 PM PST 24 |
8929481797 ps |
| T529 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3384286140 |
|
|
Mar 07 01:12:25 PM PST 24 |
Mar 07 01:13:32 PM PST 24 |
3759777133 ps |
| T530 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2049613924 |
|
|
Mar 07 01:16:00 PM PST 24 |
Mar 07 01:17:58 PM PST 24 |
3474431401 ps |
| T531 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3556736984 |
|
|
Mar 07 01:12:51 PM PST 24 |
Mar 07 01:14:06 PM PST 24 |
1598394780 ps |
| T532 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2922070937 |
|
|
Mar 07 01:12:28 PM PST 24 |
Mar 07 01:13:01 PM PST 24 |
811782114 ps |
| T533 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.762729165 |
|
|
Mar 07 01:12:44 PM PST 24 |
Mar 07 01:12:48 PM PST 24 |
3057986576 ps |
| T534 |
/workspace/coverage/default/19.sram_ctrl_partial_access.1749606974 |
|
|
Mar 07 01:12:27 PM PST 24 |
Mar 07 01:12:55 PM PST 24 |
630840244 ps |
| T535 |
/workspace/coverage/default/22.sram_ctrl_alert_test.2524818362 |
|
|
Mar 07 01:12:50 PM PST 24 |
Mar 07 01:12:51 PM PST 24 |
96868642 ps |
| T536 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3017931182 |
|
|
Mar 07 01:13:04 PM PST 24 |
Mar 07 01:17:05 PM PST 24 |
7804897304 ps |
| T537 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3313313605 |
|
|
Mar 07 01:12:11 PM PST 24 |
Mar 07 01:14:19 PM PST 24 |
12010802092 ps |
| T538 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.3362362386 |
|
|
Mar 07 01:15:06 PM PST 24 |
Mar 07 01:15:09 PM PST 24 |
1405703215 ps |
| T539 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2271456782 |
|
|
Mar 07 01:12:39 PM PST 24 |
Mar 07 01:25:21 PM PST 24 |
65387778536 ps |
| T540 |
/workspace/coverage/default/28.sram_ctrl_partial_access.308294431 |
|
|
Mar 07 01:13:23 PM PST 24 |
Mar 07 01:13:36 PM PST 24 |
1069931703 ps |
| T541 |
/workspace/coverage/default/4.sram_ctrl_regwen.2115563126 |
|
|
Mar 07 01:11:41 PM PST 24 |
Mar 07 01:31:05 PM PST 24 |
31090705329 ps |
| T542 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1975319111 |
|
|
Mar 07 01:13:39 PM PST 24 |
Mar 07 01:22:20 PM PST 24 |
42345574592 ps |
| T543 |
/workspace/coverage/default/22.sram_ctrl_mem_partial_access.1626533136 |
|
|
Mar 07 01:12:44 PM PST 24 |
Mar 07 01:15:15 PM PST 24 |
4364997135 ps |
| T544 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.1790097717 |
|
|
Mar 07 01:13:22 PM PST 24 |
Mar 07 01:13:25 PM PST 24 |
364825380 ps |
| T545 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.3781291507 |
|
|
Mar 07 01:13:26 PM PST 24 |
Mar 07 01:13:52 PM PST 24 |
3645809650 ps |