| T296 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.688140976 |
|
|
Mar 26 01:01:14 PM PDT 24 |
Mar 26 01:01:58 PM PDT 24 |
14280616090 ps |
| T297 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2404184597 |
|
|
Mar 26 01:01:13 PM PDT 24 |
Mar 26 01:07:42 PM PDT 24 |
47387425513 ps |
| T298 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.258110213 |
|
|
Mar 26 12:59:43 PM PDT 24 |
Mar 26 12:59:46 PM PDT 24 |
1396138076 ps |
| T299 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1355832911 |
|
|
Mar 26 12:59:24 PM PDT 24 |
Mar 26 01:01:41 PM PDT 24 |
7053994887 ps |
| T300 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.4258592227 |
|
|
Mar 26 12:58:37 PM PDT 24 |
Mar 26 01:22:10 PM PDT 24 |
13488540431 ps |
| T301 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3180148585 |
|
|
Mar 26 01:07:18 PM PDT 24 |
Mar 26 01:08:24 PM PDT 24 |
3058720156 ps |
| T302 |
/workspace/coverage/default/47.sram_ctrl_regwen.138383724 |
|
|
Mar 26 01:08:07 PM PDT 24 |
Mar 26 01:26:06 PM PDT 24 |
2673220714 ps |
| T303 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2262841203 |
|
|
Mar 26 12:58:26 PM PDT 24 |
Mar 26 12:59:36 PM PDT 24 |
13420097022 ps |
| T304 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.184770705 |
|
|
Mar 26 12:59:21 PM PDT 24 |
Mar 26 01:02:08 PM PDT 24 |
19944411211 ps |
| T305 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.2799811675 |
|
|
Mar 26 01:07:04 PM PDT 24 |
Mar 26 01:25:47 PM PDT 24 |
12380767242 ps |
| T306 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.120036338 |
|
|
Mar 26 01:05:09 PM PDT 24 |
Mar 26 01:07:34 PM PDT 24 |
6022835525 ps |
| T307 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.2957186642 |
|
|
Mar 26 01:00:42 PM PDT 24 |
Mar 26 01:01:59 PM PDT 24 |
13071206372 ps |
| T308 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.474152247 |
|
|
Mar 26 01:02:57 PM PDT 24 |
Mar 26 01:03:47 PM PDT 24 |
7290702644 ps |
| T309 |
/workspace/coverage/default/12.sram_ctrl_stress_all.4091828983 |
|
|
Mar 26 01:00:30 PM PDT 24 |
Mar 26 02:11:28 PM PDT 24 |
65367827475 ps |
| T310 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3862573114 |
|
|
Mar 26 12:59:43 PM PDT 24 |
Mar 26 01:15:26 PM PDT 24 |
88786421926 ps |
| T311 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4169441364 |
|
|
Mar 26 01:07:53 PM PDT 24 |
Mar 26 01:11:54 PM PDT 24 |
7429560140 ps |
| T312 |
/workspace/coverage/default/42.sram_ctrl_stress_all.2131324618 |
|
|
Mar 26 01:07:17 PM PDT 24 |
Mar 26 01:49:57 PM PDT 24 |
48535456540 ps |
| T313 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3401193681 |
|
|
Mar 26 01:01:01 PM PDT 24 |
Mar 26 01:06:02 PM PDT 24 |
74662956604 ps |
| T314 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3953581402 |
|
|
Mar 26 01:01:58 PM PDT 24 |
Mar 26 01:09:43 PM PDT 24 |
13173491326 ps |
| T315 |
/workspace/coverage/default/38.sram_ctrl_partial_access.2392031423 |
|
|
Mar 26 01:06:04 PM PDT 24 |
Mar 26 01:06:25 PM PDT 24 |
5988591806 ps |
| T316 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.316321683 |
|
|
Mar 26 01:07:29 PM PDT 24 |
Mar 26 01:07:35 PM PDT 24 |
1067363380 ps |
| T317 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1469563175 |
|
|
Mar 26 12:59:54 PM PDT 24 |
Mar 26 01:01:11 PM PDT 24 |
13229405430 ps |
| T318 |
/workspace/coverage/default/18.sram_ctrl_bijection.880166463 |
|
|
Mar 26 01:01:47 PM PDT 24 |
Mar 26 01:35:30 PM PDT 24 |
29825168929 ps |
| T319 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.615072319 |
|
|
Mar 26 01:03:51 PM PDT 24 |
Mar 26 01:08:28 PM PDT 24 |
13919304637 ps |
| T320 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1678838018 |
|
|
Mar 26 12:58:49 PM PDT 24 |
Mar 26 12:59:41 PM PDT 24 |
742262871 ps |
| T321 |
/workspace/coverage/default/10.sram_ctrl_alert_test.4155224101 |
|
|
Mar 26 01:00:05 PM PDT 24 |
Mar 26 01:00:06 PM PDT 24 |
29620711 ps |
| T322 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1169319931 |
|
|
Mar 26 12:59:42 PM PDT 24 |
Mar 26 01:03:38 PM PDT 24 |
3673117059 ps |
| T323 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2728973841 |
|
|
Mar 26 01:00:42 PM PDT 24 |
Mar 26 01:00:46 PM PDT 24 |
1996494452 ps |
| T324 |
/workspace/coverage/default/20.sram_ctrl_bijection.3607557624 |
|
|
Mar 26 01:02:01 PM PDT 24 |
Mar 26 01:31:19 PM PDT 24 |
99778095588 ps |
| T325 |
/workspace/coverage/default/24.sram_ctrl_alert_test.2010592418 |
|
|
Mar 26 01:02:55 PM PDT 24 |
Mar 26 01:02:57 PM PDT 24 |
48506458 ps |
| T326 |
/workspace/coverage/default/16.sram_ctrl_alert_test.3657446150 |
|
|
Mar 26 01:01:30 PM PDT 24 |
Mar 26 01:01:32 PM PDT 24 |
24274197 ps |
| T327 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2126759784 |
|
|
Mar 26 12:59:01 PM PDT 24 |
Mar 26 01:00:03 PM PDT 24 |
737404853 ps |
| T328 |
/workspace/coverage/default/41.sram_ctrl_smoke.1689715284 |
|
|
Mar 26 01:06:49 PM PDT 24 |
Mar 26 01:07:02 PM PDT 24 |
1423598749 ps |
| T329 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1217434314 |
|
|
Mar 26 12:59:32 PM PDT 24 |
Mar 26 01:02:00 PM PDT 24 |
8399530123 ps |
| T330 |
/workspace/coverage/default/46.sram_ctrl_alert_test.1869993348 |
|
|
Mar 26 01:08:07 PM PDT 24 |
Mar 26 01:08:08 PM PDT 24 |
31326463 ps |
| T331 |
/workspace/coverage/default/35.sram_ctrl_regwen.3639584475 |
|
|
Mar 26 01:05:23 PM PDT 24 |
Mar 26 01:16:50 PM PDT 24 |
6943516645 ps |
| T332 |
/workspace/coverage/default/34.sram_ctrl_executable.1832123492 |
|
|
Mar 26 01:05:08 PM PDT 24 |
Mar 26 01:23:32 PM PDT 24 |
64116737897 ps |
| T333 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.3590849219 |
|
|
Mar 26 01:02:43 PM PDT 24 |
Mar 26 01:02:49 PM PDT 24 |
2467264377 ps |
| T334 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2535957162 |
|
|
Mar 26 01:02:56 PM PDT 24 |
Mar 26 01:05:11 PM PDT 24 |
876134028 ps |
| T25 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.768042054 |
|
|
Mar 26 12:58:35 PM PDT 24 |
Mar 26 12:58:38 PM PDT 24 |
332200889 ps |
| T335 |
/workspace/coverage/default/28.sram_ctrl_partial_access.2397821415 |
|
|
Mar 26 01:03:33 PM PDT 24 |
Mar 26 01:04:09 PM PDT 24 |
1903556765 ps |
| T336 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1590675823 |
|
|
Mar 26 01:01:58 PM PDT 24 |
Mar 26 01:02:05 PM PDT 24 |
712023055 ps |
| T337 |
/workspace/coverage/default/49.sram_ctrl_stress_all.870193732 |
|
|
Mar 26 01:08:47 PM PDT 24 |
Mar 26 02:49:08 PM PDT 24 |
466442649774 ps |
| T338 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.3098778262 |
|
|
Mar 26 01:01:15 PM PDT 24 |
Mar 26 01:03:01 PM PDT 24 |
851603834 ps |
| T104 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.493132267 |
|
|
Mar 26 12:58:47 PM PDT 24 |
Mar 26 12:59:27 PM PDT 24 |
1487692516 ps |
| T105 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.782111850 |
|
|
Mar 26 01:03:53 PM PDT 24 |
Mar 26 01:03:58 PM PDT 24 |
531115263 ps |
| T339 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1582933232 |
|
|
Mar 26 01:07:29 PM PDT 24 |
Mar 26 01:07:49 PM PDT 24 |
1582624525 ps |
| T340 |
/workspace/coverage/default/44.sram_ctrl_regwen.538651242 |
|
|
Mar 26 01:07:29 PM PDT 24 |
Mar 26 01:16:11 PM PDT 24 |
44139858054 ps |
| T341 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.822657854 |
|
|
Mar 26 01:02:55 PM PDT 24 |
Mar 26 01:05:53 PM PDT 24 |
15686701075 ps |
| T342 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.1452255280 |
|
|
Mar 26 12:59:55 PM PDT 24 |
Mar 26 01:01:34 PM PDT 24 |
784685432 ps |
| T343 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2410636154 |
|
|
Mar 26 01:01:47 PM PDT 24 |
Mar 26 01:02:17 PM PDT 24 |
916376196 ps |
| T344 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3042442206 |
|
|
Mar 26 01:04:51 PM PDT 24 |
Mar 26 01:05:00 PM PDT 24 |
1072340237 ps |
| T345 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.376016605 |
|
|
Mar 26 01:08:31 PM PDT 24 |
Mar 26 01:14:13 PM PDT 24 |
72511826003 ps |
| T346 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.19007442 |
|
|
Mar 26 01:07:06 PM PDT 24 |
Mar 26 01:07:59 PM PDT 24 |
751930217 ps |
| T347 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2715804747 |
|
|
Mar 26 01:04:11 PM PDT 24 |
Mar 26 01:05:00 PM PDT 24 |
735635700 ps |
| T348 |
/workspace/coverage/default/29.sram_ctrl_smoke.3651879873 |
|
|
Mar 26 01:03:54 PM PDT 24 |
Mar 26 01:03:58 PM PDT 24 |
400117895 ps |
| T349 |
/workspace/coverage/default/41.sram_ctrl_stress_all.361108837 |
|
|
Mar 26 01:07:04 PM PDT 24 |
Mar 26 02:15:04 PM PDT 24 |
492439044843 ps |
| T350 |
/workspace/coverage/default/37.sram_ctrl_smoke.237603585 |
|
|
Mar 26 01:05:33 PM PDT 24 |
Mar 26 01:07:17 PM PDT 24 |
1198334591 ps |
| T351 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3999309714 |
|
|
Mar 26 01:08:21 PM PDT 24 |
Mar 26 01:09:29 PM PDT 24 |
1516626426 ps |
| T352 |
/workspace/coverage/default/27.sram_ctrl_executable.1641793910 |
|
|
Mar 26 01:03:36 PM PDT 24 |
Mar 26 01:23:44 PM PDT 24 |
67823990256 ps |
| T353 |
/workspace/coverage/default/40.sram_ctrl_executable.2277450857 |
|
|
Mar 26 01:06:34 PM PDT 24 |
Mar 26 01:31:18 PM PDT 24 |
16442840878 ps |
| T354 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2672247485 |
|
|
Mar 26 01:00:19 PM PDT 24 |
Mar 26 01:00:22 PM PDT 24 |
1363428756 ps |
| T355 |
/workspace/coverage/default/42.sram_ctrl_bijection.178046765 |
|
|
Mar 26 01:07:05 PM PDT 24 |
Mar 26 01:28:13 PM PDT 24 |
274789687239 ps |
| T356 |
/workspace/coverage/default/32.sram_ctrl_smoke.3675326837 |
|
|
Mar 26 01:04:38 PM PDT 24 |
Mar 26 01:05:10 PM PDT 24 |
426689838 ps |
| T357 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.1496186616 |
|
|
Mar 26 01:07:16 PM PDT 24 |
Mar 26 01:09:40 PM PDT 24 |
7039166704 ps |
| T358 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.3819743322 |
|
|
Mar 26 01:01:15 PM PDT 24 |
Mar 26 01:01:18 PM PDT 24 |
2242962902 ps |
| T359 |
/workspace/coverage/default/0.sram_ctrl_partial_access.283459271 |
|
|
Mar 26 12:58:11 PM PDT 24 |
Mar 26 12:58:18 PM PDT 24 |
2527488097 ps |
| T360 |
/workspace/coverage/default/23.sram_ctrl_bijection.3141492342 |
|
|
Mar 26 01:02:42 PM PDT 24 |
Mar 26 01:40:46 PM PDT 24 |
43057847136 ps |
| T361 |
/workspace/coverage/default/29.sram_ctrl_partial_access.3739149979 |
|
|
Mar 26 01:03:50 PM PDT 24 |
Mar 26 01:04:01 PM PDT 24 |
2484863196 ps |
| T362 |
/workspace/coverage/default/17.sram_ctrl_smoke.4172907618 |
|
|
Mar 26 01:01:29 PM PDT 24 |
Mar 26 01:01:53 PM PDT 24 |
1425859739 ps |
| T363 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2510839287 |
|
|
Mar 26 01:05:33 PM PDT 24 |
Mar 26 01:06:07 PM PDT 24 |
3447930389 ps |
| T364 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2789968935 |
|
|
Mar 26 01:04:37 PM PDT 24 |
Mar 26 01:04:39 PM PDT 24 |
13743145 ps |
| T365 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2057806192 |
|
|
Mar 26 12:59:01 PM PDT 24 |
Mar 26 01:17:07 PM PDT 24 |
11061472932 ps |
| T366 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2818148222 |
|
|
Mar 26 01:05:25 PM PDT 24 |
Mar 26 01:07:56 PM PDT 24 |
10152607040 ps |
| T367 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2368805090 |
|
|
Mar 26 01:03:06 PM PDT 24 |
Mar 26 01:10:46 PM PDT 24 |
8551736592 ps |
| T368 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.823850638 |
|
|
Mar 26 01:06:20 PM PDT 24 |
Mar 26 01:16:18 PM PDT 24 |
16443037084 ps |
| T369 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2620007015 |
|
|
Mar 26 01:03:19 PM PDT 24 |
Mar 26 01:03:20 PM PDT 24 |
14307675 ps |
| T370 |
/workspace/coverage/default/14.sram_ctrl_executable.196562652 |
|
|
Mar 26 01:01:01 PM PDT 24 |
Mar 26 01:25:07 PM PDT 24 |
188260210827 ps |
| T371 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.4293210811 |
|
|
Mar 26 01:04:56 PM PDT 24 |
Mar 26 01:05:28 PM PDT 24 |
739684210 ps |
| T372 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1125906408 |
|
|
Mar 26 12:59:21 PM PDT 24 |
Mar 26 01:02:49 PM PDT 24 |
3383491053 ps |
| T373 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.49986253 |
|
|
Mar 26 01:08:21 PM PDT 24 |
Mar 26 01:11:49 PM PDT 24 |
55055827295 ps |
| T374 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2903587347 |
|
|
Mar 26 12:59:01 PM PDT 24 |
Mar 26 01:05:22 PM PDT 24 |
20465701871 ps |
| T375 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1743101897 |
|
|
Mar 26 12:59:54 PM PDT 24 |
Mar 26 01:06:35 PM PDT 24 |
14954248565 ps |
| T376 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1259081627 |
|
|
Mar 26 01:00:31 PM PDT 24 |
Mar 26 01:01:41 PM PDT 24 |
2442710631 ps |
| T377 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3085248299 |
|
|
Mar 26 01:00:30 PM PDT 24 |
Mar 26 01:01:56 PM PDT 24 |
3076973696 ps |
| T378 |
/workspace/coverage/default/18.sram_ctrl_partial_access.601957032 |
|
|
Mar 26 01:01:45 PM PDT 24 |
Mar 26 01:02:07 PM PDT 24 |
733934776 ps |
| T379 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1390910239 |
|
|
Mar 26 01:04:25 PM PDT 24 |
Mar 26 01:05:01 PM PDT 24 |
1407201706 ps |
| T380 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3722736435 |
|
|
Mar 26 01:01:18 PM PDT 24 |
Mar 26 01:06:49 PM PDT 24 |
5887407789 ps |
| T381 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2516002010 |
|
|
Mar 26 01:07:18 PM PDT 24 |
Mar 26 01:18:47 PM PDT 24 |
41879064734 ps |
| T382 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4098259375 |
|
|
Mar 26 01:07:29 PM PDT 24 |
Mar 26 01:12:49 PM PDT 24 |
30451409816 ps |
| T383 |
/workspace/coverage/default/16.sram_ctrl_executable.3154084471 |
|
|
Mar 26 01:01:15 PM PDT 24 |
Mar 26 01:11:39 PM PDT 24 |
15869170925 ps |
| T33 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.4093298399 |
|
|
Mar 26 12:59:01 PM PDT 24 |
Mar 26 12:59:03 PM PDT 24 |
477293303 ps |
| T384 |
/workspace/coverage/default/21.sram_ctrl_bijection.4151583868 |
|
|
Mar 26 01:02:10 PM PDT 24 |
Mar 26 01:14:25 PM PDT 24 |
11402104864 ps |
| T385 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3052973370 |
|
|
Mar 26 01:03:51 PM PDT 24 |
Mar 26 01:05:58 PM PDT 24 |
15329033136 ps |
| T386 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.85337451 |
|
|
Mar 26 01:04:34 PM PDT 24 |
Mar 26 01:04:38 PM PDT 24 |
1413293128 ps |
| T387 |
/workspace/coverage/default/22.sram_ctrl_stress_all.1408370178 |
|
|
Mar 26 01:02:23 PM PDT 24 |
Mar 26 02:49:09 PM PDT 24 |
548136195864 ps |
| T388 |
/workspace/coverage/default/40.sram_ctrl_regwen.509244851 |
|
|
Mar 26 01:06:34 PM PDT 24 |
Mar 26 01:14:38 PM PDT 24 |
5223923147 ps |
| T389 |
/workspace/coverage/default/32.sram_ctrl_bijection.1228090598 |
|
|
Mar 26 01:04:34 PM PDT 24 |
Mar 26 01:23:47 PM PDT 24 |
50835723702 ps |
| T390 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2795804203 |
|
|
Mar 26 01:04:51 PM PDT 24 |
Mar 26 01:05:03 PM PDT 24 |
2925188480 ps |
| T391 |
/workspace/coverage/default/6.sram_ctrl_executable.2860657124 |
|
|
Mar 26 12:59:12 PM PDT 24 |
Mar 26 01:07:28 PM PDT 24 |
29602512215 ps |
| T392 |
/workspace/coverage/default/13.sram_ctrl_smoke.3294320603 |
|
|
Mar 26 01:00:29 PM PDT 24 |
Mar 26 01:00:46 PM PDT 24 |
573838355 ps |
| T393 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.3373924636 |
|
|
Mar 26 01:01:15 PM PDT 24 |
Mar 26 01:19:41 PM PDT 24 |
13534683551 ps |
| T394 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.547765534 |
|
|
Mar 26 01:01:13 PM PDT 24 |
Mar 26 01:01:25 PM PDT 24 |
2867621929 ps |
| T395 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2308370463 |
|
|
Mar 26 01:07:41 PM PDT 24 |
Mar 26 01:07:48 PM PDT 24 |
4770526839 ps |
| T396 |
/workspace/coverage/default/23.sram_ctrl_alert_test.226662516 |
|
|
Mar 26 01:02:42 PM PDT 24 |
Mar 26 01:02:43 PM PDT 24 |
51549548 ps |
| T397 |
/workspace/coverage/default/24.sram_ctrl_regwen.2023739838 |
|
|
Mar 26 01:02:55 PM PDT 24 |
Mar 26 01:07:58 PM PDT 24 |
6286804078 ps |
| T398 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.259640960 |
|
|
Mar 26 01:01:28 PM PDT 24 |
Mar 26 01:01:45 PM PDT 24 |
699935694 ps |
| T399 |
/workspace/coverage/default/30.sram_ctrl_stress_all.3147550845 |
|
|
Mar 26 01:04:21 PM PDT 24 |
Mar 26 02:08:13 PM PDT 24 |
34850279859 ps |
| T400 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2958923697 |
|
|
Mar 26 01:04:32 PM PDT 24 |
Mar 26 01:04:58 PM PDT 24 |
2835944790 ps |
| T401 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2627545149 |
|
|
Mar 26 01:01:46 PM PDT 24 |
Mar 26 01:07:19 PM PDT 24 |
18946347622 ps |
| T402 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3808461586 |
|
|
Mar 26 12:58:23 PM PDT 24 |
Mar 26 01:08:45 PM PDT 24 |
10125879128 ps |
| T403 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.434825933 |
|
|
Mar 26 01:05:21 PM PDT 24 |
Mar 26 01:06:32 PM PDT 24 |
39644288895 ps |
| T404 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2063372550 |
|
|
Mar 26 01:01:13 PM PDT 24 |
Mar 26 01:03:36 PM PDT 24 |
27501093869 ps |
| T405 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2675354213 |
|
|
Mar 26 01:06:49 PM PDT 24 |
Mar 26 01:12:24 PM PDT 24 |
14511372627 ps |
| T406 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.543569933 |
|
|
Mar 26 01:04:52 PM PDT 24 |
Mar 26 01:10:49 PM PDT 24 |
147496208869 ps |
| T407 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2446755152 |
|
|
Mar 26 12:58:12 PM PDT 24 |
Mar 26 01:00:34 PM PDT 24 |
6467245249 ps |
| T408 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3812015029 |
|
|
Mar 26 12:59:04 PM PDT 24 |
Mar 26 12:59:13 PM PDT 24 |
1078578419 ps |
| T409 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3442212093 |
|
|
Mar 26 01:08:20 PM PDT 24 |
Mar 26 01:09:30 PM PDT 24 |
15838786357 ps |
| T106 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.984294032 |
|
|
Mar 26 01:02:55 PM PDT 24 |
Mar 26 01:03:26 PM PDT 24 |
1356429076 ps |
| T410 |
/workspace/coverage/default/1.sram_ctrl_executable.1628411481 |
|
|
Mar 26 12:58:23 PM PDT 24 |
Mar 26 01:08:28 PM PDT 24 |
13702650119 ps |
| T411 |
/workspace/coverage/default/18.sram_ctrl_smoke.2468884733 |
|
|
Mar 26 01:01:46 PM PDT 24 |
Mar 26 01:03:27 PM PDT 24 |
834915597 ps |
| T412 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3948163818 |
|
|
Mar 26 12:58:13 PM PDT 24 |
Mar 26 01:00:17 PM PDT 24 |
1978505885 ps |
| T413 |
/workspace/coverage/default/1.sram_ctrl_partial_access.1295110112 |
|
|
Mar 26 12:58:27 PM PDT 24 |
Mar 26 12:58:44 PM PDT 24 |
2996366890 ps |
| T414 |
/workspace/coverage/default/40.sram_ctrl_stress_all.88126229 |
|
|
Mar 26 01:06:34 PM PDT 24 |
Mar 26 01:36:03 PM PDT 24 |
60858940361 ps |
| T415 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.674255143 |
|
|
Mar 26 01:08:33 PM PDT 24 |
Mar 26 01:09:26 PM PDT 24 |
2686861776 ps |
| T416 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3671826039 |
|
|
Mar 26 01:05:08 PM PDT 24 |
Mar 26 01:12:11 PM PDT 24 |
8368330434 ps |
| T417 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.400058086 |
|
|
Mar 26 01:00:40 PM PDT 24 |
Mar 26 01:03:06 PM PDT 24 |
27536016756 ps |
| T418 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2355540875 |
|
|
Mar 26 01:02:59 PM PDT 24 |
Mar 26 01:04:58 PM PDT 24 |
3513658174 ps |
| T419 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3628559467 |
|
|
Mar 26 12:59:13 PM PDT 24 |
Mar 26 12:59:16 PM PDT 24 |
1354057249 ps |
| T107 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.619301078 |
|
|
Mar 26 01:02:30 PM PDT 24 |
Mar 26 01:02:36 PM PDT 24 |
432702370 ps |
| T420 |
/workspace/coverage/default/16.sram_ctrl_smoke.649899075 |
|
|
Mar 26 01:01:14 PM PDT 24 |
Mar 26 01:01:26 PM PDT 24 |
3216420339 ps |
| T421 |
/workspace/coverage/default/28.sram_ctrl_regwen.1960169887 |
|
|
Mar 26 01:03:50 PM PDT 24 |
Mar 26 01:13:42 PM PDT 24 |
12749771749 ps |
| T422 |
/workspace/coverage/default/44.sram_ctrl_smoke.3961715869 |
|
|
Mar 26 01:07:28 PM PDT 24 |
Mar 26 01:07:34 PM PDT 24 |
1909316976 ps |
| T423 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1281220216 |
|
|
Mar 26 12:59:33 PM PDT 24 |
Mar 26 01:00:33 PM PDT 24 |
1487308935 ps |
| T424 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.874731209 |
|
|
Mar 26 01:03:00 PM PDT 24 |
Mar 26 01:08:50 PM PDT 24 |
21321478162 ps |
| T425 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4256378287 |
|
|
Mar 26 01:00:06 PM PDT 24 |
Mar 26 01:00:52 PM PDT 24 |
3901244508 ps |
| T426 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1119921924 |
|
|
Mar 26 01:02:42 PM PDT 24 |
Mar 26 01:09:19 PM PDT 24 |
5442544627 ps |
| T427 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.1202288506 |
|
|
Mar 26 01:06:19 PM PDT 24 |
Mar 26 01:07:24 PM PDT 24 |
998326726 ps |
| T428 |
/workspace/coverage/default/24.sram_ctrl_stress_all.3967206971 |
|
|
Mar 26 01:02:59 PM PDT 24 |
Mar 26 02:32:36 PM PDT 24 |
77457298710 ps |
| T429 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3852258309 |
|
|
Mar 26 12:58:23 PM PDT 24 |
Mar 26 01:52:55 PM PDT 24 |
550119852611 ps |
| T430 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.1360691164 |
|
|
Mar 26 01:02:55 PM PDT 24 |
Mar 26 01:07:09 PM PDT 24 |
18643530600 ps |
| T431 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1252361015 |
|
|
Mar 26 12:58:23 PM PDT 24 |
Mar 26 01:01:10 PM PDT 24 |
4931248177 ps |
| T432 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.119847272 |
|
|
Mar 26 01:01:59 PM PDT 24 |
Mar 26 01:06:11 PM PDT 24 |
8041752087 ps |
| T433 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3846500084 |
|
|
Mar 26 01:04:33 PM PDT 24 |
Mar 26 01:07:54 PM PDT 24 |
3105035630 ps |
| T434 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1368924605 |
|
|
Mar 26 01:01:17 PM PDT 24 |
Mar 26 01:03:44 PM PDT 24 |
7173602777 ps |
| T435 |
/workspace/coverage/default/39.sram_ctrl_partial_access.1237997390 |
|
|
Mar 26 01:06:18 PM PDT 24 |
Mar 26 01:07:28 PM PDT 24 |
2319288042 ps |
| T436 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.3760910384 |
|
|
Mar 26 12:58:36 PM PDT 24 |
Mar 26 01:01:06 PM PDT 24 |
28691326514 ps |
| T437 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.732342444 |
|
|
Mar 26 01:01:28 PM PDT 24 |
Mar 26 01:02:28 PM PDT 24 |
36254878055 ps |
| T438 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2944576723 |
|
|
Mar 26 01:06:49 PM PDT 24 |
Mar 26 01:11:41 PM PDT 24 |
7038870695 ps |
| T439 |
/workspace/coverage/default/6.sram_ctrl_regwen.3388455286 |
|
|
Mar 26 12:59:10 PM PDT 24 |
Mar 26 01:00:47 PM PDT 24 |
48973261815 ps |
| T440 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2544569559 |
|
|
Mar 26 12:59:42 PM PDT 24 |
Mar 26 01:02:44 PM PDT 24 |
6200554646 ps |
| T441 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.3443758666 |
|
|
Mar 26 01:04:52 PM PDT 24 |
Mar 26 01:11:32 PM PDT 24 |
13350508173 ps |
| T442 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.569162534 |
|
|
Mar 26 01:05:06 PM PDT 24 |
Mar 26 01:07:13 PM PDT 24 |
6465226981 ps |
| T443 |
/workspace/coverage/default/46.sram_ctrl_regwen.1956366075 |
|
|
Mar 26 01:07:55 PM PDT 24 |
Mar 26 01:17:58 PM PDT 24 |
37813108446 ps |
| T444 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.1285891723 |
|
|
Mar 26 01:07:16 PM PDT 24 |
Mar 26 01:07:22 PM PDT 24 |
2770519825 ps |
| T445 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3744014613 |
|
|
Mar 26 12:58:49 PM PDT 24 |
Mar 26 12:59:29 PM PDT 24 |
7861019594 ps |
| T446 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.2628191720 |
|
|
Mar 26 01:05:34 PM PDT 24 |
Mar 26 01:07:40 PM PDT 24 |
3953341087 ps |
| T447 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.3206451309 |
|
|
Mar 26 01:02:25 PM PDT 24 |
Mar 26 01:03:10 PM PDT 24 |
17440277880 ps |
| T448 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.1873329701 |
|
|
Mar 26 01:01:59 PM PDT 24 |
Mar 26 01:03:06 PM PDT 24 |
4234410487 ps |
| T449 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3046571571 |
|
|
Mar 26 01:04:52 PM PDT 24 |
Mar 26 01:04:56 PM PDT 24 |
691920439 ps |
| T450 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1901911320 |
|
|
Mar 26 12:59:31 PM PDT 24 |
Mar 26 01:07:04 PM PDT 24 |
16960631467 ps |
| T451 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.460903738 |
|
|
Mar 26 01:06:48 PM PDT 24 |
Mar 26 01:08:46 PM PDT 24 |
3112675076 ps |
| T452 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.4001393995 |
|
|
Mar 26 01:04:13 PM PDT 24 |
Mar 26 01:10:44 PM PDT 24 |
16405429601 ps |
| T453 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.870012166 |
|
|
Mar 26 01:04:17 PM PDT 24 |
Mar 26 01:06:50 PM PDT 24 |
10769780164 ps |
| T454 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3432249438 |
|
|
Mar 26 12:59:54 PM PDT 24 |
Mar 26 01:07:42 PM PDT 24 |
34939648236 ps |
| T455 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.3269518038 |
|
|
Mar 26 01:01:13 PM PDT 24 |
Mar 26 01:01:16 PM PDT 24 |
495231238 ps |
| T456 |
/workspace/coverage/default/37.sram_ctrl_executable.2192963852 |
|
|
Mar 26 01:05:55 PM PDT 24 |
Mar 26 01:33:29 PM PDT 24 |
15748344231 ps |
| T457 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3940347547 |
|
|
Mar 26 01:07:43 PM PDT 24 |
Mar 26 01:07:46 PM PDT 24 |
1406821622 ps |
| T458 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.589352011 |
|
|
Mar 26 01:07:05 PM PDT 24 |
Mar 26 01:07:09 PM PDT 24 |
745195458 ps |
| T459 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.422641767 |
|
|
Mar 26 01:08:04 PM PDT 24 |
Mar 26 01:08:10 PM PDT 24 |
1168607407 ps |
| T460 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1680502594 |
|
|
Mar 26 12:59:12 PM PDT 24 |
Mar 26 12:59:49 PM PDT 24 |
737590917 ps |
| T461 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3873885745 |
|
|
Mar 26 01:02:56 PM PDT 24 |
Mar 26 01:05:28 PM PDT 24 |
4513037499 ps |
| T462 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2776349638 |
|
|
Mar 26 01:04:51 PM PDT 24 |
Mar 26 01:19:31 PM PDT 24 |
76439653855 ps |
| T463 |
/workspace/coverage/default/17.sram_ctrl_partial_access.195139091 |
|
|
Mar 26 01:01:28 PM PDT 24 |
Mar 26 01:02:20 PM PDT 24 |
1111866851 ps |
| T464 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.332174783 |
|
|
Mar 26 01:01:57 PM PDT 24 |
Mar 26 01:06:28 PM PDT 24 |
5511726990 ps |
| T465 |
/workspace/coverage/default/35.sram_ctrl_partial_access.3246110228 |
|
|
Mar 26 01:05:06 PM PDT 24 |
Mar 26 01:05:26 PM PDT 24 |
1344950676 ps |
| T466 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1541768249 |
|
|
Mar 26 01:07:30 PM PDT 24 |
Mar 26 01:20:57 PM PDT 24 |
7669756277 ps |
| T467 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2906063188 |
|
|
Mar 26 12:58:13 PM PDT 24 |
Mar 26 01:02:18 PM PDT 24 |
3168399694 ps |
| T468 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.252945399 |
|
|
Mar 26 12:59:23 PM PDT 24 |
Mar 26 01:02:01 PM PDT 24 |
5012637026 ps |
| T469 |
/workspace/coverage/default/22.sram_ctrl_smoke.1818361640 |
|
|
Mar 26 01:02:13 PM PDT 24 |
Mar 26 01:03:13 PM PDT 24 |
4513789122 ps |
| T470 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3187083207 |
|
|
Mar 26 01:02:56 PM PDT 24 |
Mar 26 01:08:07 PM PDT 24 |
53345116091 ps |
| T471 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.3490566677 |
|
|
Mar 26 12:58:38 PM PDT 24 |
Mar 26 01:15:46 PM PDT 24 |
33188370554 ps |
| T472 |
/workspace/coverage/default/4.sram_ctrl_stress_all.2386772752 |
|
|
Mar 26 12:58:48 PM PDT 24 |
Mar 26 01:43:38 PM PDT 24 |
57060027802 ps |
| T473 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.4155284411 |
|
|
Mar 26 01:02:56 PM PDT 24 |
Mar 26 01:03:08 PM PDT 24 |
692638070 ps |
| T474 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.2030685702 |
|
|
Mar 26 01:03:35 PM PDT 24 |
Mar 26 01:06:09 PM PDT 24 |
24388447034 ps |
| T475 |
/workspace/coverage/default/20.sram_ctrl_regwen.630524584 |
|
|
Mar 26 01:01:59 PM PDT 24 |
Mar 26 01:04:30 PM PDT 24 |
9496120048 ps |
| T476 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.930662257 |
|
|
Mar 26 01:01:29 PM PDT 24 |
Mar 26 01:02:42 PM PDT 24 |
4690759324 ps |
| T477 |
/workspace/coverage/default/21.sram_ctrl_smoke.2546412375 |
|
|
Mar 26 01:02:12 PM PDT 24 |
Mar 26 01:02:17 PM PDT 24 |
452186532 ps |
| T478 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.862742926 |
|
|
Mar 26 01:05:34 PM PDT 24 |
Mar 26 01:06:48 PM PDT 24 |
2728893976 ps |
| T479 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.313349524 |
|
|
Mar 26 01:01:58 PM PDT 24 |
Mar 26 01:09:22 PM PDT 24 |
4902920483 ps |
| T480 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.2760232139 |
|
|
Mar 26 01:03:33 PM PDT 24 |
Mar 26 01:12:06 PM PDT 24 |
9584191605 ps |
| T481 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.4206855149 |
|
|
Mar 26 01:04:33 PM PDT 24 |
Mar 26 01:09:31 PM PDT 24 |
20663545724 ps |
| T482 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3522358987 |
|
|
Mar 26 01:00:20 PM PDT 24 |
Mar 26 01:09:33 PM PDT 24 |
100075278375 ps |
| T483 |
/workspace/coverage/default/23.sram_ctrl_stress_all.3118474354 |
|
|
Mar 26 01:02:42 PM PDT 24 |
Mar 26 02:39:23 PM PDT 24 |
23341031930 ps |
| T484 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.10317669 |
|
|
Mar 26 12:58:50 PM PDT 24 |
Mar 26 01:06:41 PM PDT 24 |
32434630705 ps |
| T485 |
/workspace/coverage/default/13.sram_ctrl_stress_all.2858481012 |
|
|
Mar 26 01:01:01 PM PDT 24 |
Mar 26 02:41:54 PM PDT 24 |
225506582713 ps |
| T486 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2053848977 |
|
|
Mar 26 01:08:07 PM PDT 24 |
Mar 26 01:08:42 PM PDT 24 |
3183931217 ps |
| T487 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.379939645 |
|
|
Mar 26 01:03:34 PM PDT 24 |
Mar 26 01:06:00 PM PDT 24 |
2267270091 ps |
| T488 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2962571401 |
|
|
Mar 26 12:59:01 PM PDT 24 |
Mar 26 01:42:14 PM PDT 24 |
374370315636 ps |
| T489 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.3995150876 |
|
|
Mar 26 01:06:20 PM PDT 24 |
Mar 26 01:06:24 PM PDT 24 |
1681217863 ps |
| T490 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3952595347 |
|
|
Mar 26 01:05:06 PM PDT 24 |
Mar 26 01:06:44 PM PDT 24 |
832531274 ps |
| T491 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2257115933 |
|
|
Mar 26 01:08:07 PM PDT 24 |
Mar 26 01:09:09 PM PDT 24 |
9712827107 ps |
| T492 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4285697519 |
|
|
Mar 26 12:58:23 PM PDT 24 |
Mar 26 12:59:59 PM PDT 24 |
797929305 ps |
| T493 |
/workspace/coverage/default/12.sram_ctrl_alert_test.3781259767 |
|
|
Mar 26 01:00:31 PM PDT 24 |
Mar 26 01:00:32 PM PDT 24 |
41645424 ps |
| T494 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.53146727 |
|
|
Mar 26 01:06:19 PM PDT 24 |
Mar 26 01:11:09 PM PDT 24 |
21080040106 ps |
| T495 |
/workspace/coverage/default/15.sram_ctrl_stress_all.1308730745 |
|
|
Mar 26 01:01:14 PM PDT 24 |
Mar 26 01:49:52 PM PDT 24 |
54493100098 ps |
| T496 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.9540771 |
|
|
Mar 26 01:05:06 PM PDT 24 |
Mar 26 01:17:30 PM PDT 24 |
65627054620 ps |
| T497 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.1799832873 |
|
|
Mar 26 01:02:22 PM PDT 24 |
Mar 26 01:05:53 PM PDT 24 |
3216237322 ps |
| T498 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3292131545 |
|
|
Mar 26 01:00:19 PM PDT 24 |
Mar 26 01:00:51 PM PDT 24 |
2784247789 ps |
| T499 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.802343026 |
|
|
Mar 26 01:06:04 PM PDT 24 |
Mar 26 01:07:06 PM PDT 24 |
1504486690 ps |
| T500 |
/workspace/coverage/default/21.sram_ctrl_stress_all.93823847 |
|
|
Mar 26 01:02:12 PM PDT 24 |
Mar 26 01:30:28 PM PDT 24 |
35002619648 ps |
| T501 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.55669739 |
|
|
Mar 26 01:05:49 PM PDT 24 |
Mar 26 01:09:48 PM PDT 24 |
12571362242 ps |
| T502 |
/workspace/coverage/default/0.sram_ctrl_alert_test.370731949 |
|
|
Mar 26 12:58:22 PM PDT 24 |
Mar 26 12:58:23 PM PDT 24 |
25266590 ps |
| T503 |
/workspace/coverage/default/32.sram_ctrl_regwen.1148837736 |
|
|
Mar 26 01:04:34 PM PDT 24 |
Mar 26 01:09:31 PM PDT 24 |
5940378095 ps |
| T504 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2016074873 |
|
|
Mar 26 01:07:18 PM PDT 24 |
Mar 26 01:07:33 PM PDT 24 |
1818933669 ps |
| T505 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1807640541 |
|
|
Mar 26 01:03:32 PM PDT 24 |
Mar 26 01:25:30 PM PDT 24 |
15709970463 ps |
| T506 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.3870756137 |
|
|
Mar 26 01:04:14 PM PDT 24 |
Mar 26 01:11:02 PM PDT 24 |
7575236797 ps |
| T507 |
/workspace/coverage/default/33.sram_ctrl_regwen.1257066996 |
|
|
Mar 26 01:04:52 PM PDT 24 |
Mar 26 01:20:22 PM PDT 24 |
69399556878 ps |
| T508 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3327257750 |
|
|
Mar 26 01:01:00 PM PDT 24 |
Mar 26 01:01:01 PM PDT 24 |
15450462 ps |
| T509 |
/workspace/coverage/default/27.sram_ctrl_smoke.4116006418 |
|
|
Mar 26 01:03:20 PM PDT 24 |
Mar 26 01:03:43 PM PDT 24 |
1633948453 ps |
| T510 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.502007269 |
|
|
Mar 26 01:05:07 PM PDT 24 |
Mar 26 01:06:27 PM PDT 24 |
14567393497 ps |
| T511 |
/workspace/coverage/default/43.sram_ctrl_stress_all.4118183999 |
|
|
Mar 26 01:07:28 PM PDT 24 |
Mar 26 02:30:21 PM PDT 24 |
754032117624 ps |
| T512 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.4162328034 |
|
|
Mar 26 01:01:29 PM PDT 24 |
Mar 26 01:01:33 PM PDT 24 |
348668258 ps |
| T513 |
/workspace/coverage/default/29.sram_ctrl_executable.3419412230 |
|
|
Mar 26 01:04:12 PM PDT 24 |
Mar 26 01:11:41 PM PDT 24 |
52488672032 ps |
| T514 |
/workspace/coverage/default/40.sram_ctrl_partial_access.3174803172 |
|
|
Mar 26 01:06:33 PM PDT 24 |
Mar 26 01:08:45 PM PDT 24 |
3231830858 ps |
| T515 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.24247499 |
|
|
Mar 26 01:00:59 PM PDT 24 |
Mar 26 01:02:07 PM PDT 24 |
766301747 ps |
| T516 |
/workspace/coverage/default/27.sram_ctrl_bijection.2566453290 |
|
|
Mar 26 01:03:20 PM PDT 24 |
Mar 26 01:14:04 PM PDT 24 |
9617263476 ps |
| T517 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3670977709 |
|
|
Mar 26 12:58:52 PM PDT 24 |
Mar 26 01:01:24 PM PDT 24 |
43079372695 ps |
| T518 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2842919258 |
|
|
Mar 26 12:59:10 PM PDT 24 |
Mar 26 01:00:19 PM PDT 24 |
42102703104 ps |
| T519 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2070708876 |
|
|
Mar 26 01:01:14 PM PDT 24 |
Mar 26 01:03:55 PM PDT 24 |
779864139 ps |
| T520 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.1115267258 |
|
|
Mar 26 01:05:49 PM PDT 24 |
Mar 26 01:07:39 PM PDT 24 |
796935755 ps |
| T521 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1011006305 |
|
|
Mar 26 01:06:34 PM PDT 24 |
Mar 26 01:12:56 PM PDT 24 |
65255699512 ps |
| T522 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.1463413566 |
|
|
Mar 26 01:00:18 PM PDT 24 |
Mar 26 01:00:24 PM PDT 24 |
706818967 ps |
| T523 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1297810202 |
|
|
Mar 26 01:07:17 PM PDT 24 |
Mar 26 01:12:18 PM PDT 24 |
13440387713 ps |
| T524 |
/workspace/coverage/default/4.sram_ctrl_smoke.3330179533 |
|
|
Mar 26 12:58:49 PM PDT 24 |
Mar 26 12:59:10 PM PDT 24 |
5539048983 ps |
| T525 |
/workspace/coverage/default/48.sram_ctrl_smoke.304964316 |
|
|
Mar 26 01:08:21 PM PDT 24 |
Mar 26 01:08:27 PM PDT 24 |
367807837 ps |
| T526 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3000894329 |
|
|
Mar 26 01:07:29 PM PDT 24 |
Mar 26 01:09:45 PM PDT 24 |
1630508453 ps |
| T527 |
/workspace/coverage/default/36.sram_ctrl_stress_all.542426091 |
|
|
Mar 26 01:05:35 PM PDT 24 |
Mar 26 02:13:31 PM PDT 24 |
71877925340 ps |
| T528 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2375419065 |
|
|
Mar 26 01:00:06 PM PDT 24 |
Mar 26 01:15:51 PM PDT 24 |
20900169127 ps |
| T529 |
/workspace/coverage/default/2.sram_ctrl_alert_test.3445801458 |
|
|
Mar 26 12:58:36 PM PDT 24 |
Mar 26 12:58:37 PM PDT 24 |
11912159 ps |
| T530 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.967314879 |
|
|
Mar 26 01:04:34 PM PDT 24 |
Mar 26 01:07:06 PM PDT 24 |
12219636203 ps |
| T531 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.3960559442 |
|
|
Mar 26 01:04:51 PM PDT 24 |
Mar 26 01:05:49 PM PDT 24 |
992072693 ps |
| T532 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.298545648 |
|
|
Mar 26 01:01:46 PM PDT 24 |
Mar 26 01:11:07 PM PDT 24 |
26188193703 ps |
| T533 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.4222186444 |
|
|
Mar 26 01:00:42 PM PDT 24 |
Mar 26 01:03:30 PM PDT 24 |
18161815980 ps |
| T534 |
/workspace/coverage/default/35.sram_ctrl_bijection.1755174887 |
|
|
Mar 26 01:05:05 PM PDT 24 |
Mar 26 01:15:28 PM PDT 24 |
54602302902 ps |
| T535 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.1298196478 |
|
|
Mar 26 01:03:50 PM PDT 24 |
Mar 26 01:07:57 PM PDT 24 |
4010070671 ps |
| T536 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1268610243 |
|
|
Mar 26 12:58:22 PM PDT 24 |
Mar 26 12:58:35 PM PDT 24 |
690767592 ps |
| T537 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.929780526 |
|
|
Mar 26 01:00:18 PM PDT 24 |
Mar 26 01:02:53 PM PDT 24 |
114870271510 ps |
| T538 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.4280798458 |
|
|
Mar 26 01:04:12 PM PDT 24 |
Mar 26 01:05:30 PM PDT 24 |
84621746871 ps |
| T539 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3058457244 |
|
|
Mar 26 01:01:57 PM PDT 24 |
Mar 26 01:02:29 PM PDT 24 |
2655037589 ps |