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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.11 99.81 97.15 100.00 100.00 98.61 99.70 98.52


Total test records in report: 1035
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T540 /workspace/coverage/default/39.sram_ctrl_smoke.1097223550 Mar 26 01:06:04 PM PDT 24 Mar 26 01:07:13 PM PDT 24 2480814067 ps
T541 /workspace/coverage/default/48.sram_ctrl_executable.2694385005 Mar 26 01:08:33 PM PDT 24 Mar 26 01:21:18 PM PDT 24 12686182940 ps
T542 /workspace/coverage/default/41.sram_ctrl_alert_test.3261513877 Mar 26 01:07:06 PM PDT 24 Mar 26 01:07:07 PM PDT 24 40270797 ps
T543 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1068681923 Mar 26 12:58:38 PM PDT 24 Mar 26 12:58:55 PM PDT 24 2905634964 ps
T544 /workspace/coverage/default/49.sram_ctrl_partial_access.2489580856 Mar 26 01:08:34 PM PDT 24 Mar 26 01:08:56 PM PDT 24 1295063120 ps
T545 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3767761651 Mar 26 01:05:07 PM PDT 24 Mar 26 01:05:25 PM PDT 24 772541644 ps
T546 /workspace/coverage/default/3.sram_ctrl_mem_walk.1734320228 Mar 26 12:58:48 PM PDT 24 Mar 26 01:03:42 PM PDT 24 13784446422 ps
T547 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.331385609 Mar 26 01:02:43 PM PDT 24 Mar 26 01:06:40 PM PDT 24 10536618468 ps
T548 /workspace/coverage/default/10.sram_ctrl_regwen.4164643298 Mar 26 01:00:06 PM PDT 24 Mar 26 01:05:18 PM PDT 24 3137009074 ps
T549 /workspace/coverage/default/9.sram_ctrl_stress_all.3939407499 Mar 26 12:59:54 PM PDT 24 Mar 26 02:30:53 PM PDT 24 107624894362 ps
T550 /workspace/coverage/default/47.sram_ctrl_ram_cfg.171038852 Mar 26 01:08:07 PM PDT 24 Mar 26 01:08:10 PM PDT 24 694518008 ps
T551 /workspace/coverage/default/4.sram_ctrl_executable.1875353892 Mar 26 12:58:48 PM PDT 24 Mar 26 01:04:20 PM PDT 24 17457682362 ps
T552 /workspace/coverage/default/27.sram_ctrl_regwen.1845532447 Mar 26 01:03:32 PM PDT 24 Mar 26 01:09:51 PM PDT 24 17418246801 ps
T553 /workspace/coverage/default/37.sram_ctrl_stress_all.2216303301 Mar 26 01:05:50 PM PDT 24 Mar 26 03:23:29 PM PDT 24 776144655960 ps
T554 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.696675000 Mar 26 01:07:29 PM PDT 24 Mar 26 01:08:38 PM PDT 24 5232376877 ps
T555 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.2633396573 Mar 26 01:02:43 PM PDT 24 Mar 26 01:13:45 PM PDT 24 9411005623 ps
T556 /workspace/coverage/default/28.sram_ctrl_max_throughput.2109562823 Mar 26 01:03:51 PM PDT 24 Mar 26 01:03:59 PM PDT 24 5146021034 ps
T557 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2991385628 Mar 26 01:00:58 PM PDT 24 Mar 26 01:01:02 PM PDT 24 1981396618 ps
T558 /workspace/coverage/default/49.sram_ctrl_alert_test.4187707819 Mar 26 01:08:53 PM PDT 24 Mar 26 01:08:54 PM PDT 24 41737611 ps
T559 /workspace/coverage/default/40.sram_ctrl_alert_test.3961718813 Mar 26 01:06:34 PM PDT 24 Mar 26 01:06:35 PM PDT 24 123041637 ps
T560 /workspace/coverage/default/15.sram_ctrl_alert_test.2795777720 Mar 26 01:01:14 PM PDT 24 Mar 26 01:01:15 PM PDT 24 38131014 ps
T561 /workspace/coverage/default/0.sram_ctrl_regwen.3559457259 Mar 26 12:58:11 PM PDT 24 Mar 26 01:12:50 PM PDT 24 25590112749 ps
T562 /workspace/coverage/default/33.sram_ctrl_alert_test.2391233406 Mar 26 01:04:52 PM PDT 24 Mar 26 01:04:53 PM PDT 24 18936994 ps
T563 /workspace/coverage/default/18.sram_ctrl_mem_walk.4160840654 Mar 26 01:01:45 PM PDT 24 Mar 26 01:04:18 PM PDT 24 9333462454 ps
T564 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2698402718 Mar 26 01:00:18 PM PDT 24 Mar 26 01:06:33 PM PDT 24 19888980073 ps
T565 /workspace/coverage/default/48.sram_ctrl_mem_walk.648388865 Mar 26 01:08:34 PM PDT 24 Mar 26 01:13:31 PM PDT 24 27557454358 ps
T566 /workspace/coverage/default/45.sram_ctrl_lc_escalation.4272692799 Mar 26 01:07:42 PM PDT 24 Mar 26 01:08:09 PM PDT 24 4959774319 ps
T567 /workspace/coverage/default/7.sram_ctrl_regwen.1653822618 Mar 26 12:59:22 PM PDT 24 Mar 26 01:05:33 PM PDT 24 8685236145 ps
T568 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.3471410724 Mar 26 01:01:14 PM PDT 24 Mar 26 01:25:27 PM PDT 24 75266134167 ps
T569 /workspace/coverage/default/11.sram_ctrl_alert_test.913275794 Mar 26 01:00:17 PM PDT 24 Mar 26 01:00:18 PM PDT 24 14080562 ps
T570 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3848988282 Mar 26 01:02:10 PM PDT 24 Mar 26 01:02:13 PM PDT 24 1401849219 ps
T571 /workspace/coverage/default/30.sram_ctrl_mem_walk.3283203333 Mar 26 01:04:15 PM PDT 24 Mar 26 01:08:45 PM PDT 24 13914766376 ps
T572 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3662808176 Mar 26 12:59:23 PM PDT 24 Mar 26 12:59:47 PM PDT 24 891791034 ps
T573 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1787935828 Mar 26 01:02:13 PM PDT 24 Mar 26 01:11:33 PM PDT 24 54429499446 ps
T574 /workspace/coverage/default/49.sram_ctrl_bijection.2685593079 Mar 26 01:08:33 PM PDT 24 Mar 26 01:23:51 PM PDT 24 48072794619 ps
T575 /workspace/coverage/default/3.sram_ctrl_regwen.1413652577 Mar 26 12:58:52 PM PDT 24 Mar 26 01:14:09 PM PDT 24 3787265148 ps
T576 /workspace/coverage/default/25.sram_ctrl_stress_all.2988365053 Mar 26 01:03:06 PM PDT 24 Mar 26 02:03:27 PM PDT 24 33419165728 ps
T577 /workspace/coverage/default/16.sram_ctrl_partial_access.1146012920 Mar 26 01:01:13 PM PDT 24 Mar 26 01:01:27 PM PDT 24 844813201 ps
T578 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1312639049 Mar 26 01:08:53 PM PDT 24 Mar 26 01:09:58 PM PDT 24 4282778309 ps
T579 /workspace/coverage/default/34.sram_ctrl_mem_walk.285922506 Mar 26 01:05:09 PM PDT 24 Mar 26 01:11:16 PM PDT 24 187797153580 ps
T580 /workspace/coverage/default/47.sram_ctrl_executable.3482215304 Mar 26 01:08:06 PM PDT 24 Mar 26 01:23:07 PM PDT 24 20315027220 ps
T581 /workspace/coverage/default/43.sram_ctrl_bijection.1747521614 Mar 26 01:07:18 PM PDT 24 Mar 26 01:45:10 PM PDT 24 301045174327 ps
T582 /workspace/coverage/default/7.sram_ctrl_smoke.1732289039 Mar 26 12:59:23 PM PDT 24 Mar 26 12:59:31 PM PDT 24 2947917840 ps
T583 /workspace/coverage/default/0.sram_ctrl_executable.1216963499 Mar 26 12:58:14 PM PDT 24 Mar 26 01:17:45 PM PDT 24 86126054329 ps
T584 /workspace/coverage/default/38.sram_ctrl_stress_all.2015896682 Mar 26 01:06:05 PM PDT 24 Mar 26 01:37:58 PM PDT 24 93983762667 ps
T585 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.3032665145 Mar 26 12:59:56 PM PDT 24 Mar 26 01:03:02 PM PDT 24 6926057743 ps
T586 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2803411538 Mar 26 01:08:45 PM PDT 24 Mar 26 01:08:57 PM PDT 24 218573767 ps
T587 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3514875176 Mar 26 01:01:58 PM PDT 24 Mar 26 01:03:10 PM PDT 24 37628755396 ps
T588 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.1905080922 Mar 26 01:06:34 PM PDT 24 Mar 26 01:29:45 PM PDT 24 54664811941 ps
T589 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.718655435 Mar 26 01:05:23 PM PDT 24 Mar 26 01:09:16 PM PDT 24 19480777132 ps
T590 /workspace/coverage/default/48.sram_ctrl_ram_cfg.2932323773 Mar 26 01:08:35 PM PDT 24 Mar 26 01:08:39 PM PDT 24 346947856 ps
T591 /workspace/coverage/default/21.sram_ctrl_partial_access.996944074 Mar 26 01:02:10 PM PDT 24 Mar 26 01:03:00 PM PDT 24 1041239857 ps
T592 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.245053006 Mar 26 01:07:18 PM PDT 24 Mar 26 01:08:20 PM PDT 24 1647820688 ps
T593 /workspace/coverage/default/19.sram_ctrl_regwen.2797243348 Mar 26 01:01:56 PM PDT 24 Mar 26 01:16:25 PM PDT 24 14653982786 ps
T594 /workspace/coverage/default/48.sram_ctrl_partial_access.1637117422 Mar 26 01:08:21 PM PDT 24 Mar 26 01:08:30 PM PDT 24 580489263 ps
T595 /workspace/coverage/default/49.sram_ctrl_executable.337912612 Mar 26 01:08:47 PM PDT 24 Mar 26 01:11:22 PM PDT 24 2245323130 ps
T596 /workspace/coverage/default/38.sram_ctrl_mem_walk.2523958935 Mar 26 01:06:04 PM PDT 24 Mar 26 01:08:05 PM PDT 24 7900049306 ps
T597 /workspace/coverage/default/16.sram_ctrl_stress_all.1676113513 Mar 26 01:01:29 PM PDT 24 Mar 26 01:59:36 PM PDT 24 124307724365 ps
T598 /workspace/coverage/default/33.sram_ctrl_executable.2278724578 Mar 26 01:04:52 PM PDT 24 Mar 26 01:08:18 PM PDT 24 9665026255 ps
T599 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.860343691 Mar 26 01:03:13 PM PDT 24 Mar 26 01:03:37 PM PDT 24 1728585094 ps
T600 /workspace/coverage/default/2.sram_ctrl_smoke.608350317 Mar 26 12:58:37 PM PDT 24 Mar 26 12:59:01 PM PDT 24 1446941937 ps
T601 /workspace/coverage/default/18.sram_ctrl_regwen.1823775957 Mar 26 01:01:45 PM PDT 24 Mar 26 01:12:12 PM PDT 24 2532150242 ps
T602 /workspace/coverage/default/6.sram_ctrl_mem_walk.4232606258 Mar 26 12:59:13 PM PDT 24 Mar 26 01:04:25 PM PDT 24 20665610508 ps
T603 /workspace/coverage/default/5.sram_ctrl_multiple_keys.2261946062 Mar 26 12:58:58 PM PDT 24 Mar 26 01:17:16 PM PDT 24 29431889150 ps
T604 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.131229076 Mar 26 01:03:22 PM PDT 24 Mar 26 01:03:30 PM PDT 24 682953808 ps
T605 /workspace/coverage/default/26.sram_ctrl_stress_all.3324412503 Mar 26 01:03:20 PM PDT 24 Mar 26 01:28:50 PM PDT 24 90653066652 ps
T606 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.4259678764 Mar 26 01:06:34 PM PDT 24 Mar 26 01:08:40 PM PDT 24 868869238 ps
T607 /workspace/coverage/default/11.sram_ctrl_max_throughput.2012997114 Mar 26 01:00:19 PM PDT 24 Mar 26 01:01:03 PM PDT 24 755468537 ps
T608 /workspace/coverage/default/2.sram_ctrl_stress_all.3982749794 Mar 26 12:58:37 PM PDT 24 Mar 26 02:35:25 PM PDT 24 241622263948 ps
T609 /workspace/coverage/default/29.sram_ctrl_max_throughput.753371016 Mar 26 01:03:50 PM PDT 24 Mar 26 01:03:57 PM PDT 24 3711346041 ps
T610 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.211202746 Mar 26 01:01:29 PM PDT 24 Mar 26 01:15:12 PM PDT 24 55256903414 ps
T611 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3899962842 Mar 26 01:02:09 PM PDT 24 Mar 26 01:04:17 PM PDT 24 5065406923 ps
T612 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.3996308485 Mar 26 01:04:21 PM PDT 24 Mar 26 01:10:51 PM PDT 24 23641794297 ps
T613 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2505693028 Mar 26 01:01:02 PM PDT 24 Mar 26 01:01:29 PM PDT 24 2124712163 ps
T614 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2352394738 Mar 26 12:59:35 PM PDT 24 Mar 26 01:02:37 PM PDT 24 4347571673 ps
T615 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2226618845 Mar 26 01:04:11 PM PDT 24 Mar 26 01:04:47 PM PDT 24 1272651276 ps
T616 /workspace/coverage/default/22.sram_ctrl_bijection.3761195201 Mar 26 01:02:19 PM PDT 24 Mar 26 01:28:55 PM PDT 24 302243495603 ps
T617 /workspace/coverage/default/25.sram_ctrl_smoke.1150081652 Mar 26 01:02:59 PM PDT 24 Mar 26 01:03:52 PM PDT 24 9073233263 ps
T618 /workspace/coverage/default/24.sram_ctrl_lc_escalation.711822229 Mar 26 01:02:58 PM PDT 24 Mar 26 01:04:04 PM PDT 24 42839303792 ps
T619 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.4053731909 Mar 26 12:58:51 PM PDT 24 Mar 26 01:00:17 PM PDT 24 793363303 ps
T620 /workspace/coverage/default/40.sram_ctrl_lc_escalation.469515388 Mar 26 01:06:35 PM PDT 24 Mar 26 01:08:14 PM PDT 24 51118106800 ps
T621 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.2650625932 Mar 26 01:03:50 PM PDT 24 Mar 26 01:05:04 PM PDT 24 2456801134 ps
T622 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2635543679 Mar 26 01:08:34 PM PDT 24 Mar 26 01:20:22 PM PDT 24 51795713470 ps
T623 /workspace/coverage/default/0.sram_ctrl_smoke.1192426804 Mar 26 12:58:13 PM PDT 24 Mar 26 12:58:32 PM PDT 24 5201241200 ps
T624 /workspace/coverage/default/8.sram_ctrl_regwen.1021079088 Mar 26 12:59:33 PM PDT 24 Mar 26 01:01:26 PM PDT 24 7312806616 ps
T625 /workspace/coverage/default/5.sram_ctrl_smoke.1678338466 Mar 26 12:59:01 PM PDT 24 Mar 26 01:01:56 PM PDT 24 5643661545 ps
T626 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.480115070 Mar 26 12:58:12 PM PDT 24 Mar 26 12:59:23 PM PDT 24 1830295296 ps
T627 /workspace/coverage/default/46.sram_ctrl_max_throughput.1232972866 Mar 26 01:07:54 PM PDT 24 Mar 26 01:08:01 PM PDT 24 2776551804 ps
T628 /workspace/coverage/default/42.sram_ctrl_smoke.4280832640 Mar 26 01:07:04 PM PDT 24 Mar 26 01:07:12 PM PDT 24 2794956500 ps
T629 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.2321442747 Mar 26 01:01:30 PM PDT 24 Mar 26 01:03:53 PM PDT 24 5400688627 ps
T630 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.521099412 Mar 26 12:58:15 PM PDT 24 Mar 26 01:04:07 PM PDT 24 5978337217 ps
T631 /workspace/coverage/default/5.sram_ctrl_ram_cfg.2120542149 Mar 26 12:58:59 PM PDT 24 Mar 26 12:59:02 PM PDT 24 345075153 ps
T632 /workspace/coverage/default/14.sram_ctrl_lc_escalation.357321403 Mar 26 01:01:01 PM PDT 24 Mar 26 01:01:25 PM PDT 24 10047718547 ps
T633 /workspace/coverage/default/1.sram_ctrl_bijection.3365007768 Mar 26 12:58:23 PM PDT 24 Mar 26 01:07:25 PM PDT 24 8517224564 ps
T634 /workspace/coverage/default/44.sram_ctrl_bijection.2218906283 Mar 26 01:07:30 PM PDT 24 Mar 26 01:30:33 PM PDT 24 165842428546 ps
T635 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2423850070 Mar 26 01:02:41 PM PDT 24 Mar 26 01:04:00 PM PDT 24 3243482752 ps
T636 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.2951602953 Mar 26 12:58:49 PM PDT 24 Mar 26 01:04:02 PM PDT 24 20629355767 ps
T637 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3829124558 Mar 26 12:58:38 PM PDT 24 Mar 26 12:59:09 PM PDT 24 3582578371 ps
T638 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2183734524 Mar 26 01:04:21 PM PDT 24 Mar 26 01:20:23 PM PDT 24 138883221558 ps
T639 /workspace/coverage/default/25.sram_ctrl_regwen.3715377394 Mar 26 01:02:56 PM PDT 24 Mar 26 01:13:53 PM PDT 24 51383166111 ps
T640 /workspace/coverage/default/20.sram_ctrl_alert_test.3660183271 Mar 26 01:02:11 PM PDT 24 Mar 26 01:02:12 PM PDT 24 13799118 ps
T641 /workspace/coverage/default/3.sram_ctrl_max_throughput.517697642 Mar 26 12:58:52 PM PDT 24 Mar 26 01:00:05 PM PDT 24 768791409 ps
T642 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1121044345 Mar 26 01:08:04 PM PDT 24 Mar 26 01:08:54 PM PDT 24 3908616310 ps
T643 /workspace/coverage/default/26.sram_ctrl_executable.1406324426 Mar 26 01:03:08 PM PDT 24 Mar 26 01:08:52 PM PDT 24 5943488610 ps
T644 /workspace/coverage/default/45.sram_ctrl_smoke.3575067120 Mar 26 01:07:45 PM PDT 24 Mar 26 01:08:02 PM PDT 24 1817200308 ps
T645 /workspace/coverage/default/44.sram_ctrl_multiple_keys.1951308202 Mar 26 01:07:29 PM PDT 24 Mar 26 01:32:00 PM PDT 24 42067650945 ps
T646 /workspace/coverage/default/27.sram_ctrl_ram_cfg.3324070156 Mar 26 01:03:33 PM PDT 24 Mar 26 01:03:37 PM PDT 24 689974873 ps
T647 /workspace/coverage/default/14.sram_ctrl_partial_access.1369825228 Mar 26 01:01:01 PM PDT 24 Mar 26 01:01:12 PM PDT 24 1471039211 ps
T648 /workspace/coverage/default/15.sram_ctrl_partial_access.2656399593 Mar 26 01:01:16 PM PDT 24 Mar 26 01:01:26 PM PDT 24 706844287 ps
T649 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.914387369 Mar 26 01:01:46 PM PDT 24 Mar 26 01:08:14 PM PDT 24 5666774367 ps
T650 /workspace/coverage/default/2.sram_ctrl_lc_escalation.2600852295 Mar 26 12:58:38 PM PDT 24 Mar 26 12:59:14 PM PDT 24 5682964588 ps
T651 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2187768477 Mar 26 01:07:04 PM PDT 24 Mar 26 01:11:02 PM PDT 24 6029494023 ps
T652 /workspace/coverage/default/6.sram_ctrl_alert_test.2018580106 Mar 26 12:59:21 PM PDT 24 Mar 26 12:59:23 PM PDT 24 12383854 ps
T653 /workspace/coverage/default/4.sram_ctrl_partial_access.600284811 Mar 26 12:58:49 PM PDT 24 Mar 26 12:59:03 PM PDT 24 3176063908 ps
T654 /workspace/coverage/default/44.sram_ctrl_lc_escalation.3992450728 Mar 26 01:07:45 PM PDT 24 Mar 26 01:08:52 PM PDT 24 78318231392 ps
T655 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3491837757 Mar 26 12:58:52 PM PDT 24 Mar 26 01:00:24 PM PDT 24 57991998710 ps
T656 /workspace/coverage/default/11.sram_ctrl_lc_escalation.2473389640 Mar 26 01:00:18 PM PDT 24 Mar 26 01:00:47 PM PDT 24 5201865941 ps
T657 /workspace/coverage/default/41.sram_ctrl_lc_escalation.3126693971 Mar 26 01:06:50 PM PDT 24 Mar 26 01:07:31 PM PDT 24 7076463604 ps
T658 /workspace/coverage/default/28.sram_ctrl_alert_test.1398578097 Mar 26 01:03:51 PM PDT 24 Mar 26 01:03:52 PM PDT 24 52805945 ps
T659 /workspace/coverage/default/27.sram_ctrl_mem_walk.2456793789 Mar 26 01:03:36 PM PDT 24 Mar 26 01:06:23 PM PDT 24 60850199146 ps
T660 /workspace/coverage/default/6.sram_ctrl_max_throughput.3512941837 Mar 26 12:59:11 PM PDT 24 Mar 26 01:01:22 PM PDT 24 1502004823 ps
T661 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3475519822 Mar 26 01:07:03 PM PDT 24 Mar 26 01:09:21 PM PDT 24 8750266137 ps
T662 /workspace/coverage/default/7.sram_ctrl_executable.3680896432 Mar 26 12:59:22 PM PDT 24 Mar 26 01:24:37 PM PDT 24 76819367121 ps
T663 /workspace/coverage/default/19.sram_ctrl_alert_test.872942978 Mar 26 01:01:59 PM PDT 24 Mar 26 01:02:00 PM PDT 24 47772164 ps
T664 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1147180873 Mar 26 01:05:06 PM PDT 24 Mar 26 01:05:24 PM PDT 24 509625134 ps
T665 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3342460568 Mar 26 01:07:18 PM PDT 24 Mar 26 01:08:33 PM PDT 24 11350035994 ps
T666 /workspace/coverage/default/2.sram_ctrl_bijection.1226623466 Mar 26 12:58:36 PM PDT 24 Mar 26 01:19:48 PM PDT 24 38138375259 ps
T667 /workspace/coverage/default/43.sram_ctrl_ram_cfg.2697990287 Mar 26 01:07:17 PM PDT 24 Mar 26 01:07:21 PM PDT 24 358954192 ps
T668 /workspace/coverage/default/13.sram_ctrl_executable.1553994624 Mar 26 01:00:42 PM PDT 24 Mar 26 01:12:27 PM PDT 24 15179948697 ps
T669 /workspace/coverage/default/13.sram_ctrl_partial_access.239324372 Mar 26 01:00:45 PM PDT 24 Mar 26 01:00:56 PM PDT 24 2963525598 ps
T670 /workspace/coverage/default/16.sram_ctrl_lc_escalation.609776999 Mar 26 01:01:15 PM PDT 24 Mar 26 01:02:21 PM PDT 24 38156407702 ps
T671 /workspace/coverage/default/33.sram_ctrl_bijection.2256912165 Mar 26 01:04:51 PM PDT 24 Mar 26 01:30:55 PM PDT 24 133035226046 ps
T672 /workspace/coverage/default/49.sram_ctrl_lc_escalation.3715179050 Mar 26 01:08:35 PM PDT 24 Mar 26 01:08:40 PM PDT 24 1093423041 ps
T673 /workspace/coverage/default/6.sram_ctrl_partial_access.3241514786 Mar 26 12:59:12 PM PDT 24 Mar 26 01:00:25 PM PDT 24 3803145622 ps
T674 /workspace/coverage/default/5.sram_ctrl_max_throughput.2892560483 Mar 26 12:59:00 PM PDT 24 Mar 26 01:01:28 PM PDT 24 3031652127 ps
T675 /workspace/coverage/default/17.sram_ctrl_mem_walk.1816714377 Mar 26 01:01:30 PM PDT 24 Mar 26 01:03:52 PM PDT 24 6896968933 ps
T676 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.1593522811 Mar 26 01:01:14 PM PDT 24 Mar 26 01:02:16 PM PDT 24 2025211632 ps
T677 /workspace/coverage/default/31.sram_ctrl_bijection.1986340510 Mar 26 01:04:22 PM PDT 24 Mar 26 01:19:11 PM PDT 24 61101664948 ps
T678 /workspace/coverage/default/24.sram_ctrl_bijection.3498976952 Mar 26 01:02:55 PM PDT 24 Mar 26 01:45:07 PM PDT 24 151780285265 ps
T679 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.3345257343 Mar 26 01:07:18 PM PDT 24 Mar 26 01:26:54 PM PDT 24 16591291685 ps
T680 /workspace/coverage/default/5.sram_ctrl_alert_test.1039740490 Mar 26 12:58:59 PM PDT 24 Mar 26 12:59:00 PM PDT 24 188947812 ps
T681 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2251261693 Mar 26 01:01:46 PM PDT 24 Mar 26 01:05:18 PM PDT 24 4379285203 ps
T682 /workspace/coverage/default/0.sram_ctrl_max_throughput.2343430508 Mar 26 12:58:12 PM PDT 24 Mar 26 01:00:42 PM PDT 24 1528877237 ps
T683 /workspace/coverage/default/8.sram_ctrl_lc_escalation.1554183278 Mar 26 12:59:36 PM PDT 24 Mar 26 01:01:36 PM PDT 24 220942246490 ps
T684 /workspace/coverage/default/19.sram_ctrl_bijection.3763653178 Mar 26 01:01:46 PM PDT 24 Mar 26 01:31:47 PM PDT 24 110659536957 ps
T685 /workspace/coverage/default/10.sram_ctrl_ram_cfg.2355698471 Mar 26 01:00:06 PM PDT 24 Mar 26 01:00:09 PM PDT 24 695842044 ps
T686 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2745312294 Mar 26 12:58:26 PM PDT 24 Mar 26 01:02:59 PM PDT 24 18470556920 ps
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T689 /workspace/coverage/default/9.sram_ctrl_regwen.1696985511 Mar 26 12:59:43 PM PDT 24 Mar 26 01:22:06 PM PDT 24 16641020754 ps
T690 /workspace/coverage/default/36.sram_ctrl_smoke.1832436089 Mar 26 01:05:25 PM PDT 24 Mar 26 01:06:47 PM PDT 24 5240663128 ps
T691 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2212478339 Mar 26 01:01:50 PM PDT 24 Mar 26 01:02:04 PM PDT 24 2899594057 ps
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T693 /workspace/coverage/default/49.sram_ctrl_ram_cfg.857128855 Mar 26 01:08:52 PM PDT 24 Mar 26 01:08:56 PM PDT 24 6727466684 ps
T694 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2441820519 Mar 26 12:59:23 PM PDT 24 Mar 26 01:09:09 PM PDT 24 6850394332 ps
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T698 /workspace/coverage/default/25.sram_ctrl_bijection.701650032 Mar 26 01:02:55 PM PDT 24 Mar 26 01:35:54 PM PDT 24 581664784720 ps
T699 /workspace/coverage/default/24.sram_ctrl_mem_walk.4080952055 Mar 26 01:02:56 PM PDT 24 Mar 26 01:05:17 PM PDT 24 13803190099 ps
T700 /workspace/coverage/default/0.sram_ctrl_multiple_keys.2827606998 Mar 26 12:58:14 PM PDT 24 Mar 26 01:04:39 PM PDT 24 31969683403 ps
T701 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2557921877 Mar 26 01:08:35 PM PDT 24 Mar 26 01:10:59 PM PDT 24 10171319261 ps
T702 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1317427186 Mar 26 01:01:59 PM PDT 24 Mar 26 01:04:16 PM PDT 24 1559633082 ps
T703 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2159792510 Mar 26 12:59:11 PM PDT 24 Mar 26 12:59:23 PM PDT 24 4167848900 ps
T704 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2848225376 Mar 26 12:58:49 PM PDT 24 Mar 26 01:06:08 PM PDT 24 17892072733 ps
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T711 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.4162312063 Mar 26 12:58:39 PM PDT 24 Mar 26 01:00:07 PM PDT 24 5104210893 ps
T712 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3816412597 Mar 26 01:00:41 PM PDT 24 Mar 26 01:01:22 PM PDT 24 1360128756 ps
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T718 /workspace/coverage/default/20.sram_ctrl_stress_all.1644821364 Mar 26 01:02:13 PM PDT 24 Mar 26 01:43:55 PM PDT 24 74851400760 ps
T719 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3899160095 Mar 26 01:08:06 PM PDT 24 Mar 26 01:24:52 PM PDT 24 11158999628 ps
T720 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1099347187 Mar 26 01:02:55 PM PDT 24 Mar 26 01:22:12 PM PDT 24 41222522582 ps
T721 /workspace/coverage/default/11.sram_ctrl_executable.2195707033 Mar 26 01:00:18 PM PDT 24 Mar 26 01:23:50 PM PDT 24 17849146986 ps
T722 /workspace/coverage/default/49.sram_ctrl_max_throughput.291480602 Mar 26 01:08:32 PM PDT 24 Mar 26 01:09:34 PM PDT 24 7278359815 ps
T723 /workspace/coverage/default/45.sram_ctrl_multiple_keys.2643334975 Mar 26 01:07:28 PM PDT 24 Mar 26 01:18:58 PM PDT 24 52303791289 ps
T724 /workspace/coverage/default/33.sram_ctrl_smoke.3746568845 Mar 26 01:04:52 PM PDT 24 Mar 26 01:07:03 PM PDT 24 1291345359 ps
T725 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1106271994 Mar 26 01:04:53 PM PDT 24 Mar 26 01:10:41 PM PDT 24 14727233894 ps
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T727 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1505238838 Mar 26 12:58:15 PM PDT 24 Mar 26 12:58:19 PM PDT 24 1398282631 ps
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T729 /workspace/coverage/default/34.sram_ctrl_partial_access.3007634 Mar 26 01:05:07 PM PDT 24 Mar 26 01:06:21 PM PDT 24 2053772023 ps
T730 /workspace/coverage/default/17.sram_ctrl_alert_test.3655074719 Mar 26 01:01:46 PM PDT 24 Mar 26 01:01:47 PM PDT 24 17539356 ps
T731 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.2499593807 Mar 26 01:04:14 PM PDT 24 Mar 26 01:05:20 PM PDT 24 3930541685 ps
T732 /workspace/coverage/default/27.sram_ctrl_lc_escalation.2750260854 Mar 26 01:03:34 PM PDT 24 Mar 26 01:03:48 PM PDT 24 6802485574 ps
T733 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2010606204 Mar 26 12:58:49 PM PDT 24 Mar 26 12:59:28 PM PDT 24 4278170436 ps
T734 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3705801494 Mar 26 01:00:18 PM PDT 24 Mar 26 01:03:42 PM PDT 24 5222118619 ps
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T736 /workspace/coverage/default/14.sram_ctrl_stress_all.970748723 Mar 26 01:01:00 PM PDT 24 Mar 26 01:39:58 PM PDT 24 50699409488 ps
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T738 /workspace/coverage/default/26.sram_ctrl_partial_access.2857558428 Mar 26 01:03:06 PM PDT 24 Mar 26 01:04:07 PM PDT 24 1683837679 ps
T739 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.3164592430 Mar 26 01:04:51 PM PDT 24 Mar 26 01:08:51 PM PDT 24 14874444310 ps
T740 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3869817338 Mar 26 01:07:04 PM PDT 24 Mar 26 01:07:19 PM PDT 24 734600596 ps
T741 /workspace/coverage/default/39.sram_ctrl_regwen.702720158 Mar 26 01:06:20 PM PDT 24 Mar 26 01:40:56 PM PDT 24 261789451560 ps
T742 /workspace/coverage/default/29.sram_ctrl_multiple_keys.3832197897 Mar 26 01:03:52 PM PDT 24 Mar 26 01:22:28 PM PDT 24 47453248236 ps
T743 /workspace/coverage/default/38.sram_ctrl_lc_escalation.1532201049 Mar 26 01:06:07 PM PDT 24 Mar 26 01:07:29 PM PDT 24 13280325258 ps
T744 /workspace/coverage/default/35.sram_ctrl_ram_cfg.917943232 Mar 26 01:05:20 PM PDT 24 Mar 26 01:05:24 PM PDT 24 2004878516 ps
T745 /workspace/coverage/default/11.sram_ctrl_smoke.2334688793 Mar 26 01:00:05 PM PDT 24 Mar 26 01:00:27 PM PDT 24 1322104742 ps
T746 /workspace/coverage/default/44.sram_ctrl_alert_test.2107362492 Mar 26 01:07:28 PM PDT 24 Mar 26 01:07:30 PM PDT 24 18627772 ps
T747 /workspace/coverage/default/7.sram_ctrl_max_throughput.1084064829 Mar 26 12:59:21 PM PDT 24 Mar 26 01:01:00 PM PDT 24 1513162866 ps
T748 /workspace/coverage/default/25.sram_ctrl_multiple_keys.838662374 Mar 26 01:02:56 PM PDT 24 Mar 26 01:24:55 PM PDT 24 295465044620 ps
T749 /workspace/coverage/default/4.sram_ctrl_alert_test.1994410760 Mar 26 12:59:01 PM PDT 24 Mar 26 12:59:02 PM PDT 24 44472086 ps
T750 /workspace/coverage/default/31.sram_ctrl_ram_cfg.1089888842 Mar 26 01:04:25 PM PDT 24 Mar 26 01:04:29 PM PDT 24 1470752982 ps
T751 /workspace/coverage/default/41.sram_ctrl_executable.2899783296 Mar 26 01:06:51 PM PDT 24 Mar 26 01:15:32 PM PDT 24 25155128667 ps
T752 /workspace/coverage/default/1.sram_ctrl_stress_all.3923066928 Mar 26 12:58:36 PM PDT 24 Mar 26 02:33:46 PM PDT 24 1313195383732 ps
T753 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2651738436 Mar 26 01:01:17 PM PDT 24 Mar 26 01:19:05 PM PDT 24 7947879842 ps
T754 /workspace/coverage/default/45.sram_ctrl_partial_access.3517705009 Mar 26 01:07:45 PM PDT 24 Mar 26 01:08:33 PM PDT 24 836648865 ps
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T756 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.602588106 Mar 26 01:00:05 PM PDT 24 Mar 26 01:02:25 PM PDT 24 1603326020 ps
T757 /workspace/coverage/default/30.sram_ctrl_regwen.4127753322 Mar 26 01:04:15 PM PDT 24 Mar 26 01:20:15 PM PDT 24 17851802301 ps
T758 /workspace/coverage/default/10.sram_ctrl_executable.313738223 Mar 26 01:00:06 PM PDT 24 Mar 26 01:07:50 PM PDT 24 10928219763 ps
T759 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1103806599 Mar 26 01:00:19 PM PDT 24 Mar 26 01:05:07 PM PDT 24 4477868964 ps
T760 /workspace/coverage/default/26.sram_ctrl_smoke.1333630417 Mar 26 01:03:07 PM PDT 24 Mar 26 01:03:13 PM PDT 24 782420489 ps
T761 /workspace/coverage/default/5.sram_ctrl_regwen.582995629 Mar 26 12:59:02 PM PDT 24 Mar 26 01:04:16 PM PDT 24 26543391949 ps
T762 /workspace/coverage/default/13.sram_ctrl_multiple_keys.886356479 Mar 26 01:00:32 PM PDT 24 Mar 26 01:06:27 PM PDT 24 6205271731 ps
T763 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1996926446 Mar 26 12:58:23 PM PDT 24 Mar 26 01:02:02 PM PDT 24 6913620027 ps
T764 /workspace/coverage/default/18.sram_ctrl_ram_cfg.2060587407 Mar 26 01:01:46 PM PDT 24 Mar 26 01:01:49 PM PDT 24 348416095 ps
T765 /workspace/coverage/default/7.sram_ctrl_partial_access.623896435 Mar 26 12:59:22 PM PDT 24 Mar 26 12:59:37 PM PDT 24 861062223 ps
T766 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.4029729967 Mar 26 01:02:42 PM PDT 24 Mar 26 01:04:48 PM PDT 24 3095272246 ps
T767 /workspace/coverage/default/24.sram_ctrl_partial_access.3912621385 Mar 26 01:03:00 PM PDT 24 Mar 26 01:03:45 PM PDT 24 853181707 ps
T768 /workspace/coverage/default/3.sram_ctrl_smoke.2130232486 Mar 26 12:58:37 PM PDT 24 Mar 26 12:58:45 PM PDT 24 611297620 ps
T769 /workspace/coverage/default/2.sram_ctrl_max_throughput.852004191 Mar 26 12:58:36 PM PDT 24 Mar 26 12:58:58 PM PDT 24 2811476104 ps
T770 /workspace/coverage/default/41.sram_ctrl_regwen.950517391 Mar 26 01:06:48 PM PDT 24 Mar 26 01:25:44 PM PDT 24 9216524275 ps
T771 /workspace/coverage/default/20.sram_ctrl_partial_access.706474656 Mar 26 01:01:59 PM PDT 24 Mar 26 01:03:46 PM PDT 24 823560479 ps
T772 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.528366999 Mar 26 01:07:55 PM PDT 24 Mar 26 01:10:24 PM PDT 24 4346068247 ps
T773 /workspace/coverage/default/21.sram_ctrl_executable.2677850131 Mar 26 01:02:10 PM PDT 24 Mar 26 01:14:36 PM PDT 24 25727120648 ps
T774 /workspace/coverage/default/4.sram_ctrl_regwen.991839112 Mar 26 12:58:48 PM PDT 24 Mar 26 01:16:34 PM PDT 24 2471508565 ps
T775 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.702062945 Mar 26 12:58:49 PM PDT 24 Mar 26 01:01:15 PM PDT 24 4893363631 ps
T776 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.458726684 Mar 26 01:06:33 PM PDT 24 Mar 26 01:07:45 PM PDT 24 8605282272 ps
T777 /workspace/coverage/default/47.sram_ctrl_partial_access.642977765 Mar 26 01:08:07 PM PDT 24 Mar 26 01:10:21 PM PDT 24 4381216353 ps
T778 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1028332712 Mar 26 01:00:30 PM PDT 24 Mar 26 01:00:34 PM PDT 24 1598406731 ps
T779 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3136768936 Mar 26 12:59:22 PM PDT 24 Mar 26 01:01:18 PM PDT 24 798021501 ps
T780 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.4199151598 Mar 26 01:08:36 PM PDT 24 Mar 26 01:13:19 PM PDT 24 94898296827 ps
T781 /workspace/coverage/default/27.sram_ctrl_max_throughput.2006561122 Mar 26 01:03:18 PM PDT 24 Mar 26 01:05:26 PM PDT 24 775552016 ps
T782 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.174727299 Mar 26 01:05:21 PM PDT 24 Mar 26 01:06:30 PM PDT 24 8193874043 ps
T783 /workspace/coverage/default/25.sram_ctrl_max_throughput.3812711471 Mar 26 01:02:58 PM PDT 24 Mar 26 01:04:37 PM PDT 24 3021878025 ps
T784 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1054616432 Mar 26 01:07:08 PM PDT 24 Mar 26 01:07:25 PM PDT 24 487259717 ps
T785 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.4254448146 Mar 26 12:59:00 PM PDT 24 Mar 26 01:05:01 PM PDT 24 14542038357 ps
T786 /workspace/coverage/default/28.sram_ctrl_ram_cfg.2468111585 Mar 26 01:03:50 PM PDT 24 Mar 26 01:03:54 PM PDT 24 343510735 ps
T787 /workspace/coverage/default/14.sram_ctrl_multiple_keys.4075078566 Mar 26 01:01:00 PM PDT 24 Mar 26 01:15:44 PM PDT 24 49266978285 ps
T788 /workspace/coverage/default/25.sram_ctrl_ram_cfg.1667015028 Mar 26 01:02:58 PM PDT 24 Mar 26 01:03:02 PM PDT 24 383748752 ps
T789 /workspace/coverage/default/26.sram_ctrl_bijection.656175415 Mar 26 01:03:09 PM PDT 24 Mar 26 01:27:17 PM PDT 24 21551247716 ps
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