T545 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.312971525 |
|
|
Mar 28 02:50:13 PM PDT 24 |
Mar 28 02:55:12 PM PDT 24 |
28057791217 ps |
T546 |
/workspace/coverage/default/37.sram_ctrl_bijection.203875400 |
|
|
Mar 28 02:50:31 PM PDT 24 |
Mar 28 03:25:40 PM PDT 24 |
31817703711 ps |
T547 |
/workspace/coverage/default/12.sram_ctrl_regwen.3655304167 |
|
|
Mar 28 02:45:28 PM PDT 24 |
Mar 28 02:49:32 PM PDT 24 |
1744384859 ps |
T548 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2571178361 |
|
|
Mar 28 02:47:10 PM PDT 24 |
Mar 28 02:47:31 PM PDT 24 |
629093910 ps |
T549 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.445745488 |
|
|
Mar 28 02:43:57 PM PDT 24 |
Mar 28 03:03:18 PM PDT 24 |
122177038556 ps |
T550 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3415257548 |
|
|
Mar 28 02:51:58 PM PDT 24 |
Mar 28 02:55:35 PM PDT 24 |
4661360266 ps |
T551 |
/workspace/coverage/default/42.sram_ctrl_regwen.875597859 |
|
|
Mar 28 02:51:57 PM PDT 24 |
Mar 28 03:10:57 PM PDT 24 |
3727938329 ps |
T552 |
/workspace/coverage/default/45.sram_ctrl_smoke.476109403 |
|
|
Mar 28 02:52:31 PM PDT 24 |
Mar 28 02:52:57 PM PDT 24 |
11268815715 ps |
T553 |
/workspace/coverage/default/11.sram_ctrl_alert_test.4293658853 |
|
|
Mar 28 02:45:08 PM PDT 24 |
Mar 28 02:45:09 PM PDT 24 |
38834821 ps |
T554 |
/workspace/coverage/default/16.sram_ctrl_executable.2436697606 |
|
|
Mar 28 02:46:15 PM PDT 24 |
Mar 28 02:46:42 PM PDT 24 |
1046145536 ps |
T555 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1217626714 |
|
|
Mar 28 02:43:43 PM PDT 24 |
Mar 28 02:44:43 PM PDT 24 |
2931148138 ps |
T556 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3082507483 |
|
|
Mar 28 02:52:32 PM PDT 24 |
Mar 28 03:07:32 PM PDT 24 |
47466711804 ps |
T557 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.2079871260 |
|
|
Mar 28 02:48:20 PM PDT 24 |
Mar 28 03:04:37 PM PDT 24 |
14322767666 ps |
T558 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3836611933 |
|
|
Mar 28 02:44:30 PM PDT 24 |
Mar 28 02:44:38 PM PDT 24 |
2620389828 ps |
T559 |
/workspace/coverage/default/26.sram_ctrl_bijection.1363499363 |
|
|
Mar 28 02:47:54 PM PDT 24 |
Mar 28 03:09:09 PM PDT 24 |
72428358954 ps |
T560 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.577573553 |
|
|
Mar 28 02:51:35 PM PDT 24 |
Mar 28 02:52:54 PM PDT 24 |
1572592752 ps |
T561 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3629699031 |
|
|
Mar 28 02:50:09 PM PDT 24 |
Mar 28 02:50:14 PM PDT 24 |
6677211441 ps |
T562 |
/workspace/coverage/default/19.sram_ctrl_regwen.2635030593 |
|
|
Mar 28 02:46:27 PM PDT 24 |
Mar 28 02:56:25 PM PDT 24 |
2089045387 ps |
T563 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2161640117 |
|
|
Mar 28 02:44:08 PM PDT 24 |
Mar 28 02:46:53 PM PDT 24 |
2165108382 ps |
T564 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2147675981 |
|
|
Mar 28 02:46:13 PM PDT 24 |
Mar 28 02:48:11 PM PDT 24 |
3213167853 ps |
T565 |
/workspace/coverage/default/22.sram_ctrl_smoke.1981132765 |
|
|
Mar 28 02:47:09 PM PDT 24 |
Mar 28 02:47:55 PM PDT 24 |
4234864662 ps |
T566 |
/workspace/coverage/default/4.sram_ctrl_regwen.2543062504 |
|
|
Mar 28 02:43:59 PM PDT 24 |
Mar 28 03:05:50 PM PDT 24 |
18127777699 ps |
T567 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3572823510 |
|
|
Mar 28 02:44:33 PM PDT 24 |
Mar 28 02:47:40 PM PDT 24 |
2483130713 ps |
T568 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.165566685 |
|
|
Mar 28 02:52:31 PM PDT 24 |
Mar 28 02:54:26 PM PDT 24 |
785836553 ps |
T569 |
/workspace/coverage/default/3.sram_ctrl_bijection.1300421441 |
|
|
Mar 28 02:43:58 PM PDT 24 |
Mar 28 02:57:49 PM PDT 24 |
57782417843 ps |
T570 |
/workspace/coverage/default/48.sram_ctrl_smoke.2974604683 |
|
|
Mar 28 02:53:16 PM PDT 24 |
Mar 28 02:53:27 PM PDT 24 |
837428747 ps |
T571 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4056433032 |
|
|
Mar 28 02:49:02 PM PDT 24 |
Mar 28 02:57:00 PM PDT 24 |
23106947462 ps |
T572 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.3622816627 |
|
|
Mar 28 02:51:59 PM PDT 24 |
Mar 28 02:53:29 PM PDT 24 |
15190879720 ps |
T573 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.2654032798 |
|
|
Mar 28 02:49:03 PM PDT 24 |
Mar 28 02:58:55 PM PDT 24 |
88975227399 ps |
T574 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1948439216 |
|
|
Mar 28 02:52:58 PM PDT 24 |
Mar 28 02:54:01 PM PDT 24 |
37410942807 ps |
T575 |
/workspace/coverage/default/19.sram_ctrl_partial_access.434096359 |
|
|
Mar 28 02:46:30 PM PDT 24 |
Mar 28 02:46:41 PM PDT 24 |
4201622965 ps |
T576 |
/workspace/coverage/default/43.sram_ctrl_smoke.3372189977 |
|
|
Mar 28 02:51:59 PM PDT 24 |
Mar 28 02:52:05 PM PDT 24 |
2661475656 ps |
T577 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2743390937 |
|
|
Mar 28 02:45:05 PM PDT 24 |
Mar 28 02:45:09 PM PDT 24 |
705813993 ps |
T578 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1454638411 |
|
|
Mar 28 02:53:15 PM PDT 24 |
Mar 28 02:58:35 PM PDT 24 |
56299949863 ps |
T579 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.510737251 |
|
|
Mar 28 02:47:54 PM PDT 24 |
Mar 28 02:48:06 PM PDT 24 |
412778319 ps |
T580 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.3166936041 |
|
|
Mar 28 02:44:49 PM PDT 24 |
Mar 28 02:49:06 PM PDT 24 |
43766540244 ps |
T581 |
/workspace/coverage/default/5.sram_ctrl_smoke.1986229006 |
|
|
Mar 28 02:44:13 PM PDT 24 |
Mar 28 02:46:31 PM PDT 24 |
1830143393 ps |
T582 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.3241630223 |
|
|
Mar 28 02:46:12 PM PDT 24 |
Mar 28 02:52:12 PM PDT 24 |
13946966158 ps |
T583 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3517055245 |
|
|
Mar 28 02:48:38 PM PDT 24 |
Mar 28 02:49:03 PM PDT 24 |
3683357361 ps |
T584 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.4276868790 |
|
|
Mar 28 02:49:40 PM PDT 24 |
Mar 28 02:52:20 PM PDT 24 |
3256850231 ps |
T585 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.21680935 |
|
|
Mar 28 02:44:14 PM PDT 24 |
Mar 28 02:46:53 PM PDT 24 |
7070822882 ps |
T586 |
/workspace/coverage/default/14.sram_ctrl_bijection.3866204221 |
|
|
Mar 28 02:45:50 PM PDT 24 |
Mar 28 03:02:29 PM PDT 24 |
54031755806 ps |
T587 |
/workspace/coverage/default/30.sram_ctrl_executable.2528001646 |
|
|
Mar 28 02:48:41 PM PDT 24 |
Mar 28 03:05:55 PM PDT 24 |
60352772509 ps |
T588 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2740099160 |
|
|
Mar 28 02:46:14 PM PDT 24 |
Mar 28 02:47:07 PM PDT 24 |
26379252503 ps |
T589 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.346971502 |
|
|
Mar 28 02:53:37 PM PDT 24 |
Mar 28 02:55:45 PM PDT 24 |
10385355859 ps |
T590 |
/workspace/coverage/default/26.sram_ctrl_access_during_key_req.3101839054 |
|
|
Mar 28 02:47:56 PM PDT 24 |
Mar 28 03:02:47 PM PDT 24 |
39219408845 ps |
T591 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2944832187 |
|
|
Mar 28 02:46:37 PM PDT 24 |
Mar 28 02:57:26 PM PDT 24 |
33126632034 ps |
T592 |
/workspace/coverage/default/26.sram_ctrl_alert_test.1444422728 |
|
|
Mar 28 02:48:23 PM PDT 24 |
Mar 28 02:48:24 PM PDT 24 |
14721578 ps |
T593 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.209974487 |
|
|
Mar 28 02:48:40 PM PDT 24 |
Mar 28 03:09:40 PM PDT 24 |
17731372182 ps |
T594 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.1907942146 |
|
|
Mar 28 02:46:46 PM PDT 24 |
Mar 28 02:48:19 PM PDT 24 |
1605933844 ps |
T595 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1901105575 |
|
|
Mar 28 02:44:32 PM PDT 24 |
Mar 28 02:48:23 PM PDT 24 |
28751836985 ps |
T596 |
/workspace/coverage/default/22.sram_ctrl_bijection.3406569601 |
|
|
Mar 28 02:47:09 PM PDT 24 |
Mar 28 02:56:43 PM PDT 24 |
72792069584 ps |
T597 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3331284816 |
|
|
Mar 28 02:45:24 PM PDT 24 |
Mar 28 02:47:45 PM PDT 24 |
5931978142 ps |
T598 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.142674012 |
|
|
Mar 28 02:51:58 PM PDT 24 |
Mar 28 02:57:51 PM PDT 24 |
15266560422 ps |
T599 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.192173776 |
|
|
Mar 28 02:49:41 PM PDT 24 |
Mar 28 02:50:13 PM PDT 24 |
1430759578 ps |
T600 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2005345691 |
|
|
Mar 28 02:44:33 PM PDT 24 |
Mar 28 02:46:37 PM PDT 24 |
16436253357 ps |
T601 |
/workspace/coverage/default/29.sram_ctrl_smoke.3735988874 |
|
|
Mar 28 02:48:46 PM PDT 24 |
Mar 28 02:48:54 PM PDT 24 |
709152422 ps |
T602 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.805908011 |
|
|
Mar 28 02:47:54 PM PDT 24 |
Mar 28 02:52:33 PM PDT 24 |
32737885539 ps |
T603 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1801074018 |
|
|
Mar 28 02:44:14 PM PDT 24 |
Mar 28 02:46:45 PM PDT 24 |
39494317468 ps |
T604 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3814147303 |
|
|
Mar 28 02:45:48 PM PDT 24 |
Mar 28 02:45:57 PM PDT 24 |
231297454 ps |
T605 |
/workspace/coverage/default/9.sram_ctrl_executable.1892358446 |
|
|
Mar 28 02:44:49 PM PDT 24 |
Mar 28 02:49:00 PM PDT 24 |
3080033081 ps |
T606 |
/workspace/coverage/default/5.sram_ctrl_executable.895023798 |
|
|
Mar 28 02:44:16 PM PDT 24 |
Mar 28 02:46:42 PM PDT 24 |
7014943184 ps |
T607 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.675523905 |
|
|
Mar 28 02:53:15 PM PDT 24 |
Mar 28 03:11:22 PM PDT 24 |
9009502564 ps |
T608 |
/workspace/coverage/default/29.sram_ctrl_partial_access.2670106949 |
|
|
Mar 28 02:48:38 PM PDT 24 |
Mar 28 02:48:50 PM PDT 24 |
818479379 ps |
T609 |
/workspace/coverage/default/33.sram_ctrl_stress_all.2886374649 |
|
|
Mar 28 02:49:43 PM PDT 24 |
Mar 28 03:35:08 PM PDT 24 |
13195942932 ps |
T610 |
/workspace/coverage/default/1.sram_ctrl_regwen.4069650498 |
|
|
Mar 28 02:43:46 PM PDT 24 |
Mar 28 02:45:49 PM PDT 24 |
4059593645 ps |
T611 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3671673029 |
|
|
Mar 28 02:44:35 PM PDT 24 |
Mar 28 03:07:26 PM PDT 24 |
9940127782 ps |
T612 |
/workspace/coverage/default/49.sram_ctrl_stress_all.3892991942 |
|
|
Mar 28 02:53:56 PM PDT 24 |
Mar 28 03:39:01 PM PDT 24 |
55984359985 ps |
T613 |
/workspace/coverage/default/33.sram_ctrl_smoke.169288441 |
|
|
Mar 28 02:49:19 PM PDT 24 |
Mar 28 02:49:28 PM PDT 24 |
5795076312 ps |
T614 |
/workspace/coverage/default/25.sram_ctrl_stress_all.1577013095 |
|
|
Mar 28 02:47:54 PM PDT 24 |
Mar 28 03:38:44 PM PDT 24 |
101304531831 ps |
T615 |
/workspace/coverage/default/41.sram_ctrl_bijection.969060888 |
|
|
Mar 28 02:51:35 PM PDT 24 |
Mar 28 03:17:39 PM PDT 24 |
587160233076 ps |
T616 |
/workspace/coverage/default/6.sram_ctrl_stress_all.1879955331 |
|
|
Mar 28 02:44:29 PM PDT 24 |
Mar 28 04:35:25 PM PDT 24 |
1106174278293 ps |
T617 |
/workspace/coverage/default/30.sram_ctrl_bijection.3093531363 |
|
|
Mar 28 02:48:39 PM PDT 24 |
Mar 28 03:04:06 PM PDT 24 |
42922000876 ps |
T618 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3812565939 |
|
|
Mar 28 02:45:51 PM PDT 24 |
Mar 28 02:45:56 PM PDT 24 |
1402277052 ps |
T619 |
/workspace/coverage/default/24.sram_ctrl_alert_test.2226046844 |
|
|
Mar 28 02:47:38 PM PDT 24 |
Mar 28 02:47:39 PM PDT 24 |
117996719 ps |
T620 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1666128341 |
|
|
Mar 28 02:46:15 PM PDT 24 |
Mar 28 02:51:04 PM PDT 24 |
17499252180 ps |
T621 |
/workspace/coverage/default/46.sram_ctrl_executable.2517333778 |
|
|
Mar 28 02:52:57 PM PDT 24 |
Mar 28 03:07:07 PM PDT 24 |
39684913995 ps |
T622 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1062858757 |
|
|
Mar 28 02:53:36 PM PDT 24 |
Mar 28 02:53:37 PM PDT 24 |
14558742 ps |
T623 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.1186977083 |
|
|
Mar 28 02:43:58 PM PDT 24 |
Mar 28 02:46:08 PM PDT 24 |
7903742009 ps |
T624 |
/workspace/coverage/default/22.sram_ctrl_executable.4235008299 |
|
|
Mar 28 02:47:10 PM PDT 24 |
Mar 28 02:56:51 PM PDT 24 |
14146308733 ps |
T625 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.4289130038 |
|
|
Mar 28 02:49:00 PM PDT 24 |
Mar 28 02:53:52 PM PDT 24 |
57360085503 ps |
T626 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2790704067 |
|
|
Mar 28 02:47:28 PM PDT 24 |
Mar 28 02:49:29 PM PDT 24 |
11019537844 ps |
T627 |
/workspace/coverage/default/19.sram_ctrl_stress_all.3337551094 |
|
|
Mar 28 02:46:37 PM PDT 24 |
Mar 28 04:45:51 PM PDT 24 |
355410050031 ps |
T628 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.913382368 |
|
|
Mar 28 02:53:36 PM PDT 24 |
Mar 28 02:54:47 PM PDT 24 |
24908310385 ps |
T629 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.334108676 |
|
|
Mar 28 02:43:44 PM PDT 24 |
Mar 28 02:44:58 PM PDT 24 |
2420850215 ps |
T630 |
/workspace/coverage/default/43.sram_ctrl_bijection.3599876368 |
|
|
Mar 28 02:52:00 PM PDT 24 |
Mar 28 03:10:33 PM PDT 24 |
231118900483 ps |
T631 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1146745961 |
|
|
Mar 28 02:53:39 PM PDT 24 |
Mar 28 02:55:14 PM PDT 24 |
1132013181 ps |
T632 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3224289670 |
|
|
Mar 28 02:44:31 PM PDT 24 |
Mar 28 02:45:57 PM PDT 24 |
10458592994 ps |
T633 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1366338743 |
|
|
Mar 28 02:51:14 PM PDT 24 |
Mar 28 02:51:27 PM PDT 24 |
4070312760 ps |
T634 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2825898320 |
|
|
Mar 28 02:50:13 PM PDT 24 |
Mar 28 02:51:28 PM PDT 24 |
2471835351 ps |
T635 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.3004088047 |
|
|
Mar 28 02:48:21 PM PDT 24 |
Mar 28 02:48:25 PM PDT 24 |
1408528421 ps |
T636 |
/workspace/coverage/default/5.sram_ctrl_bijection.254489664 |
|
|
Mar 28 02:44:13 PM PDT 24 |
Mar 28 03:07:04 PM PDT 24 |
40906056941 ps |
T637 |
/workspace/coverage/default/41.sram_ctrl_smoke.2795152140 |
|
|
Mar 28 02:51:14 PM PDT 24 |
Mar 28 02:51:32 PM PDT 24 |
1256150085 ps |
T638 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.216765976 |
|
|
Mar 28 02:50:10 PM PDT 24 |
Mar 28 03:06:25 PM PDT 24 |
15535388652 ps |
T639 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.1001969272 |
|
|
Mar 28 02:47:38 PM PDT 24 |
Mar 28 02:52:14 PM PDT 24 |
17260231160 ps |
T640 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1667355912 |
|
|
Mar 28 02:48:58 PM PDT 24 |
Mar 28 02:49:41 PM PDT 24 |
3198730063 ps |
T641 |
/workspace/coverage/default/6.sram_ctrl_smoke.2519940637 |
|
|
Mar 28 02:44:13 PM PDT 24 |
Mar 28 02:44:47 PM PDT 24 |
4002732288 ps |
T642 |
/workspace/coverage/default/36.sram_ctrl_alert_test.4090196417 |
|
|
Mar 28 02:50:30 PM PDT 24 |
Mar 28 02:50:31 PM PDT 24 |
11945394 ps |
T643 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.5572979 |
|
|
Mar 28 02:50:50 PM PDT 24 |
Mar 28 02:55:49 PM PDT 24 |
20630133975 ps |
T644 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.348470836 |
|
|
Mar 28 02:52:33 PM PDT 24 |
Mar 28 02:55:07 PM PDT 24 |
10623919633 ps |
T645 |
/workspace/coverage/default/15.sram_ctrl_partial_access.3376926912 |
|
|
Mar 28 02:45:50 PM PDT 24 |
Mar 28 02:46:01 PM PDT 24 |
9213960591 ps |
T646 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2222618309 |
|
|
Mar 28 02:49:08 PM PDT 24 |
Mar 28 02:49:31 PM PDT 24 |
498828307 ps |
T647 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1720737979 |
|
|
Mar 28 02:46:28 PM PDT 24 |
Mar 28 02:51:34 PM PDT 24 |
5736275995 ps |
T648 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2045836026 |
|
|
Mar 28 02:47:11 PM PDT 24 |
Mar 28 02:47:14 PM PDT 24 |
359799916 ps |
T649 |
/workspace/coverage/default/9.sram_ctrl_smoke.2166580773 |
|
|
Mar 28 02:44:49 PM PDT 24 |
Mar 28 02:44:54 PM PDT 24 |
6022726967 ps |
T650 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3065330573 |
|
|
Mar 28 02:53:14 PM PDT 24 |
Mar 28 02:53:18 PM PDT 24 |
1409671372 ps |
T651 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.484833526 |
|
|
Mar 28 02:53:38 PM PDT 24 |
Mar 28 03:01:41 PM PDT 24 |
20687960429 ps |
T652 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.1524977890 |
|
|
Mar 28 02:46:11 PM PDT 24 |
Mar 28 02:47:00 PM PDT 24 |
35033438767 ps |
T653 |
/workspace/coverage/default/44.sram_ctrl_partial_access.2858667532 |
|
|
Mar 28 02:52:32 PM PDT 24 |
Mar 28 02:52:45 PM PDT 24 |
2856707518 ps |
T654 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.4210659899 |
|
|
Mar 28 02:47:12 PM PDT 24 |
Mar 28 02:47:52 PM PDT 24 |
753966601 ps |
T655 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2985179293 |
|
|
Mar 28 02:44:50 PM PDT 24 |
Mar 28 02:45:51 PM PDT 24 |
2223829811 ps |
T656 |
/workspace/coverage/default/31.sram_ctrl_regwen.3248088164 |
|
|
Mar 28 02:49:08 PM PDT 24 |
Mar 28 03:07:49 PM PDT 24 |
73762227893 ps |
T657 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.1598134457 |
|
|
Mar 28 02:45:48 PM PDT 24 |
Mar 28 03:08:34 PM PDT 24 |
15194577061 ps |
T658 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3115724986 |
|
|
Mar 28 02:45:48 PM PDT 24 |
Mar 28 02:46:44 PM PDT 24 |
738329428 ps |
T659 |
/workspace/coverage/default/28.sram_ctrl_alert_test.2206147805 |
|
|
Mar 28 02:48:40 PM PDT 24 |
Mar 28 02:48:41 PM PDT 24 |
19795381 ps |
T660 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.502774257 |
|
|
Mar 28 02:43:44 PM PDT 24 |
Mar 28 02:44:59 PM PDT 24 |
41900923440 ps |
T661 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3756333974 |
|
|
Mar 28 02:44:35 PM PDT 24 |
Mar 28 03:03:19 PM PDT 24 |
62352852497 ps |
T662 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.1494300598 |
|
|
Mar 28 02:46:09 PM PDT 24 |
Mar 28 02:48:31 PM PDT 24 |
772672106 ps |
T663 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3847343070 |
|
|
Mar 28 02:44:30 PM PDT 24 |
Mar 28 03:06:32 PM PDT 24 |
8646936021 ps |
T664 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.3312260677 |
|
|
Mar 28 02:49:41 PM PDT 24 |
Mar 28 03:07:25 PM PDT 24 |
32946360968 ps |
T665 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.241249925 |
|
|
Mar 28 02:45:26 PM PDT 24 |
Mar 28 02:47:50 PM PDT 24 |
28669813401 ps |
T666 |
/workspace/coverage/default/27.sram_ctrl_bijection.2030234667 |
|
|
Mar 28 02:48:24 PM PDT 24 |
Mar 28 03:20:21 PM PDT 24 |
122200662364 ps |
T667 |
/workspace/coverage/default/8.sram_ctrl_regwen.566388845 |
|
|
Mar 28 02:44:30 PM PDT 24 |
Mar 28 02:56:15 PM PDT 24 |
3979959059 ps |
T668 |
/workspace/coverage/default/17.sram_ctrl_executable.3343691669 |
|
|
Mar 28 02:46:14 PM PDT 24 |
Mar 28 03:08:43 PM PDT 24 |
21554387158 ps |
T669 |
/workspace/coverage/default/17.sram_ctrl_regwen.2825577025 |
|
|
Mar 28 02:46:08 PM PDT 24 |
Mar 28 02:59:04 PM PDT 24 |
14747804955 ps |
T670 |
/workspace/coverage/default/20.sram_ctrl_smoke.1359264132 |
|
|
Mar 28 02:46:30 PM PDT 24 |
Mar 28 02:46:47 PM PDT 24 |
1217677411 ps |
T671 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.1922947086 |
|
|
Mar 28 02:46:26 PM PDT 24 |
Mar 28 02:46:37 PM PDT 24 |
1585942004 ps |
T672 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2986159363 |
|
|
Mar 28 02:45:07 PM PDT 24 |
Mar 28 02:49:48 PM PDT 24 |
27059499650 ps |
T673 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4109821895 |
|
|
Mar 28 02:45:08 PM PDT 24 |
Mar 28 02:50:05 PM PDT 24 |
16111456674 ps |
T674 |
/workspace/coverage/default/37.sram_ctrl_regwen.4001071802 |
|
|
Mar 28 02:50:35 PM PDT 24 |
Mar 28 02:54:01 PM PDT 24 |
27051491677 ps |
T675 |
/workspace/coverage/default/12.sram_ctrl_executable.1271255708 |
|
|
Mar 28 02:45:27 PM PDT 24 |
Mar 28 02:50:07 PM PDT 24 |
6341067730 ps |
T676 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.2705098315 |
|
|
Mar 28 02:51:35 PM PDT 24 |
Mar 28 02:51:39 PM PDT 24 |
1983418725 ps |
T677 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2570920708 |
|
|
Mar 28 02:45:07 PM PDT 24 |
Mar 28 02:45:14 PM PDT 24 |
1046722874 ps |
T678 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2201758490 |
|
|
Mar 28 02:50:12 PM PDT 24 |
Mar 28 02:55:12 PM PDT 24 |
13774998527 ps |
T679 |
/workspace/coverage/default/49.sram_ctrl_smoke.3326574345 |
|
|
Mar 28 02:53:39 PM PDT 24 |
Mar 28 02:54:03 PM PDT 24 |
1458984442 ps |
T680 |
/workspace/coverage/default/32.sram_ctrl_stress_all.2482527475 |
|
|
Mar 28 02:49:19 PM PDT 24 |
Mar 28 03:39:19 PM PDT 24 |
85616185877 ps |
T681 |
/workspace/coverage/default/21.sram_ctrl_stress_all.3957796409 |
|
|
Mar 28 02:46:47 PM PDT 24 |
Mar 28 03:57:14 PM PDT 24 |
88779105394 ps |
T682 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1858863376 |
|
|
Mar 28 02:52:00 PM PDT 24 |
Mar 28 02:54:01 PM PDT 24 |
20349331456 ps |
T683 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.2641934252 |
|
|
Mar 28 02:50:12 PM PDT 24 |
Mar 28 03:10:43 PM PDT 24 |
30231053831 ps |
T684 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.453167862 |
|
|
Mar 28 02:50:51 PM PDT 24 |
Mar 28 02:52:49 PM PDT 24 |
3255460403 ps |
T685 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.748362821 |
|
|
Mar 28 02:50:13 PM PDT 24 |
Mar 28 02:55:37 PM PDT 24 |
107962508225 ps |
T686 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2821747693 |
|
|
Mar 28 02:47:28 PM PDT 24 |
Mar 28 02:51:26 PM PDT 24 |
4307145162 ps |
T687 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.1876456194 |
|
|
Mar 28 02:46:15 PM PDT 24 |
Mar 28 02:46:18 PM PDT 24 |
353381076 ps |
T688 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1322731202 |
|
|
Mar 28 02:46:11 PM PDT 24 |
Mar 28 02:49:56 PM PDT 24 |
7108198039 ps |
T689 |
/workspace/coverage/default/43.sram_ctrl_stress_all.356688103 |
|
|
Mar 28 02:52:31 PM PDT 24 |
Mar 28 04:57:55 PM PDT 24 |
685356993248 ps |
T690 |
/workspace/coverage/default/32.sram_ctrl_regwen.3296998288 |
|
|
Mar 28 02:49:19 PM PDT 24 |
Mar 28 02:54:15 PM PDT 24 |
4297100828 ps |
T691 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.963746161 |
|
|
Mar 28 02:45:09 PM PDT 24 |
Mar 28 02:46:11 PM PDT 24 |
3951561802 ps |
T692 |
/workspace/coverage/default/1.sram_ctrl_bijection.3518210477 |
|
|
Mar 28 02:43:42 PM PDT 24 |
Mar 28 02:54:53 PM PDT 24 |
53997231294 ps |
T693 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.1368726805 |
|
|
Mar 28 02:46:47 PM PDT 24 |
Mar 28 02:49:20 PM PDT 24 |
5321687950 ps |
T694 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.217096854 |
|
|
Mar 28 02:45:24 PM PDT 24 |
Mar 28 03:01:48 PM PDT 24 |
10154628815 ps |
T695 |
/workspace/coverage/default/20.sram_ctrl_partial_access.511072835 |
|
|
Mar 28 02:46:27 PM PDT 24 |
Mar 28 02:46:35 PM PDT 24 |
1429115547 ps |
T696 |
/workspace/coverage/default/27.sram_ctrl_alert_test.828182981 |
|
|
Mar 28 02:48:23 PM PDT 24 |
Mar 28 02:48:24 PM PDT 24 |
30010215 ps |
T697 |
/workspace/coverage/default/13.sram_ctrl_executable.3944819923 |
|
|
Mar 28 02:45:53 PM PDT 24 |
Mar 28 03:01:56 PM PDT 24 |
38447413286 ps |
T698 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.78263202 |
|
|
Mar 28 02:49:19 PM PDT 24 |
Mar 28 03:01:27 PM PDT 24 |
43120591017 ps |
T699 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2801717590 |
|
|
Mar 28 02:45:48 PM PDT 24 |
Mar 28 02:47:07 PM PDT 24 |
2402410796 ps |
T700 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.277232705 |
|
|
Mar 28 02:48:39 PM PDT 24 |
Mar 28 03:07:17 PM PDT 24 |
45110068380 ps |
T701 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.908807546 |
|
|
Mar 28 02:44:14 PM PDT 24 |
Mar 28 02:45:33 PM PDT 24 |
4889267643 ps |
T702 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.750211948 |
|
|
Mar 28 02:52:58 PM PDT 24 |
Mar 28 02:54:17 PM PDT 24 |
2771075472 ps |
T703 |
/workspace/coverage/default/40.sram_ctrl_partial_access.285136185 |
|
|
Mar 28 02:51:12 PM PDT 24 |
Mar 28 02:53:27 PM PDT 24 |
1941208532 ps |
T704 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3731711727 |
|
|
Mar 28 02:48:57 PM PDT 24 |
Mar 28 02:49:36 PM PDT 24 |
21407469817 ps |
T705 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.3144015720 |
|
|
Mar 28 02:45:53 PM PDT 24 |
Mar 28 02:46:22 PM PDT 24 |
722951085 ps |
T706 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.1373621652 |
|
|
Mar 28 02:53:16 PM PDT 24 |
Mar 28 02:54:03 PM PDT 24 |
744998113 ps |
T707 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.353166123 |
|
|
Mar 28 02:46:08 PM PDT 24 |
Mar 28 02:51:15 PM PDT 24 |
18217098016 ps |
T708 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.3672267666 |
|
|
Mar 28 02:51:59 PM PDT 24 |
Mar 28 02:54:03 PM PDT 24 |
1574267572 ps |
T709 |
/workspace/coverage/default/25.sram_ctrl_bijection.1669088634 |
|
|
Mar 28 02:47:28 PM PDT 24 |
Mar 28 03:10:37 PM PDT 24 |
637593011817 ps |
T710 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.3780807812 |
|
|
Mar 28 02:51:35 PM PDT 24 |
Mar 28 02:52:41 PM PDT 24 |
965461982 ps |
T711 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.380512506 |
|
|
Mar 28 02:46:14 PM PDT 24 |
Mar 28 02:46:26 PM PDT 24 |
3145797329 ps |
T712 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.1549186601 |
|
|
Mar 28 02:52:31 PM PDT 24 |
Mar 28 02:54:56 PM PDT 24 |
7110308853 ps |
T713 |
/workspace/coverage/default/49.sram_ctrl_partial_access.1510590812 |
|
|
Mar 28 02:53:37 PM PDT 24 |
Mar 28 02:53:54 PM PDT 24 |
2591353279 ps |
T714 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.688902652 |
|
|
Mar 28 02:48:39 PM PDT 24 |
Mar 28 02:49:04 PM PDT 24 |
2531755581 ps |
T715 |
/workspace/coverage/default/44.sram_ctrl_alert_test.785475302 |
|
|
Mar 28 02:52:32 PM PDT 24 |
Mar 28 02:52:32 PM PDT 24 |
22355275 ps |
T716 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.343068005 |
|
|
Mar 28 02:48:26 PM PDT 24 |
Mar 28 02:49:39 PM PDT 24 |
2479609291 ps |
T717 |
/workspace/coverage/default/25.sram_ctrl_executable.2235997751 |
|
|
Mar 28 02:47:56 PM PDT 24 |
Mar 28 02:51:57 PM PDT 24 |
16966850317 ps |
T718 |
/workspace/coverage/default/11.sram_ctrl_regwen.2830472142 |
|
|
Mar 28 02:45:05 PM PDT 24 |
Mar 28 03:11:09 PM PDT 24 |
124162891150 ps |
T719 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1322622510 |
|
|
Mar 28 02:46:26 PM PDT 24 |
Mar 28 02:47:51 PM PDT 24 |
39402208985 ps |
T720 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.381423482 |
|
|
Mar 28 02:44:36 PM PDT 24 |
Mar 28 02:44:40 PM PDT 24 |
2256130450 ps |
T721 |
/workspace/coverage/default/39.sram_ctrl_lc_escalation.115405967 |
|
|
Mar 28 02:50:50 PM PDT 24 |
Mar 28 02:52:15 PM PDT 24 |
14191521337 ps |
T722 |
/workspace/coverage/default/42.sram_ctrl_stress_all.721328326 |
|
|
Mar 28 02:51:58 PM PDT 24 |
Mar 28 04:17:38 PM PDT 24 |
666950351030 ps |
T723 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.3998158534 |
|
|
Mar 28 02:45:04 PM PDT 24 |
Mar 28 02:47:43 PM PDT 24 |
43058415389 ps |
T724 |
/workspace/coverage/default/18.sram_ctrl_stress_all.3453800682 |
|
|
Mar 28 02:46:28 PM PDT 24 |
Mar 28 04:01:23 PM PDT 24 |
116758240505 ps |
T725 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.192912164 |
|
|
Mar 28 02:47:27 PM PDT 24 |
Mar 28 02:50:05 PM PDT 24 |
1531436697 ps |
T726 |
/workspace/coverage/default/23.sram_ctrl_regwen.2669567138 |
|
|
Mar 28 02:47:12 PM PDT 24 |
Mar 28 02:49:12 PM PDT 24 |
7518844168 ps |
T727 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2413388027 |
|
|
Mar 28 02:50:33 PM PDT 24 |
Mar 28 02:57:43 PM PDT 24 |
70465581115 ps |
T728 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.267110652 |
|
|
Mar 28 02:52:58 PM PDT 24 |
Mar 28 02:57:32 PM PDT 24 |
49240672722 ps |
T729 |
/workspace/coverage/default/9.sram_ctrl_partial_access.832661516 |
|
|
Mar 28 02:44:51 PM PDT 24 |
Mar 28 02:45:00 PM PDT 24 |
705866006 ps |
T730 |
/workspace/coverage/default/25.sram_ctrl_alert_test.3175759755 |
|
|
Mar 28 02:47:56 PM PDT 24 |
Mar 28 02:47:57 PM PDT 24 |
180840560 ps |
T731 |
/workspace/coverage/default/21.sram_ctrl_executable.4219202077 |
|
|
Mar 28 02:46:52 PM PDT 24 |
Mar 28 02:50:33 PM PDT 24 |
18267963477 ps |
T732 |
/workspace/coverage/default/43.sram_ctrl_partial_access.3036493088 |
|
|
Mar 28 02:51:59 PM PDT 24 |
Mar 28 02:52:21 PM PDT 24 |
1519197547 ps |
T733 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2269619524 |
|
|
Mar 28 02:50:12 PM PDT 24 |
Mar 28 02:52:57 PM PDT 24 |
13033258224 ps |
T734 |
/workspace/coverage/default/18.sram_ctrl_executable.1877198058 |
|
|
Mar 28 02:46:10 PM PDT 24 |
Mar 28 02:51:28 PM PDT 24 |
58934907575 ps |
T735 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2345716677 |
|
|
Mar 28 02:43:59 PM PDT 24 |
Mar 28 02:44:05 PM PDT 24 |
731288457 ps |
T736 |
/workspace/coverage/default/24.sram_ctrl_executable.353531063 |
|
|
Mar 28 02:47:27 PM PDT 24 |
Mar 28 03:02:10 PM PDT 24 |
29529212825 ps |
T737 |
/workspace/coverage/default/21.sram_ctrl_alert_test.403027358 |
|
|
Mar 28 02:47:11 PM PDT 24 |
Mar 28 02:47:12 PM PDT 24 |
16840925 ps |
T738 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.1499485002 |
|
|
Mar 28 02:50:50 PM PDT 24 |
Mar 28 02:53:21 PM PDT 24 |
771924144 ps |
T739 |
/workspace/coverage/default/4.sram_ctrl_alert_test.3335218960 |
|
|
Mar 28 02:44:14 PM PDT 24 |
Mar 28 02:44:14 PM PDT 24 |
83548349 ps |
T740 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.4239318902 |
|
|
Mar 28 02:46:30 PM PDT 24 |
Mar 28 02:49:12 PM PDT 24 |
21095652910 ps |
T741 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.4149719024 |
|
|
Mar 28 02:53:37 PM PDT 24 |
Mar 28 02:55:25 PM PDT 24 |
1592262731 ps |
T742 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1920144130 |
|
|
Mar 28 02:48:41 PM PDT 24 |
Mar 28 02:50:48 PM PDT 24 |
12341469127 ps |
T743 |
/workspace/coverage/default/32.sram_ctrl_executable.256573552 |
|
|
Mar 28 02:49:18 PM PDT 24 |
Mar 28 03:01:50 PM PDT 24 |
75591865135 ps |
T744 |
/workspace/coverage/default/6.sram_ctrl_partial_access.1332784429 |
|
|
Mar 28 02:44:36 PM PDT 24 |
Mar 28 02:45:00 PM PDT 24 |
1377933547 ps |
T745 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3978823925 |
|
|
Mar 28 02:44:50 PM PDT 24 |
Mar 28 02:44:51 PM PDT 24 |
39031806 ps |
T746 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2403205823 |
|
|
Mar 28 02:53:36 PM PDT 24 |
Mar 28 03:04:08 PM PDT 24 |
31750616440 ps |
T747 |
/workspace/coverage/default/37.sram_ctrl_executable.1401711769 |
|
|
Mar 28 02:50:30 PM PDT 24 |
Mar 28 03:16:50 PM PDT 24 |
15216282470 ps |
T748 |
/workspace/coverage/default/15.sram_ctrl_regwen.3300930232 |
|
|
Mar 28 02:45:52 PM PDT 24 |
Mar 28 03:14:36 PM PDT 24 |
29036766267 ps |
T749 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3177267564 |
|
|
Mar 28 02:43:57 PM PDT 24 |
Mar 28 04:31:10 PM PDT 24 |
779418148007 ps |
T750 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1189804412 |
|
|
Mar 28 02:44:15 PM PDT 24 |
Mar 28 02:46:38 PM PDT 24 |
7105910395 ps |
T751 |
/workspace/coverage/default/13.sram_ctrl_regwen.3698917475 |
|
|
Mar 28 02:45:52 PM PDT 24 |
Mar 28 03:14:23 PM PDT 24 |
21611875049 ps |
T752 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1971043146 |
|
|
Mar 28 02:43:59 PM PDT 24 |
Mar 28 02:44:03 PM PDT 24 |
377078923 ps |
T753 |
/workspace/coverage/default/5.sram_ctrl_alert_test.4091845111 |
|
|
Mar 28 02:44:12 PM PDT 24 |
Mar 28 02:44:13 PM PDT 24 |
14505384 ps |
T754 |
/workspace/coverage/default/28.sram_ctrl_stress_all.3613228371 |
|
|
Mar 28 02:48:26 PM PDT 24 |
Mar 28 04:32:00 PM PDT 24 |
1556863703209 ps |
T755 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1006787565 |
|
|
Mar 28 02:45:26 PM PDT 24 |
Mar 28 02:58:23 PM PDT 24 |
19817975319 ps |
T756 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2756874729 |
|
|
Mar 28 02:53:57 PM PDT 24 |
Mar 28 02:56:43 PM PDT 24 |
4581042739 ps |
T757 |
/workspace/coverage/default/34.sram_ctrl_bijection.2075934593 |
|
|
Mar 28 02:49:41 PM PDT 24 |
Mar 28 03:05:07 PM PDT 24 |
221527070449 ps |
T758 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2120312135 |
|
|
Mar 28 02:45:49 PM PDT 24 |
Mar 28 02:47:09 PM PDT 24 |
5788767612 ps |
T759 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1513855989 |
|
|
Mar 28 02:44:33 PM PDT 24 |
Mar 28 02:44:43 PM PDT 24 |
2725513104 ps |
T760 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.2000640204 |
|
|
Mar 28 02:44:33 PM PDT 24 |
Mar 28 02:46:41 PM PDT 24 |
809439371 ps |
T761 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2054036903 |
|
|
Mar 28 02:47:25 PM PDT 24 |
Mar 28 02:47:26 PM PDT 24 |
172193885 ps |
T762 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.2080101092 |
|
|
Mar 28 02:49:19 PM PDT 24 |
Mar 28 02:52:10 PM PDT 24 |
33579811781 ps |
T763 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.2213968472 |
|
|
Mar 28 02:47:54 PM PDT 24 |
Mar 28 02:54:37 PM PDT 24 |
11934977378 ps |
T764 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.616778278 |
|
|
Mar 28 02:45:06 PM PDT 24 |
Mar 28 03:02:23 PM PDT 24 |
8791183412 ps |
T765 |
/workspace/coverage/default/18.sram_ctrl_regwen.2665842207 |
|
|
Mar 28 02:46:12 PM PDT 24 |
Mar 28 02:57:58 PM PDT 24 |
15993955971 ps |
T766 |
/workspace/coverage/default/11.sram_ctrl_bijection.1335784239 |
|
|
Mar 28 02:45:18 PM PDT 24 |
Mar 28 03:16:13 PM PDT 24 |
27116020931 ps |
T767 |
/workspace/coverage/default/10.sram_ctrl_bijection.463211104 |
|
|
Mar 28 02:44:50 PM PDT 24 |
Mar 28 03:20:50 PM PDT 24 |
496835918618 ps |
T768 |
/workspace/coverage/default/47.sram_ctrl_smoke.1098800517 |
|
|
Mar 28 02:53:16 PM PDT 24 |
Mar 28 02:53:55 PM PDT 24 |
4049700953 ps |
T769 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.1991937764 |
|
|
Mar 28 02:44:36 PM PDT 24 |
Mar 28 02:46:37 PM PDT 24 |
2059091786 ps |
T770 |
/workspace/coverage/default/13.sram_ctrl_partial_access.1989799626 |
|
|
Mar 28 02:45:24 PM PDT 24 |
Mar 28 02:45:43 PM PDT 24 |
1031725859 ps |
T771 |
/workspace/coverage/default/22.sram_ctrl_alert_test.1823021618 |
|
|
Mar 28 02:47:14 PM PDT 24 |
Mar 28 02:47:15 PM PDT 24 |
31053603 ps |
T772 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.1598034030 |
|
|
Mar 28 02:44:00 PM PDT 24 |
Mar 28 02:44:13 PM PDT 24 |
4067429429 ps |
T773 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2095481045 |
|
|
Mar 28 02:52:58 PM PDT 24 |
Mar 28 03:02:25 PM PDT 24 |
8129268243 ps |
T774 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.4221782087 |
|
|
Mar 28 02:44:00 PM PDT 24 |
Mar 28 02:47:42 PM PDT 24 |
8591732754 ps |
T775 |
/workspace/coverage/default/46.sram_ctrl_regwen.3837201897 |
|
|
Mar 28 02:52:57 PM PDT 24 |
Mar 28 03:07:40 PM PDT 24 |
24357658000 ps |
T776 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2596422909 |
|
|
Mar 28 02:46:47 PM PDT 24 |
Mar 28 02:49:14 PM PDT 24 |
50444451701 ps |
T777 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1526666109 |
|
|
Mar 28 02:44:03 PM PDT 24 |
Mar 28 02:49:18 PM PDT 24 |
28961988299 ps |
T778 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.248521459 |
|
|
Mar 28 02:46:09 PM PDT 24 |
Mar 28 02:59:20 PM PDT 24 |
37018609728 ps |
T779 |
/workspace/coverage/default/30.sram_ctrl_stress_all.1091721965 |
|
|
Mar 28 02:48:58 PM PDT 24 |
Mar 28 04:01:41 PM PDT 24 |
777847584858 ps |
T780 |
/workspace/coverage/default/23.sram_ctrl_stress_all.3978551413 |
|
|
Mar 28 02:47:25 PM PDT 24 |
Mar 28 03:19:54 PM PDT 24 |
32707513755 ps |
T781 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3150364636 |
|
|
Mar 28 02:46:27 PM PDT 24 |
Mar 28 03:06:15 PM PDT 24 |
24957289500 ps |
T782 |
/workspace/coverage/default/26.sram_ctrl_stress_all.2220360124 |
|
|
Mar 28 02:48:21 PM PDT 24 |
Mar 28 04:23:00 PM PDT 24 |
82111295408 ps |
T783 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.1775193350 |
|
|
Mar 28 02:46:27 PM PDT 24 |
Mar 28 02:47:30 PM PDT 24 |
39457973629 ps |
T784 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3052476694 |
|
|
Mar 28 02:47:25 PM PDT 24 |
Mar 28 02:47:28 PM PDT 24 |
1465865871 ps |
T785 |
/workspace/coverage/default/40.sram_ctrl_stress_all.362838071 |
|
|
Mar 28 02:51:18 PM PDT 24 |
Mar 28 03:28:21 PM PDT 24 |
718829201877 ps |
T786 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.3954511890 |
|
|
Mar 28 02:47:28 PM PDT 24 |
Mar 28 02:48:17 PM PDT 24 |
2579056595 ps |
T787 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.2106341624 |
|
|
Mar 28 02:43:43 PM PDT 24 |
Mar 28 02:46:18 PM PDT 24 |
12610387421 ps |
T788 |
/workspace/coverage/default/2.sram_ctrl_regwen.1557270970 |
|
|
Mar 28 02:44:01 PM PDT 24 |
Mar 28 03:04:06 PM PDT 24 |
118151539874 ps |
T789 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1150629012 |
|
|
Mar 28 02:50:50 PM PDT 24 |
Mar 28 02:56:27 PM PDT 24 |
5574661455 ps |
T790 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.1421729513 |
|
|
Mar 28 02:47:38 PM PDT 24 |
Mar 28 03:04:15 PM PDT 24 |
124421276349 ps |
T791 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.465986777 |
|
|
Mar 28 02:45:48 PM PDT 24 |
Mar 28 02:45:51 PM PDT 24 |
1762663444 ps |
T792 |
/workspace/coverage/default/31.sram_ctrl_executable.1605037600 |
|
|
Mar 28 02:48:58 PM PDT 24 |
Mar 28 03:03:44 PM PDT 24 |
35869349749 ps |
T793 |
/workspace/coverage/default/20.sram_ctrl_executable.961025098 |
|
|
Mar 28 02:46:49 PM PDT 24 |
Mar 28 03:16:42 PM PDT 24 |
57561032502 ps |
T794 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1112729341 |
|
|
Mar 28 02:52:31 PM PDT 24 |
Mar 28 04:06:23 PM PDT 24 |
39598093328 ps |