| T552 |
/workspace/coverage/default/41.sram_ctrl_bijection.47731429 |
|
|
Mar 31 03:10:44 PM PDT 24 |
Mar 31 03:26:26 PM PDT 24 |
166288888064 ps |
| T553 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.3521132192 |
|
|
Mar 31 03:05:24 PM PDT 24 |
Mar 31 03:12:24 PM PDT 24 |
18000065909 ps |
| T554 |
/workspace/coverage/default/1.sram_ctrl_regwen.4237892372 |
|
|
Mar 31 03:00:26 PM PDT 24 |
Mar 31 03:15:20 PM PDT 24 |
18583749171 ps |
| T555 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.390425589 |
|
|
Mar 31 03:06:45 PM PDT 24 |
Mar 31 03:08:00 PM PDT 24 |
2391428364 ps |
| T556 |
/workspace/coverage/default/38.sram_ctrl_partial_access.4051437078 |
|
|
Mar 31 03:09:45 PM PDT 24 |
Mar 31 03:10:02 PM PDT 24 |
894563659 ps |
| T557 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3197069353 |
|
|
Mar 31 03:13:52 PM PDT 24 |
Mar 31 03:13:56 PM PDT 24 |
694140700 ps |
| T558 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.432812062 |
|
|
Mar 31 03:13:33 PM PDT 24 |
Mar 31 03:21:49 PM PDT 24 |
20317406051 ps |
| T559 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3292633929 |
|
|
Mar 31 03:01:30 PM PDT 24 |
Mar 31 03:02:30 PM PDT 24 |
982715509 ps |
| T560 |
/workspace/coverage/default/12.sram_ctrl_bijection.764688420 |
|
|
Mar 31 03:02:22 PM PDT 24 |
Mar 31 03:11:30 PM PDT 24 |
30153132702 ps |
| T561 |
/workspace/coverage/default/4.sram_ctrl_smoke.2651520065 |
|
|
Mar 31 03:00:47 PM PDT 24 |
Mar 31 03:01:44 PM PDT 24 |
3085604415 ps |
| T562 |
/workspace/coverage/default/4.sram_ctrl_alert_test.888631818 |
|
|
Mar 31 03:00:53 PM PDT 24 |
Mar 31 03:00:54 PM PDT 24 |
31472748 ps |
| T563 |
/workspace/coverage/default/8.sram_ctrl_executable.2965086535 |
|
|
Mar 31 03:01:36 PM PDT 24 |
Mar 31 03:11:38 PM PDT 24 |
10044649492 ps |
| T564 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1416258031 |
|
|
Mar 31 03:00:01 PM PDT 24 |
Mar 31 03:17:29 PM PDT 24 |
56980979113 ps |
| T565 |
/workspace/coverage/default/10.sram_ctrl_smoke.4149019957 |
|
|
Mar 31 03:01:59 PM PDT 24 |
Mar 31 03:02:42 PM PDT 24 |
833989705 ps |
| T566 |
/workspace/coverage/default/25.sram_ctrl_partial_access.613121967 |
|
|
Mar 31 03:05:39 PM PDT 24 |
Mar 31 03:07:05 PM PDT 24 |
3512212594 ps |
| T567 |
/workspace/coverage/default/29.sram_ctrl_bijection.777885986 |
|
|
Mar 31 03:06:52 PM PDT 24 |
Mar 31 03:33:38 PM PDT 24 |
25320083721 ps |
| T568 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2369234222 |
|
|
Mar 31 03:10:31 PM PDT 24 |
Mar 31 03:17:32 PM PDT 24 |
73581071026 ps |
| T569 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2252180547 |
|
|
Mar 31 03:01:05 PM PDT 24 |
Mar 31 03:01:05 PM PDT 24 |
20439733 ps |
| T570 |
/workspace/coverage/default/48.sram_ctrl_executable.2084774620 |
|
|
Mar 31 03:13:22 PM PDT 24 |
Mar 31 03:13:54 PM PDT 24 |
2276816361 ps |
| T571 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.1488932218 |
|
|
Mar 31 03:07:47 PM PDT 24 |
Mar 31 03:12:22 PM PDT 24 |
14477394124 ps |
| T572 |
/workspace/coverage/default/17.sram_ctrl_regwen.442123168 |
|
|
Mar 31 03:03:25 PM PDT 24 |
Mar 31 03:07:53 PM PDT 24 |
6196949296 ps |
| T573 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3168727708 |
|
|
Mar 31 03:12:41 PM PDT 24 |
Mar 31 03:12:44 PM PDT 24 |
1406025833 ps |
| T574 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1035215322 |
|
|
Mar 31 03:05:16 PM PDT 24 |
Mar 31 03:05:58 PM PDT 24 |
1485194900 ps |
| T108 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1727548467 |
|
|
Mar 31 03:07:48 PM PDT 24 |
Mar 31 03:07:56 PM PDT 24 |
475156297 ps |
| T575 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.3283209409 |
|
|
Mar 31 03:04:29 PM PDT 24 |
Mar 31 03:04:33 PM PDT 24 |
732433028 ps |
| T576 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.2268350000 |
|
|
Mar 31 03:04:55 PM PDT 24 |
Mar 31 03:13:10 PM PDT 24 |
30061290913 ps |
| T577 |
/workspace/coverage/default/22.sram_ctrl_executable.238035659 |
|
|
Mar 31 03:04:46 PM PDT 24 |
Mar 31 03:15:06 PM PDT 24 |
46354404036 ps |
| T578 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.2564024026 |
|
|
Mar 31 03:04:15 PM PDT 24 |
Mar 31 03:24:00 PM PDT 24 |
9810744165 ps |
| T579 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1349010742 |
|
|
Mar 31 03:02:37 PM PDT 24 |
Mar 31 03:02:45 PM PDT 24 |
3100896509 ps |
| T580 |
/workspace/coverage/default/24.sram_ctrl_partial_access.2970634897 |
|
|
Mar 31 03:05:17 PM PDT 24 |
Mar 31 03:05:23 PM PDT 24 |
1558278636 ps |
| T581 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2249879788 |
|
|
Mar 31 03:09:47 PM PDT 24 |
Mar 31 03:14:11 PM PDT 24 |
12660433843 ps |
| T582 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.1109603664 |
|
|
Mar 31 03:09:00 PM PDT 24 |
Mar 31 03:15:40 PM PDT 24 |
16340999037 ps |
| T583 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3469088802 |
|
|
Mar 31 03:02:26 PM PDT 24 |
Mar 31 03:17:38 PM PDT 24 |
13200997819 ps |
| T584 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2116469412 |
|
|
Mar 31 03:10:53 PM PDT 24 |
Mar 31 03:11:22 PM PDT 24 |
1556400507 ps |
| T585 |
/workspace/coverage/default/3.sram_ctrl_stress_pipeline.3203018415 |
|
|
Mar 31 03:00:41 PM PDT 24 |
Mar 31 03:03:57 PM PDT 24 |
7305888816 ps |
| T586 |
/workspace/coverage/default/39.sram_ctrl_bijection.183991918 |
|
|
Mar 31 03:09:56 PM PDT 24 |
Mar 31 03:41:34 PM PDT 24 |
56866633691 ps |
| T587 |
/workspace/coverage/default/37.sram_ctrl_stress_all.2748348737 |
|
|
Mar 31 03:09:39 PM PDT 24 |
Mar 31 03:34:17 PM PDT 24 |
105008707803 ps |
| T588 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.1926859543 |
|
|
Mar 31 03:10:28 PM PDT 24 |
Mar 31 03:10:53 PM PDT 24 |
747937851 ps |
| T589 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1287781839 |
|
|
Mar 31 03:08:40 PM PDT 24 |
Mar 31 03:08:57 PM PDT 24 |
777195728 ps |
| T590 |
/workspace/coverage/default/3.sram_ctrl_bijection.467905768 |
|
|
Mar 31 03:00:42 PM PDT 24 |
Mar 31 03:36:00 PM PDT 24 |
230037351703 ps |
| T591 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.4166353295 |
|
|
Mar 31 03:08:03 PM PDT 24 |
Mar 31 03:08:13 PM PDT 24 |
1362251914 ps |
| T592 |
/workspace/coverage/default/10.sram_ctrl_bijection.2117764822 |
|
|
Mar 31 03:01:59 PM PDT 24 |
Mar 31 03:45:53 PM PDT 24 |
689849805743 ps |
| T593 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1787367027 |
|
|
Mar 31 03:06:58 PM PDT 24 |
Mar 31 03:08:16 PM PDT 24 |
1905067863 ps |
| T594 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3265954624 |
|
|
Mar 31 03:04:44 PM PDT 24 |
Mar 31 03:11:27 PM PDT 24 |
6965815985 ps |
| T595 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.1793700381 |
|
|
Mar 31 03:00:36 PM PDT 24 |
Mar 31 03:00:39 PM PDT 24 |
355312316 ps |
| T596 |
/workspace/coverage/default/44.sram_ctrl_bijection.3787786455 |
|
|
Mar 31 03:11:49 PM PDT 24 |
Mar 31 03:49:17 PM PDT 24 |
54828600208 ps |
| T597 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.98634440 |
|
|
Mar 31 03:07:31 PM PDT 24 |
Mar 31 03:16:59 PM PDT 24 |
22111576888 ps |
| T598 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.343678377 |
|
|
Mar 31 03:11:10 PM PDT 24 |
Mar 31 03:24:04 PM PDT 24 |
13380845633 ps |
| T599 |
/workspace/coverage/default/3.sram_ctrl_smoke.3204228243 |
|
|
Mar 31 03:00:42 PM PDT 24 |
Mar 31 03:01:00 PM PDT 24 |
888035476 ps |
| T600 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.4205178004 |
|
|
Mar 31 03:05:59 PM PDT 24 |
Mar 31 03:06:51 PM PDT 24 |
884371832 ps |
| T601 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.995682668 |
|
|
Mar 31 03:11:26 PM PDT 24 |
Mar 31 03:35:22 PM PDT 24 |
24253271764 ps |
| T602 |
/workspace/coverage/default/27.sram_ctrl_regwen.3522547462 |
|
|
Mar 31 03:06:24 PM PDT 24 |
Mar 31 03:21:43 PM PDT 24 |
89340830658 ps |
| T603 |
/workspace/coverage/default/40.sram_ctrl_stress_all.681491704 |
|
|
Mar 31 03:10:41 PM PDT 24 |
Mar 31 03:58:16 PM PDT 24 |
28430566830 ps |
| T604 |
/workspace/coverage/default/42.sram_ctrl_executable.3977514184 |
|
|
Mar 31 03:11:14 PM PDT 24 |
Mar 31 03:19:59 PM PDT 24 |
20353758018 ps |
| T605 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1358592169 |
|
|
Mar 31 03:01:43 PM PDT 24 |
Mar 31 03:01:43 PM PDT 24 |
32227137 ps |
| T606 |
/workspace/coverage/default/12.sram_ctrl_stress_all.1405851511 |
|
|
Mar 31 03:02:31 PM PDT 24 |
Mar 31 04:36:50 PM PDT 24 |
972641177889 ps |
| T607 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1063659829 |
|
|
Mar 31 03:06:05 PM PDT 24 |
Mar 31 03:06:33 PM PDT 24 |
750823043 ps |
| T608 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1412305796 |
|
|
Mar 31 03:07:32 PM PDT 24 |
Mar 31 03:07:33 PM PDT 24 |
163800368 ps |
| T609 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.1731982026 |
|
|
Mar 31 03:08:54 PM PDT 24 |
Mar 31 03:20:01 PM PDT 24 |
6241983475 ps |
| T610 |
/workspace/coverage/default/17.sram_ctrl_partial_access.694434759 |
|
|
Mar 31 03:03:19 PM PDT 24 |
Mar 31 03:03:30 PM PDT 24 |
6595869347 ps |
| T611 |
/workspace/coverage/default/21.sram_ctrl_stress_all.4004622604 |
|
|
Mar 31 03:04:35 PM PDT 24 |
Mar 31 04:54:55 PM PDT 24 |
51969525289 ps |
| T612 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2144743284 |
|
|
Mar 31 03:01:36 PM PDT 24 |
Mar 31 03:06:29 PM PDT 24 |
41305126121 ps |
| T613 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.3991853442 |
|
|
Mar 31 03:05:04 PM PDT 24 |
Mar 31 03:07:14 PM PDT 24 |
1628262377 ps |
| T614 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.1336136256 |
|
|
Mar 31 03:07:59 PM PDT 24 |
Mar 31 03:10:14 PM PDT 24 |
18132751654 ps |
| T615 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.4200370689 |
|
|
Mar 31 03:01:06 PM PDT 24 |
Mar 31 03:03:12 PM PDT 24 |
13152353139 ps |
| T616 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3020093769 |
|
|
Mar 31 03:08:26 PM PDT 24 |
Mar 31 03:13:37 PM PDT 24 |
5650406085 ps |
| T617 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.700837907 |
|
|
Mar 31 03:01:22 PM PDT 24 |
Mar 31 03:22:49 PM PDT 24 |
16889219324 ps |
| T618 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.4099524576 |
|
|
Mar 31 03:08:16 PM PDT 24 |
Mar 31 03:09:17 PM PDT 24 |
9986131222 ps |
| T619 |
/workspace/coverage/default/37.sram_ctrl_alert_test.488827088 |
|
|
Mar 31 03:09:38 PM PDT 24 |
Mar 31 03:09:39 PM PDT 24 |
16683002 ps |
| T620 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2894296420 |
|
|
Mar 31 03:03:20 PM PDT 24 |
Mar 31 03:05:29 PM PDT 24 |
5339807611 ps |
| T621 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.249764304 |
|
|
Mar 31 03:11:49 PM PDT 24 |
Mar 31 03:11:56 PM PDT 24 |
678240231 ps |
| T622 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3955263814 |
|
|
Mar 31 03:08:00 PM PDT 24 |
Mar 31 03:17:18 PM PDT 24 |
6803746535 ps |
| T623 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.663478864 |
|
|
Mar 31 03:00:46 PM PDT 24 |
Mar 31 03:04:09 PM PDT 24 |
5374979591 ps |
| T624 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.4265795449 |
|
|
Mar 31 03:02:54 PM PDT 24 |
Mar 31 03:09:06 PM PDT 24 |
16613561281 ps |
| T625 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1608274592 |
|
|
Mar 31 03:05:38 PM PDT 24 |
Mar 31 03:05:50 PM PDT 24 |
2842760917 ps |
| T626 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2604207725 |
|
|
Mar 31 03:05:51 PM PDT 24 |
Mar 31 03:06:05 PM PDT 24 |
1160888747 ps |
| T627 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.651812069 |
|
|
Mar 31 03:11:30 PM PDT 24 |
Mar 31 03:12:20 PM PDT 24 |
4990991136 ps |
| T628 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.487899146 |
|
|
Mar 31 03:05:09 PM PDT 24 |
Mar 31 03:05:12 PM PDT 24 |
347505226 ps |
| T629 |
/workspace/coverage/default/16.sram_ctrl_access_during_key_req.2698069555 |
|
|
Mar 31 03:03:10 PM PDT 24 |
Mar 31 03:20:16 PM PDT 24 |
47245549418 ps |
| T630 |
/workspace/coverage/default/22.sram_ctrl_regwen.783293017 |
|
|
Mar 31 03:04:47 PM PDT 24 |
Mar 31 03:13:42 PM PDT 24 |
8186806325 ps |
| T631 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2942931138 |
|
|
Mar 31 03:02:08 PM PDT 24 |
Mar 31 03:03:25 PM PDT 24 |
42882808117 ps |
| T632 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.4117258754 |
|
|
Mar 31 03:05:10 PM PDT 24 |
Mar 31 03:08:06 PM PDT 24 |
20829496042 ps |
| T633 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2918375575 |
|
|
Mar 31 03:05:38 PM PDT 24 |
Mar 31 03:05:43 PM PDT 24 |
2718390062 ps |
| T634 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.3069846990 |
|
|
Mar 31 03:07:15 PM PDT 24 |
Mar 31 03:07:53 PM PDT 24 |
21481326883 ps |
| T635 |
/workspace/coverage/default/26.sram_ctrl_regwen.1952764061 |
|
|
Mar 31 03:05:58 PM PDT 24 |
Mar 31 03:17:23 PM PDT 24 |
5423445722 ps |
| T636 |
/workspace/coverage/default/18.sram_ctrl_regwen.2016544811 |
|
|
Mar 31 03:03:40 PM PDT 24 |
Mar 31 03:15:15 PM PDT 24 |
15010748468 ps |
| T637 |
/workspace/coverage/default/26.sram_ctrl_bijection.2398889224 |
|
|
Mar 31 03:05:53 PM PDT 24 |
Mar 31 03:17:42 PM PDT 24 |
11294169461 ps |
| T638 |
/workspace/coverage/default/31.sram_ctrl_smoke.3827326123 |
|
|
Mar 31 03:07:33 PM PDT 24 |
Mar 31 03:07:54 PM PDT 24 |
5937555837 ps |
| T639 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.1158512990 |
|
|
Mar 31 03:00:46 PM PDT 24 |
Mar 31 03:09:14 PM PDT 24 |
6652961551 ps |
| T640 |
/workspace/coverage/default/35.sram_ctrl_bijection.835348009 |
|
|
Mar 31 03:08:41 PM PDT 24 |
Mar 31 03:39:06 PM PDT 24 |
204259217731 ps |
| T641 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1092156145 |
|
|
Mar 31 03:04:09 PM PDT 24 |
Mar 31 03:05:50 PM PDT 24 |
1565651812 ps |
| T642 |
/workspace/coverage/default/7.sram_ctrl_stress_all.393287384 |
|
|
Mar 31 03:01:30 PM PDT 24 |
Mar 31 03:48:10 PM PDT 24 |
101891318112 ps |
| T643 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2279627805 |
|
|
Mar 31 03:01:06 PM PDT 24 |
Mar 31 03:47:38 PM PDT 24 |
198096901872 ps |
| T644 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2311423854 |
|
|
Mar 31 03:02:55 PM PDT 24 |
Mar 31 03:04:47 PM PDT 24 |
3088926993 ps |
| T645 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2812971064 |
|
|
Mar 31 03:03:11 PM PDT 24 |
Mar 31 03:21:14 PM PDT 24 |
111368422561 ps |
| T646 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.1337310775 |
|
|
Mar 31 03:06:57 PM PDT 24 |
Mar 31 03:11:34 PM PDT 24 |
23788381971 ps |
| T647 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.58561199 |
|
|
Mar 31 03:01:59 PM PDT 24 |
Mar 31 03:02:27 PM PDT 24 |
2844395692 ps |
| T648 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3877938279 |
|
|
Mar 31 03:03:26 PM PDT 24 |
Mar 31 03:06:18 PM PDT 24 |
821979160 ps |
| T649 |
/workspace/coverage/default/2.sram_ctrl_executable.2236812849 |
|
|
Mar 31 03:00:37 PM PDT 24 |
Mar 31 03:05:42 PM PDT 24 |
42111158542 ps |
| T650 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.2480955720 |
|
|
Mar 31 03:07:39 PM PDT 24 |
Mar 31 03:08:14 PM PDT 24 |
6329213305 ps |
| T651 |
/workspace/coverage/default/18.sram_ctrl_smoke.660839426 |
|
|
Mar 31 03:03:32 PM PDT 24 |
Mar 31 03:03:44 PM PDT 24 |
3588667479 ps |
| T109 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.784867149 |
|
|
Mar 31 03:05:44 PM PDT 24 |
Mar 31 03:06:16 PM PDT 24 |
1203003038 ps |
| T652 |
/workspace/coverage/default/5.sram_ctrl_smoke.3431264245 |
|
|
Mar 31 03:00:53 PM PDT 24 |
Mar 31 03:01:10 PM PDT 24 |
2086392102 ps |
| T653 |
/workspace/coverage/default/32.sram_ctrl_smoke.2571478669 |
|
|
Mar 31 03:07:46 PM PDT 24 |
Mar 31 03:07:57 PM PDT 24 |
454491162 ps |
| T654 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.4198801032 |
|
|
Mar 31 03:10:50 PM PDT 24 |
Mar 31 03:11:02 PM PDT 24 |
2877834914 ps |
| T655 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.1708012938 |
|
|
Mar 31 03:05:26 PM PDT 24 |
Mar 31 03:05:29 PM PDT 24 |
681878347 ps |
| T656 |
/workspace/coverage/default/22.sram_ctrl_bijection.3668372274 |
|
|
Mar 31 03:04:44 PM PDT 24 |
Mar 31 03:32:21 PM PDT 24 |
73765394466 ps |
| T657 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3564348665 |
|
|
Mar 31 03:05:51 PM PDT 24 |
Mar 31 03:09:19 PM PDT 24 |
8527771096 ps |
| T658 |
/workspace/coverage/default/6.sram_ctrl_stress_all.2546298391 |
|
|
Mar 31 03:01:19 PM PDT 24 |
Mar 31 05:02:04 PM PDT 24 |
231503076360 ps |
| T659 |
/workspace/coverage/default/0.sram_ctrl_alert_test.3128535515 |
|
|
Mar 31 03:00:17 PM PDT 24 |
Mar 31 03:00:18 PM PDT 24 |
23558881 ps |
| T660 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.649395115 |
|
|
Mar 31 03:09:46 PM PDT 24 |
Mar 31 03:10:32 PM PDT 24 |
757057463 ps |
| T661 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2094690529 |
|
|
Mar 31 03:12:47 PM PDT 24 |
Mar 31 03:17:57 PM PDT 24 |
15811090073 ps |
| T662 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.1026561881 |
|
|
Mar 31 03:02:59 PM PDT 24 |
Mar 31 03:03:44 PM PDT 24 |
3045296174 ps |
| T663 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.1078096408 |
|
|
Mar 31 03:06:32 PM PDT 24 |
Mar 31 03:10:52 PM PDT 24 |
55405533466 ps |
| T664 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1110814553 |
|
|
Mar 31 03:02:13 PM PDT 24 |
Mar 31 03:02:34 PM PDT 24 |
2799621488 ps |
| T665 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.1420815505 |
|
|
Mar 31 03:09:38 PM PDT 24 |
Mar 31 03:23:12 PM PDT 24 |
41204926793 ps |
| T666 |
/workspace/coverage/default/4.sram_ctrl_bijection.4194453941 |
|
|
Mar 31 03:00:47 PM PDT 24 |
Mar 31 03:20:51 PM PDT 24 |
205561068289 ps |
| T667 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3399634951 |
|
|
Mar 31 03:11:54 PM PDT 24 |
Mar 31 03:15:57 PM PDT 24 |
16415466840 ps |
| T668 |
/workspace/coverage/default/34.sram_ctrl_regwen.838708724 |
|
|
Mar 31 03:08:28 PM PDT 24 |
Mar 31 03:24:47 PM PDT 24 |
2998718487 ps |
| T669 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3674248337 |
|
|
Mar 31 03:00:06 PM PDT 24 |
Mar 31 03:10:50 PM PDT 24 |
19012867722 ps |
| T670 |
/workspace/coverage/default/37.sram_ctrl_partial_access.1296560894 |
|
|
Mar 31 03:09:18 PM PDT 24 |
Mar 31 03:09:24 PM PDT 24 |
738565599 ps |
| T671 |
/workspace/coverage/default/19.sram_ctrl_partial_access.1802426818 |
|
|
Mar 31 03:03:55 PM PDT 24 |
Mar 31 03:04:10 PM PDT 24 |
1004882209 ps |
| T110 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3307371158 |
|
|
Mar 31 03:08:15 PM PDT 24 |
Mar 31 03:08:25 PM PDT 24 |
1534561700 ps |
| T672 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2258206972 |
|
|
Mar 31 03:03:19 PM PDT 24 |
Mar 31 03:07:18 PM PDT 24 |
8584518556 ps |
| T673 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.703970659 |
|
|
Mar 31 03:11:08 PM PDT 24 |
Mar 31 03:11:45 PM PDT 24 |
752489716 ps |
| T674 |
/workspace/coverage/default/2.sram_ctrl_alert_test.1936792158 |
|
|
Mar 31 03:00:44 PM PDT 24 |
Mar 31 03:00:44 PM PDT 24 |
28842040 ps |
| T675 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.3693562164 |
|
|
Mar 31 03:10:45 PM PDT 24 |
Mar 31 03:10:52 PM PDT 24 |
754389004 ps |
| T676 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1627045439 |
|
|
Mar 31 03:00:36 PM PDT 24 |
Mar 31 03:01:49 PM PDT 24 |
33399476452 ps |
| T677 |
/workspace/coverage/default/25.sram_ctrl_bijection.1570035622 |
|
|
Mar 31 03:05:32 PM PDT 24 |
Mar 31 03:17:43 PM PDT 24 |
44004627944 ps |
| T678 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.671972807 |
|
|
Mar 31 03:08:26 PM PDT 24 |
Mar 31 03:10:15 PM PDT 24 |
1474784411 ps |
| T679 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.639696185 |
|
|
Mar 31 03:12:16 PM PDT 24 |
Mar 31 03:12:19 PM PDT 24 |
1408041740 ps |
| T680 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.4203418878 |
|
|
Mar 31 03:01:36 PM PDT 24 |
Mar 31 03:02:10 PM PDT 24 |
1515625080 ps |
| T681 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1270727915 |
|
|
Mar 31 03:02:22 PM PDT 24 |
Mar 31 03:03:21 PM PDT 24 |
4138192354 ps |
| T682 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1207245675 |
|
|
Mar 31 03:02:16 PM PDT 24 |
Mar 31 03:04:18 PM PDT 24 |
807433874 ps |
| T683 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.2177651702 |
|
|
Mar 31 03:08:40 PM PDT 24 |
Mar 31 03:08:56 PM PDT 24 |
1425142971 ps |
| T684 |
/workspace/coverage/default/6.sram_ctrl_smoke.2130865204 |
|
|
Mar 31 03:01:03 PM PDT 24 |
Mar 31 03:01:11 PM PDT 24 |
595876562 ps |
| T685 |
/workspace/coverage/default/11.sram_ctrl_smoke.3693912198 |
|
|
Mar 31 03:02:16 PM PDT 24 |
Mar 31 03:02:35 PM PDT 24 |
8400675720 ps |
| T686 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1184031298 |
|
|
Mar 31 03:01:49 PM PDT 24 |
Mar 31 03:02:36 PM PDT 24 |
7121336988 ps |
| T111 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4024798635 |
|
|
Mar 31 03:12:41 PM PDT 24 |
Mar 31 03:14:17 PM PDT 24 |
6710939238 ps |
| T687 |
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2264918849 |
|
|
Mar 31 03:11:35 PM PDT 24 |
Mar 31 03:11:38 PM PDT 24 |
350175750 ps |
| T688 |
/workspace/coverage/default/8.sram_ctrl_smoke.2622134431 |
|
|
Mar 31 03:01:29 PM PDT 24 |
Mar 31 03:01:39 PM PDT 24 |
1771103594 ps |
| T689 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3283303019 |
|
|
Mar 31 03:00:30 PM PDT 24 |
Mar 31 03:02:31 PM PDT 24 |
1569216684 ps |
| T690 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1483672858 |
|
|
Mar 31 03:12:05 PM PDT 24 |
Mar 31 03:18:59 PM PDT 24 |
17402546079 ps |
| T691 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.2879642385 |
|
|
Mar 31 03:00:41 PM PDT 24 |
Mar 31 03:05:22 PM PDT 24 |
28725101329 ps |
| T692 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.1669686479 |
|
|
Mar 31 03:07:09 PM PDT 24 |
Mar 31 03:33:35 PM PDT 24 |
22432604482 ps |
| T693 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.571191697 |
|
|
Mar 31 03:03:40 PM PDT 24 |
Mar 31 03:09:11 PM PDT 24 |
23813794168 ps |
| T694 |
/workspace/coverage/default/24.sram_ctrl_smoke.3778357661 |
|
|
Mar 31 03:05:09 PM PDT 24 |
Mar 31 03:05:23 PM PDT 24 |
1037804000 ps |
| T695 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.367363341 |
|
|
Mar 31 03:01:37 PM PDT 24 |
Mar 31 03:02:26 PM PDT 24 |
8450570484 ps |
| T696 |
/workspace/coverage/default/25.sram_ctrl_executable.3807450621 |
|
|
Mar 31 03:05:43 PM PDT 24 |
Mar 31 03:18:37 PM PDT 24 |
54023502452 ps |
| T697 |
/workspace/coverage/default/30.sram_ctrl_bijection.1150901677 |
|
|
Mar 31 03:07:10 PM PDT 24 |
Mar 31 03:38:15 PM PDT 24 |
159890809039 ps |
| T698 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1593715737 |
|
|
Mar 31 03:03:48 PM PDT 24 |
Mar 31 03:03:49 PM PDT 24 |
39022403 ps |
| T699 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1044687824 |
|
|
Mar 31 03:06:16 PM PDT 24 |
Mar 31 03:10:06 PM PDT 24 |
107872842593 ps |
| T700 |
/workspace/coverage/default/10.sram_ctrl_alert_test.563302410 |
|
|
Mar 31 03:02:15 PM PDT 24 |
Mar 31 03:02:16 PM PDT 24 |
26182336 ps |
| T701 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2483252426 |
|
|
Mar 31 03:02:31 PM PDT 24 |
Mar 31 03:05:48 PM PDT 24 |
3507951234 ps |
| T702 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2897784874 |
|
|
Mar 31 03:02:22 PM PDT 24 |
Mar 31 03:07:32 PM PDT 24 |
50822827511 ps |
| T703 |
/workspace/coverage/default/11.sram_ctrl_regwen.4021120507 |
|
|
Mar 31 03:02:14 PM PDT 24 |
Mar 31 03:03:02 PM PDT 24 |
7736672990 ps |
| T704 |
/workspace/coverage/default/8.sram_ctrl_stress_all.3451533624 |
|
|
Mar 31 03:01:46 PM PDT 24 |
Mar 31 04:41:05 PM PDT 24 |
277338272017 ps |
| T705 |
/workspace/coverage/default/27.sram_ctrl_alert_test.888599591 |
|
|
Mar 31 03:06:28 PM PDT 24 |
Mar 31 03:06:29 PM PDT 24 |
15669236 ps |
| T706 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2051251084 |
|
|
Mar 31 03:01:59 PM PDT 24 |
Mar 31 03:07:24 PM PDT 24 |
43029381691 ps |
| T707 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.949098830 |
|
|
Mar 31 03:00:29 PM PDT 24 |
Mar 31 03:08:06 PM PDT 24 |
28318935786 ps |
| T708 |
/workspace/coverage/default/19.sram_ctrl_regwen.220478098 |
|
|
Mar 31 03:03:55 PM PDT 24 |
Mar 31 03:11:59 PM PDT 24 |
10018898335 ps |
| T709 |
/workspace/coverage/default/34.sram_ctrl_executable.2149688200 |
|
|
Mar 31 03:08:27 PM PDT 24 |
Mar 31 03:22:20 PM PDT 24 |
34803972662 ps |
| T710 |
/workspace/coverage/default/33.sram_ctrl_smoke.3231859730 |
|
|
Mar 31 03:08:08 PM PDT 24 |
Mar 31 03:08:16 PM PDT 24 |
4241646457 ps |
| T711 |
/workspace/coverage/default/32.sram_ctrl_regwen.3383261216 |
|
|
Mar 31 03:08:03 PM PDT 24 |
Mar 31 03:22:34 PM PDT 24 |
17259804827 ps |
| T712 |
/workspace/coverage/default/29.sram_ctrl_regwen.3506706679 |
|
|
Mar 31 03:07:04 PM PDT 24 |
Mar 31 03:27:28 PM PDT 24 |
120377997274 ps |
| T713 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1247694516 |
|
|
Mar 31 03:02:03 PM PDT 24 |
Mar 31 03:02:12 PM PDT 24 |
722958437 ps |
| T714 |
/workspace/coverage/default/18.sram_ctrl_executable.1175859234 |
|
|
Mar 31 03:03:39 PM PDT 24 |
Mar 31 03:20:54 PM PDT 24 |
83572787731 ps |
| T715 |
/workspace/coverage/default/40.sram_ctrl_bijection.1817926799 |
|
|
Mar 31 03:10:16 PM PDT 24 |
Mar 31 03:45:30 PM PDT 24 |
467806254683 ps |
| T716 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3644619852 |
|
|
Mar 31 03:01:29 PM PDT 24 |
Mar 31 03:02:30 PM PDT 24 |
10503723131 ps |
| T717 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1787399461 |
|
|
Mar 31 03:08:15 PM PDT 24 |
Mar 31 03:08:34 PM PDT 24 |
1522159414 ps |
| T718 |
/workspace/coverage/default/29.sram_ctrl_smoke.1043321339 |
|
|
Mar 31 03:06:51 PM PDT 24 |
Mar 31 03:09:01 PM PDT 24 |
3093504696 ps |
| T719 |
/workspace/coverage/default/24.sram_ctrl_alert_test.268695839 |
|
|
Mar 31 03:05:33 PM PDT 24 |
Mar 31 03:05:34 PM PDT 24 |
27859982 ps |
| T720 |
/workspace/coverage/default/43.sram_ctrl_stress_all.3334857567 |
|
|
Mar 31 03:11:43 PM PDT 24 |
Mar 31 04:15:58 PM PDT 24 |
165666607686 ps |
| T721 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3947644369 |
|
|
Mar 31 03:09:25 PM PDT 24 |
Mar 31 03:10:20 PM PDT 24 |
3082604604 ps |
| T722 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3448197939 |
|
|
Mar 31 03:11:55 PM PDT 24 |
Mar 31 03:20:23 PM PDT 24 |
17834101589 ps |
| T723 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.1094160605 |
|
|
Mar 31 03:07:04 PM PDT 24 |
Mar 31 03:18:34 PM PDT 24 |
12846327057 ps |
| T27 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1462434440 |
|
|
Mar 31 03:00:52 PM PDT 24 |
Mar 31 03:00:56 PM PDT 24 |
369718092 ps |
| T724 |
/workspace/coverage/default/31.sram_ctrl_bijection.1264999084 |
|
|
Mar 31 03:07:33 PM PDT 24 |
Mar 31 03:21:10 PM PDT 24 |
38554695310 ps |
| T725 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1820534655 |
|
|
Mar 31 03:01:04 PM PDT 24 |
Mar 31 03:03:23 PM PDT 24 |
5684647777 ps |
| T726 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.3073285389 |
|
|
Mar 31 03:04:08 PM PDT 24 |
Mar 31 03:18:13 PM PDT 24 |
24085686284 ps |
| T727 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4127435653 |
|
|
Mar 31 03:01:00 PM PDT 24 |
Mar 31 03:02:15 PM PDT 24 |
3178219252 ps |
| T728 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.4273728974 |
|
|
Mar 31 03:12:13 PM PDT 24 |
Mar 31 03:12:50 PM PDT 24 |
4861284710 ps |
| T729 |
/workspace/coverage/default/0.sram_ctrl_bijection.1361997088 |
|
|
Mar 31 03:00:10 PM PDT 24 |
Mar 31 03:11:43 PM PDT 24 |
42496137681 ps |
| T730 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2735375703 |
|
|
Mar 31 03:13:05 PM PDT 24 |
Mar 31 04:29:50 PM PDT 24 |
73599140952 ps |
| T731 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.185922032 |
|
|
Mar 31 03:08:27 PM PDT 24 |
Mar 31 03:30:01 PM PDT 24 |
89994794694 ps |
| T732 |
/workspace/coverage/default/37.sram_ctrl_executable.3687117662 |
|
|
Mar 31 03:09:24 PM PDT 24 |
Mar 31 03:14:04 PM PDT 24 |
5916832093 ps |
| T733 |
/workspace/coverage/default/39.sram_ctrl_partial_access.330762094 |
|
|
Mar 31 03:09:52 PM PDT 24 |
Mar 31 03:10:13 PM PDT 24 |
17588744849 ps |
| T734 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3650904930 |
|
|
Mar 31 03:03:02 PM PDT 24 |
Mar 31 03:03:27 PM PDT 24 |
982840864 ps |
| T735 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1162229155 |
|
|
Mar 31 03:02:17 PM PDT 24 |
Mar 31 03:04:45 PM PDT 24 |
22254107564 ps |
| T736 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.584361709 |
|
|
Mar 31 03:00:27 PM PDT 24 |
Mar 31 03:00:31 PM PDT 24 |
348336397 ps |
| T737 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3176651320 |
|
|
Mar 31 03:12:11 PM PDT 24 |
Mar 31 03:12:36 PM PDT 24 |
14107448926 ps |
| T738 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.4101451843 |
|
|
Mar 31 03:07:47 PM PDT 24 |
Mar 31 03:24:40 PM PDT 24 |
43076505940 ps |
| T739 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1997016424 |
|
|
Mar 31 03:04:15 PM PDT 24 |
Mar 31 03:05:02 PM PDT 24 |
6264381216 ps |
| T740 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.739902926 |
|
|
Mar 31 03:02:48 PM PDT 24 |
Mar 31 03:03:24 PM PDT 24 |
5949531115 ps |
| T741 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.3367732426 |
|
|
Mar 31 03:03:41 PM PDT 24 |
Mar 31 03:16:14 PM PDT 24 |
19591378709 ps |
| T742 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.1688931873 |
|
|
Mar 31 03:12:41 PM PDT 24 |
Mar 31 03:15:09 PM PDT 24 |
27500804870 ps |
| T743 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2532639649 |
|
|
Mar 31 03:13:11 PM PDT 24 |
Mar 31 03:16:22 PM PDT 24 |
11120992166 ps |
| T744 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1875483704 |
|
|
Mar 31 03:02:05 PM PDT 24 |
Mar 31 03:02:17 PM PDT 24 |
1365107963 ps |
| T745 |
/workspace/coverage/default/43.sram_ctrl_bijection.2591603520 |
|
|
Mar 31 03:11:25 PM PDT 24 |
Mar 31 03:23:02 PM PDT 24 |
173446251163 ps |
| T746 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1726174358 |
|
|
Mar 31 03:06:52 PM PDT 24 |
Mar 31 03:50:25 PM PDT 24 |
55607309703 ps |
| T747 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3534397719 |
|
|
Mar 31 03:01:37 PM PDT 24 |
Mar 31 03:06:27 PM PDT 24 |
86399546127 ps |
| T748 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1944737110 |
|
|
Mar 31 03:03:13 PM PDT 24 |
Mar 31 03:03:57 PM PDT 24 |
10516075314 ps |
| T749 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2073536294 |
|
|
Mar 31 03:00:23 PM PDT 24 |
Mar 31 03:01:38 PM PDT 24 |
1622412824 ps |
| T750 |
/workspace/coverage/default/26.sram_ctrl_stress_all.2890922391 |
|
|
Mar 31 03:06:06 PM PDT 24 |
Mar 31 04:08:26 PM PDT 24 |
1147357825063 ps |
| T751 |
/workspace/coverage/default/3.sram_ctrl_regwen.2937987733 |
|
|
Mar 31 03:00:39 PM PDT 24 |
Mar 31 03:13:45 PM PDT 24 |
3584345685 ps |
| T752 |
/workspace/coverage/default/30.sram_ctrl_executable.2952308886 |
|
|
Mar 31 03:07:22 PM PDT 24 |
Mar 31 03:17:59 PM PDT 24 |
21109699012 ps |
| T753 |
/workspace/coverage/default/44.sram_ctrl_regwen.2719188364 |
|
|
Mar 31 03:11:53 PM PDT 24 |
Mar 31 03:26:12 PM PDT 24 |
52355301142 ps |
| T754 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.4009468592 |
|
|
Mar 31 03:08:07 PM PDT 24 |
Mar 31 03:12:26 PM PDT 24 |
23675023324 ps |
| T755 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3792126437 |
|
|
Mar 31 03:02:24 PM PDT 24 |
Mar 31 03:07:08 PM PDT 24 |
17578050349 ps |
| T756 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.3514913353 |
|
|
Mar 31 03:07:54 PM PDT 24 |
Mar 31 03:09:49 PM PDT 24 |
7320554253 ps |
| T757 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.1947714506 |
|
|
Mar 31 03:02:47 PM PDT 24 |
Mar 31 03:04:10 PM PDT 24 |
15160321492 ps |
| T758 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2059536296 |
|
|
Mar 31 03:01:46 PM PDT 24 |
Mar 31 03:05:00 PM PDT 24 |
2665080646 ps |
| T759 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.2636120597 |
|
|
Mar 31 03:04:46 PM PDT 24 |
Mar 31 03:07:24 PM PDT 24 |
43063553098 ps |
| T760 |
/workspace/coverage/default/0.sram_ctrl_executable.2617623206 |
|
|
Mar 31 03:00:12 PM PDT 24 |
Mar 31 03:03:44 PM PDT 24 |
11646320999 ps |
| T761 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.1794009956 |
|
|
Mar 31 03:10:56 PM PDT 24 |
Mar 31 03:32:01 PM PDT 24 |
11681234024 ps |
| T762 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.3592774112 |
|
|
Mar 31 03:00:56 PM PDT 24 |
Mar 31 03:03:32 PM PDT 24 |
17441185882 ps |
| T763 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1008651533 |
|
|
Mar 31 03:09:10 PM PDT 24 |
Mar 31 03:10:23 PM PDT 24 |
11360888113 ps |
| T764 |
/workspace/coverage/default/20.sram_ctrl_regwen.613344658 |
|
|
Mar 31 03:04:07 PM PDT 24 |
Mar 31 03:18:21 PM PDT 24 |
15571241347 ps |
| T765 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2471697959 |
|
|
Mar 31 03:13:45 PM PDT 24 |
Mar 31 03:18:37 PM PDT 24 |
18084746947 ps |
| T766 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.2869835298 |
|
|
Mar 31 03:05:34 PM PDT 24 |
Mar 31 03:12:08 PM PDT 24 |
5428282242 ps |
| T767 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2908234711 |
|
|
Mar 31 03:02:22 PM PDT 24 |
Mar 31 03:20:18 PM PDT 24 |
36827738458 ps |
| T768 |
/workspace/coverage/default/32.sram_ctrl_bijection.456105144 |
|
|
Mar 31 03:07:53 PM PDT 24 |
Mar 31 03:36:47 PM PDT 24 |
26042433164 ps |
| T769 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.995280579 |
|
|
Mar 31 03:07:04 PM PDT 24 |
Mar 31 03:08:26 PM PDT 24 |
41770602993 ps |
| T770 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.249173644 |
|
|
Mar 31 03:02:46 PM PDT 24 |
Mar 31 03:02:55 PM PDT 24 |
724269933 ps |
| T771 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.415797551 |
|
|
Mar 31 03:03:40 PM PDT 24 |
Mar 31 03:03:48 PM PDT 24 |
2808934459 ps |
| T772 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.665612170 |
|
|
Mar 31 03:03:55 PM PDT 24 |
Mar 31 03:05:16 PM PDT 24 |
41849868559 ps |
| T773 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1716336437 |
|
|
Mar 31 03:09:56 PM PDT 24 |
Mar 31 03:12:00 PM PDT 24 |
6253698323 ps |
| T774 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.367413519 |
|
|
Mar 31 03:10:17 PM PDT 24 |
Mar 31 03:16:24 PM PDT 24 |
18686611100 ps |
| T775 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.241311520 |
|
|
Mar 31 03:03:10 PM PDT 24 |
Mar 31 03:06:30 PM PDT 24 |
3257613994 ps |
| T776 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2937271486 |
|
|
Mar 31 03:02:45 PM PDT 24 |
Mar 31 03:04:49 PM PDT 24 |
9792335051 ps |
| T777 |
/workspace/coverage/default/1.sram_ctrl_smoke.2637300999 |
|
|
Mar 31 03:00:17 PM PDT 24 |
Mar 31 03:00:37 PM PDT 24 |
1883069358 ps |
| T778 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.1115546556 |
|
|
Mar 31 03:07:48 PM PDT 24 |
Mar 31 03:07:51 PM PDT 24 |
873180117 ps |
| T779 |
/workspace/coverage/default/17.sram_ctrl_alert_test.2653056632 |
|
|
Mar 31 03:03:34 PM PDT 24 |
Mar 31 03:03:34 PM PDT 24 |
11918434 ps |
| T780 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.1009949902 |
|
|
Mar 31 03:09:04 PM PDT 24 |
Mar 31 03:09:08 PM PDT 24 |
691583738 ps |
| T781 |
/workspace/coverage/default/33.sram_ctrl_executable.1518098373 |
|
|
Mar 31 03:08:15 PM PDT 24 |
Mar 31 03:32:11 PM PDT 24 |
21738388736 ps |
| T782 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1548222987 |
|
|
Mar 31 03:01:13 PM PDT 24 |
Mar 31 03:01:16 PM PDT 24 |
1401882645 ps |
| T783 |
/workspace/coverage/default/7.sram_ctrl_partial_access.3437488646 |
|
|
Mar 31 03:01:22 PM PDT 24 |
Mar 31 03:01:33 PM PDT 24 |
770344721 ps |
| T784 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.2828610187 |
|
|
Mar 31 03:04:29 PM PDT 24 |
Mar 31 03:05:45 PM PDT 24 |
5104824704 ps |
| T785 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.282342864 |
|
|
Mar 31 03:06:23 PM PDT 24 |
Mar 31 03:06:50 PM PDT 24 |
2377811486 ps |
| T786 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.4003719988 |
|
|
Mar 31 03:09:45 PM PDT 24 |
Mar 31 03:14:16 PM PDT 24 |
8991549523 ps |
| T787 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1826624507 |
|
|
Mar 31 03:11:32 PM PDT 24 |
Mar 31 03:12:56 PM PDT 24 |
62619837835 ps |
| T788 |
/workspace/coverage/default/13.sram_ctrl_smoke.1354324197 |
|
|
Mar 31 03:02:30 PM PDT 24 |
Mar 31 03:02:36 PM PDT 24 |
6971221098 ps |
| T789 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1399968361 |
|
|
Mar 31 03:00:11 PM PDT 24 |
Mar 31 03:00:22 PM PDT 24 |
1188909668 ps |
| T790 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1544821837 |
|
|
Mar 31 03:01:41 PM PDT 24 |
Mar 31 03:03:34 PM PDT 24 |
894395703 ps |
| T791 |
/workspace/coverage/default/10.sram_ctrl_regwen.2373710980 |
|
|
Mar 31 03:02:05 PM PDT 24 |
Mar 31 03:06:36 PM PDT 24 |
7181720546 ps |
| T792 |
/workspace/coverage/default/12.sram_ctrl_smoke.2865898689 |
|
|
Mar 31 03:02:23 PM PDT 24 |
Mar 31 03:03:14 PM PDT 24 |
7800097171 ps |
| T793 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3942296888 |
|
|
Mar 31 03:02:39 PM PDT 24 |
Mar 31 03:08:09 PM PDT 24 |
11718976536 ps |
| T794 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.260472804 |
|
|
Mar 31 03:07:15 PM PDT 24 |
Mar 31 03:08:43 PM PDT 24 |
1605787518 ps |
| T795 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.748557473 |
|
|
Mar 31 03:01:22 PM PDT 24 |
Mar 31 03:02:26 PM PDT 24 |
1773194432 ps |
| T796 |
/workspace/coverage/default/49.sram_ctrl_executable.1082071122 |
|
|
Mar 31 03:13:43 PM PDT 24 |
Mar 31 03:20:47 PM PDT 24 |
6649606676 ps |