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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.81 96.99 100.00 100.00 98.60 99.70 98.52


Total test records in report: 1035
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T545 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3083067485 May 05 12:48:15 PM PDT 24 May 05 12:49:09 PM PDT 24 1222339627 ps
T546 /workspace/coverage/default/48.sram_ctrl_regwen.1701860703 May 05 12:56:33 PM PDT 24 May 05 12:59:09 PM PDT 24 2683807575 ps
T547 /workspace/coverage/default/20.sram_ctrl_bijection.4232043365 May 05 12:49:49 PM PDT 24 May 05 01:00:50 PM PDT 24 35251951065 ps
T548 /workspace/coverage/default/15.sram_ctrl_stress_all.501271818 May 05 12:49:06 PM PDT 24 May 05 02:42:35 PM PDT 24 257041103737 ps
T549 /workspace/coverage/default/27.sram_ctrl_max_throughput.2610146456 May 05 12:51:16 PM PDT 24 May 05 12:51:26 PM PDT 24 2715621700 ps
T550 /workspace/coverage/default/22.sram_ctrl_partial_access.1464477999 May 05 12:50:12 PM PDT 24 May 05 12:50:37 PM PDT 24 7750437326 ps
T551 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2840326308 May 05 12:49:27 PM PDT 24 May 05 12:54:58 PM PDT 24 75978791928 ps
T552 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3273569476 May 05 12:51:58 PM PDT 24 May 05 12:53:48 PM PDT 24 818160883 ps
T553 /workspace/coverage/default/45.sram_ctrl_bijection.317377325 May 05 12:55:39 PM PDT 24 May 05 01:09:09 PM PDT 24 101030619197 ps
T554 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3235458478 May 05 12:47:55 PM PDT 24 May 05 12:49:16 PM PDT 24 3277536299 ps
T555 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.309185442 May 05 12:53:36 PM PDT 24 May 05 01:13:10 PM PDT 24 6959672330 ps
T556 /workspace/coverage/default/17.sram_ctrl_bijection.1316007017 May 05 12:49:14 PM PDT 24 May 05 01:10:28 PM PDT 24 57135601728 ps
T557 /workspace/coverage/default/0.sram_ctrl_lc_escalation.2393502028 May 05 12:48:01 PM PDT 24 May 05 12:48:20 PM PDT 24 6691352814 ps
T558 /workspace/coverage/default/10.sram_ctrl_stress_all.2723596666 May 05 12:48:30 PM PDT 24 May 05 01:31:49 PM PDT 24 300896518210 ps
T559 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3451385791 May 05 12:54:38 PM PDT 24 May 05 12:55:52 PM PDT 24 10714336991 ps
T560 /workspace/coverage/default/38.sram_ctrl_stress_all.455942656 May 05 12:54:14 PM PDT 24 May 05 01:32:20 PM PDT 24 53863900506 ps
T561 /workspace/coverage/default/36.sram_ctrl_executable.3981559328 May 05 12:53:35 PM PDT 24 May 05 01:02:45 PM PDT 24 6642279645 ps
T562 /workspace/coverage/default/9.sram_ctrl_multiple_keys.76995878 May 05 12:48:24 PM PDT 24 May 05 12:58:37 PM PDT 24 17752602408 ps
T563 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.553375098 May 05 12:55:11 PM PDT 24 May 05 12:56:26 PM PDT 24 15644407037 ps
T564 /workspace/coverage/default/3.sram_ctrl_alert_test.91123880 May 05 12:48:02 PM PDT 24 May 05 12:48:04 PM PDT 24 56445178 ps
T565 /workspace/coverage/default/25.sram_ctrl_max_throughput.989732246 May 05 12:50:49 PM PDT 24 May 05 12:50:57 PM PDT 24 13253876901 ps
T566 /workspace/coverage/default/13.sram_ctrl_lc_escalation.1415268051 May 05 12:48:45 PM PDT 24 May 05 12:50:15 PM PDT 24 58377605810 ps
T567 /workspace/coverage/default/1.sram_ctrl_max_throughput.2684848475 May 05 12:47:54 PM PDT 24 May 05 12:48:58 PM PDT 24 5712493921 ps
T568 /workspace/coverage/default/30.sram_ctrl_regwen.4115732142 May 05 12:52:01 PM PDT 24 May 05 01:00:30 PM PDT 24 34735712182 ps
T110 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.2795894757 May 05 12:51:21 PM PDT 24 May 05 12:51:34 PM PDT 24 2037349058 ps
T569 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.846210634 May 05 12:48:31 PM PDT 24 May 05 01:04:14 PM PDT 24 21554047793 ps
T570 /workspace/coverage/default/35.sram_ctrl_lc_escalation.2598549179 May 05 12:53:19 PM PDT 24 May 05 12:54:21 PM PDT 24 19142848013 ps
T571 /workspace/coverage/default/38.sram_ctrl_bijection.420645265 May 05 12:54:03 PM PDT 24 May 05 01:30:47 PM PDT 24 137969325423 ps
T572 /workspace/coverage/default/5.sram_ctrl_regwen.4121249447 May 05 12:48:03 PM PDT 24 May 05 01:01:43 PM PDT 24 140326218788 ps
T573 /workspace/coverage/default/42.sram_ctrl_smoke.2437331747 May 05 12:54:57 PM PDT 24 May 05 12:55:11 PM PDT 24 6087333348 ps
T574 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1459149233 May 05 12:48:39 PM PDT 24 May 05 12:49:13 PM PDT 24 3037414192 ps
T575 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2482009614 May 05 12:55:23 PM PDT 24 May 05 01:03:26 PM PDT 24 12461972817 ps
T576 /workspace/coverage/default/43.sram_ctrl_bijection.3774276603 May 05 12:55:12 PM PDT 24 May 05 01:04:20 PM PDT 24 139046278695 ps
T577 /workspace/coverage/default/22.sram_ctrl_ram_cfg.424602129 May 05 12:50:19 PM PDT 24 May 05 12:50:23 PM PDT 24 380901709 ps
T578 /workspace/coverage/default/20.sram_ctrl_smoke.1301481854 May 05 12:49:46 PM PDT 24 May 05 12:50:28 PM PDT 24 773512258 ps
T579 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1300891514 May 05 12:56:33 PM PDT 24 May 05 12:56:37 PM PDT 24 1355561280 ps
T86 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3633107305 May 05 12:54:07 PM PDT 24 May 05 12:55:20 PM PDT 24 10893085508 ps
T580 /workspace/coverage/default/24.sram_ctrl_alert_test.1310306504 May 05 12:50:49 PM PDT 24 May 05 12:50:51 PM PDT 24 11289596 ps
T581 /workspace/coverage/default/49.sram_ctrl_mem_walk.4225988778 May 05 12:56:49 PM PDT 24 May 05 12:58:48 PM PDT 24 4113766776 ps
T582 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1122768366 May 05 12:47:55 PM PDT 24 May 05 12:48:33 PM PDT 24 4751745977 ps
T583 /workspace/coverage/default/4.sram_ctrl_lc_escalation.1465630528 May 05 12:48:02 PM PDT 24 May 05 12:49:14 PM PDT 24 11783255071 ps
T584 /workspace/coverage/default/19.sram_ctrl_multiple_keys.1686943888 May 05 12:49:40 PM PDT 24 May 05 12:57:03 PM PDT 24 6513492100 ps
T585 /workspace/coverage/default/19.sram_ctrl_executable.2197693202 May 05 12:49:41 PM PDT 24 May 05 01:05:10 PM PDT 24 80688591136 ps
T586 /workspace/coverage/default/16.sram_ctrl_alert_test.4174421398 May 05 12:49:15 PM PDT 24 May 05 12:49:16 PM PDT 24 17771319 ps
T587 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.130149346 May 05 12:48:13 PM PDT 24 May 05 12:55:18 PM PDT 24 73417788185 ps
T588 /workspace/coverage/default/16.sram_ctrl_mem_walk.1340671814 May 05 12:49:10 PM PDT 24 May 05 12:53:52 PM PDT 24 13804541185 ps
T589 /workspace/coverage/default/47.sram_ctrl_lc_escalation.3958316361 May 05 12:56:12 PM PDT 24 May 05 12:56:30 PM PDT 24 2880485364 ps
T590 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.977252989 May 05 12:56:27 PM PDT 24 May 05 01:04:26 PM PDT 24 54177537897 ps
T591 /workspace/coverage/default/2.sram_ctrl_smoke.4280146615 May 05 12:48:00 PM PDT 24 May 05 12:49:17 PM PDT 24 2553750041 ps
T592 /workspace/coverage/default/9.sram_ctrl_bijection.1234859013 May 05 12:48:22 PM PDT 24 May 05 01:01:12 PM PDT 24 43828955863 ps
T593 /workspace/coverage/default/40.sram_ctrl_lc_escalation.627312661 May 05 12:54:33 PM PDT 24 May 05 12:55:44 PM PDT 24 22017326222 ps
T594 /workspace/coverage/default/38.sram_ctrl_alert_test.3297460672 May 05 12:54:12 PM PDT 24 May 05 12:54:13 PM PDT 24 12462458 ps
T595 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.823634858 May 05 12:50:50 PM PDT 24 May 05 12:54:11 PM PDT 24 36186667852 ps
T596 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3259775051 May 05 12:48:14 PM PDT 24 May 05 12:48:36 PM PDT 24 2840431894 ps
T597 /workspace/coverage/default/39.sram_ctrl_alert_test.2537525382 May 05 12:54:28 PM PDT 24 May 05 12:54:29 PM PDT 24 71616896 ps
T598 /workspace/coverage/default/30.sram_ctrl_alert_test.74807367 May 05 12:52:12 PM PDT 24 May 05 12:52:13 PM PDT 24 21684667 ps
T599 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1463760816 May 05 12:50:56 PM PDT 24 May 05 12:53:21 PM PDT 24 10356169887 ps
T600 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1668901033 May 05 12:49:12 PM PDT 24 May 05 12:49:20 PM PDT 24 710903022 ps
T601 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3200485621 May 05 12:47:58 PM PDT 24 May 05 12:50:01 PM PDT 24 1590068738 ps
T602 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.502057833 May 05 12:50:13 PM PDT 24 May 05 01:12:21 PM PDT 24 65717262160 ps
T603 /workspace/coverage/default/48.sram_ctrl_partial_access.953703063 May 05 12:56:22 PM PDT 24 May 05 12:56:37 PM PDT 24 4149257819 ps
T604 /workspace/coverage/default/12.sram_ctrl_partial_access.1984685837 May 05 12:48:38 PM PDT 24 May 05 12:49:12 PM PDT 24 3036180463 ps
T605 /workspace/coverage/default/32.sram_ctrl_smoke.2807990438 May 05 12:52:28 PM PDT 24 May 05 12:53:43 PM PDT 24 812334824 ps
T606 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1671693938 May 05 12:54:53 PM PDT 24 May 05 12:55:25 PM PDT 24 4367321138 ps
T607 /workspace/coverage/default/48.sram_ctrl_smoke.197695431 May 05 12:56:20 PM PDT 24 May 05 12:56:38 PM PDT 24 3296674714 ps
T608 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2788016659 May 05 12:49:45 PM PDT 24 May 05 12:53:44 PM PDT 24 7862457013 ps
T609 /workspace/coverage/default/31.sram_ctrl_regwen.2995610881 May 05 12:52:14 PM PDT 24 May 05 01:06:52 PM PDT 24 3652421709 ps
T610 /workspace/coverage/default/9.sram_ctrl_partial_access.2247265267 May 05 12:48:23 PM PDT 24 May 05 12:48:38 PM PDT 24 3391764621 ps
T611 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.180758142 May 05 12:51:17 PM PDT 24 May 05 12:57:15 PM PDT 24 9258293168 ps
T612 /workspace/coverage/default/7.sram_ctrl_stress_all.812771135 May 05 12:48:14 PM PDT 24 May 05 01:56:35 PM PDT 24 29328907656 ps
T613 /workspace/coverage/default/30.sram_ctrl_mem_walk.3024328108 May 05 12:52:03 PM PDT 24 May 05 12:56:40 PM PDT 24 152903002674 ps
T614 /workspace/coverage/default/33.sram_ctrl_bijection.459815227 May 05 12:52:47 PM PDT 24 May 05 01:10:31 PM PDT 24 16426072712 ps
T615 /workspace/coverage/default/6.sram_ctrl_stress_all.3697927974 May 05 12:48:16 PM PDT 24 May 05 02:34:18 PM PDT 24 80849235204 ps
T616 /workspace/coverage/default/40.sram_ctrl_max_throughput.2080752704 May 05 12:54:34 PM PDT 24 May 05 12:55:00 PM PDT 24 733169041 ps
T111 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2343792588 May 05 12:51:54 PM PDT 24 May 05 12:53:04 PM PDT 24 1033084947 ps
T617 /workspace/coverage/default/43.sram_ctrl_partial_access.2151408435 May 05 12:55:18 PM PDT 24 May 05 12:55:40 PM PDT 24 3023061071 ps
T618 /workspace/coverage/default/48.sram_ctrl_max_throughput.4064144670 May 05 12:56:27 PM PDT 24 May 05 12:58:54 PM PDT 24 6953025575 ps
T619 /workspace/coverage/default/45.sram_ctrl_lc_escalation.196074869 May 05 12:55:51 PM PDT 24 May 05 12:57:06 PM PDT 24 46605003884 ps
T620 /workspace/coverage/default/27.sram_ctrl_executable.1012595622 May 05 12:51:21 PM PDT 24 May 05 01:14:31 PM PDT 24 60904262245 ps
T621 /workspace/coverage/default/5.sram_ctrl_alert_test.925051025 May 05 12:48:10 PM PDT 24 May 05 12:48:11 PM PDT 24 36281860 ps
T622 /workspace/coverage/default/23.sram_ctrl_partial_access.3751743067 May 05 12:50:21 PM PDT 24 May 05 12:50:40 PM PDT 24 2466891195 ps
T623 /workspace/coverage/default/36.sram_ctrl_lc_escalation.1665571025 May 05 12:53:37 PM PDT 24 May 05 12:54:44 PM PDT 24 38244853921 ps
T87 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3238645435 May 05 12:55:49 PM PDT 24 May 05 12:57:07 PM PDT 24 9805728489 ps
T624 /workspace/coverage/default/4.sram_ctrl_mem_walk.3452323917 May 05 12:48:05 PM PDT 24 May 05 12:52:45 PM PDT 24 28664044098 ps
T625 /workspace/coverage/default/2.sram_ctrl_lc_escalation.1875960652 May 05 12:48:01 PM PDT 24 May 05 12:48:36 PM PDT 24 21512256964 ps
T626 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2923267793 May 05 12:49:56 PM PDT 24 May 05 12:51:09 PM PDT 24 21782341887 ps
T627 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1696128950 May 05 12:48:28 PM PDT 24 May 05 12:51:49 PM PDT 24 15527936400 ps
T628 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.990094176 May 05 12:48:06 PM PDT 24 May 05 12:51:22 PM PDT 24 3651816691 ps
T629 /workspace/coverage/default/1.sram_ctrl_lc_escalation.1046136729 May 05 12:47:59 PM PDT 24 May 05 12:49:13 PM PDT 24 57801857118 ps
T630 /workspace/coverage/default/2.sram_ctrl_multiple_keys.2623819705 May 05 12:47:56 PM PDT 24 May 05 01:13:55 PM PDT 24 26306296416 ps
T631 /workspace/coverage/default/12.sram_ctrl_regwen.2920083259 May 05 12:48:39 PM PDT 24 May 05 12:52:46 PM PDT 24 25622941108 ps
T632 /workspace/coverage/default/29.sram_ctrl_executable.3336971355 May 05 12:51:48 PM PDT 24 May 05 01:00:07 PM PDT 24 6490240501 ps
T633 /workspace/coverage/default/0.sram_ctrl_partial_access.2615904343 May 05 12:47:52 PM PDT 24 May 05 12:48:13 PM PDT 24 7854379749 ps
T634 /workspace/coverage/default/1.sram_ctrl_mem_walk.1366462770 May 05 12:47:55 PM PDT 24 May 05 12:49:59 PM PDT 24 1977190517 ps
T635 /workspace/coverage/default/32.sram_ctrl_regwen.3115967942 May 05 12:52:38 PM PDT 24 May 05 12:53:52 PM PDT 24 1916903145 ps
T636 /workspace/coverage/default/21.sram_ctrl_max_throughput.1937264203 May 05 12:50:13 PM PDT 24 May 05 12:50:43 PM PDT 24 1464930128 ps
T637 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.1649828681 May 05 12:51:37 PM PDT 24 May 05 12:52:37 PM PDT 24 956323657 ps
T638 /workspace/coverage/default/23.sram_ctrl_mem_walk.3492763022 May 05 12:50:31 PM PDT 24 May 05 12:53:04 PM PDT 24 37379853298 ps
T639 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.2208173226 May 05 12:54:23 PM PDT 24 May 05 12:56:23 PM PDT 24 1637605182 ps
T640 /workspace/coverage/default/12.sram_ctrl_max_throughput.937940033 May 05 12:48:44 PM PDT 24 May 05 12:49:44 PM PDT 24 767362515 ps
T641 /workspace/coverage/default/39.sram_ctrl_regwen.1097007165 May 05 12:54:23 PM PDT 24 May 05 12:56:34 PM PDT 24 8909301822 ps
T642 /workspace/coverage/default/42.sram_ctrl_mem_walk.3735568583 May 05 12:55:04 PM PDT 24 May 05 01:00:23 PM PDT 24 86017090891 ps
T643 /workspace/coverage/default/7.sram_ctrl_regwen.1756721011 May 05 12:48:12 PM PDT 24 May 05 12:57:12 PM PDT 24 29284607558 ps
T644 /workspace/coverage/default/5.sram_ctrl_multiple_keys.3468866128 May 05 12:48:10 PM PDT 24 May 05 12:51:39 PM PDT 24 31796711195 ps
T645 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1034709434 May 05 12:48:38 PM PDT 24 May 05 12:50:37 PM PDT 24 11504418262 ps
T646 /workspace/coverage/default/18.sram_ctrl_partial_access.215620763 May 05 12:49:26 PM PDT 24 May 05 12:49:31 PM PDT 24 923908066 ps
T647 /workspace/coverage/default/47.sram_ctrl_max_throughput.588409057 May 05 12:56:08 PM PDT 24 May 05 12:57:31 PM PDT 24 763952908 ps
T648 /workspace/coverage/default/43.sram_ctrl_max_throughput.2129231533 May 05 12:55:13 PM PDT 24 May 05 12:56:58 PM PDT 24 3849233317 ps
T649 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1413113675 May 05 12:55:29 PM PDT 24 May 05 12:56:42 PM PDT 24 12357778176 ps
T650 /workspace/coverage/default/3.sram_ctrl_lc_escalation.1919356403 May 05 12:48:05 PM PDT 24 May 05 12:49:15 PM PDT 24 44897679330 ps
T651 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3054415252 May 05 12:48:19 PM PDT 24 May 05 12:50:01 PM PDT 24 8454165953 ps
T652 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3212006257 May 05 12:52:14 PM PDT 24 May 05 12:52:21 PM PDT 24 700363978 ps
T653 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1283469673 May 05 12:51:16 PM PDT 24 May 05 12:51:33 PM PDT 24 2926758366 ps
T654 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.621948544 May 05 12:49:47 PM PDT 24 May 05 12:50:04 PM PDT 24 6994475222 ps
T655 /workspace/coverage/default/26.sram_ctrl_lc_escalation.4014336350 May 05 12:51:06 PM PDT 24 May 05 12:51:39 PM PDT 24 8809544682 ps
T656 /workspace/coverage/default/7.sram_ctrl_lc_escalation.677174333 May 05 12:48:10 PM PDT 24 May 05 12:49:36 PM PDT 24 84554954747 ps
T657 /workspace/coverage/default/24.sram_ctrl_mem_walk.2601980949 May 05 12:50:43 PM PDT 24 May 05 12:52:42 PM PDT 24 2059180545 ps
T658 /workspace/coverage/default/1.sram_ctrl_stress_all.572449000 May 05 12:47:54 PM PDT 24 May 05 02:12:26 PM PDT 24 141863095854 ps
T659 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3576970285 May 05 12:49:32 PM PDT 24 May 05 12:50:45 PM PDT 24 12341269677 ps
T660 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1455324059 May 05 12:56:12 PM PDT 24 May 05 12:58:10 PM PDT 24 2214595016 ps
T661 /workspace/coverage/default/26.sram_ctrl_alert_test.732569732 May 05 12:51:12 PM PDT 24 May 05 12:51:13 PM PDT 24 11810005 ps
T662 /workspace/coverage/default/9.sram_ctrl_ram_cfg.281849322 May 05 12:48:25 PM PDT 24 May 05 12:48:29 PM PDT 24 1443084001 ps
T663 /workspace/coverage/default/3.sram_ctrl_stress_all.3823854357 May 05 12:48:00 PM PDT 24 May 05 01:47:24 PM PDT 24 812270735662 ps
T664 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.3070560722 May 05 12:49:08 PM PDT 24 May 05 12:50:23 PM PDT 24 9819044662 ps
T665 /workspace/coverage/default/6.sram_ctrl_mem_walk.58407629 May 05 12:48:12 PM PDT 24 May 05 12:53:06 PM PDT 24 17935001006 ps
T666 /workspace/coverage/default/37.sram_ctrl_regwen.1566307172 May 05 12:53:57 PM PDT 24 May 05 12:59:55 PM PDT 24 4591066349 ps
T667 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.2214945991 May 05 12:49:11 PM PDT 24 May 05 12:55:17 PM PDT 24 21445752556 ps
T668 /workspace/coverage/default/32.sram_ctrl_partial_access.1410036071 May 05 12:52:31 PM PDT 24 May 05 12:52:49 PM PDT 24 873298437 ps
T669 /workspace/coverage/default/45.sram_ctrl_ram_cfg.2296490102 May 05 12:55:50 PM PDT 24 May 05 12:55:54 PM PDT 24 2244880973 ps
T670 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.4241534840 May 05 12:47:59 PM PDT 24 May 05 12:49:35 PM PDT 24 802742852 ps
T671 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.407316253 May 05 12:52:18 PM PDT 24 May 05 12:52:53 PM PDT 24 1941068747 ps
T672 /workspace/coverage/default/9.sram_ctrl_alert_test.3935955111 May 05 12:48:25 PM PDT 24 May 05 12:48:26 PM PDT 24 47372777 ps
T673 /workspace/coverage/default/8.sram_ctrl_smoke.3360782673 May 05 12:48:24 PM PDT 24 May 05 12:48:31 PM PDT 24 1477247393 ps
T674 /workspace/coverage/default/44.sram_ctrl_stress_all.3149971907 May 05 12:55:38 PM PDT 24 May 05 01:42:01 PM PDT 24 74615396994 ps
T675 /workspace/coverage/default/28.sram_ctrl_regwen.2985159978 May 05 12:51:34 PM PDT 24 May 05 01:04:46 PM PDT 24 18243561657 ps
T676 /workspace/coverage/default/12.sram_ctrl_executable.3972062171 May 05 12:48:40 PM PDT 24 May 05 01:02:14 PM PDT 24 40857154284 ps
T677 /workspace/coverage/default/2.sram_ctrl_stress_all.2456128049 May 05 12:48:05 PM PDT 24 May 05 01:02:38 PM PDT 24 121635066487 ps
T678 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2221986293 May 05 12:55:44 PM PDT 24 May 05 12:56:33 PM PDT 24 3121689737 ps
T679 /workspace/coverage/default/20.sram_ctrl_regwen.1171541736 May 05 12:49:55 PM PDT 24 May 05 12:54:28 PM PDT 24 3172644772 ps
T680 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3469254032 May 05 12:48:02 PM PDT 24 May 05 12:49:09 PM PDT 24 1542449683 ps
T681 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.1428773138 May 05 12:50:50 PM PDT 24 May 05 12:53:50 PM PDT 24 3165177341 ps
T682 /workspace/coverage/default/15.sram_ctrl_lc_escalation.1199595496 May 05 12:49:08 PM PDT 24 May 05 12:50:12 PM PDT 24 11102641845 ps
T683 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.292431324 May 05 12:48:18 PM PDT 24 May 05 12:50:47 PM PDT 24 39550401458 ps
T684 /workspace/coverage/default/39.sram_ctrl_lc_escalation.1354606663 May 05 12:54:15 PM PDT 24 May 05 12:55:28 PM PDT 24 11737055436 ps
T685 /workspace/coverage/default/47.sram_ctrl_smoke.4245997712 May 05 12:56:09 PM PDT 24 May 05 12:56:37 PM PDT 24 24635650443 ps
T686 /workspace/coverage/default/12.sram_ctrl_bijection.913735884 May 05 12:48:40 PM PDT 24 May 05 01:36:24 PM PDT 24 718584609500 ps
T687 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3399729070 May 05 12:55:33 PM PDT 24 May 05 12:57:57 PM PDT 24 4568876996 ps
T688 /workspace/coverage/default/26.sram_ctrl_regwen.4002352577 May 05 12:51:10 PM PDT 24 May 05 12:57:43 PM PDT 24 16135536014 ps
T689 /workspace/coverage/default/47.sram_ctrl_executable.413239844 May 05 12:56:14 PM PDT 24 May 05 01:10:02 PM PDT 24 39931228708 ps
T690 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2111663445 May 05 12:49:48 PM PDT 24 May 05 12:54:05 PM PDT 24 5554205024 ps
T691 /workspace/coverage/default/21.sram_ctrl_regwen.1225411405 May 05 12:50:13 PM PDT 24 May 05 01:06:45 PM PDT 24 59405694342 ps
T692 /workspace/coverage/default/17.sram_ctrl_max_throughput.3228473724 May 05 12:49:16 PM PDT 24 May 05 12:49:33 PM PDT 24 731885307 ps
T693 /workspace/coverage/default/18.sram_ctrl_alert_test.2539347002 May 05 12:49:38 PM PDT 24 May 05 12:49:39 PM PDT 24 40377162 ps
T694 /workspace/coverage/default/31.sram_ctrl_executable.314226259 May 05 12:52:13 PM PDT 24 May 05 01:04:54 PM PDT 24 30324027980 ps
T695 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2480567073 May 05 12:51:08 PM PDT 24 May 05 12:51:24 PM PDT 24 755087538 ps
T696 /workspace/coverage/default/22.sram_ctrl_mem_walk.2366012314 May 05 12:50:15 PM PDT 24 May 05 12:52:46 PM PDT 24 9319015086 ps
T697 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.2332667959 May 05 12:48:05 PM PDT 24 May 05 12:48:24 PM PDT 24 1144588851 ps
T698 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3295326319 May 05 12:52:39 PM PDT 24 May 05 12:54:39 PM PDT 24 6511846293 ps
T699 /workspace/coverage/default/39.sram_ctrl_partial_access.113150842 May 05 12:54:17 PM PDT 24 May 05 12:54:22 PM PDT 24 416844698 ps
T700 /workspace/coverage/default/3.sram_ctrl_ram_cfg.482378594 May 05 12:48:01 PM PDT 24 May 05 12:48:04 PM PDT 24 362603662 ps
T701 /workspace/coverage/default/24.sram_ctrl_stress_all.3844306394 May 05 12:50:47 PM PDT 24 May 05 01:30:13 PM PDT 24 18462146666 ps
T702 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2075695624 May 05 12:51:48 PM PDT 24 May 05 12:53:35 PM PDT 24 10901540910 ps
T703 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3862835484 May 05 12:51:31 PM PDT 24 May 05 12:51:58 PM PDT 24 751247430 ps
T704 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3704408750 May 05 12:52:47 PM PDT 24 May 05 12:56:14 PM PDT 24 3722132740 ps
T705 /workspace/coverage/default/13.sram_ctrl_mem_walk.3075946358 May 05 12:48:47 PM PDT 24 May 05 12:53:30 PM PDT 24 37253944644 ps
T706 /workspace/coverage/default/47.sram_ctrl_regwen.2204249646 May 05 12:56:13 PM PDT 24 May 05 01:13:36 PM PDT 24 67673506146 ps
T707 /workspace/coverage/default/19.sram_ctrl_mem_walk.3881094360 May 05 12:49:48 PM PDT 24 May 05 12:52:11 PM PDT 24 28715817120 ps
T708 /workspace/coverage/default/41.sram_ctrl_stress_all.3226365932 May 05 12:54:53 PM PDT 24 May 05 01:56:01 PM PDT 24 25860634299 ps
T709 /workspace/coverage/default/2.sram_ctrl_bijection.3913107532 May 05 12:47:59 PM PDT 24 May 05 01:07:39 PM PDT 24 17752355163 ps
T710 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.923837359 May 05 12:49:54 PM PDT 24 May 05 12:50:15 PM PDT 24 3110738689 ps
T711 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.154641765 May 05 12:56:08 PM PDT 24 May 05 01:02:54 PM PDT 24 24972434283 ps
T712 /workspace/coverage/default/8.sram_ctrl_lc_escalation.4073370394 May 05 12:48:18 PM PDT 24 May 05 12:49:47 PM PDT 24 31420515475 ps
T713 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4028343647 May 05 12:48:45 PM PDT 24 May 05 12:50:23 PM PDT 24 18687281168 ps
T714 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.922996412 May 05 12:48:01 PM PDT 24 May 05 12:52:18 PM PDT 24 52967495142 ps
T715 /workspace/coverage/default/40.sram_ctrl_mem_walk.719260741 May 05 12:54:39 PM PDT 24 May 05 12:57:13 PM PDT 24 41385368514 ps
T716 /workspace/coverage/default/5.sram_ctrl_executable.3665744495 May 05 12:48:06 PM PDT 24 May 05 12:51:53 PM PDT 24 4320962870 ps
T717 /workspace/coverage/default/13.sram_ctrl_regwen.2389947253 May 05 12:48:48 PM PDT 24 May 05 12:56:17 PM PDT 24 95293597837 ps
T718 /workspace/coverage/default/46.sram_ctrl_mem_walk.700968374 May 05 12:56:00 PM PDT 24 May 05 12:58:37 PM PDT 24 10752865478 ps
T719 /workspace/coverage/default/31.sram_ctrl_partial_access.3544324875 May 05 12:52:09 PM PDT 24 May 05 12:52:31 PM PDT 24 5733401660 ps
T720 /workspace/coverage/default/17.sram_ctrl_multiple_keys.2759172937 May 05 12:49:18 PM PDT 24 May 05 12:54:51 PM PDT 24 4874609653 ps
T721 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3222673854 May 05 12:48:18 PM PDT 24 May 05 12:59:21 PM PDT 24 43399703530 ps
T722 /workspace/coverage/default/14.sram_ctrl_smoke.840904015 May 05 12:48:54 PM PDT 24 May 05 12:49:18 PM PDT 24 3149153395 ps
T723 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.779543018 May 05 12:52:52 PM PDT 24 May 05 01:19:27 PM PDT 24 16756070148 ps
T724 /workspace/coverage/default/43.sram_ctrl_regwen.496114076 May 05 12:55:17 PM PDT 24 May 05 01:02:43 PM PDT 24 6819737880 ps
T725 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1040205823 May 05 12:48:18 PM PDT 24 May 05 12:51:35 PM PDT 24 3170857028 ps
T726 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.261174791 May 05 12:53:36 PM PDT 24 May 05 12:58:21 PM PDT 24 3779710725 ps
T727 /workspace/coverage/default/35.sram_ctrl_executable.2557765317 May 05 12:53:27 PM PDT 24 May 05 12:57:43 PM PDT 24 6232932306 ps
T728 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3930101032 May 05 12:49:15 PM PDT 24 May 05 12:49:23 PM PDT 24 13424439415 ps
T729 /workspace/coverage/default/31.sram_ctrl_max_throughput.2296194295 May 05 12:52:13 PM PDT 24 May 05 12:52:56 PM PDT 24 727557632 ps
T730 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.360989769 May 05 12:49:54 PM PDT 24 May 05 01:01:00 PM PDT 24 50790173402 ps
T731 /workspace/coverage/default/15.sram_ctrl_bijection.919106040 May 05 12:49:01 PM PDT 24 May 05 01:01:58 PM PDT 24 202212923362 ps
T732 /workspace/coverage/default/46.sram_ctrl_lc_escalation.1970991561 May 05 12:55:57 PM PDT 24 May 05 12:56:21 PM PDT 24 3810220746 ps
T733 /workspace/coverage/default/11.sram_ctrl_mem_walk.1538853501 May 05 12:48:35 PM PDT 24 May 05 12:52:29 PM PDT 24 16421720171 ps
T734 /workspace/coverage/default/10.sram_ctrl_regwen.1645402116 May 05 12:48:30 PM PDT 24 May 05 01:04:22 PM PDT 24 17525672007 ps
T735 /workspace/coverage/default/1.sram_ctrl_smoke.3420299546 May 05 12:47:55 PM PDT 24 May 05 12:48:02 PM PDT 24 695165381 ps
T736 /workspace/coverage/default/21.sram_ctrl_lc_escalation.2167931980 May 05 12:50:06 PM PDT 24 May 05 12:51:11 PM PDT 24 25219849497 ps
T737 /workspace/coverage/default/21.sram_ctrl_smoke.1708017918 May 05 12:49:59 PM PDT 24 May 05 12:50:07 PM PDT 24 494126975 ps
T738 /workspace/coverage/default/36.sram_ctrl_mem_walk.850658002 May 05 12:53:41 PM PDT 24 May 05 12:58:25 PM PDT 24 13910162157 ps
T739 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2296429797 May 05 12:47:53 PM PDT 24 May 05 12:50:46 PM PDT 24 36040426567 ps
T740 /workspace/coverage/default/32.sram_ctrl_ram_cfg.1599295798 May 05 12:52:41 PM PDT 24 May 05 12:52:45 PM PDT 24 357324477 ps
T741 /workspace/coverage/default/49.sram_ctrl_partial_access.2592956323 May 05 12:56:39 PM PDT 24 May 05 12:56:44 PM PDT 24 1296308633 ps
T742 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3852674237 May 05 12:55:54 PM PDT 24 May 05 12:58:17 PM PDT 24 8594819349 ps
T743 /workspace/coverage/default/35.sram_ctrl_partial_access.2661422288 May 05 12:53:20 PM PDT 24 May 05 12:53:57 PM PDT 24 2944360135 ps
T744 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.4208591280 May 05 12:48:24 PM PDT 24 May 05 12:50:23 PM PDT 24 1568653122 ps
T745 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2313531023 May 05 12:51:42 PM PDT 24 May 05 12:58:12 PM PDT 24 25653979059 ps
T746 /workspace/coverage/default/24.sram_ctrl_smoke.2643765014 May 05 12:50:32 PM PDT 24 May 05 12:51:12 PM PDT 24 424926950 ps
T747 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2398166854 May 05 12:55:55 PM PDT 24 May 05 01:00:07 PM PDT 24 4684569958 ps
T748 /workspace/coverage/default/19.sram_ctrl_smoke.1354932651 May 05 12:49:37 PM PDT 24 May 05 12:49:54 PM PDT 24 719731746 ps
T749 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.2224603789 May 05 12:50:13 PM PDT 24 May 05 12:51:20 PM PDT 24 19022096505 ps
T750 /workspace/coverage/default/30.sram_ctrl_executable.3167836831 May 05 12:52:01 PM PDT 24 May 05 12:53:36 PM PDT 24 18182568223 ps
T751 /workspace/coverage/default/18.sram_ctrl_executable.4268068970 May 05 12:49:34 PM PDT 24 May 05 01:03:32 PM PDT 24 36204514057 ps
T752 /workspace/coverage/default/24.sram_ctrl_max_throughput.2470452759 May 05 12:50:38 PM PDT 24 May 05 12:51:17 PM PDT 24 6020723408 ps
T753 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2320430761 May 05 12:53:24 PM PDT 24 May 05 01:04:23 PM PDT 24 54771918868 ps
T754 /workspace/coverage/default/27.sram_ctrl_mem_walk.4111085989 May 05 12:51:20 PM PDT 24 May 05 12:56:20 PM PDT 24 85950923443 ps
T755 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1243577229 May 05 12:56:24 PM PDT 24 May 05 01:03:14 PM PDT 24 60950387134 ps
T756 /workspace/coverage/default/30.sram_ctrl_lc_escalation.2930302905 May 05 12:51:59 PM PDT 24 May 05 12:52:21 PM PDT 24 3648214787 ps
T757 /workspace/coverage/default/37.sram_ctrl_lc_escalation.1854377529 May 05 12:53:53 PM PDT 24 May 05 12:55:22 PM PDT 24 52872103574 ps
T758 /workspace/coverage/default/10.sram_ctrl_max_throughput.276904078 May 05 12:48:28 PM PDT 24 May 05 12:48:35 PM PDT 24 3025589521 ps
T759 /workspace/coverage/default/4.sram_ctrl_regwen.3946188091 May 05 12:48:09 PM PDT 24 May 05 12:49:23 PM PDT 24 21388685577 ps
T760 /workspace/coverage/default/26.sram_ctrl_smoke.1058789537 May 05 12:51:00 PM PDT 24 May 05 12:51:21 PM PDT 24 1675638141 ps
T761 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1609215253 May 05 12:48:25 PM PDT 24 May 05 12:48:34 PM PDT 24 348758482 ps
T762 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2120417648 May 05 12:52:14 PM PDT 24 May 05 01:05:20 PM PDT 24 12579866939 ps
T763 /workspace/coverage/default/2.sram_ctrl_ram_cfg.2285136966 May 05 12:48:08 PM PDT 24 May 05 12:48:12 PM PDT 24 419323100 ps
T764 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2647875270 May 05 12:56:38 PM PDT 24 May 05 01:01:48 PM PDT 24 8761762556 ps
T765 /workspace/coverage/default/36.sram_ctrl_regwen.4189135529 May 05 12:53:40 PM PDT 24 May 05 01:12:50 PM PDT 24 182948624859 ps
T766 /workspace/coverage/default/23.sram_ctrl_max_throughput.680090085 May 05 12:50:28 PM PDT 24 May 05 12:51:03 PM PDT 24 727003810 ps
T767 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1978979662 May 05 12:48:59 PM PDT 24 May 05 12:52:20 PM PDT 24 9174918131 ps
T768 /workspace/coverage/default/44.sram_ctrl_max_throughput.725964970 May 05 12:55:26 PM PDT 24 May 05 12:56:36 PM PDT 24 3571922967 ps
T769 /workspace/coverage/default/25.sram_ctrl_bijection.222498636 May 05 12:50:50 PM PDT 24 May 05 01:12:22 PM PDT 24 40838578090 ps
T770 /workspace/coverage/default/16.sram_ctrl_bijection.314779418 May 05 12:49:06 PM PDT 24 May 05 01:09:23 PM PDT 24 82757668889 ps
T771 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.49490622 May 05 12:49:32 PM PDT 24 May 05 12:51:41 PM PDT 24 14057574504 ps
T772 /workspace/coverage/default/22.sram_ctrl_max_throughput.1861669544 May 05 12:50:13 PM PDT 24 May 05 12:51:26 PM PDT 24 3403676699 ps
T773 /workspace/coverage/default/42.sram_ctrl_alert_test.817943569 May 05 12:55:07 PM PDT 24 May 05 12:55:09 PM PDT 24 38928963 ps
T774 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.2428510502 May 05 12:48:23 PM PDT 24 May 05 12:55:35 PM PDT 24 31185740684 ps
T775 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4089470598 May 05 12:49:48 PM PDT 24 May 05 12:56:53 PM PDT 24 37544193566 ps
T776 /workspace/coverage/default/37.sram_ctrl_partial_access.2515227940 May 05 12:53:46 PM PDT 24 May 05 12:53:59 PM PDT 24 10244849516 ps
T777 /workspace/coverage/default/5.sram_ctrl_partial_access.985128631 May 05 12:48:09 PM PDT 24 May 05 12:48:48 PM PDT 24 1613112719 ps
T778 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3087549964 May 05 12:48:06 PM PDT 24 May 05 12:57:29 PM PDT 24 22607482271 ps
T779 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.66402960 May 05 12:50:05 PM PDT 24 May 05 12:56:32 PM PDT 24 74779193341 ps
T780 /workspace/coverage/default/33.sram_ctrl_partial_access.3312684391 May 05 12:52:53 PM PDT 24 May 05 12:53:18 PM PDT 24 1399120419 ps
T781 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3861418880 May 05 12:55:17 PM PDT 24 May 05 01:05:27 PM PDT 24 24492352486 ps
T782 /workspace/coverage/default/1.sram_ctrl_regwen.260197398 May 05 12:47:53 PM PDT 24 May 05 12:53:16 PM PDT 24 2033598226 ps
T783 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.4158325557 May 05 12:52:18 PM PDT 24 May 05 12:54:16 PM PDT 24 3208337959 ps
T784 /workspace/coverage/default/42.sram_ctrl_stress_all.4041103222 May 05 12:55:07 PM PDT 24 May 05 02:19:15 PM PDT 24 312289452223 ps
T785 /workspace/coverage/default/11.sram_ctrl_regwen.2744849303 May 05 12:48:40 PM PDT 24 May 05 01:02:42 PM PDT 24 10432076985 ps
T786 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3450459914 May 05 12:55:50 PM PDT 24 May 05 01:02:16 PM PDT 24 33321207417 ps
T787 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.3614426295 May 05 12:51:12 PM PDT 24 May 05 12:52:52 PM PDT 24 9918174282 ps
T788 /workspace/coverage/default/41.sram_ctrl_multiple_keys.4112358535 May 05 12:54:40 PM PDT 24 May 05 01:05:51 PM PDT 24 60927130674 ps
T789 /workspace/coverage/default/27.sram_ctrl_bijection.3135795981 May 05 12:51:18 PM PDT 24 May 05 01:12:02 PM PDT 24 281838445971 ps
T790 /workspace/coverage/default/18.sram_ctrl_bijection.4170909069 May 05 12:49:28 PM PDT 24 May 05 01:11:47 PM PDT 24 82956571185 ps
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