Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.09	99.81	96.99	100.00	100.00	98.60	99.70	98.52

Total tests in report: 1040

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
84.94	84.94	97.38	97.38	82.08	82.08	90.66	90.66	71.43	71.43	89.86	89.86	95.10	95.10	68.09	68.09	/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3231735050
92.31	7.37	99.25	1.87	87.53	5.45	92.15	1.49	100.00	28.57	95.21	5.35	95.25	0.15	76.81	8.72	/workspace/coverage/default/0.sram_ctrl_stress_all.1995173754
94.25	1.94	99.35	0.09	90.13	2.60	93.08	0.92	100.00	0.00	96.90	1.69	96.29	1.04	84.04	7.24	/workspace/coverage/default/28.sram_ctrl_regwen.3175751449
95.28	1.02	99.53	0.19	91.04	0.91	93.29	0.21	100.00	0.00	97.75	0.85	96.29	0.00	89.05	5.01	/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3856839053
96.08	0.80	99.72	0.19	93.25	2.21	93.93	0.64	100.00	0.00	98.59	0.85	96.88	0.59	90.17	1.11	/workspace/coverage/default/1.sram_ctrl_sec_cm.798292572
96.76	0.69	99.72	0.00	93.38	0.13	95.03	1.10	100.00	0.00	98.87	0.28	97.03	0.15	93.32	3.15	/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.891156810
97.34	0.58	99.72	0.00	93.38	0.00	96.20	1.17	100.00	0.00	98.87	0.00	97.47	0.45	95.73	2.41	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1691712791
97.73	0.39	99.72	0.00	93.51	0.13	97.94	1.74	100.00	0.00	98.87	0.00	98.37	0.89	95.73	0.00	/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2429856981
97.95	0.22	99.81	0.09	93.51	0.00	99.36	1.42	100.00	0.00	98.87	0.00	98.37	0.00	95.73	0.00	/workspace/coverage/default/22.sram_ctrl_ram_cfg.503706328
98.13	0.18	99.81	0.00	93.51	0.00	99.43	0.07	100.00	0.00	98.87	0.00	99.55	1.19	95.73	0.00	/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.4292365526
98.26	0.13	99.81	0.00	93.51	0.00	99.43	0.00	100.00	0.00	98.87	0.00	99.55	0.00	96.66	0.93	/workspace/coverage/default/43.sram_ctrl_stress_all.3835613659
98.37	0.11	99.81	0.00	93.51	0.00	99.43	0.00	100.00	0.00	98.87	0.00	99.55	0.00	97.40	0.74	/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3004063494
98.47	0.10	99.81	0.00	93.64	0.13	99.82	0.39	100.00	0.00	98.87	0.00	99.55	0.00	97.59	0.19	/workspace/coverage/default/36.sram_ctrl_lc_escalation.1673230974
98.55	0.08	99.81	0.00	94.03	0.39	99.96	0.14	100.00	0.00	98.87	0.00	99.55	0.00	97.59	0.00	/workspace/coverage/default/13.sram_ctrl_alert_test.2399543640
98.60	0.05	99.81	0.00	94.03	0.00	99.96	0.00	100.00	0.00	98.87	0.00	99.55	0.00	97.96	0.37	/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1969599376
98.64	0.05	99.81	0.00	94.16	0.13	99.96	0.00	100.00	0.00	98.87	0.00	99.55	0.00	98.14	0.19	/workspace/coverage/default/36.sram_ctrl_stress_all.490417890
98.67	0.03	99.81	0.00	94.16	0.00	99.96	0.00	100.00	0.00	98.87	0.00	99.55	0.00	98.33	0.19	/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.4050724991
98.70	0.03	99.81	0.00	94.16	0.00	99.96	0.00	100.00	0.00	98.87	0.00	99.55	0.00	98.52	0.19	/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3324086380
98.72	0.02	99.81	0.00	94.16	0.00	99.96	0.00	100.00	0.00	98.87	0.00	99.70	0.15	98.52	0.00	/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.146390600
98.72	0.01	99.81	0.00	94.16	0.00	100.00	0.04	100.00	0.00	98.87	0.00	99.70	0.00	98.52	0.00	/workspace/coverage/default/10.sram_ctrl_executable.95196277

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.375056735
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.813302021
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3109154054
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1046862017
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.883561412
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3408821612
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2958848873
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3057957345
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.794009383
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3248770905
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3267772567
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2162106009
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4116638307
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.601574346
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.172086305
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3694184147
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1080480431
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.447579397
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2640008244
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1349361516
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.543749920
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.7064601
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4069986703
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1230973220
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3143727785
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4283715491
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.201612572
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2118474182
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1966179387
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.633533104
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.925934474
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1926714031
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.613691790
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.299425523
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1061941449
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.724435891
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.304022287
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1855034606
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.510438628
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.967544125
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.382467680
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3370493495
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1759593668
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.499576262
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3790373910
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.4147467398
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3256193140
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.725434079
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1430840220
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1154398627
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1601149944
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2086138856
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1959278677
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1439571566
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4229431026
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.231563570
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3493438840
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1538681240
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2229811343
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3545383371
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3254626335
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1210148845
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.845732430
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.550789430
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.643941086
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3304188989
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3617695
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.473705842
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.636500430
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3399472833
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2422335092
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.236835217
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1829147046
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3890563421
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3570160433
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1417460761
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3603501476
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3420434020
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.48482128
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2796881624
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1185121437
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2653191836
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2609271708
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2881282255
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3105310216
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2418794750
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1803341736
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.976497355
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1457599229
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2248875624
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4160346677
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2521316258
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1506206461
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.140138509
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2789468793
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3589355783
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.384822252
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.370019034
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3499189905
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2953759440
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.223163339
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.331944028
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3882037009
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3493370444
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.49689184
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3458331687
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.930269339
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3934607547
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1657532221
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.652922328
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.478149005
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2684800504
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1643611227
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1757367990
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2791954667
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3322802530
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1080245123
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.471059976
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1096411870
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2487724974
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.843308952
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2083611941
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.768583468
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.777769223
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.49913330
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.987786817
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.666857045
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1195715207
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2685414149
/workspace/coverage/default/0.sram_ctrl_alert_test.464736816
/workspace/coverage/default/0.sram_ctrl_bijection.2100427136
/workspace/coverage/default/0.sram_ctrl_executable.4264794668
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1668586016
/workspace/coverage/default/0.sram_ctrl_max_throughput.4109299646
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3258125612
/workspace/coverage/default/0.sram_ctrl_mem_walk.1676626964
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2981028729
/workspace/coverage/default/0.sram_ctrl_partial_access.317751682
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.722382351
/workspace/coverage/default/0.sram_ctrl_ram_cfg.150645422
/workspace/coverage/default/0.sram_ctrl_regwen.2679211349
/workspace/coverage/default/0.sram_ctrl_sec_cm.1244730581
/workspace/coverage/default/0.sram_ctrl_smoke.808281291
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4051681965
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2211461977
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3821801100
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2175149295
/workspace/coverage/default/1.sram_ctrl_alert_test.2020536002
/workspace/coverage/default/1.sram_ctrl_bijection.3252182731
/workspace/coverage/default/1.sram_ctrl_executable.707551710
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3429408391
/workspace/coverage/default/1.sram_ctrl_max_throughput.3337476977
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3869895251
/workspace/coverage/default/1.sram_ctrl_mem_walk.3115841035
/workspace/coverage/default/1.sram_ctrl_multiple_keys.140375534
/workspace/coverage/default/1.sram_ctrl_partial_access.688492103
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.985311826
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3537137726
/workspace/coverage/default/1.sram_ctrl_regwen.3721856611
/workspace/coverage/default/1.sram_ctrl_smoke.2701028836
/workspace/coverage/default/1.sram_ctrl_stress_all.3975855131
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1992230753
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2263597038
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4180995578
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.112733520
/workspace/coverage/default/10.sram_ctrl_alert_test.4169215744
/workspace/coverage/default/10.sram_ctrl_bijection.77503862
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3847878443
/workspace/coverage/default/10.sram_ctrl_max_throughput.2305924492
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2599566583
/workspace/coverage/default/10.sram_ctrl_mem_walk.1208230970
/workspace/coverage/default/10.sram_ctrl_multiple_keys.183195340
/workspace/coverage/default/10.sram_ctrl_partial_access.1211175961
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2271732888
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3254807421
/workspace/coverage/default/10.sram_ctrl_regwen.3511942006
/workspace/coverage/default/10.sram_ctrl_smoke.2545337164
/workspace/coverage/default/10.sram_ctrl_stress_all.1398771741
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.654410746
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1180201237
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2503082784
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2843047007
/workspace/coverage/default/11.sram_ctrl_alert_test.1004527865
/workspace/coverage/default/11.sram_ctrl_bijection.1943468607
/workspace/coverage/default/11.sram_ctrl_executable.1341197004
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1928359388
/workspace/coverage/default/11.sram_ctrl_max_throughput.290701587
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3027006563
/workspace/coverage/default/11.sram_ctrl_mem_walk.3099764438
/workspace/coverage/default/11.sram_ctrl_multiple_keys.239271387
/workspace/coverage/default/11.sram_ctrl_partial_access.1574917654
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/workspace/coverage/default/42.sram_ctrl_access_during_key_req.844411083
/workspace/coverage/default/42.sram_ctrl_alert_test.2146355412
/workspace/coverage/default/42.sram_ctrl_bijection.2796712401
/workspace/coverage/default/42.sram_ctrl_executable.3818575607
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1145004578
/workspace/coverage/default/42.sram_ctrl_max_throughput.461516351
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.4165511306
/workspace/coverage/default/42.sram_ctrl_mem_walk.1614181844
/workspace/coverage/default/42.sram_ctrl_multiple_keys.1448995894
/workspace/coverage/default/42.sram_ctrl_partial_access.4208866372
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.752898780
/workspace/coverage/default/42.sram_ctrl_ram_cfg.3015029980
/workspace/coverage/default/42.sram_ctrl_regwen.2107977903
/workspace/coverage/default/42.sram_ctrl_smoke.958702141
/workspace/coverage/default/42.sram_ctrl_stress_all.4137387127
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2915763349
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.934846170
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4165670228
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3739910208
/workspace/coverage/default/43.sram_ctrl_alert_test.3673511385
/workspace/coverage/default/43.sram_ctrl_bijection.1224514666
/workspace/coverage/default/43.sram_ctrl_executable.989283219
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1434310045
/workspace/coverage/default/43.sram_ctrl_max_throughput.1065050837
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.513866910
/workspace/coverage/default/43.sram_ctrl_mem_walk.1231095244
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2699617257
/workspace/coverage/default/43.sram_ctrl_partial_access.183143363
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1134680252
/workspace/coverage/default/43.sram_ctrl_ram_cfg.947228658
/workspace/coverage/default/43.sram_ctrl_regwen.3410202560
/workspace/coverage/default/43.sram_ctrl_smoke.3415345013
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2248647937
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.219903700
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.83148047
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3841434046
/workspace/coverage/default/44.sram_ctrl_alert_test.3739333032
/workspace/coverage/default/44.sram_ctrl_bijection.85920164
/workspace/coverage/default/44.sram_ctrl_executable.3136468760
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2101143165
/workspace/coverage/default/44.sram_ctrl_max_throughput.3111645956
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2100339338
/workspace/coverage/default/44.sram_ctrl_mem_walk.1794623091
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1053366110
/workspace/coverage/default/44.sram_ctrl_partial_access.720397316
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.910347496
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1894822005
/workspace/coverage/default/44.sram_ctrl_regwen.416257446
/workspace/coverage/default/44.sram_ctrl_smoke.3132850223
/workspace/coverage/default/44.sram_ctrl_stress_all.1318297572
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2965455771
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2373999508
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.56509462
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2770649705
/workspace/coverage/default/45.sram_ctrl_alert_test.3379718038
/workspace/coverage/default/45.sram_ctrl_bijection.878235622
/workspace/coverage/default/45.sram_ctrl_executable.3029618030
/workspace/coverage/default/45.sram_ctrl_lc_escalation.666532147
/workspace/coverage/default/45.sram_ctrl_max_throughput.709109999
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.145668368
/workspace/coverage/default/45.sram_ctrl_mem_walk.2841748662
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2518139365
/workspace/coverage/default/45.sram_ctrl_partial_access.1422527071
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1045933287
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1216911495
/workspace/coverage/default/45.sram_ctrl_regwen.3949914384
/workspace/coverage/default/45.sram_ctrl_smoke.1757248516
/workspace/coverage/default/45.sram_ctrl_stress_all.3822532000
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2392026662
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1083852500
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.491103237
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1367568543
/workspace/coverage/default/46.sram_ctrl_alert_test.2191380249
/workspace/coverage/default/46.sram_ctrl_bijection.2657523988
/workspace/coverage/default/46.sram_ctrl_executable.1749647767
/workspace/coverage/default/46.sram_ctrl_lc_escalation.297824879
/workspace/coverage/default/46.sram_ctrl_max_throughput.2274271499
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.214500890
/workspace/coverage/default/46.sram_ctrl_mem_walk.1378336511
/workspace/coverage/default/46.sram_ctrl_multiple_keys.345697664
/workspace/coverage/default/46.sram_ctrl_partial_access.636129686
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.907258767
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3521867551
/workspace/coverage/default/46.sram_ctrl_regwen.1764105783
/workspace/coverage/default/46.sram_ctrl_smoke.3426909817
/workspace/coverage/default/46.sram_ctrl_stress_all.3310284140
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2333418506
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2489508062
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.731178846
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.638118594
/workspace/coverage/default/47.sram_ctrl_alert_test.1146343818
/workspace/coverage/default/47.sram_ctrl_bijection.3722391825
/workspace/coverage/default/47.sram_ctrl_executable.2359978205
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1853091537
/workspace/coverage/default/47.sram_ctrl_max_throughput.4019014414
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.184718358
/workspace/coverage/default/47.sram_ctrl_mem_walk.630523622
/workspace/coverage/default/47.sram_ctrl_multiple_keys.793630391
/workspace/coverage/default/47.sram_ctrl_partial_access.2597700712
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1255884733
/workspace/coverage/default/47.sram_ctrl_ram_cfg.120257281
/workspace/coverage/default/47.sram_ctrl_regwen.2119277344
/workspace/coverage/default/47.sram_ctrl_smoke.4135560338
/workspace/coverage/default/47.sram_ctrl_stress_all.760265612
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1551462419
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.479292598
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.745651492
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1910094772
/workspace/coverage/default/48.sram_ctrl_alert_test.3449242758
/workspace/coverage/default/48.sram_ctrl_bijection.2388576315
/workspace/coverage/default/48.sram_ctrl_executable.968489936
/workspace/coverage/default/48.sram_ctrl_lc_escalation.355027683
/workspace/coverage/default/48.sram_ctrl_max_throughput.2208648686
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1043577745
/workspace/coverage/default/48.sram_ctrl_mem_walk.3684448710
/workspace/coverage/default/48.sram_ctrl_multiple_keys.768651075
/workspace/coverage/default/48.sram_ctrl_partial_access.3908570457
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1126388748
/workspace/coverage/default/48.sram_ctrl_ram_cfg.979620451
/workspace/coverage/default/48.sram_ctrl_regwen.2248380506
/workspace/coverage/default/48.sram_ctrl_smoke.3600447825
/workspace/coverage/default/48.sram_ctrl_stress_all.2147145000
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.705749323
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2902426184
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1074951808
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3635515444
/workspace/coverage/default/49.sram_ctrl_alert_test.3674011728
/workspace/coverage/default/49.sram_ctrl_bijection.2577253190
/workspace/coverage/default/49.sram_ctrl_executable.419949635
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1451217920
/workspace/coverage/default/49.sram_ctrl_max_throughput.601072601
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2719675061
/workspace/coverage/default/49.sram_ctrl_mem_walk.2842465737
/workspace/coverage/default/49.sram_ctrl_multiple_keys.199780440
/workspace/coverage/default/49.sram_ctrl_partial_access.2106670061
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1552565887
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3298107890
/workspace/coverage/default/49.sram_ctrl_regwen.1022720137
/workspace/coverage/default/49.sram_ctrl_smoke.1582453996
/workspace/coverage/default/49.sram_ctrl_stress_all.1254163208
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.155961086
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4110339118
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3438097671
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3373045733
/workspace/coverage/default/5.sram_ctrl_alert_test.1927518830
/workspace/coverage/default/5.sram_ctrl_bijection.1059883462
/workspace/coverage/default/5.sram_ctrl_executable.755194731
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3965328518
/workspace/coverage/default/5.sram_ctrl_max_throughput.3213172614
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1448017758
/workspace/coverage/default/5.sram_ctrl_mem_walk.821992879
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3847998108
/workspace/coverage/default/5.sram_ctrl_partial_access.969897238
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3037458344
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2185929287
/workspace/coverage/default/5.sram_ctrl_regwen.1214017870
/workspace/coverage/default/5.sram_ctrl_smoke.1745464413
/workspace/coverage/default/5.sram_ctrl_stress_all.973413140
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4131727877
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3782588469
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3282234875
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.983288113
/workspace/coverage/default/6.sram_ctrl_alert_test.11829491
/workspace/coverage/default/6.sram_ctrl_bijection.3947855825
/workspace/coverage/default/6.sram_ctrl_executable.516255030
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1569303359
/workspace/coverage/default/6.sram_ctrl_max_throughput.3601105404
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1298346645
/workspace/coverage/default/6.sram_ctrl_mem_walk.2001677484
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3465212216
/workspace/coverage/default/6.sram_ctrl_partial_access.543178035
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.611542515
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1079133732
/workspace/coverage/default/6.sram_ctrl_regwen.2640766766
/workspace/coverage/default/6.sram_ctrl_smoke.1737590331
/workspace/coverage/default/6.sram_ctrl_stress_all.2129172950
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2567100689
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.272932037
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2377232459
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3580270205
/workspace/coverage/default/7.sram_ctrl_alert_test.3037617860
/workspace/coverage/default/7.sram_ctrl_bijection.2873493048
/workspace/coverage/default/7.sram_ctrl_executable.2026983748
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2750309339
/workspace/coverage/default/7.sram_ctrl_max_throughput.1302654122
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.866434685
/workspace/coverage/default/7.sram_ctrl_mem_walk.1284619430
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2973810936
/workspace/coverage/default/7.sram_ctrl_partial_access.372410713
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.866264248
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1658761664
/workspace/coverage/default/7.sram_ctrl_regwen.3694004865
/workspace/coverage/default/7.sram_ctrl_smoke.3195883050
/workspace/coverage/default/7.sram_ctrl_stress_all.2706610510
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2100860273
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1081038379
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.186782153
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.724724875
/workspace/coverage/default/8.sram_ctrl_alert_test.1114759789
/workspace/coverage/default/8.sram_ctrl_bijection.228762153
/workspace/coverage/default/8.sram_ctrl_executable.2378823600
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2060233115
/workspace/coverage/default/8.sram_ctrl_max_throughput.2742979292
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2793658316
/workspace/coverage/default/8.sram_ctrl_mem_walk.2733960563
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3185967989
/workspace/coverage/default/8.sram_ctrl_partial_access.3784227063
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1003352315
/workspace/coverage/default/8.sram_ctrl_ram_cfg.766302601
/workspace/coverage/default/8.sram_ctrl_regwen.2454024090
/workspace/coverage/default/8.sram_ctrl_smoke.1698063931
/workspace/coverage/default/8.sram_ctrl_stress_all.4132675515
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3819520132
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3585245342
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3242593427
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.399269323
/workspace/coverage/default/9.sram_ctrl_alert_test.3343253411
/workspace/coverage/default/9.sram_ctrl_bijection.154420820
/workspace/coverage/default/9.sram_ctrl_executable.988346454
/workspace/coverage/default/9.sram_ctrl_lc_escalation.694331982
/workspace/coverage/default/9.sram_ctrl_max_throughput.2049414258
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4254658066
/workspace/coverage/default/9.sram_ctrl_mem_walk.764814402
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2789178180
/workspace/coverage/default/9.sram_ctrl_partial_access.2354904258
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1855103400
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1480933099
/workspace/coverage/default/9.sram_ctrl_regwen.2633216872
/workspace/coverage/default/9.sram_ctrl_smoke.3540043203
/workspace/coverage/default/9.sram_ctrl_stress_all.2306645737
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.310160557
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1839143549
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1319766623

Total test records in report: 1040

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/35.sram_ctrl_access_during_key_req.3884360161	May 23 03:07:27 PM PDT 24	May 23 03:27:01 PM PDT 24	38641860618 ps
T2	/workspace/coverage/default/39.sram_ctrl_access_during_key_req.121115820	May 23 03:09:04 PM PDT 24	May 23 03:23:26 PM PDT 24	58724185144 ps
T3	/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1045933287	May 23 03:11:50 PM PDT 24	May 23 03:17:46 PM PDT 24	13345932567 ps
T4	/workspace/coverage/default/10.sram_ctrl_lc_escalation.3847878443	May 23 02:59:32 PM PDT 24	May 23 03:00:35 PM PDT 24	91535605286 ps
T9	/workspace/coverage/default/23.sram_ctrl_alert_test.1536313368	May 23 03:03:13 PM PDT 24	May 23 03:03:15 PM PDT 24	27691520 ps
T10	/workspace/coverage/default/42.sram_ctrl_smoke.958702141	May 23 03:11:12 PM PDT 24	May 23 03:11:31 PM PDT 24	3155773235 ps
T5	/workspace/coverage/default/4.sram_ctrl_executable.3248507457	May 23 02:58:31 PM PDT 24	May 23 03:03:56 PM PDT 24	13587663594 ps
T6	/workspace/coverage/default/28.sram_ctrl_regwen.3175751449	May 23 03:04:47 PM PDT 24	May 23 03:18:52 PM PDT 24	30816838891 ps
T11	/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3231735050	May 23 03:03:26 PM PDT 24	May 23 03:03:46 PM PDT 24	1394911495 ps
T12	/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.745651492	May 23 03:12:29 PM PDT 24	May 23 03:13:44 PM PDT 24	751669856 ps
T13	/workspace/coverage/default/19.sram_ctrl_smoke.2049779458	May 23 03:01:35 PM PDT 24	May 23 03:01:43 PM PDT 24	1491536583 ps
T55	/workspace/coverage/default/34.sram_ctrl_smoke.3644756500	May 23 03:06:38 PM PDT 24	May 23 03:08:17 PM PDT 24	6061251044 ps
T14	/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.891156810	May 23 03:04:28 PM PDT 24	May 23 03:14:06 PM PDT 24	110976520463 ps
T30	/workspace/coverage/default/22.sram_ctrl_ram_cfg.503706328	May 23 03:02:55 PM PDT 24	May 23 03:03:00 PM PDT 24	448436874 ps
T44	/workspace/coverage/default/43.sram_ctrl_stress_pipeline.219903700	May 23 03:11:34 PM PDT 24	May 23 03:15:15 PM PDT 24	3245496271 ps
T56	/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3037458344	May 23 02:58:46 PM PDT 24	May 23 03:03:51 PM PDT 24	13116492311 ps
T57	/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.611542515	May 23 02:58:48 PM PDT 24	May 23 03:05:58 PM PDT 24	18308256825 ps
T18	/workspace/coverage/default/13.sram_ctrl_alert_test.2399543640	May 23 03:00:15 PM PDT 24	May 23 03:00:18 PM PDT 24	40102771 ps
T151	/workspace/coverage/default/48.sram_ctrl_max_throughput.2208648686	May 23 03:13:38 PM PDT 24	May 23 03:14:08 PM PDT 24	1516616793 ps
T28	/workspace/coverage/default/10.sram_ctrl_executable.95196277	May 23 02:59:32 PM PDT 24	May 23 03:05:12 PM PDT 24	11175070859 ps
T78	/workspace/coverage/default/3.sram_ctrl_mem_partial_access.125550128	May 23 02:58:29 PM PDT 24	May 23 03:00:43 PM PDT 24	6256783916 ps
T45	/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2429856981	May 23 03:01:36 PM PDT 24	May 23 03:09:17 PM PDT 24	49589029363 ps
T29	/workspace/coverage/default/21.sram_ctrl_executable.3908000743	May 23 03:02:20 PM PDT 24	May 23 03:06:33 PM PDT 24	48312362612 ps
T140	/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1299215829	May 23 03:06:33 PM PDT 24	May 23 03:07:33 PM PDT 24	762284166 ps
T7	/workspace/coverage/default/36.sram_ctrl_lc_escalation.1673230974	May 23 03:07:47 PM PDT 24	May 23 03:07:59 PM PDT 24	7093345015 ps
T8	/workspace/coverage/default/0.sram_ctrl_stress_all.1995173754	May 23 02:58:21 PM PDT 24	May 23 04:17:01 PM PDT 24	460711986711 ps
T22	/workspace/coverage/default/28.sram_ctrl_lc_escalation.697223024	May 23 03:04:48 PM PDT 24	May 23 03:04:55 PM PDT 24	719935583 ps
T143	/workspace/coverage/default/38.sram_ctrl_smoke.2873406465	May 23 03:08:28 PM PDT 24	May 23 03:08:43 PM PDT 24	780350130 ps
T152	/workspace/coverage/default/32.sram_ctrl_smoke.3597148555	May 23 03:06:08 PM PDT 24	May 23 03:06:26 PM PDT 24	1064949123 ps
T153	/workspace/coverage/default/18.sram_ctrl_smoke.3152498829	May 23 03:01:10 PM PDT 24	May 23 03:01:18 PM PDT 24	1336332600 ps
T101	/workspace/coverage/default/26.sram_ctrl_stress_pipeline.549078175	May 23 03:04:12 PM PDT 24	May 23 03:08:01 PM PDT 24	13664282799 ps
T154	/workspace/coverage/default/43.sram_ctrl_mem_walk.1231095244	May 23 03:11:36 PM PDT 24	May 23 03:14:05 PM PDT 24	7179289315 ps
T144	/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1853482466	May 23 03:00:49 PM PDT 24	May 23 03:02:43 PM PDT 24	864836879 ps
T155	/workspace/coverage/default/33.sram_ctrl_mem_walk.2894631072	May 23 03:06:37 PM PDT 24	May 23 03:09:22 PM PDT 24	10338555827 ps
T156	/workspace/coverage/default/28.sram_ctrl_partial_access.695959671	May 23 03:04:47 PM PDT 24	May 23 03:05:13 PM PDT 24	904031443 ps
T31	/workspace/coverage/default/2.sram_ctrl_ram_cfg.3120976783	May 23 02:58:15 PM PDT 24	May 23 02:58:22 PM PDT 24	360522235 ps
T26	/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.252630690	May 23 02:59:45 PM PDT 24	May 23 02:59:58 PM PDT 24	1703059629 ps
T157	/workspace/coverage/default/20.sram_ctrl_mem_walk.3679923782	May 23 03:01:59 PM PDT 24	May 23 03:04:10 PM PDT 24	2059518987 ps
T158	/workspace/coverage/default/23.sram_ctrl_smoke.2723077745	May 23 03:02:53 PM PDT 24	May 23 03:03:52 PM PDT 24	2228866956 ps
T46	/workspace/coverage/default/4.sram_ctrl_regwen.2579350861	May 23 02:58:29 PM PDT 24	May 23 03:14:31 PM PDT 24	25949581380 ps
T159	/workspace/coverage/default/23.sram_ctrl_mem_walk.3087647552	May 23 03:03:11 PM PDT 24	May 23 03:08:09 PM PDT 24	29294889085 ps
T149	/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1258441614	May 23 02:58:17 PM PDT 24	May 23 02:58:38 PM PDT 24	729969738 ps
T160	/workspace/coverage/default/36.sram_ctrl_mem_walk.3993469712	May 23 03:07:45 PM PDT 24	May 23 03:12:34 PM PDT 24	14362061082 ps
T27	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1691712791	May 23 03:07:45 PM PDT 24	May 23 03:08:48 PM PDT 24	4886647484 ps
T20	/workspace/coverage/default/6.sram_ctrl_lc_escalation.1569303359	May 23 02:58:47 PM PDT 24	May 23 03:00:31 PM PDT 24	169500566719 ps
T114	/workspace/coverage/default/45.sram_ctrl_partial_access.1422527071	May 23 03:11:47 PM PDT 24	May 23 03:11:55 PM PDT 24	1068918589 ps
T115	/workspace/coverage/default/31.sram_ctrl_bijection.2546095888	May 23 03:05:27 PM PDT 24	May 23 03:38:17 PM PDT 24	469277591997 ps
T102	/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.907258767	May 23 03:12:06 PM PDT 24	May 23 03:17:33 PM PDT 24	29258607630 ps
T116	/workspace/coverage/default/33.sram_ctrl_smoke.2605426446	May 23 03:06:37 PM PDT 24	May 23 03:07:09 PM PDT 24	4095257936 ps
T79	/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2843047007	May 23 02:59:46 PM PDT 24	May 23 03:14:01 PM PDT 24	11124473317 ps
T117	/workspace/coverage/default/2.sram_ctrl_mem_walk.3224626582	May 23 02:58:15 PM PDT 24	May 23 03:00:48 PM PDT 24	10656148663 ps
T118	/workspace/coverage/default/4.sram_ctrl_partial_access.4086395223	May 23 02:58:33 PM PDT 24	May 23 02:58:52 PM PDT 24	3414881577 ps
T119	/workspace/coverage/default/6.sram_ctrl_partial_access.543178035	May 23 02:58:51 PM PDT 24	May 23 02:59:17 PM PDT 24	1046390864 ps
T58	/workspace/coverage/default/27.sram_ctrl_lc_escalation.4261376087	May 23 03:04:29 PM PDT 24	May 23 03:04:42 PM PDT 24	1625637659 ps
T59	/workspace/coverage/default/3.sram_ctrl_stress_all.2599610291	May 23 02:58:32 PM PDT 24	May 23 04:04:17 PM PDT 24	301688688489 ps
T150	/workspace/coverage/default/18.sram_ctrl_multiple_keys.2117685702	May 23 03:01:11 PM PDT 24	May 23 03:10:03 PM PDT 24	7908588571 ps
T19	/workspace/coverage/default/26.sram_ctrl_alert_test.1126311075	May 23 03:04:11 PM PDT 24	May 23 03:04:13 PM PDT 24	11648030 ps
T161	/workspace/coverage/default/48.sram_ctrl_smoke.3600447825	May 23 03:13:39 PM PDT 24	May 23 03:13:47 PM PDT 24	1468833750 ps
T146	/workspace/coverage/default/10.sram_ctrl_bijection.77503862	May 23 02:59:30 PM PDT 24	May 23 03:21:25 PM PDT 24	77878896452 ps
T80	/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3870274094	May 23 03:07:46 PM PDT 24	May 23 03:20:01 PM PDT 24	74869423211 ps
T32	/workspace/coverage/default/28.sram_ctrl_ram_cfg.4273146262	May 23 03:04:44 PM PDT 24	May 23 03:04:48 PM PDT 24	354282496 ps
T60	/workspace/coverage/default/33.sram_ctrl_stress_all.3522511266	May 23 03:06:22 PM PDT 24	May 23 04:56:14 PM PDT 24	911187956974 ps
T162	/workspace/coverage/default/7.sram_ctrl_alert_test.3037617860	May 23 02:58:50 PM PDT 24	May 23 02:58:54 PM PDT 24	30621263 ps
T163	/workspace/coverage/default/48.sram_ctrl_ram_cfg.979620451	May 23 03:13:38 PM PDT 24	May 23 03:13:44 PM PDT 24	359905012 ps
T132	/workspace/coverage/default/21.sram_ctrl_regwen.3116511484	May 23 03:02:20 PM PDT 24	May 23 03:25:30 PM PDT 24	10903571111 ps
T81	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.346359478	May 23 03:10:42 PM PDT 24	May 23 03:12:49 PM PDT 24	6523218072 ps
T103	/workspace/coverage/default/22.sram_ctrl_stress_pipeline.1469540280	May 23 03:02:39 PM PDT 24	May 23 03:07:38 PM PDT 24	5075480503 ps
T138	/workspace/coverage/default/14.sram_ctrl_stress_all.2448029826	May 23 03:00:51 PM PDT 24	May 23 04:04:07 PM PDT 24	181229328067 ps
T147	/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1917002484	May 23 03:10:42 PM PDT 24	May 23 03:16:46 PM PDT 24	6713877763 ps
T145	/workspace/coverage/default/42.sram_ctrl_alert_test.2146355412	May 23 03:11:34 PM PDT 24	May 23 03:11:37 PM PDT 24	19817898 ps
T164	/workspace/coverage/default/31.sram_ctrl_mem_walk.1067877876	May 23 03:06:11 PM PDT 24	May 23 03:11:56 PM PDT 24	86104943147 ps
T139	/workspace/coverage/default/46.sram_ctrl_executable.1749647767	May 23 03:12:04 PM PDT 24	May 23 03:22:15 PM PDT 24	8615123577 ps
T47	/workspace/coverage/default/9.sram_ctrl_regwen.2633216872	May 23 02:59:30 PM PDT 24	May 23 03:15:45 PM PDT 24	16511766798 ps
T23	/workspace/coverage/default/41.sram_ctrl_stress_all.3132564517	May 23 03:11:13 PM PDT 24	May 23 04:25:07 PM PDT 24	851810570954 ps
T165	/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3282234875	May 23 02:58:47 PM PDT 24	May 23 02:59:08 PM PDT 24	745726353 ps
T21	/workspace/coverage/default/43.sram_ctrl_stress_all.3835613659	May 23 03:11:34 PM PDT 24	May 23 05:08:36 PM PDT 24	92310838540 ps
T166	/workspace/coverage/default/42.sram_ctrl_multiple_keys.1448995894	May 23 03:11:13 PM PDT 24	May 23 03:32:01 PM PDT 24	11238611780 ps
T167	/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.757348086	May 23 03:04:47 PM PDT 24	May 23 03:12:33 PM PDT 24	38184358833 ps
T168	/workspace/coverage/default/11.sram_ctrl_mem_walk.3099764438	May 23 02:59:44 PM PDT 24	May 23 03:05:14 PM PDT 24	21261988675 ps
T169	/workspace/coverage/default/9.sram_ctrl_bijection.154420820	May 23 02:59:17 PM PDT 24	May 23 03:27:26 PM PDT 24	24939294416 ps
T170	/workspace/coverage/default/22.sram_ctrl_max_throughput.3952076892	May 23 03:02:40 PM PDT 24	May 23 03:03:23 PM PDT 24	1495607465 ps
T148	/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.4231301548	May 23 03:06:33 PM PDT 24	May 23 03:10:06 PM PDT 24	4037364716 ps
T171	/workspace/coverage/default/27.sram_ctrl_max_throughput.2975776404	May 23 03:04:29 PM PDT 24	May 23 03:06:45 PM PDT 24	4411310837 ps
T172	/workspace/coverage/default/37.sram_ctrl_ram_cfg.1630788042	May 23 03:08:10 PM PDT 24	May 23 03:08:16 PM PDT 24	352635992 ps
T82	/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3373045733	May 23 02:58:52 PM PDT 24	May 23 03:19:29 PM PDT 24	58404428837 ps
T173	/workspace/coverage/default/26.sram_ctrl_bijection.4086432727	May 23 03:04:15 PM PDT 24	May 23 03:15:09 PM PDT 24	39623854288 ps
T141	/workspace/coverage/default/31.sram_ctrl_multiple_keys.709493859	May 23 03:05:27 PM PDT 24	May 23 03:23:50 PM PDT 24	17649687524 ps
T174	/workspace/coverage/default/3.sram_ctrl_mem_walk.2696410735	May 23 02:58:28 PM PDT 24	May 23 03:03:53 PM PDT 24	74636452355 ps
T137	/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3388049068	May 23 03:06:10 PM PDT 24	May 23 03:11:56 PM PDT 24	16191132670 ps
T133	/workspace/coverage/default/19.sram_ctrl_regwen.3175176031	May 23 03:01:59 PM PDT 24	May 23 03:22:41 PM PDT 24	12749320639 ps
T142	/workspace/coverage/default/36.sram_ctrl_bijection.2529121417	May 23 03:07:29 PM PDT 24	May 23 03:36:39 PM PDT 24	148490905008 ps
T48	/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2326098998	May 23 03:02:35 PM PDT 24	May 23 03:02:48 PM PDT 24	549474798 ps
T24	/workspace/coverage/default/34.sram_ctrl_lc_escalation.1686463548	May 23 03:06:49 PM PDT 24	May 23 03:07:43 PM PDT 24	24792179665 ps
T175	/workspace/coverage/default/15.sram_ctrl_bijection.2001880580	May 23 03:00:47 PM PDT 24	May 23 03:34:30 PM PDT 24	91250352685 ps
T49	/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2248647937	May 23 03:11:31 PM PDT 24	May 23 03:11:50 PM PDT 24	782500249 ps
T134	/workspace/coverage/default/35.sram_ctrl_stress_all.2658961105	May 23 03:07:29 PM PDT 24	May 23 03:51:23 PM PDT 24	80420989012 ps
T176	/workspace/coverage/default/8.sram_ctrl_partial_access.3784227063	May 23 02:58:49 PM PDT 24	May 23 03:00:09 PM PDT 24	1142479289 ps
T83	/workspace/coverage/default/4.sram_ctrl_mem_partial_access.359099623	May 23 02:58:30 PM PDT 24	May 23 02:59:37 PM PDT 24	6347949997 ps
T84	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.1256608780	May 23 03:02:01 PM PDT 24	May 23 03:19:45 PM PDT 24	101085931424 ps
T177	/workspace/coverage/default/38.sram_ctrl_lc_escalation.859203606	May 23 03:08:28 PM PDT 24	May 23 03:09:21 PM PDT 24	31933358818 ps
T178	/workspace/coverage/default/3.sram_ctrl_partial_access.3009904976	May 23 02:58:15 PM PDT 24	May 23 02:58:39 PM PDT 24	914656152 ps
T96	/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2619500069	May 23 03:06:38 PM PDT 24	May 23 03:09:17 PM PDT 24	18185120607 ps
T179	/workspace/coverage/default/7.sram_ctrl_executable.2026983748	May 23 02:58:48 PM PDT 24	May 23 03:17:07 PM PDT 24	16402766575 ps
T180	/workspace/coverage/default/19.sram_ctrl_multiple_keys.2901589072	May 23 03:01:35 PM PDT 24	May 23 03:25:08 PM PDT 24	37259569771 ps
T181	/workspace/coverage/default/12.sram_ctrl_smoke.864177801	May 23 02:59:45 PM PDT 24	May 23 02:59:53 PM PDT 24	384477615 ps
T182	/workspace/coverage/default/44.sram_ctrl_ram_cfg.1894822005	May 23 03:11:33 PM PDT 24	May 23 03:11:38 PM PDT 24	351890202 ps
T183	/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1126388748	May 23 03:13:37 PM PDT 24	May 23 03:19:11 PM PDT 24	59645574933 ps
T184	/workspace/coverage/default/41.sram_ctrl_mem_walk.2736262633	May 23 03:11:13 PM PDT 24	May 23 03:15:17 PM PDT 24	7887189896 ps
T185	/workspace/coverage/default/5.sram_ctrl_smoke.1745464413	May 23 02:58:50 PM PDT 24	May 23 02:59:15 PM PDT 24	6007950122 ps
T186	/workspace/coverage/default/25.sram_ctrl_alert_test.156895579	May 23 03:03:50 PM PDT 24	May 23 03:03:53 PM PDT 24	37928523 ps
T187	/workspace/coverage/default/25.sram_ctrl_bijection.323544280	May 23 03:03:27 PM PDT 24	May 23 03:21:53 PM PDT 24	134149596902 ps
T135	/workspace/coverage/default/31.sram_ctrl_executable.4244211199	May 23 03:06:09 PM PDT 24	May 23 03:22:35 PM PDT 24	64845565813 ps
T188	/workspace/coverage/default/41.sram_ctrl_smoke.1917607386	May 23 03:10:42 PM PDT 24	May 23 03:10:59 PM PDT 24	531678537 ps
T189	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.4094043281	May 23 02:58:30 PM PDT 24	May 23 03:02:07 PM PDT 24	3510873453 ps
T190	/workspace/coverage/default/38.sram_ctrl_ram_cfg.3273681767	May 23 03:08:46 PM PDT 24	May 23 03:08:51 PM PDT 24	1354492606 ps
T191	/workspace/coverage/default/39.sram_ctrl_regwen.1855429806	May 23 03:09:04 PM PDT 24	May 23 03:19:06 PM PDT 24	10400108919 ps
T192	/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1503038165	May 23 03:05:06 PM PDT 24	May 23 03:09:50 PM PDT 24	19750383372 ps
T193	/workspace/coverage/default/32.sram_ctrl_mem_walk.853200318	May 23 03:06:34 PM PDT 24	May 23 03:11:21 PM PDT 24	49215436940 ps
T194	/workspace/coverage/default/21.sram_ctrl_alert_test.3093835760	May 23 03:02:35 PM PDT 24	May 23 03:02:38 PM PDT 24	13456922 ps
T97	/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2793658316	May 23 02:58:58 PM PDT 24	May 23 03:00:17 PM PDT 24	4023242315 ps
T195	/workspace/coverage/default/35.sram_ctrl_smoke.1038734845	May 23 03:07:10 PM PDT 24	May 23 03:07:53 PM PDT 24	3785408440 ps
T196	/workspace/coverage/default/38.sram_ctrl_executable.2047212857	May 23 03:08:45 PM PDT 24	May 23 03:30:31 PM PDT 24	28919380844 ps
T197	/workspace/coverage/default/12.sram_ctrl_partial_access.3119086745	May 23 02:59:44 PM PDT 24	May 23 03:00:43 PM PDT 24	4902360403 ps
T198	/workspace/coverage/default/41.sram_ctrl_lc_escalation.2891299429	May 23 03:11:12 PM PDT 24	May 23 03:12:07 PM PDT 24	50675707653 ps
T199	/workspace/coverage/default/16.sram_ctrl_multiple_keys.3357018981	May 23 03:00:48 PM PDT 24	May 23 03:06:14 PM PDT 24	4818629063 ps
T200	/workspace/coverage/default/18.sram_ctrl_mem_walk.2110191447	May 23 03:01:35 PM PDT 24	May 23 03:03:43 PM PDT 24	8219531089 ps
T201	/workspace/coverage/default/25.sram_ctrl_mem_walk.2695739796	May 23 03:03:51 PM PDT 24	May 23 03:07:55 PM PDT 24	16411359028 ps
T202	/workspace/coverage/default/20.sram_ctrl_ram_cfg.397244930	May 23 03:01:58 PM PDT 24	May 23 03:02:03 PM PDT 24	839167597 ps
T203	/workspace/coverage/default/36.sram_ctrl_partial_access.1852593467	May 23 03:07:47 PM PDT 24	May 23 03:10:07 PM PDT 24	1639399937 ps
T204	/workspace/coverage/default/35.sram_ctrl_executable.1314736272	May 23 03:07:27 PM PDT 24	May 23 03:12:35 PM PDT 24	2779849413 ps
T205	/workspace/coverage/default/2.sram_ctrl_multiple_keys.2789523646	May 23 02:58:22 PM PDT 24	May 23 03:17:37 PM PDT 24	9940230602 ps
T98	/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1338890792	May 23 03:03:12 PM PDT 24	May 23 03:04:18 PM PDT 24	5216674118 ps
T206	/workspace/coverage/default/40.sram_ctrl_bijection.3303330354	May 23 03:09:04 PM PDT 24	May 23 03:20:30 PM PDT 24	166650664766 ps
T207	/workspace/coverage/default/47.sram_ctrl_alert_test.1146343818	May 23 03:13:37 PM PDT 24	May 23 03:13:41 PM PDT 24	52950855 ps
T208	/workspace/coverage/default/15.sram_ctrl_executable.2368571370	May 23 03:00:48 PM PDT 24	May 23 03:20:25 PM PDT 24	32083924702 ps
T209	/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3253861386	May 23 02:58:32 PM PDT 24	May 23 03:06:02 PM PDT 24	18909289595 ps
T210	/workspace/coverage/default/22.sram_ctrl_alert_test.640849849	May 23 03:02:54 PM PDT 24	May 23 03:02:56 PM PDT 24	15677104 ps
T25	/workspace/coverage/default/6.sram_ctrl_stress_all.2129172950	May 23 02:58:50 PM PDT 24	May 23 03:34:34 PM PDT 24	52719133186 ps
T211	/workspace/coverage/default/5.sram_ctrl_regwen.1214017870	May 23 02:58:46 PM PDT 24	May 23 03:13:08 PM PDT 24	4194447146 ps
T212	/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.4165670228	May 23 03:11:16 PM PDT 24	May 23 03:11:26 PM PDT 24	702837248 ps
T213	/workspace/coverage/default/40.sram_ctrl_smoke.318258395	May 23 03:09:05 PM PDT 24	May 23 03:09:26 PM PDT 24	4233162972 ps
T214	/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3007610035	May 23 03:03:51 PM PDT 24	May 23 03:04:55 PM PDT 24	1963265335 ps
T215	/workspace/coverage/default/44.sram_ctrl_bijection.85920164	May 23 03:11:32 PM PDT 24	May 23 03:46:01 PM PDT 24	95934846180 ps
T216	/workspace/coverage/default/37.sram_ctrl_bijection.1498135607	May 23 03:08:10 PM PDT 24	May 23 03:36:11 PM PDT 24	147478899892 ps
T217	/workspace/coverage/default/27.sram_ctrl_stress_pipeline.884345806	May 23 03:04:30 PM PDT 24	May 23 03:07:34 PM PDT 24	12726715481 ps
T218	/workspace/coverage/default/44.sram_ctrl_multiple_keys.1053366110	May 23 03:11:34 PM PDT 24	May 23 03:27:26 PM PDT 24	18402515855 ps
T219	/workspace/coverage/default/20.sram_ctrl_max_throughput.2142671479	May 23 03:01:58 PM PDT 24	May 23 03:02:13 PM PDT 24	719341091 ps
T220	/workspace/coverage/default/36.sram_ctrl_mem_partial_access.4112743112	May 23 03:07:48 PM PDT 24	May 23 03:10:04 PM PDT 24	4414315388 ps
T50	/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2047647020	May 23 03:04:10 PM PDT 24	May 23 03:05:00 PM PDT 24	2160051626 ps
T136	/workspace/coverage/default/46.sram_ctrl_stress_all.3310284140	May 23 03:12:29 PM PDT 24	May 23 05:25:49 PM PDT 24	359765704120 ps
T221	/workspace/coverage/default/12.sram_ctrl_mem_walk.3323627882	May 23 02:59:58 PM PDT 24	May 23 03:02:07 PM PDT 24	28170339319 ps
T222	/workspace/coverage/default/36.sram_ctrl_alert_test.3361460488	May 23 03:07:45 PM PDT 24	May 23 03:07:47 PM PDT 24	20228971 ps
T223	/workspace/coverage/default/13.sram_ctrl_partial_access.115553694	May 23 02:59:59 PM PDT 24	May 23 03:00:19 PM PDT 24	3718535894 ps
T224	/workspace/coverage/default/45.sram_ctrl_max_throughput.709109999	May 23 03:11:49 PM PDT 24	May 23 03:13:21 PM PDT 24	3283560932 ps
T225	/workspace/coverage/default/26.sram_ctrl_partial_access.4118300552	May 23 03:04:12 PM PDT 24	May 23 03:05:16 PM PDT 24	1877126029 ps
T226	/workspace/coverage/default/12.sram_ctrl_multiple_keys.1441586355	May 23 02:59:43 PM PDT 24	May 23 03:18:13 PM PDT 24	15244249183 ps
T227	/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.440730256	May 23 03:08:30 PM PDT 24	May 23 03:09:18 PM PDT 24	8122597012 ps
T228	/workspace/coverage/default/21.sram_ctrl_mem_walk.1968055790	May 23 03:02:19 PM PDT 24	May 23 03:04:21 PM PDT 24	2039966945 ps
T229	/workspace/coverage/default/41.sram_ctrl_regwen.1466130915	May 23 03:11:13 PM PDT 24	May 23 03:28:30 PM PDT 24	6087975313 ps
T230	/workspace/coverage/default/10.sram_ctrl_alert_test.4169215744	May 23 02:59:43 PM PDT 24	May 23 02:59:48 PM PDT 24	21360838 ps
T231	/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.885528955	May 23 03:00:16 PM PDT 24	May 23 03:02:27 PM PDT 24	3086875423 ps
T232	/workspace/coverage/default/24.sram_ctrl_access_during_key_req.4129690879	May 23 03:03:13 PM PDT 24	May 23 03:15:57 PM PDT 24	47375275454 ps
T233	/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.111804938	May 23 03:04:47 PM PDT 24	May 23 03:08:57 PM PDT 24	5218123310 ps
T234	/workspace/coverage/default/24.sram_ctrl_ram_cfg.3187528615	May 23 03:03:13 PM PDT 24	May 23 03:03:18 PM PDT 24	347712410 ps
T235	/workspace/coverage/default/23.sram_ctrl_bijection.2483762585	May 23 03:02:53 PM PDT 24	May 23 03:36:27 PM PDT 24	89346971237 ps
T236	/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2540270699	May 23 03:08:48 PM PDT 24	May 23 03:11:05 PM PDT 24	9740667609 ps
T237	/workspace/coverage/default/42.sram_ctrl_partial_access.4208866372	May 23 03:11:15 PM PDT 24	May 23 03:11:36 PM PDT 24	550253250 ps
T238	/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3258125612	May 23 02:58:17 PM PDT 24	May 23 03:00:52 PM PDT 24	4610431684 ps
T239	/workspace/coverage/default/6.sram_ctrl_multiple_keys.3465212216	May 23 02:58:48 PM PDT 24	May 23 03:26:13 PM PDT 24	48048916530 ps
T240	/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1481240863	May 23 02:59:44 PM PDT 24	May 23 03:02:21 PM PDT 24	5185605537 ps
T241	/workspace/coverage/default/39.sram_ctrl_mem_walk.3333700081	May 23 03:09:04 PM PDT 24	May 23 03:13:37 PM PDT 24	23177044022 ps
T242	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1134680252	May 23 03:11:34 PM PDT 24	May 23 03:17:27 PM PDT 24	16884031507 ps
T243	/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2463350252	May 23 03:07:47 PM PDT 24	May 23 03:13:12 PM PDT 24	5064386154 ps
T244	/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1962845543	May 23 03:00:49 PM PDT 24	May 23 03:15:35 PM PDT 24	14262238479 ps
T51	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.705749323	May 23 03:13:54 PM PDT 24	May 23 03:15:06 PM PDT 24	3521664792 ps
T245	/workspace/coverage/default/1.sram_ctrl_regwen.3721856611	May 23 02:58:21 PM PDT 24	May 23 03:07:04 PM PDT 24	6956262466 ps
T246	/workspace/coverage/default/35.sram_ctrl_mem_walk.1177483922	May 23 03:07:27 PM PDT 24	May 23 03:09:54 PM PDT 24	14079946600 ps
T247	/workspace/coverage/default/26.sram_ctrl_lc_escalation.2390075632	May 23 03:04:10 PM PDT 24	May 23 03:05:29 PM PDT 24	44083962227 ps
T248	/workspace/coverage/default/46.sram_ctrl_mem_partial_access.214500890	May 23 03:12:06 PM PDT 24	May 23 03:14:17 PM PDT 24	11906335759 ps
T249	/workspace/coverage/default/17.sram_ctrl_mem_partial_access.2618603407	May 23 03:01:11 PM PDT 24	May 23 03:02:14 PM PDT 24	5971678923 ps
T250	/workspace/coverage/default/26.sram_ctrl_ram_cfg.2302073577	May 23 03:04:11 PM PDT 24	May 23 03:04:16 PM PDT 24	691955776 ps
T251	/workspace/coverage/default/41.sram_ctrl_multiple_keys.3608065167	May 23 03:10:42 PM PDT 24	May 23 03:34:37 PM PDT 24	56358192024 ps
T252	/workspace/coverage/default/4.sram_ctrl_alert_test.977307997	May 23 02:58:48 PM PDT 24	May 23 02:58:51 PM PDT 24	16582399 ps
T253	/workspace/coverage/default/31.sram_ctrl_max_throughput.2090774353	May 23 03:06:09 PM PDT 24	May 23 03:07:16 PM PDT 24	756244953 ps
T254	/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1364802884	May 23 03:03:12 PM PDT 24	May 23 03:09:29 PM PDT 24	27898012670 ps
T255	/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1786082760	May 23 03:04:28 PM PDT 24	May 23 03:05:34 PM PDT 24	750702107 ps
T256	/workspace/coverage/default/11.sram_ctrl_partial_access.1574917654	May 23 02:59:45 PM PDT 24	May 23 03:00:06 PM PDT 24	6591444640 ps
T257	/workspace/coverage/default/36.sram_ctrl_stress_all.490417890	May 23 03:07:46 PM PDT 24	May 23 04:36:54 PM PDT 24	108720582245 ps
T258	/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3776073451	May 23 03:01:15 PM PDT 24	May 23 03:02:51 PM PDT 24	1722624931 ps
T259	/workspace/coverage/default/2.sram_ctrl_max_throughput.4079716512	May 23 02:58:22 PM PDT 24	May 23 02:58:47 PM PDT 24	8807371341 ps
T260	/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.251906487	May 23 03:01:59 PM PDT 24	May 23 03:09:09 PM PDT 24	17723204202 ps
T261	/workspace/coverage/default/45.sram_ctrl_ram_cfg.1216911495	May 23 03:11:49 PM PDT 24	May 23 03:11:54 PM PDT 24	676761948 ps
T262	/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2685414149	May 23 02:58:15 PM PDT 24	May 23 03:17:24 PM PDT 24	54275035024 ps
T263	/workspace/coverage/default/43.sram_ctrl_max_throughput.1065050837	May 23 03:11:35 PM PDT 24	May 23 03:12:51 PM PDT 24	1526062406 ps
T264	/workspace/coverage/default/31.sram_ctrl_access_during_key_req.4193809566	May 23 03:06:11 PM PDT 24	May 23 03:15:21 PM PDT 24	31380249789 ps
T265	/workspace/coverage/default/42.sram_ctrl_access_during_key_req.844411083	May 23 03:11:12 PM PDT 24	May 23 03:31:21 PM PDT 24	80457670535 ps
T266	/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.722382351	May 23 02:58:14 PM PDT 24	May 23 03:02:58 PM PDT 24	5155553100 ps
T267	/workspace/coverage/default/49.sram_ctrl_multiple_keys.199780440	May 23 03:13:55 PM PDT 24	May 23 03:33:40 PM PDT 24	157247552807 ps
T268	/workspace/coverage/default/10.sram_ctrl_multiple_keys.183195340	May 23 02:59:30 PM PDT 24	May 23 03:02:03 PM PDT 24	1548153617 ps
T269	/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3027006563	May 23 02:59:44 PM PDT 24	May 23 03:02:00 PM PDT 24	6791233590 ps
T270	/workspace/coverage/default/16.sram_ctrl_stress_pipeline.2334918610	May 23 03:00:49 PM PDT 24	May 23 03:04:56 PM PDT 24	16815900611 ps
T271	/workspace/coverage/default/18.sram_ctrl_lc_escalation.1358728315	May 23 03:01:35 PM PDT 24	May 23 03:02:07 PM PDT 24	5637215982 ps
T52	/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.860230314	May 23 03:08:27 PM PDT 24	May 23 03:10:52 PM PDT 24	19677765699 ps
T272	/workspace/coverage/default/37.sram_ctrl_access_during_key_req.90743380	May 23 03:08:09 PM PDT 24	May 23 03:29:35 PM PDT 24	174569838123 ps
T273	/workspace/coverage/default/8.sram_ctrl_executable.2378823600	May 23 02:58:50 PM PDT 24	May 23 03:09:16 PM PDT 24	7804888509 ps
T274	/workspace/coverage/default/0.sram_ctrl_executable.4264794668	May 23 02:58:17 PM PDT 24	May 23 03:08:09 PM PDT 24	68224521079 ps
T275	/workspace/coverage/default/23.sram_ctrl_lc_escalation.2501239714	May 23 03:02:53 PM PDT 24	May 23 03:03:34 PM PDT 24	6594736080 ps
T276	/workspace/coverage/default/1.sram_ctrl_executable.707551710	May 23 02:58:16 PM PDT 24	May 23 03:26:40 PM PDT 24	11579769337 ps
T277	/workspace/coverage/default/22.sram_ctrl_bijection.637635329	May 23 03:02:39 PM PDT 24	May 23 03:16:20 PM PDT 24	48527587475 ps
T278	/workspace/coverage/default/33.sram_ctrl_executable.3762485708	May 23 03:06:34 PM PDT 24	May 23 03:19:45 PM PDT 24	16424021555 ps
T279	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.649010072	May 23 02:58:28 PM PDT 24	May 23 03:20:10 PM PDT 24	12950161679 ps
T280	/workspace/coverage/default/10.sram_ctrl_regwen.3511942006	May 23 02:59:32 PM PDT 24	May 23 03:08:35 PM PDT 24	43630597081 ps
T53	/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2915763349	May 23 03:11:32 PM PDT 24	May 23 03:11:49 PM PDT 24	282903892 ps
T281	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.1965800446	May 23 03:01:08 PM PDT 24	May 23 03:06:35 PM PDT 24	7092585934 ps
T15	/workspace/coverage/default/1.sram_ctrl_sec_cm.798292572	May 23 02:58:22 PM PDT 24	May 23 02:58:28 PM PDT 24	1300971460 ps
T35	/workspace/coverage/default/30.sram_ctrl_max_throughput.313653868	May 23 03:05:07 PM PDT 24	May 23 03:06:16 PM PDT 24	766069957 ps
T36	/workspace/coverage/default/30.sram_ctrl_bijection.1422305420	May 23 03:05:06 PM PDT 24	May 23 03:39:57 PM PDT 24	122068999920 ps
T37	/workspace/coverage/default/35.sram_ctrl_max_throughput.2867539334	May 23 03:07:10 PM PDT 24	May 23 03:07:55 PM PDT 24	933225495 ps
T38	/workspace/coverage/default/11.sram_ctrl_stress_all.2591865554	May 23 02:59:44 PM PDT 24	May 23 03:51:34 PM PDT 24	56606420330 ps
T39	/workspace/coverage/default/44.sram_ctrl_executable.3136468760	May 23 03:11:33 PM PDT 24	May 23 03:27:55 PM PDT 24	114425210155 ps
T40	/workspace/coverage/default/6.sram_ctrl_regwen.2640766766	May 23 02:58:51 PM PDT 24	May 23 03:03:46 PM PDT 24	1219588687 ps
T41	/workspace/coverage/default/8.sram_ctrl_alert_test.1114759789	May 23 02:59:17 PM PDT 24	May 23 02:59:20 PM PDT 24	13251552 ps
T42	/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3804849200	May 23 03:00:00 PM PDT 24	May 23 03:13:44 PM PDT 24	44634570314 ps
T43	/workspace/coverage/default/41.sram_ctrl_ram_cfg.3722810529	May 23 03:11:12 PM PDT 24	May 23 03:11:18 PM PDT 24	354634827 ps
T282	/workspace/coverage/default/32.sram_ctrl_max_throughput.1516932053	May 23 03:06:37 PM PDT 24	May 23 03:07:13 PM PDT 24	755946924 ps
T283	/workspace/coverage/default/3.sram_ctrl_max_throughput.3936215852	May 23 02:58:18 PM PDT 24	May 23 02:59:08 PM PDT 24	734220280 ps
T284	/workspace/coverage/default/24.sram_ctrl_executable.448695202	May 23 03:03:12 PM PDT 24	May 23 03:19:34 PM PDT 24	32813235077 ps
T16	/workspace/coverage/default/0.sram_ctrl_sec_cm.1244730581	May 23 02:58:20 PM PDT 24	May 23 02:58:25 PM PDT 24	124610897 ps
T285	/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3547091279	May 23 03:03:26 PM PDT 24	May 23 03:07:54 PM PDT 24	4710719496 ps
T286	/workspace/coverage/default/42.sram_ctrl_ram_cfg.3015029980	May 23 03:11:12 PM PDT 24	May 23 03:11:18 PM PDT 24	1305218062 ps
T287	/workspace/coverage/default/3.sram_ctrl_bijection.588224344	May 23 02:58:14 PM PDT 24	May 23 03:43:18 PM PDT 24	150992149628 ps
T288	/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3821801100	May 23 02:58:11 PM PDT 24	May 23 03:00:33 PM PDT 24	3395201058 ps
T289	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2348531951	May 23 03:10:43 PM PDT 24	May 23 03:11:58 PM PDT 24	746298869 ps
T290	/workspace/coverage/default/27.sram_ctrl_smoke.1038747880	May 23 03:04:11 PM PDT 24	May 23 03:04:31 PM PDT 24	1891267181 ps
T291	/workspace/coverage/default/36.sram_ctrl_multiple_keys.511409060	May 23 03:07:26 PM PDT 24	May 23 03:16:14 PM PDT 24	11292892515 ps
T292	/workspace/coverage/default/38.sram_ctrl_stress_all.1863943798	May 23 03:08:49 PM PDT 24	May 23 03:26:56 PM PDT 24	131047721243 ps
T293	/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1798183430	May 23 03:08:10 PM PDT 24	May 23 03:12:57 PM PDT 24	13216929206 ps
T294	/workspace/coverage/default/30.sram_ctrl_access_during_key_req.3055965051	May 23 03:05:27 PM PDT 24	May 23 03:08:32 PM PDT 24	3432340349 ps
T54	/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1423611449	May 23 03:02:20 PM PDT 24	May 23 03:04:41 PM PDT 24	5809060956 ps
T295	/workspace/coverage/default/47.sram_ctrl_access_during_key_req.638118594	May 23 03:13:24 PM PDT 24	May 23 03:21:02 PM PDT 24	6767533389 ps
T296	/workspace/coverage/default/48.sram_ctrl_partial_access.3908570457	May 23 03:13:39 PM PDT 24	May 23 03:15:31 PM PDT 24	2247370220 ps
T297	/workspace/coverage/default/25.sram_ctrl_partial_access.2250226917	May 23 03:03:27 PM PDT 24	May 23 03:04:30 PM PDT 24	465923649 ps
T298	/workspace/coverage/default/17.sram_ctrl_executable.2297585656	May 23 03:01:12 PM PDT 24	May 23 03:14:29 PM PDT 24	5853434452 ps
T299	/workspace/coverage/default/29.sram_ctrl_executable.2701013569	May 23 03:05:06 PM PDT 24	May 23 03:22:56 PM PDT 24	161237146445 ps
T300	/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.195803714	May 23 02:59:57 PM PDT 24	May 23 03:08:18 PM PDT 24	21983804799 ps
T301	/workspace/coverage/default/13.sram_ctrl_executable.3301226304	May 23 02:59:59 PM PDT 24	May 23 03:08:40 PM PDT 24	7752529292 ps
T302	/workspace/coverage/default/13.sram_ctrl_ram_cfg.2770762775	May 23 02:59:59 PM PDT 24	May 23 03:00:05 PM PDT 24	919357445 ps
T303	/workspace/coverage/default/14.sram_ctrl_regwen.948247864	May 23 03:00:14 PM PDT 24	May 23 03:20:49 PM PDT 24	56281411943 ps
T304	/workspace/coverage/default/39.sram_ctrl_executable.452439334	May 23 03:09:05 PM PDT 24	May 23 03:09:54 PM PDT 24	1291593151 ps
T305	/workspace/coverage/default/12.sram_ctrl_bijection.1955893693	May 23 02:59:44 PM PDT 24	May 23 03:44:06 PM PDT 24	119967895537 ps