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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
98.28 99.21 95.41 100.00 100.00 96.19 99.56 97.62


Total test records in report: 908
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T55 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.722510413 May 28 01:29:22 PM PDT 24 May 28 01:29:33 PM PDT 24 1087925676 ps
T303 /workspace/coverage/default/18.sram_ctrl_smoke.3536819146 May 28 01:29:35 PM PDT 24 May 28 01:30:19 PM PDT 24 2272467232 ps
T304 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2973058285 May 28 01:32:01 PM PDT 24 May 28 01:37:10 PM PDT 24 9820612646 ps
T56 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3343172240 May 28 01:31:27 PM PDT 24 May 28 01:31:50 PM PDT 24 2184522196 ps
T305 /workspace/coverage/default/48.sram_ctrl_max_throughput.743538329 May 28 01:33:50 PM PDT 24 May 28 01:34:40 PM PDT 24 770759563 ps
T306 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2875308377 May 28 01:29:24 PM PDT 24 May 28 01:32:15 PM PDT 24 21354119273 ps
T307 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1307256654 May 28 01:29:00 PM PDT 24 May 28 01:32:51 PM PDT 24 4552706447 ps
T308 /workspace/coverage/default/6.sram_ctrl_lc_escalation.1068368890 May 28 01:28:46 PM PDT 24 May 28 01:29:30 PM PDT 24 6010730237 ps
T309 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2362931765 May 28 01:30:58 PM PDT 24 May 28 01:31:48 PM PDT 24 1857519333 ps
T310 /workspace/coverage/default/38.sram_ctrl_mem_walk.1431741376 May 28 01:32:03 PM PDT 24 May 28 01:38:32 PM PDT 24 277195329148 ps
T311 /workspace/coverage/default/46.sram_ctrl_alert_test.2132800845 May 28 01:33:28 PM PDT 24 May 28 01:33:29 PM PDT 24 14519256 ps
T312 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3694045061 May 28 01:29:34 PM PDT 24 May 28 01:32:26 PM PDT 24 4876655491 ps
T313 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3928171236 May 28 01:32:48 PM PDT 24 May 28 01:38:28 PM PDT 24 61922811398 ps
T314 /workspace/coverage/default/11.sram_ctrl_partial_access.675285068 May 28 01:29:12 PM PDT 24 May 28 01:30:55 PM PDT 24 1153550485 ps
T315 /workspace/coverage/default/22.sram_ctrl_alert_test.3937092883 May 28 01:30:02 PM PDT 24 May 28 01:30:06 PM PDT 24 17933034 ps
T316 /workspace/coverage/default/22.sram_ctrl_regwen.498852564 May 28 01:30:02 PM PDT 24 May 28 01:33:39 PM PDT 24 19858493761 ps
T317 /workspace/coverage/default/8.sram_ctrl_executable.25531266 May 28 01:29:02 PM PDT 24 May 28 01:35:14 PM PDT 24 5545763771 ps
T318 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2196984732 May 28 01:32:37 PM PDT 24 May 28 01:32:51 PM PDT 24 701679005 ps
T319 /workspace/coverage/default/48.sram_ctrl_bijection.2398613741 May 28 01:33:43 PM PDT 24 May 28 01:44:49 PM PDT 24 28826213410 ps
T320 /workspace/coverage/default/37.sram_ctrl_regwen.2311000513 May 28 01:32:03 PM PDT 24 May 28 01:49:50 PM PDT 24 26691153375 ps
T321 /workspace/coverage/default/20.sram_ctrl_lc_escalation.131405941 May 28 01:29:45 PM PDT 24 May 28 01:30:05 PM PDT 24 14238144251 ps
T322 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1607114853 May 28 01:32:26 PM PDT 24 May 28 01:32:35 PM PDT 24 2695049571 ps
T323 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1132206990 May 28 01:28:28 PM PDT 24 May 28 01:29:45 PM PDT 24 12107474886 ps
T324 /workspace/coverage/default/1.sram_ctrl_lc_escalation.452992366 May 28 01:28:29 PM PDT 24 May 28 01:29:03 PM PDT 24 23162750383 ps
T325 /workspace/coverage/default/24.sram_ctrl_regwen.1093355544 May 28 01:30:19 PM PDT 24 May 28 01:49:57 PM PDT 24 7738706306 ps
T326 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3477046004 May 28 01:30:15 PM PDT 24 May 28 01:31:20 PM PDT 24 970491833 ps
T327 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1207031750 May 28 01:30:16 PM PDT 24 May 28 01:30:42 PM PDT 24 748469081 ps
T328 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3273466986 May 28 01:30:58 PM PDT 24 May 28 01:33:36 PM PDT 24 22075431487 ps
T329 /workspace/coverage/default/18.sram_ctrl_regwen.1001343814 May 28 01:29:34 PM PDT 24 May 28 01:35:26 PM PDT 24 11137728204 ps
T330 /workspace/coverage/default/39.sram_ctrl_mem_walk.2605703038 May 28 01:32:17 PM PDT 24 May 28 01:37:16 PM PDT 24 40388310196 ps
T331 /workspace/coverage/default/45.sram_ctrl_executable.2360335317 May 28 01:33:17 PM PDT 24 May 28 01:36:29 PM PDT 24 1849330175 ps
T332 /workspace/coverage/default/48.sram_ctrl_executable.2974531361 May 28 01:33:44 PM PDT 24 May 28 01:34:45 PM PDT 24 2446060146 ps
T333 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.705593237 May 28 01:30:58 PM PDT 24 May 28 01:32:46 PM PDT 24 2938138313 ps
T334 /workspace/coverage/default/11.sram_ctrl_alert_test.3799580856 May 28 01:29:24 PM PDT 24 May 28 01:29:28 PM PDT 24 41556746 ps
T335 /workspace/coverage/default/33.sram_ctrl_smoke.611106899 May 28 01:31:15 PM PDT 24 May 28 01:32:44 PM PDT 24 809247119 ps
T336 /workspace/coverage/default/1.sram_ctrl_mem_walk.808831646 May 28 01:28:30 PM PDT 24 May 28 01:30:37 PM PDT 24 8219382490 ps
T337 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.1213768783 May 28 01:31:41 PM PDT 24 May 28 01:34:26 PM PDT 24 12051937205 ps
T338 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.633103760 May 28 01:33:33 PM PDT 24 May 28 01:34:01 PM PDT 24 14202511851 ps
T339 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3703449446 May 28 01:30:42 PM PDT 24 May 28 01:35:58 PM PDT 24 6713712052 ps
T340 /workspace/coverage/default/31.sram_ctrl_bijection.2855566063 May 28 01:31:04 PM PDT 24 May 28 01:56:37 PM PDT 24 332086395135 ps
T341 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3907590303 May 28 01:30:02 PM PDT 24 May 28 01:31:12 PM PDT 24 1972610064 ps
T342 /workspace/coverage/default/32.sram_ctrl_alert_test.1452987954 May 28 01:31:16 PM PDT 24 May 28 01:31:18 PM PDT 24 16534627 ps
T343 /workspace/coverage/default/21.sram_ctrl_smoke.111922621 May 28 01:30:01 PM PDT 24 May 28 01:30:11 PM PDT 24 1962394662 ps
T344 /workspace/coverage/default/43.sram_ctrl_lc_escalation.452716154 May 28 01:32:47 PM PDT 24 May 28 01:34:17 PM PDT 24 55570869847 ps
T345 /workspace/coverage/default/27.sram_ctrl_bijection.683689275 May 28 01:30:41 PM PDT 24 May 28 02:05:51 PM PDT 24 438034838157 ps
T346 /workspace/coverage/default/42.sram_ctrl_regwen.476937247 May 28 01:32:37 PM PDT 24 May 28 01:36:52 PM PDT 24 1011471177 ps
T347 /workspace/coverage/default/46.sram_ctrl_max_throughput.737777530 May 28 01:33:18 PM PDT 24 May 28 01:33:40 PM PDT 24 1016219248 ps
T348 /workspace/coverage/default/6.sram_ctrl_smoke.1978743846 May 28 01:28:46 PM PDT 24 May 28 01:29:53 PM PDT 24 909483707 ps
T74 /workspace/coverage/default/35.sram_ctrl_executable.288485785 May 28 01:31:38 PM PDT 24 May 28 01:46:49 PM PDT 24 7371961331 ps
T349 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1868805747 May 28 01:33:19 PM PDT 24 May 28 01:41:18 PM PDT 24 8680027754 ps
T350 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.965944 May 28 01:32:25 PM PDT 24 May 28 01:37:26 PM PDT 24 23440117952 ps
T351 /workspace/coverage/default/28.sram_ctrl_ram_cfg.444941229 May 28 01:30:59 PM PDT 24 May 28 01:31:06 PM PDT 24 396807217 ps
T352 /workspace/coverage/default/2.sram_ctrl_multiple_keys.2527877959 May 28 01:28:31 PM PDT 24 May 28 01:41:22 PM PDT 24 14712442001 ps
T353 /workspace/coverage/default/37.sram_ctrl_alert_test.677359807 May 28 01:32:02 PM PDT 24 May 28 01:32:05 PM PDT 24 10571784 ps
T354 /workspace/coverage/default/23.sram_ctrl_mem_walk.4123774532 May 28 01:30:16 PM PDT 24 May 28 01:33:16 PM PDT 24 41408559002 ps
T355 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.1693578536 May 28 01:30:01 PM PDT 24 May 28 01:31:23 PM PDT 24 14644017809 ps
T356 /workspace/coverage/default/43.sram_ctrl_alert_test.263611630 May 28 01:32:47 PM PDT 24 May 28 01:32:49 PM PDT 24 24017736 ps
T357 /workspace/coverage/default/38.sram_ctrl_lc_escalation.3502028831 May 28 01:32:01 PM PDT 24 May 28 01:32:31 PM PDT 24 7912296452 ps
T358 /workspace/coverage/default/40.sram_ctrl_mem_walk.3981121380 May 28 01:32:15 PM PDT 24 May 28 01:34:12 PM PDT 24 2018558659 ps
T359 /workspace/coverage/default/11.sram_ctrl_bijection.3074738223 May 28 01:29:13 PM PDT 24 May 28 02:13:41 PM PDT 24 303967050829 ps
T360 /workspace/coverage/default/29.sram_ctrl_regwen.3264918388 May 28 01:30:56 PM PDT 24 May 28 01:42:59 PM PDT 24 18432610814 ps
T361 /workspace/coverage/default/8.sram_ctrl_max_throughput.3271919694 May 28 01:29:01 PM PDT 24 May 28 01:30:44 PM PDT 24 2749625926 ps
T362 /workspace/coverage/default/2.sram_ctrl_executable.1929976139 May 28 01:28:35 PM PDT 24 May 28 01:42:42 PM PDT 24 12781950402 ps
T75 /workspace/coverage/default/42.sram_ctrl_executable.61261595 May 28 01:33:44 PM PDT 24 May 28 01:44:46 PM PDT 24 15615290317 ps
T363 /workspace/coverage/default/14.sram_ctrl_ram_cfg.396899001 May 28 01:29:20 PM PDT 24 May 28 01:29:25 PM PDT 24 368514182 ps
T364 /workspace/coverage/default/5.sram_ctrl_regwen.197511639 May 28 01:28:45 PM PDT 24 May 28 01:44:03 PM PDT 24 3085674818 ps
T365 /workspace/coverage/default/47.sram_ctrl_smoke.1186739388 May 28 01:33:29 PM PDT 24 May 28 01:35:41 PM PDT 24 18549374801 ps
T366 /workspace/coverage/default/21.sram_ctrl_mem_walk.715773482 May 28 01:30:02 PM PDT 24 May 28 01:32:42 PM PDT 24 11180246959 ps
T367 /workspace/coverage/default/27.sram_ctrl_partial_access.147204372 May 28 01:30:39 PM PDT 24 May 28 01:30:47 PM PDT 24 1636649859 ps
T368 /workspace/coverage/default/25.sram_ctrl_mem_walk.2044027394 May 28 01:30:40 PM PDT 24 May 28 01:35:47 PM PDT 24 40393114618 ps
T369 /workspace/coverage/default/29.sram_ctrl_executable.812113220 May 28 01:30:59 PM PDT 24 May 28 01:48:12 PM PDT 24 65971628093 ps
T370 /workspace/coverage/default/48.sram_ctrl_multiple_keys.643425958 May 28 01:33:49 PM PDT 24 May 28 01:36:40 PM PDT 24 14935214110 ps
T371 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.4133205164 May 28 01:28:58 PM PDT 24 May 28 01:31:59 PM PDT 24 50489549605 ps
T372 /workspace/coverage/default/5.sram_ctrl_smoke.3325754794 May 28 01:28:42 PM PDT 24 May 28 01:30:16 PM PDT 24 2511233655 ps
T373 /workspace/coverage/default/22.sram_ctrl_max_throughput.232766669 May 28 01:30:01 PM PDT 24 May 28 01:31:08 PM PDT 24 747935026 ps
T374 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2144535045 May 28 01:32:36 PM PDT 24 May 28 01:32:41 PM PDT 24 692637661 ps
T375 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2424633091 May 28 01:30:54 PM PDT 24 May 28 01:31:13 PM PDT 24 3877706380 ps
T376 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3398396686 May 28 01:29:22 PM PDT 24 May 28 01:31:43 PM PDT 24 1082732385 ps
T377 /workspace/coverage/default/36.sram_ctrl_ram_cfg.2692798466 May 28 01:31:51 PM PDT 24 May 28 01:31:58 PM PDT 24 1413782771 ps
T378 /workspace/coverage/default/25.sram_ctrl_bijection.1648419079 May 28 01:30:17 PM PDT 24 May 28 01:52:57 PM PDT 24 370655577347 ps
T379 /workspace/coverage/default/30.sram_ctrl_regwen.1014489639 May 28 01:30:57 PM PDT 24 May 28 01:43:57 PM PDT 24 14117485551 ps
T380 /workspace/coverage/default/30.sram_ctrl_executable.3796614572 May 28 01:31:03 PM PDT 24 May 28 01:42:04 PM PDT 24 26977768988 ps
T381 /workspace/coverage/default/49.sram_ctrl_bijection.588881827 May 28 01:33:53 PM PDT 24 May 28 02:06:38 PM PDT 24 390058979195 ps
T382 /workspace/coverage/default/30.sram_ctrl_smoke.1927846551 May 28 01:30:55 PM PDT 24 May 28 01:31:04 PM PDT 24 1785230798 ps
T383 /workspace/coverage/default/5.sram_ctrl_ram_cfg.1069954021 May 28 01:28:45 PM PDT 24 May 28 01:28:51 PM PDT 24 690023548 ps
T384 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2115596916 May 28 01:29:46 PM PDT 24 May 28 01:38:30 PM PDT 24 106213162006 ps
T385 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2510463424 May 28 01:31:51 PM PDT 24 May 28 01:39:56 PM PDT 24 22146388467 ps
T386 /workspace/coverage/default/7.sram_ctrl_executable.3005980279 May 28 01:29:04 PM PDT 24 May 28 01:45:06 PM PDT 24 154908253526 ps
T387 /workspace/coverage/default/18.sram_ctrl_multiple_keys.4063117145 May 28 01:29:36 PM PDT 24 May 28 01:46:15 PM PDT 24 28739850161 ps
T388 /workspace/coverage/default/38.sram_ctrl_executable.4012510242 May 28 01:32:02 PM PDT 24 May 28 01:38:32 PM PDT 24 15325312554 ps
T389 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.747097389 May 28 01:31:16 PM PDT 24 May 28 01:39:13 PM PDT 24 34540740478 ps
T390 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.923056091 May 28 01:31:38 PM PDT 24 May 28 01:32:22 PM PDT 24 14628601969 ps
T391 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.113679594 May 28 01:29:13 PM PDT 24 May 28 01:36:08 PM PDT 24 6195924911 ps
T392 /workspace/coverage/default/32.sram_ctrl_executable.3491622656 May 28 01:31:16 PM PDT 24 May 28 01:39:58 PM PDT 24 8592513389 ps
T393 /workspace/coverage/default/28.sram_ctrl_max_throughput.794672820 May 28 01:30:55 PM PDT 24 May 28 01:31:37 PM PDT 24 2909993956 ps
T394 /workspace/coverage/default/30.sram_ctrl_max_throughput.1504602910 May 28 01:30:58 PM PDT 24 May 28 01:31:27 PM PDT 24 742380849 ps
T395 /workspace/coverage/default/0.sram_ctrl_ram_cfg.849740032 May 28 01:28:31 PM PDT 24 May 28 01:28:39 PM PDT 24 869478433 ps
T396 /workspace/coverage/default/31.sram_ctrl_ram_cfg.609262364 May 28 01:31:05 PM PDT 24 May 28 01:31:12 PM PDT 24 353499336 ps
T397 /workspace/coverage/default/45.sram_ctrl_mem_walk.1883807565 May 28 01:33:18 PM PDT 24 May 28 01:35:48 PM PDT 24 7137617719 ps
T398 /workspace/coverage/default/37.sram_ctrl_bijection.3376328763 May 28 01:31:49 PM PDT 24 May 28 02:02:03 PM PDT 24 96855439409 ps
T76 /workspace/coverage/default/24.sram_ctrl_executable.3552827337 May 28 01:30:17 PM PDT 24 May 28 01:47:51 PM PDT 24 54600335058 ps
T399 /workspace/coverage/default/13.sram_ctrl_multiple_keys.815469057 May 28 01:29:18 PM PDT 24 May 28 01:34:25 PM PDT 24 17315644316 ps
T400 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2262569065 May 28 01:32:37 PM PDT 24 May 28 01:40:20 PM PDT 24 20949538206 ps
T401 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1453436891 May 28 01:29:33 PM PDT 24 May 28 01:31:57 PM PDT 24 1619189298 ps
T402 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3801138571 May 28 01:33:43 PM PDT 24 May 28 01:41:34 PM PDT 24 9696993329 ps
T403 /workspace/coverage/default/38.sram_ctrl_smoke.939154092 May 28 01:32:01 PM PDT 24 May 28 01:34:05 PM PDT 24 2801817214 ps
T404 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2912611076 May 28 01:29:02 PM PDT 24 May 28 01:30:55 PM PDT 24 807737904 ps
T405 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2132913311 May 28 01:31:05 PM PDT 24 May 28 01:32:01 PM PDT 24 28739714738 ps
T406 /workspace/coverage/default/21.sram_ctrl_max_throughput.3153010201 May 28 01:30:01 PM PDT 24 May 28 01:32:28 PM PDT 24 783615219 ps
T407 /workspace/coverage/default/11.sram_ctrl_mem_walk.407393597 May 28 01:29:13 PM PDT 24 May 28 01:34:21 PM PDT 24 21878123292 ps
T408 /workspace/coverage/default/37.sram_ctrl_multiple_keys.463755817 May 28 01:31:50 PM PDT 24 May 28 01:45:37 PM PDT 24 16252159073 ps
T409 /workspace/coverage/default/30.sram_ctrl_alert_test.3968222134 May 28 01:31:06 PM PDT 24 May 28 01:31:11 PM PDT 24 35185290 ps
T410 /workspace/coverage/default/19.sram_ctrl_partial_access.665230330 May 28 01:29:45 PM PDT 24 May 28 01:29:54 PM PDT 24 3291043902 ps
T411 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3497489365 May 28 01:31:35 PM PDT 24 May 28 01:31:40 PM PDT 24 5584751924 ps
T57 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3409600171 May 28 01:29:14 PM PDT 24 May 28 01:29:27 PM PDT 24 515407773 ps
T412 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2768936623 May 28 01:28:31 PM PDT 24 May 28 01:28:38 PM PDT 24 376834989 ps
T413 /workspace/coverage/default/44.sram_ctrl_max_throughput.1394451070 May 28 01:33:05 PM PDT 24 May 28 01:33:18 PM PDT 24 690849199 ps
T414 /workspace/coverage/default/6.sram_ctrl_alert_test.3368024853 May 28 01:28:59 PM PDT 24 May 28 01:29:01 PM PDT 24 16851736 ps
T415 /workspace/coverage/default/39.sram_ctrl_max_throughput.1436256648 May 28 01:32:14 PM PDT 24 May 28 01:33:54 PM PDT 24 777811477 ps
T416 /workspace/coverage/default/9.sram_ctrl_executable.656717425 May 28 01:29:01 PM PDT 24 May 28 01:37:56 PM PDT 24 13757579018 ps
T417 /workspace/coverage/default/12.sram_ctrl_regwen.3474522730 May 28 01:29:24 PM PDT 24 May 28 01:41:14 PM PDT 24 9849394038 ps
T418 /workspace/coverage/default/6.sram_ctrl_mem_walk.1481575110 May 28 01:28:59 PM PDT 24 May 28 01:33:15 PM PDT 24 23176357678 ps
T419 /workspace/coverage/default/15.sram_ctrl_smoke.2175283121 May 28 01:29:24 PM PDT 24 May 28 01:29:50 PM PDT 24 5961268878 ps
T420 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2777921008 May 28 01:30:59 PM PDT 24 May 28 01:57:04 PM PDT 24 102036293680 ps
T421 /workspace/coverage/default/12.sram_ctrl_multiple_keys.571235040 May 28 01:29:14 PM PDT 24 May 28 01:42:34 PM PDT 24 5748085535 ps
T422 /workspace/coverage/default/23.sram_ctrl_lc_escalation.877688717 May 28 01:30:15 PM PDT 24 May 28 01:31:48 PM PDT 24 52182437559 ps
T423 /workspace/coverage/default/5.sram_ctrl_max_throughput.130422305 May 28 01:28:44 PM PDT 24 May 28 01:31:16 PM PDT 24 800114334 ps
T424 /workspace/coverage/default/49.sram_ctrl_mem_walk.1224632326 May 28 01:33:53 PM PDT 24 May 28 01:36:16 PM PDT 24 19727925793 ps
T425 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3862074577 May 28 01:28:28 PM PDT 24 May 28 01:31:53 PM PDT 24 4285572578 ps
T426 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.457419546 May 28 01:28:29 PM PDT 24 May 28 01:30:50 PM PDT 24 3016796333 ps
T427 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2871398902 May 28 01:31:02 PM PDT 24 May 28 01:36:26 PM PDT 24 5499227209 ps
T428 /workspace/coverage/default/21.sram_ctrl_ram_cfg.90386440 May 28 01:30:01 PM PDT 24 May 28 01:30:06 PM PDT 24 362550254 ps
T429 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2445581058 May 28 01:28:44 PM PDT 24 May 28 01:28:51 PM PDT 24 1408230014 ps
T430 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3016611629 May 28 01:28:33 PM PDT 24 May 28 01:36:42 PM PDT 24 20426720919 ps
T431 /workspace/coverage/default/25.sram_ctrl_partial_access.3923919724 May 28 01:30:20 PM PDT 24 May 28 01:30:43 PM PDT 24 2669096863 ps
T432 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3895931676 May 28 01:33:18 PM PDT 24 May 28 01:34:51 PM PDT 24 4763066051 ps
T433 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.388079778 May 28 01:29:04 PM PDT 24 May 28 01:32:47 PM PDT 24 9607140513 ps
T434 /workspace/coverage/default/23.sram_ctrl_ram_cfg.1120689664 May 28 01:30:19 PM PDT 24 May 28 01:30:24 PM PDT 24 742462871 ps
T435 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.302178476 May 28 01:33:05 PM PDT 24 May 28 01:38:16 PM PDT 24 25372814275 ps
T436 /workspace/coverage/default/25.sram_ctrl_stress_all.3566960779 May 28 01:30:40 PM PDT 24 May 28 02:42:52 PM PDT 24 215422165895 ps
T437 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2257416554 May 28 01:29:55 PM PDT 24 May 28 01:33:30 PM PDT 24 4063714663 ps
T438 /workspace/coverage/default/4.sram_ctrl_executable.435331359 May 28 01:28:43 PM PDT 24 May 28 01:36:23 PM PDT 24 9172245299 ps
T439 /workspace/coverage/default/5.sram_ctrl_partial_access.3208391127 May 28 01:28:42 PM PDT 24 May 28 01:30:36 PM PDT 24 14808511207 ps
T440 /workspace/coverage/default/46.sram_ctrl_partial_access.3010367381 May 28 01:33:19 PM PDT 24 May 28 01:36:20 PM PDT 24 3135649856 ps
T441 /workspace/coverage/default/25.sram_ctrl_multiple_keys.2820533751 May 28 01:30:13 PM PDT 24 May 28 01:56:43 PM PDT 24 30013879976 ps
T442 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3129241729 May 28 01:30:42 PM PDT 24 May 28 01:30:47 PM PDT 24 348888524 ps
T443 /workspace/coverage/default/13.sram_ctrl_max_throughput.1321314483 May 28 01:29:15 PM PDT 24 May 28 01:31:05 PM PDT 24 944550534 ps
T444 /workspace/coverage/default/36.sram_ctrl_alert_test.3540924591 May 28 01:31:48 PM PDT 24 May 28 01:31:50 PM PDT 24 35949201 ps
T77 /workspace/coverage/default/43.sram_ctrl_executable.1320782987 May 28 01:32:46 PM PDT 24 May 28 01:52:35 PM PDT 24 167390896239 ps
T445 /workspace/coverage/default/8.sram_ctrl_multiple_keys.928819216 May 28 01:29:00 PM PDT 24 May 28 01:39:54 PM PDT 24 13514485807 ps
T446 /workspace/coverage/default/1.sram_ctrl_alert_test.1560939121 May 28 01:28:30 PM PDT 24 May 28 01:28:35 PM PDT 24 14550734 ps
T447 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.528667140 May 28 01:29:20 PM PDT 24 May 28 01:37:06 PM PDT 24 44317398098 ps
T448 /workspace/coverage/default/38.sram_ctrl_multiple_keys.2761820217 May 28 01:32:02 PM PDT 24 May 28 01:45:02 PM PDT 24 5223942890 ps
T449 /workspace/coverage/default/44.sram_ctrl_mem_walk.957090327 May 28 01:33:07 PM PDT 24 May 28 01:38:57 PM PDT 24 81531863454 ps
T450 /workspace/coverage/default/40.sram_ctrl_ram_cfg.660636809 May 28 01:32:15 PM PDT 24 May 28 01:32:19 PM PDT 24 349649218 ps
T451 /workspace/coverage/default/24.sram_ctrl_max_throughput.1249370053 May 28 01:30:15 PM PDT 24 May 28 01:31:48 PM PDT 24 803165239 ps
T452 /workspace/coverage/default/1.sram_ctrl_executable.1853508856 May 28 01:28:29 PM PDT 24 May 28 01:34:55 PM PDT 24 13653182493 ps
T453 /workspace/coverage/default/32.sram_ctrl_lc_escalation.3971495128 May 28 01:31:15 PM PDT 24 May 28 01:32:48 PM PDT 24 28271218901 ps
T454 /workspace/coverage/default/14.sram_ctrl_lc_escalation.17702769 May 28 01:29:15 PM PDT 24 May 28 01:30:22 PM PDT 24 9909213683 ps
T455 /workspace/coverage/default/32.sram_ctrl_regwen.2780352878 May 28 01:31:16 PM PDT 24 May 28 01:49:54 PM PDT 24 8232929114 ps
T456 /workspace/coverage/default/3.sram_ctrl_multiple_keys.2422426212 May 28 01:28:33 PM PDT 24 May 28 01:49:13 PM PDT 24 134949691933 ps
T457 /workspace/coverage/default/10.sram_ctrl_bijection.2609722611 May 28 01:28:59 PM PDT 24 May 28 01:39:24 PM PDT 24 36293174578 ps
T458 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3424644315 May 28 01:29:16 PM PDT 24 May 28 01:29:49 PM PDT 24 1544584593 ps
T459 /workspace/coverage/default/11.sram_ctrl_lc_escalation.4163432894 May 28 01:29:15 PM PDT 24 May 28 01:29:29 PM PDT 24 6308119258 ps
T460 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1282766246 May 28 01:29:25 PM PDT 24 May 28 01:31:47 PM PDT 24 2644782682 ps
T461 /workspace/coverage/default/15.sram_ctrl_max_throughput.1986429940 May 28 01:29:22 PM PDT 24 May 28 01:30:28 PM PDT 24 732619722 ps
T462 /workspace/coverage/default/8.sram_ctrl_smoke.3851709427 May 28 01:29:06 PM PDT 24 May 28 01:29:13 PM PDT 24 904340551 ps
T463 /workspace/coverage/default/14.sram_ctrl_bijection.420842206 May 28 01:29:23 PM PDT 24 May 28 01:48:40 PM PDT 24 69669399989 ps
T464 /workspace/coverage/default/3.sram_ctrl_lc_escalation.911041966 May 28 01:28:33 PM PDT 24 May 28 01:29:01 PM PDT 24 3665938423 ps
T465 /workspace/coverage/default/7.sram_ctrl_bijection.1299317445 May 28 01:28:59 PM PDT 24 May 28 01:52:18 PM PDT 24 231532254002 ps
T466 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1963385709 May 28 01:31:28 PM PDT 24 May 28 01:34:12 PM PDT 24 8539232559 ps
T467 /workspace/coverage/default/45.sram_ctrl_lc_escalation.2540016883 May 28 01:33:17 PM PDT 24 May 28 01:33:56 PM PDT 24 10127225473 ps
T468 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3420235424 May 28 01:32:02 PM PDT 24 May 28 01:35:36 PM PDT 24 12553111932 ps
T469 /workspace/coverage/default/7.sram_ctrl_ram_cfg.4146451087 May 28 01:29:00 PM PDT 24 May 28 01:29:07 PM PDT 24 2103624934 ps
T470 /workspace/coverage/default/45.sram_ctrl_smoke.2015003749 May 28 01:33:17 PM PDT 24 May 28 01:33:36 PM PDT 24 7903433158 ps
T125 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.663220815 May 28 01:28:43 PM PDT 24 May 28 01:28:53 PM PDT 24 487096708 ps
T471 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3179548959 May 28 01:32:17 PM PDT 24 May 28 01:32:58 PM PDT 24 1488672153 ps
T472 /workspace/coverage/default/25.sram_ctrl_lc_escalation.3417015251 May 28 01:30:17 PM PDT 24 May 28 01:31:15 PM PDT 24 49342733761 ps
T473 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3425268254 May 28 01:30:58 PM PDT 24 May 28 01:31:05 PM PDT 24 699198111 ps
T474 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1553429824 May 28 01:29:20 PM PDT 24 May 28 01:31:28 PM PDT 24 1595480211 ps
T475 /workspace/coverage/default/17.sram_ctrl_partial_access.2155343584 May 28 01:29:37 PM PDT 24 May 28 01:29:47 PM PDT 24 624272119 ps
T476 /workspace/coverage/default/16.sram_ctrl_smoke.1801954166 May 28 01:29:24 PM PDT 24 May 28 01:29:45 PM PDT 24 1209898798 ps
T477 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.503795733 May 28 01:33:46 PM PDT 24 May 28 01:33:56 PM PDT 24 1418431279 ps
T478 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.1200982363 May 28 01:28:43 PM PDT 24 May 28 01:34:03 PM PDT 24 6722216459 ps
T479 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1650073387 May 28 01:29:04 PM PDT 24 May 28 01:30:12 PM PDT 24 982807343 ps
T480 /workspace/coverage/default/47.sram_ctrl_regwen.2541201450 May 28 01:33:28 PM PDT 24 May 28 01:43:37 PM PDT 24 12820911111 ps
T481 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3907833627 May 28 01:32:36 PM PDT 24 May 28 01:37:45 PM PDT 24 21769177053 ps
T482 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1844799142 May 28 01:29:11 PM PDT 24 May 28 01:36:02 PM PDT 24 30144429924 ps
T483 /workspace/coverage/default/24.sram_ctrl_alert_test.69193122 May 28 01:30:14 PM PDT 24 May 28 01:30:17 PM PDT 24 31557502 ps
T484 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.4280416710 May 28 01:33:28 PM PDT 24 May 28 01:38:05 PM PDT 24 10948180843 ps
T485 /workspace/coverage/default/39.sram_ctrl_executable.2270447307 May 28 01:32:17 PM PDT 24 May 28 01:52:58 PM PDT 24 54058648986 ps
T486 /workspace/coverage/default/34.sram_ctrl_smoke.963855903 May 28 01:31:31 PM PDT 24 May 28 01:31:57 PM PDT 24 1807155428 ps
T126 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1396912274 May 28 01:28:29 PM PDT 24 May 28 01:29:00 PM PDT 24 1827750407 ps
T487 /workspace/coverage/default/49.sram_ctrl_max_throughput.1262070726 May 28 01:33:52 PM PDT 24 May 28 01:34:00 PM PDT 24 1374981123 ps
T488 /workspace/coverage/default/46.sram_ctrl_multiple_keys.1589555849 May 28 01:33:19 PM PDT 24 May 28 01:55:47 PM PDT 24 14012900189 ps
T489 /workspace/coverage/default/1.sram_ctrl_bijection.1922523373 May 28 01:28:27 PM PDT 24 May 28 01:53:45 PM PDT 24 113650064183 ps
T490 /workspace/coverage/default/37.sram_ctrl_partial_access.838627982 May 28 01:31:50 PM PDT 24 May 28 01:32:19 PM PDT 24 4584856222 ps
T491 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.3549898589 May 28 01:30:15 PM PDT 24 May 28 01:31:22 PM PDT 24 2005706866 ps
T492 /workspace/coverage/default/33.sram_ctrl_regwen.1079922670 May 28 01:31:26 PM PDT 24 May 28 01:48:05 PM PDT 24 20850861878 ps
T493 /workspace/coverage/default/35.sram_ctrl_max_throughput.3667761950 May 28 01:31:40 PM PDT 24 May 28 01:32:36 PM PDT 24 3165168763 ps
T494 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.644509255 May 28 01:28:29 PM PDT 24 May 28 01:36:15 PM PDT 24 31442757734 ps
T495 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2438355750 May 28 01:29:35 PM PDT 24 May 28 01:29:41 PM PDT 24 364264799 ps
T496 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3023167482 May 28 01:29:13 PM PDT 24 May 28 01:29:38 PM PDT 24 2636305566 ps
T497 /workspace/coverage/default/49.sram_ctrl_smoke.2917874385 May 28 01:33:49 PM PDT 24 May 28 01:36:17 PM PDT 24 4421650485 ps
T498 /workspace/coverage/default/24.sram_ctrl_mem_walk.2270218114 May 28 01:30:16 PM PDT 24 May 28 01:33:10 PM PDT 24 41451594908 ps
T499 /workspace/coverage/default/31.sram_ctrl_multiple_keys.4263392077 May 28 01:31:08 PM PDT 24 May 28 01:39:09 PM PDT 24 17652159024 ps
T500 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.346204191 May 28 01:32:47 PM PDT 24 May 28 01:38:41 PM PDT 24 112819750783 ps
T501 /workspace/coverage/default/6.sram_ctrl_ram_cfg.1544394821 May 28 01:28:46 PM PDT 24 May 28 01:28:53 PM PDT 24 3053129516 ps
T502 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2721867313 May 28 01:31:26 PM PDT 24 May 28 01:42:48 PM PDT 24 13858924521 ps
T78 /workspace/coverage/default/49.sram_ctrl_executable.4063631138 May 28 01:33:53 PM PDT 24 May 28 01:53:07 PM PDT 24 21634936892 ps
T503 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1044812184 May 28 01:31:50 PM PDT 24 May 28 01:32:04 PM PDT 24 702032578 ps
T504 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1082103740 May 28 01:28:43 PM PDT 24 May 28 01:36:01 PM PDT 24 62563108389 ps
T505 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1720595732 May 28 01:31:53 PM PDT 24 May 28 01:34:46 PM PDT 24 4190677743 ps
T506 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1681132708 May 28 01:29:23 PM PDT 24 May 28 01:30:27 PM PDT 24 996742510 ps
T507 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.3326111154 May 28 01:28:30 PM PDT 24 May 28 01:33:14 PM PDT 24 10653722280 ps
T508 /workspace/coverage/default/33.sram_ctrl_partial_access.2223044762 May 28 01:31:15 PM PDT 24 May 28 01:31:24 PM PDT 24 695336778 ps
T509 /workspace/coverage/default/39.sram_ctrl_partial_access.952310485 May 28 01:32:16 PM PDT 24 May 28 01:32:44 PM PDT 24 7192992102 ps
T510 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.500355655 May 28 01:30:02 PM PDT 24 May 28 01:30:15 PM PDT 24 269895689 ps
T511 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.98086037 May 28 01:28:49 PM PDT 24 May 28 01:33:57 PM PDT 24 12857600131 ps
T512 /workspace/coverage/default/19.sram_ctrl_alert_test.682988036 May 28 01:29:46 PM PDT 24 May 28 01:29:48 PM PDT 24 39694728 ps
T513 /workspace/coverage/default/34.sram_ctrl_bijection.2211820654 May 28 01:31:26 PM PDT 24 May 28 01:51:29 PM PDT 24 93649240964 ps
T514 /workspace/coverage/default/22.sram_ctrl_bijection.806424746 May 28 01:30:03 PM PDT 24 May 28 01:39:45 PM PDT 24 23379876908 ps
T515 /workspace/coverage/default/13.sram_ctrl_alert_test.1360956436 May 28 01:29:13 PM PDT 24 May 28 01:29:16 PM PDT 24 36056871 ps
T516 /workspace/coverage/default/12.sram_ctrl_smoke.843596427 May 28 01:29:13 PM PDT 24 May 28 01:31:23 PM PDT 24 2102542244 ps
T517 /workspace/coverage/default/26.sram_ctrl_regwen.2695366310 May 28 01:30:41 PM PDT 24 May 28 01:51:42 PM PDT 24 76329138522 ps
T518 /workspace/coverage/default/9.sram_ctrl_ram_cfg.471019485 May 28 01:28:59 PM PDT 24 May 28 01:29:06 PM PDT 24 4783933325 ps
T519 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1676788594 May 28 01:29:21 PM PDT 24 May 28 01:32:25 PM PDT 24 18334235103 ps
T520 /workspace/coverage/default/15.sram_ctrl_lc_escalation.3001644012 May 28 01:29:22 PM PDT 24 May 28 01:30:32 PM PDT 24 11516621729 ps
T521 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1741094992 May 28 01:28:28 PM PDT 24 May 28 01:37:25 PM PDT 24 42157571137 ps
T522 /workspace/coverage/default/41.sram_ctrl_executable.673854463 May 28 01:32:24 PM PDT 24 May 28 01:52:41 PM PDT 24 94424194354 ps
T523 /workspace/coverage/default/36.sram_ctrl_lc_escalation.672442523 May 28 01:31:50 PM PDT 24 May 28 01:32:59 PM PDT 24 12476772612 ps
T524 /workspace/coverage/default/14.sram_ctrl_alert_test.2521992702 May 28 01:29:23 PM PDT 24 May 28 01:29:26 PM PDT 24 47598176 ps
T525 /workspace/coverage/default/10.sram_ctrl_ram_cfg.633020336 May 28 01:29:00 PM PDT 24 May 28 01:29:07 PM PDT 24 370104373 ps
T526 /workspace/coverage/default/13.sram_ctrl_smoke.2062704206 May 28 01:29:23 PM PDT 24 May 28 01:31:10 PM PDT 24 460403782 ps
T527 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.374313108 May 28 01:32:02 PM PDT 24 May 28 01:34:34 PM PDT 24 5556862311 ps
T528 /workspace/coverage/default/26.sram_ctrl_executable.1078111106 May 28 01:30:40 PM PDT 24 May 28 01:36:08 PM PDT 24 12261600809 ps
T529 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3440147434 May 28 01:29:24 PM PDT 24 May 28 01:32:02 PM PDT 24 783552091 ps
T530 /workspace/coverage/default/47.sram_ctrl_executable.2806644941 May 28 01:33:28 PM PDT 24 May 28 01:49:32 PM PDT 24 16535710661 ps
T531 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2959255725 May 28 01:29:49 PM PDT 24 May 28 01:55:17 PM PDT 24 30502962431 ps
T532 /workspace/coverage/default/0.sram_ctrl_max_throughput.3475862463 May 28 01:28:29 PM PDT 24 May 28 01:29:25 PM PDT 24 739317331 ps
T533 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.4071830936 May 28 01:31:22 PM PDT 24 May 28 01:34:41 PM PDT 24 4549842519 ps
T534 /workspace/coverage/default/27.sram_ctrl_max_throughput.1145385419 May 28 01:30:43 PM PDT 24 May 28 01:31:05 PM PDT 24 729147743 ps
T535 /workspace/coverage/default/25.sram_ctrl_executable.962672343 May 28 01:30:39 PM PDT 24 May 28 01:49:34 PM PDT 24 39410918184 ps
T536 /workspace/coverage/default/0.sram_ctrl_regwen.542145127 May 28 01:28:29 PM PDT 24 May 28 01:41:37 PM PDT 24 97288310731 ps
T537 /workspace/coverage/default/24.sram_ctrl_ram_cfg.2230886088 May 28 01:30:18 PM PDT 24 May 28 01:30:24 PM PDT 24 1343634308 ps
T538 /workspace/coverage/default/22.sram_ctrl_mem_walk.4164966810 May 28 01:30:03 PM PDT 24 May 28 01:35:00 PM PDT 24 5360419614 ps
T539 /workspace/coverage/default/35.sram_ctrl_ram_cfg.281753095 May 28 01:31:44 PM PDT 24 May 28 01:31:49 PM PDT 24 1418303971 ps
T540 /workspace/coverage/default/35.sram_ctrl_regwen.2480096815 May 28 01:31:37 PM PDT 24 May 28 01:45:36 PM PDT 24 2891733314 ps
T541 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.1499907641 May 28 01:31:26 PM PDT 24 May 28 01:37:09 PM PDT 24 33584805281 ps
T542 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.4251796867 May 28 01:29:18 PM PDT 24 May 28 01:30:25 PM PDT 24 3990364831 ps
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