| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.399060769 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1741268088 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3440654537 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3815112619 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3531051624 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2720100772 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3403455857 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3391854498 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1090878447 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3159642604 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1749311435 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2861726220 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4263732495 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1417654936 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3048947103 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3023355689 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1525360689 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.717645039 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1989010723 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4183634958 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1032707459 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2656622198 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3712494767 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.900314062 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2519761081 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3183285805 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2306065855 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.311679394 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1158179681 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2101296204 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3804130843 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3998003132 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3563816323 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.480885512 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3534232718 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.554240289 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3642865448 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4041535625 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2270771177 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2037934544 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.279545015 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.4000484243 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.610651612 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3210101312 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3990360575 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.993807560 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.4019314149 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3962412277 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3050482421 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.480009755 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.191868118 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4077910132 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.4141043452 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.4163771077 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.4281337945 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4101454046 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2241057684 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2389105583 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1374474671 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3947936551 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2247937866 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2926978941 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.204574213 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.256365708 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1886510470 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3080372300 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4292364249 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2713610596 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.989229109 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2638777679 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2193914005 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.253275163 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1832224790 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3967788061 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.549979093 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.229556042 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3272096265 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.529855388 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1314760974 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3902310999 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1258117374 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.848198392 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3435885191 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2626143515 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1548327656 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3113791616 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2284021279 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2558629528 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2725460164 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4070432617 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2901258806 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3776689652 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.870357937 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.619399763 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2661834512 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3775342285 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3192849757 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.741770970 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1915795456 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2830172363 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.893656066 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2524204387 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2103522958 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3282058009 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2125256038 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1091619104 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.839645800 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2985764651 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1831820886 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.4168752197 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2887113278 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2296816080 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.387896976 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1100833694 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1834863347 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1279832353 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3781500538 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3849302074 |
| /workspace/coverage/default/0.sram_ctrl_bijection.961815181 |
| /workspace/coverage/default/0.sram_ctrl_executable.2379891435 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.923384869 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.3475862463 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1132206990 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.4065592760 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.1783795822 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.1603123817 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1741094992 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.849740032 |
| /workspace/coverage/default/0.sram_ctrl_regwen.542145127 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.2031925342 |
| /workspace/coverage/default/0.sram_ctrl_smoke.664954485 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1396912274 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1810430671 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.1560939121 |
| /workspace/coverage/default/1.sram_ctrl_bijection.1922523373 |
| /workspace/coverage/default/1.sram_ctrl_executable.1853508856 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.452992366 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.3211602903 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3997881297 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.808831646 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.803054517 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.3472955556 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3862074577 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.2768936623 |
| /workspace/coverage/default/1.sram_ctrl_regwen.2389969915 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.2435048709 |
| /workspace/coverage/default/1.sram_ctrl_smoke.1858883950 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2517439835 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.457419546 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.1954742524 |
| /workspace/coverage/default/10.sram_ctrl_bijection.2609722611 |
| /workspace/coverage/default/10.sram_ctrl_executable.1130851711 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.4095086343 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.2021266551 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.4158048646 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1066189036 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.4240399562 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1173070970 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.633020336 |
| /workspace/coverage/default/10.sram_ctrl_regwen.428417845 |
| /workspace/coverage/default/10.sram_ctrl_smoke.784073952 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3142856823 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.523307915 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1121768056 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3799580856 |
| /workspace/coverage/default/11.sram_ctrl_bijection.3074738223 |
| /workspace/coverage/default/11.sram_ctrl_executable.2224495771 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.4163432894 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.262349759 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1735907827 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.407393597 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.636983083 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.675285068 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1844799142 |
| /workspace/coverage/default/11.sram_ctrl_smoke.3009333496 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.4260208392 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1260186432 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.2475536086 |
| /workspace/coverage/default/12.sram_ctrl_bijection.3803437780 |
| /workspace/coverage/default/12.sram_ctrl_executable.610308957 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.3140991712 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.3364774773 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.4251796867 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.281599487 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.571235040 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.1774225967 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1676788594 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.837875405 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3474522730 |
| /workspace/coverage/default/12.sram_ctrl_smoke.843596427 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3338643672 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1024452697 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3424644315 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.1360956436 |
| /workspace/coverage/default/13.sram_ctrl_bijection.2848937914 |
| /workspace/coverage/default/13.sram_ctrl_executable.166386994 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.3997102645 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.1321314483 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1681132708 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.3072559715 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.815469057 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.4014024045 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.528667140 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.435201695 |
| /workspace/coverage/default/13.sram_ctrl_regwen.1205473028 |
| /workspace/coverage/default/13.sram_ctrl_smoke.2062704206 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3023167482 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.23387726 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3398396686 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.2521992702 |
| /workspace/coverage/default/14.sram_ctrl_bijection.420842206 |
| /workspace/coverage/default/14.sram_ctrl_executable.3995044312 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.17702769 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.2345037886 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1553429824 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.470811509 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.1512909764 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.952406861 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.396899001 |
| /workspace/coverage/default/14.sram_ctrl_regwen.1321812137 |
| /workspace/coverage/default/14.sram_ctrl_smoke.2407049813 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3409600171 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.113679594 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.477722899 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.1763049446 |
| /workspace/coverage/default/15.sram_ctrl_executable.4122959743 |
| /workspace/coverage/default/15.sram_ctrl_lc_escalation.3001644012 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.1986429940 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2104688245 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.4156890623 |
| /workspace/coverage/default/15.sram_ctrl_multiple_keys.2812519234 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.2252013508 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2238325784 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.2438355750 |
| /workspace/coverage/default/15.sram_ctrl_regwen.1518424972 |
| /workspace/coverage/default/15.sram_ctrl_smoke.2175283121 |
| /workspace/coverage/default/15.sram_ctrl_stress_pipeline.1379706905 |
| /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3440147434 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.2792449172 |
| /workspace/coverage/default/16.sram_ctrl_bijection.2455363916 |
| /workspace/coverage/default/16.sram_ctrl_executable.2581088029 |
| /workspace/coverage/default/16.sram_ctrl_lc_escalation.442715469 |
| /workspace/coverage/default/16.sram_ctrl_max_throughput.1707864845 |
| /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2875308377 |
| /workspace/coverage/default/16.sram_ctrl_mem_walk.3898606537 |
| /workspace/coverage/default/16.sram_ctrl_multiple_keys.2869544229 |
| /workspace/coverage/default/16.sram_ctrl_partial_access.1942169624 |
| /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.4133216791 |
| /workspace/coverage/default/16.sram_ctrl_ram_cfg.638296846 |
| /workspace/coverage/default/16.sram_ctrl_regwen.2435420611 |
| /workspace/coverage/default/16.sram_ctrl_smoke.1801954166 |
| /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.722510413 |
| /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1282766246 |
| /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.411115935 |
| /workspace/coverage/default/17.sram_ctrl_alert_test.716920332 |
| /workspace/coverage/default/17.sram_ctrl_bijection.899828521 |
| /workspace/coverage/default/17.sram_ctrl_executable.2241049184 |
| /workspace/coverage/default/17.sram_ctrl_max_throughput.2235146925 |
| /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3694045061 |
| /workspace/coverage/default/17.sram_ctrl_mem_walk.1392644994 |
| /workspace/coverage/default/17.sram_ctrl_multiple_keys.1189867613 |
| /workspace/coverage/default/17.sram_ctrl_partial_access.2155343584 |
| /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.4269761547 |
| /workspace/coverage/default/17.sram_ctrl_ram_cfg.2958551389 |
| /workspace/coverage/default/17.sram_ctrl_regwen.3460984142 |
| /workspace/coverage/default/17.sram_ctrl_smoke.564754335 |
| /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3367526050 |
| /workspace/coverage/default/17.sram_ctrl_stress_pipeline.926955890 |
| /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1453436891 |
| /workspace/coverage/default/18.sram_ctrl_alert_test.3474096421 |
| /workspace/coverage/default/18.sram_ctrl_bijection.1782859784 |
| /workspace/coverage/default/18.sram_ctrl_executable.2058071831 |
| /workspace/coverage/default/18.sram_ctrl_lc_escalation.4246189962 |
| /workspace/coverage/default/18.sram_ctrl_max_throughput.1597779452 |
| /workspace/coverage/default/18.sram_ctrl_mem_partial_access.1814630286 |
| /workspace/coverage/default/18.sram_ctrl_mem_walk.2749152134 |
| /workspace/coverage/default/18.sram_ctrl_multiple_keys.4063117145 |
| /workspace/coverage/default/18.sram_ctrl_partial_access.2781285955 |
| /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1935010930 |
| /workspace/coverage/default/18.sram_ctrl_ram_cfg.2892118574 |
| /workspace/coverage/default/18.sram_ctrl_regwen.1001343814 |
| /workspace/coverage/default/18.sram_ctrl_smoke.3536819146 |
| /workspace/coverage/default/18.sram_ctrl_stress_pipeline.203513331 |
| /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.76632713 |
| /workspace/coverage/default/19.sram_ctrl_alert_test.682988036 |
| /workspace/coverage/default/19.sram_ctrl_bijection.4046636705 |
| /workspace/coverage/default/19.sram_ctrl_executable.2603926218 |
| /workspace/coverage/default/19.sram_ctrl_max_throughput.4169119255 |
| /workspace/coverage/default/19.sram_ctrl_mem_partial_access.3320528483 |
| /workspace/coverage/default/19.sram_ctrl_mem_walk.804269997 |
| /workspace/coverage/default/19.sram_ctrl_multiple_keys.2959255725 |
| /workspace/coverage/default/19.sram_ctrl_partial_access.665230330 |
| /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2115910749 |
| /workspace/coverage/default/19.sram_ctrl_ram_cfg.3535679842 |
| /workspace/coverage/default/19.sram_ctrl_regwen.1489203523 |
| /workspace/coverage/default/19.sram_ctrl_smoke.1500318906 |
| /workspace/coverage/default/19.sram_ctrl_stress_pipeline.2257416554 |
| /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.1201516919 |
| /workspace/coverage/default/2.sram_ctrl_alert_test.536181423 |
| /workspace/coverage/default/2.sram_ctrl_bijection.1640043544 |
| /workspace/coverage/default/2.sram_ctrl_executable.1929976139 |
| /workspace/coverage/default/2.sram_ctrl_lc_escalation.3673525899 |
| /workspace/coverage/default/2.sram_ctrl_max_throughput.1001258824 |
| /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1223715073 |
| /workspace/coverage/default/2.sram_ctrl_mem_walk.836017601 |
| /workspace/coverage/default/2.sram_ctrl_multiple_keys.2527877959 |
| /workspace/coverage/default/2.sram_ctrl_partial_access.2835626912 |
| /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.644509255 |
| /workspace/coverage/default/2.sram_ctrl_ram_cfg.2982465404 |
| /workspace/coverage/default/2.sram_ctrl_regwen.3789321603 |
| /workspace/coverage/default/2.sram_ctrl_sec_cm.1298606434 |
| /workspace/coverage/default/2.sram_ctrl_smoke.2086334161 |
| /workspace/coverage/default/2.sram_ctrl_stress_pipeline.3326111154 |
| /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1848613160 |
| /workspace/coverage/default/20.sram_ctrl_alert_test.3462011419 |
| /workspace/coverage/default/20.sram_ctrl_bijection.3143762129 |
| /workspace/coverage/default/20.sram_ctrl_executable.538396412 |
| /workspace/coverage/default/20.sram_ctrl_lc_escalation.131405941 |
| /workspace/coverage/default/20.sram_ctrl_max_throughput.2523197559 |
| /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2778551157 |
| /workspace/coverage/default/20.sram_ctrl_mem_walk.1410636238 |
| /workspace/coverage/default/20.sram_ctrl_multiple_keys.526638427 |
| /workspace/coverage/default/20.sram_ctrl_partial_access.3009474559 |
| /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2115596916 |
| /workspace/coverage/default/20.sram_ctrl_ram_cfg.2230013505 |
| /workspace/coverage/default/20.sram_ctrl_regwen.3146152688 |
| /workspace/coverage/default/20.sram_ctrl_smoke.2912335375 |
| /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.204798694 |
| /workspace/coverage/default/20.sram_ctrl_stress_pipeline.638724058 |
| /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.340130907 |
| /workspace/coverage/default/21.sram_ctrl_alert_test.1034002322 |
| /workspace/coverage/default/21.sram_ctrl_bijection.3463859193 |
| /workspace/coverage/default/21.sram_ctrl_executable.2395444079 |
| /workspace/coverage/default/21.sram_ctrl_lc_escalation.1292273275 |
| /workspace/coverage/default/21.sram_ctrl_max_throughput.3153010201 |
| /workspace/coverage/default/21.sram_ctrl_mem_partial_access.1693578536 |
| /workspace/coverage/default/21.sram_ctrl_mem_walk.715773482 |
| /workspace/coverage/default/21.sram_ctrl_multiple_keys.3226032116 |
| /workspace/coverage/default/21.sram_ctrl_partial_access.1208684286 |
| /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.425995332 |
| /workspace/coverage/default/21.sram_ctrl_ram_cfg.90386440 |
| /workspace/coverage/default/21.sram_ctrl_regwen.2450840244 |
| /workspace/coverage/default/21.sram_ctrl_smoke.111922621 |
| /workspace/coverage/default/21.sram_ctrl_stress_pipeline.1736859537 |
| /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2293864859 |
| /workspace/coverage/default/22.sram_ctrl_alert_test.3937092883 |
| /workspace/coverage/default/22.sram_ctrl_bijection.806424746 |
| /workspace/coverage/default/22.sram_ctrl_executable.4193621607 |
| /workspace/coverage/default/22.sram_ctrl_lc_escalation.3567922785 |
| /workspace/coverage/default/22.sram_ctrl_max_throughput.232766669 |
| /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3907590303 |
| /workspace/coverage/default/22.sram_ctrl_mem_walk.4164966810 |
| /workspace/coverage/default/22.sram_ctrl_multiple_keys.1625496176 |
| /workspace/coverage/default/22.sram_ctrl_partial_access.3371684498 |
| /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.677654032 |
| /workspace/coverage/default/22.sram_ctrl_ram_cfg.2805917093 |
| /workspace/coverage/default/22.sram_ctrl_regwen.498852564 |
| /workspace/coverage/default/22.sram_ctrl_smoke.769615748 |
| /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.500355655 |
| /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3000794662 |
| /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.88437881 |
| /workspace/coverage/default/23.sram_ctrl_alert_test.3039632303 |
| /workspace/coverage/default/23.sram_ctrl_executable.2317614151 |
| /workspace/coverage/default/23.sram_ctrl_lc_escalation.877688717 |
| /workspace/coverage/default/23.sram_ctrl_max_throughput.3275556286 |
| /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3477046004 |
| /workspace/coverage/default/23.sram_ctrl_mem_walk.4123774532 |
| /workspace/coverage/default/23.sram_ctrl_multiple_keys.3698670288 |
| /workspace/coverage/default/23.sram_ctrl_partial_access.3332890501 |
| /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.33495900 |
| /workspace/coverage/default/23.sram_ctrl_ram_cfg.1120689664 |
| /workspace/coverage/default/23.sram_ctrl_smoke.3961081365 |
| /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2842627062 |
| /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1579472655 |
| /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2719657255 |
| /workspace/coverage/default/24.sram_ctrl_alert_test.69193122 |
| /workspace/coverage/default/24.sram_ctrl_bijection.3301629801 |
| /workspace/coverage/default/24.sram_ctrl_executable.3552827337 |
| /workspace/coverage/default/24.sram_ctrl_lc_escalation.557971626 |
| /workspace/coverage/default/24.sram_ctrl_max_throughput.1249370053 |
| /workspace/coverage/default/24.sram_ctrl_mem_partial_access.3549898589 |
| /workspace/coverage/default/24.sram_ctrl_mem_walk.2270218114 |
| /workspace/coverage/default/24.sram_ctrl_multiple_keys.2593618047 |
| /workspace/coverage/default/24.sram_ctrl_partial_access.293546363 |
| /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.485723064 |
| /workspace/coverage/default/24.sram_ctrl_ram_cfg.2230886088 |
| /workspace/coverage/default/24.sram_ctrl_regwen.1093355544 |
| /workspace/coverage/default/24.sram_ctrl_smoke.441220615 |
| /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1823939992 |
| /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1207031750 |
| /workspace/coverage/default/25.sram_ctrl_alert_test.1995990162 |
| /workspace/coverage/default/25.sram_ctrl_bijection.1648419079 |
| /workspace/coverage/default/25.sram_ctrl_executable.962672343 |
| /workspace/coverage/default/25.sram_ctrl_lc_escalation.3417015251 |
| /workspace/coverage/default/25.sram_ctrl_max_throughput.1517428202 |
| /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2303549245 |
| /workspace/coverage/default/25.sram_ctrl_mem_walk.2044027394 |
| /workspace/coverage/default/25.sram_ctrl_multiple_keys.2820533751 |
| /workspace/coverage/default/25.sram_ctrl_partial_access.3923919724 |
| /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.1341057002 |
| /workspace/coverage/default/25.sram_ctrl_ram_cfg.11001296 |
| /workspace/coverage/default/25.sram_ctrl_regwen.3695377409 |
| /workspace/coverage/default/25.sram_ctrl_smoke.3140047820 |
| /workspace/coverage/default/25.sram_ctrl_stress_all.3566960779 |
| /workspace/coverage/default/25.sram_ctrl_stress_pipeline.210666474 |
| /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.557242834 |
| /workspace/coverage/default/26.sram_ctrl_alert_test.2116615667 |
| /workspace/coverage/default/26.sram_ctrl_bijection.1243980624 |
| /workspace/coverage/default/26.sram_ctrl_executable.1078111106 |
| /workspace/coverage/default/26.sram_ctrl_lc_escalation.3976258047 |
| /workspace/coverage/default/26.sram_ctrl_max_throughput.2028502460 |
| /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3823784175 |
| /workspace/coverage/default/26.sram_ctrl_mem_walk.2420382451 |
| /workspace/coverage/default/26.sram_ctrl_multiple_keys.607063067 |
| /workspace/coverage/default/26.sram_ctrl_partial_access.1782320019 |
| /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1355509990 |
| /workspace/coverage/default/26.sram_ctrl_ram_cfg.3129241729 |
| /workspace/coverage/default/26.sram_ctrl_regwen.2695366310 |
| /workspace/coverage/default/26.sram_ctrl_smoke.647383694 |
| /workspace/coverage/default/26.sram_ctrl_stress_pipeline.2604299731 |
| /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1715264431 |
| /workspace/coverage/default/27.sram_ctrl_alert_test.4069080000 |
| /workspace/coverage/default/27.sram_ctrl_bijection.683689275 |
| /workspace/coverage/default/27.sram_ctrl_executable.441868447 |
| /workspace/coverage/default/27.sram_ctrl_lc_escalation.3480043487 |
| /workspace/coverage/default/27.sram_ctrl_max_throughput.1145385419 |
| /workspace/coverage/default/27.sram_ctrl_mem_partial_access.147844530 |
| /workspace/coverage/default/27.sram_ctrl_mem_walk.1651888349 |
| /workspace/coverage/default/27.sram_ctrl_partial_access.147204372 |
| /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3703449446 |
| /workspace/coverage/default/27.sram_ctrl_ram_cfg.850542129 |
| /workspace/coverage/default/27.sram_ctrl_regwen.1206098580 |
| /workspace/coverage/default/27.sram_ctrl_smoke.1827247590 |
| /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2062286813 |
| /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3443483931 |
| /workspace/coverage/default/28.sram_ctrl_alert_test.980764346 |
| /workspace/coverage/default/28.sram_ctrl_bijection.4257060906 |
| /workspace/coverage/default/28.sram_ctrl_executable.127119799 |
| /workspace/coverage/default/28.sram_ctrl_lc_escalation.2765114263 |
| /workspace/coverage/default/28.sram_ctrl_max_throughput.794672820 |
| /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3273466986 |
| /workspace/coverage/default/28.sram_ctrl_mem_walk.2755722671 |
| /workspace/coverage/default/28.sram_ctrl_multiple_keys.3983033191 |
| /workspace/coverage/default/28.sram_ctrl_partial_access.1826001516 |
| /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2124629369 |
| /workspace/coverage/default/28.sram_ctrl_ram_cfg.444941229 |
| /workspace/coverage/default/28.sram_ctrl_regwen.242467936 |
| /workspace/coverage/default/28.sram_ctrl_smoke.2466876349 |
| /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3397017721 |
| /workspace/coverage/default/28.sram_ctrl_stress_pipeline.705593237 |
| /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2424633091 |
| /workspace/coverage/default/29.sram_ctrl_alert_test.3066654689 |
| /workspace/coverage/default/29.sram_ctrl_bijection.77446709 |
| /workspace/coverage/default/29.sram_ctrl_executable.812113220 |
| /workspace/coverage/default/29.sram_ctrl_lc_escalation.1012682859 |
| /workspace/coverage/default/29.sram_ctrl_max_throughput.3170840324 |
| /workspace/coverage/default/29.sram_ctrl_mem_partial_access.82662218 |
| /workspace/coverage/default/29.sram_ctrl_mem_walk.1125909510 |
| /workspace/coverage/default/29.sram_ctrl_multiple_keys.2777921008 |
| /workspace/coverage/default/29.sram_ctrl_partial_access.743440152 |
| /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1814754317 |
| /workspace/coverage/default/29.sram_ctrl_ram_cfg.544740101 |
| /workspace/coverage/default/29.sram_ctrl_regwen.3264918388 |
| /workspace/coverage/default/29.sram_ctrl_smoke.2551245625 |
| /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1017909608 |
| /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2871398902 |
| /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2362931765 |
| /workspace/coverage/default/3.sram_ctrl_alert_test.1019695441 |
| /workspace/coverage/default/3.sram_ctrl_bijection.2040335536 |
| /workspace/coverage/default/3.sram_ctrl_executable.3616037828 |
| /workspace/coverage/default/3.sram_ctrl_lc_escalation.911041966 |
| /workspace/coverage/default/3.sram_ctrl_max_throughput.3466496387 |
| /workspace/coverage/default/3.sram_ctrl_mem_partial_access.150878366 |
| /workspace/coverage/default/3.sram_ctrl_mem_walk.3455230869 |
| /workspace/coverage/default/3.sram_ctrl_multiple_keys.2422426212 |
| /workspace/coverage/default/3.sram_ctrl_partial_access.199774291 |
| /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3016611629 |
| /workspace/coverage/default/3.sram_ctrl_ram_cfg.214744093 |
| /workspace/coverage/default/3.sram_ctrl_smoke.1615006237 |
| /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3551798012 |
| /workspace/coverage/default/3.sram_ctrl_stress_pipeline.401942404 |
| /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2743683471 |
| /workspace/coverage/default/30.sram_ctrl_alert_test.3968222134 |
| /workspace/coverage/default/30.sram_ctrl_bijection.4101098219 |
| /workspace/coverage/default/30.sram_ctrl_executable.3796614572 |
| /workspace/coverage/default/30.sram_ctrl_lc_escalation.939308019 |
| /workspace/coverage/default/30.sram_ctrl_max_throughput.1504602910 |
| /workspace/coverage/default/30.sram_ctrl_mem_partial_access.4114620114 |
| /workspace/coverage/default/30.sram_ctrl_mem_walk.1050243008 |
| /workspace/coverage/default/30.sram_ctrl_multiple_keys.106609231 |
| /workspace/coverage/default/30.sram_ctrl_partial_access.551215110 |
| /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3498378362 |
| /workspace/coverage/default/30.sram_ctrl_ram_cfg.3425268254 |
| /workspace/coverage/default/30.sram_ctrl_regwen.1014489639 |
| /workspace/coverage/default/30.sram_ctrl_smoke.1927846551 |
| /workspace/coverage/default/30.sram_ctrl_stress_pipeline.4018161382 |
| /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2192115065 |
| /workspace/coverage/default/31.sram_ctrl_alert_test.3854810372 |
| /workspace/coverage/default/31.sram_ctrl_bijection.2855566063 |
| /workspace/coverage/default/31.sram_ctrl_executable.1075253412 |
| /workspace/coverage/default/31.sram_ctrl_lc_escalation.2132913311 |
| /workspace/coverage/default/31.sram_ctrl_max_throughput.2483642897 |
| /workspace/coverage/default/31.sram_ctrl_mem_partial_access.251749218 |
| /workspace/coverage/default/31.sram_ctrl_mem_walk.3932861379 |
| /workspace/coverage/default/31.sram_ctrl_multiple_keys.4263392077 |
| /workspace/coverage/default/31.sram_ctrl_partial_access.3990452097 |
| /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2605627967 |
| /workspace/coverage/default/31.sram_ctrl_ram_cfg.609262364 |
| /workspace/coverage/default/31.sram_ctrl_regwen.1331300593 |
| /workspace/coverage/default/31.sram_ctrl_smoke.292063522 |
| /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.4093825973 |
| /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2797167028 |
| /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2168096897 |
| /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3796818009 |
| /workspace/coverage/default/32.sram_ctrl_alert_test.1452987954 |
| /workspace/coverage/default/32.sram_ctrl_bijection.2251545811 |
| /workspace/coverage/default/32.sram_ctrl_executable.3491622656 |
| /workspace/coverage/default/32.sram_ctrl_lc_escalation.3971495128 |
| /workspace/coverage/default/32.sram_ctrl_max_throughput.739502256 |
| /workspace/coverage/default/32.sram_ctrl_mem_partial_access.1758272327 |
| /workspace/coverage/default/32.sram_ctrl_mem_walk.899873117 |
| /workspace/coverage/default/32.sram_ctrl_multiple_keys.3961887145 |
| /workspace/coverage/default/32.sram_ctrl_partial_access.1682256091 |
| /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.302115906 |
| /workspace/coverage/default/32.sram_ctrl_ram_cfg.1824533242 |
| /workspace/coverage/default/32.sram_ctrl_regwen.2780352878 |
| /workspace/coverage/default/32.sram_ctrl_smoke.1405458772 |
| /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2845855477 |
| /workspace/coverage/default/32.sram_ctrl_stress_pipeline.1481830340 |
| /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3184621658 |
| /workspace/coverage/default/33.sram_ctrl_alert_test.2052945414 |
| /workspace/coverage/default/33.sram_ctrl_bijection.508027879 |
| /workspace/coverage/default/33.sram_ctrl_executable.3560645233 |
| /workspace/coverage/default/33.sram_ctrl_lc_escalation.3044598383 |
| /workspace/coverage/default/33.sram_ctrl_max_throughput.1135555438 |
| /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1963385709 |
| /workspace/coverage/default/33.sram_ctrl_mem_walk.1994071884 |
| /workspace/coverage/default/33.sram_ctrl_multiple_keys.2298980717 |
| /workspace/coverage/default/33.sram_ctrl_partial_access.2223044762 |
| /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.747097389 |
| /workspace/coverage/default/33.sram_ctrl_ram_cfg.3497489365 |
| /workspace/coverage/default/33.sram_ctrl_regwen.1079922670 |
| /workspace/coverage/default/33.sram_ctrl_smoke.611106899 |
| /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3343172240 |
| /workspace/coverage/default/33.sram_ctrl_stress_pipeline.4071830936 |
| /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3448816305 |
| /workspace/coverage/default/34.sram_ctrl_alert_test.999715672 |
| /workspace/coverage/default/34.sram_ctrl_bijection.2211820654 |
| /workspace/coverage/default/34.sram_ctrl_executable.887179665 |
| /workspace/coverage/default/34.sram_ctrl_lc_escalation.3415835396 |
| /workspace/coverage/default/34.sram_ctrl_max_throughput.968006244 |
| /workspace/coverage/default/34.sram_ctrl_mem_partial_access.1213768783 |
| /workspace/coverage/default/34.sram_ctrl_mem_walk.2317891980 |
| /workspace/coverage/default/34.sram_ctrl_multiple_keys.2721867313 |
| /workspace/coverage/default/34.sram_ctrl_partial_access.1263205941 |
| /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.4264185137 |
| /workspace/coverage/default/34.sram_ctrl_ram_cfg.3560582764 |
| /workspace/coverage/default/34.sram_ctrl_regwen.2746300360 |
| /workspace/coverage/default/34.sram_ctrl_smoke.963855903 |
| /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2681537640 |
| /workspace/coverage/default/34.sram_ctrl_stress_pipeline.1499907641 |
| /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2710490060 |
| /workspace/coverage/default/35.sram_ctrl_alert_test.710067590 |
| /workspace/coverage/default/35.sram_ctrl_bijection.2972435452 |
| /workspace/coverage/default/35.sram_ctrl_executable.288485785 |
| /workspace/coverage/default/35.sram_ctrl_lc_escalation.2260004492 |
| /workspace/coverage/default/35.sram_ctrl_max_throughput.3667761950 |
| /workspace/coverage/default/35.sram_ctrl_mem_partial_access.314527641 |
| /workspace/coverage/default/35.sram_ctrl_mem_walk.3500331921 |
| /workspace/coverage/default/35.sram_ctrl_multiple_keys.3583697826 |
| /workspace/coverage/default/35.sram_ctrl_partial_access.1456377411 |
| /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.150277781 |
| /workspace/coverage/default/35.sram_ctrl_ram_cfg.281753095 |
| /workspace/coverage/default/35.sram_ctrl_regwen.2480096815 |
| /workspace/coverage/default/35.sram_ctrl_smoke.1782207340 |
| /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1641320633 |
| /workspace/coverage/default/35.sram_ctrl_stress_pipeline.4259079318 |
| /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.923056091 |
| /workspace/coverage/default/36.sram_ctrl_alert_test.3540924591 |
| /workspace/coverage/default/36.sram_ctrl_bijection.774917380 |
| /workspace/coverage/default/36.sram_ctrl_executable.2486792247 |
| /workspace/coverage/default/36.sram_ctrl_lc_escalation.672442523 |
| /workspace/coverage/default/36.sram_ctrl_max_throughput.3833497586 |
| /workspace/coverage/default/36.sram_ctrl_mem_partial_access.449373053 |
| /workspace/coverage/default/36.sram_ctrl_mem_walk.1832737635 |
| /workspace/coverage/default/36.sram_ctrl_multiple_keys.1853095601 |
| /workspace/coverage/default/36.sram_ctrl_partial_access.4256366933 |
| /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2510463424 |
| /workspace/coverage/default/36.sram_ctrl_ram_cfg.2692798466 |
| /workspace/coverage/default/36.sram_ctrl_smoke.1382403633 |
| /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1554085192 |
| /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1948385347 |
| /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1044812184 |
| /workspace/coverage/default/37.sram_ctrl_alert_test.677359807 |
| /workspace/coverage/default/37.sram_ctrl_bijection.3376328763 |
| /workspace/coverage/default/37.sram_ctrl_executable.3667681918 |
| /workspace/coverage/default/37.sram_ctrl_lc_escalation.3508190389 |
| /workspace/coverage/default/37.sram_ctrl_max_throughput.3147464889 |
| /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1418483878 |
| /workspace/coverage/default/37.sram_ctrl_mem_walk.3844066468 |
| /workspace/coverage/default/37.sram_ctrl_multiple_keys.463755817 |
| /workspace/coverage/default/37.sram_ctrl_partial_access.838627982 |
| /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1111746863 |
| /workspace/coverage/default/37.sram_ctrl_ram_cfg.781069715 |
| /workspace/coverage/default/37.sram_ctrl_regwen.2311000513 |
| /workspace/coverage/default/37.sram_ctrl_smoke.4100529438 |
| /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4096300518 |
| /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1720595732 |
| /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1041353614 |
| /workspace/coverage/default/38.sram_ctrl_alert_test.2734301635 |
| /workspace/coverage/default/38.sram_ctrl_bijection.1723379370 |
| /workspace/coverage/default/38.sram_ctrl_executable.4012510242 |
| /workspace/coverage/default/38.sram_ctrl_lc_escalation.3502028831 |
| /workspace/coverage/default/38.sram_ctrl_max_throughput.3052638553 |
| /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1832665666 |
| /workspace/coverage/default/38.sram_ctrl_mem_walk.1431741376 |
| /workspace/coverage/default/38.sram_ctrl_multiple_keys.2761820217 |
| /workspace/coverage/default/38.sram_ctrl_partial_access.3585598945 |
| /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2973058285 |
| /workspace/coverage/default/38.sram_ctrl_ram_cfg.1509045512 |
| /workspace/coverage/default/38.sram_ctrl_regwen.2516073570 |
| /workspace/coverage/default/38.sram_ctrl_smoke.939154092 |
| /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1969636489 |
| /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3420235424 |
| /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.374313108 |
| /workspace/coverage/default/39.sram_ctrl_alert_test.3007227534 |
| /workspace/coverage/default/39.sram_ctrl_bijection.89728716 |
| /workspace/coverage/default/39.sram_ctrl_executable.2270447307 |
| /workspace/coverage/default/39.sram_ctrl_lc_escalation.1277098189 |
| /workspace/coverage/default/39.sram_ctrl_max_throughput.1436256648 |
| /workspace/coverage/default/39.sram_ctrl_mem_partial_access.335310236 |
| /workspace/coverage/default/39.sram_ctrl_mem_walk.2605703038 |
| /workspace/coverage/default/39.sram_ctrl_multiple_keys.1294987042 |
| /workspace/coverage/default/39.sram_ctrl_partial_access.952310485 |
| /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1931301188 |
| /workspace/coverage/default/39.sram_ctrl_ram_cfg.409103141 |
| /workspace/coverage/default/39.sram_ctrl_regwen.210106182 |
| /workspace/coverage/default/39.sram_ctrl_smoke.3185951403 |
| /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1664004018 |
| /workspace/coverage/default/39.sram_ctrl_stress_pipeline.4130304576 |
| /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.3179548959 |
| /workspace/coverage/default/4.sram_ctrl_alert_test.3239458888 |
| /workspace/coverage/default/4.sram_ctrl_bijection.3371284255 |
| /workspace/coverage/default/4.sram_ctrl_executable.435331359 |
| /workspace/coverage/default/4.sram_ctrl_lc_escalation.1615756269 |
| /workspace/coverage/default/4.sram_ctrl_max_throughput.3557848817 |
| /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1600281281 |
| /workspace/coverage/default/4.sram_ctrl_mem_walk.879371109 |
| /workspace/coverage/default/4.sram_ctrl_multiple_keys.4154160477 |
| /workspace/coverage/default/4.sram_ctrl_partial_access.2757563733 |
| /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3684988644 |
| /workspace/coverage/default/4.sram_ctrl_ram_cfg.2445581058 |
| /workspace/coverage/default/4.sram_ctrl_regwen.3479885208 |
| /workspace/coverage/default/4.sram_ctrl_sec_cm.1924006357 |
| /workspace/coverage/default/4.sram_ctrl_smoke.522786507 |
| /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.663220815 |
| /workspace/coverage/default/4.sram_ctrl_stress_pipeline.1200982363 |
| /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2987133222 |
| /workspace/coverage/default/40.sram_ctrl_alert_test.3286453311 |
| /workspace/coverage/default/40.sram_ctrl_bijection.2120897220 |
| /workspace/coverage/default/40.sram_ctrl_executable.1197358207 |
| /workspace/coverage/default/40.sram_ctrl_lc_escalation.2711267204 |
| /workspace/coverage/default/40.sram_ctrl_max_throughput.959839001 |
| /workspace/coverage/default/40.sram_ctrl_mem_partial_access.571981566 |
| /workspace/coverage/default/40.sram_ctrl_mem_walk.3981121380 |
| /workspace/coverage/default/40.sram_ctrl_multiple_keys.4085108137 |
| /workspace/coverage/default/40.sram_ctrl_partial_access.1770833198 |
| /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2349584498 |
| /workspace/coverage/default/40.sram_ctrl_ram_cfg.660636809 |
| /workspace/coverage/default/40.sram_ctrl_regwen.2436730716 |
| /workspace/coverage/default/40.sram_ctrl_smoke.2983338313 |
| /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3773124626 |
| /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3649781078 |
| /workspace/coverage/default/41.sram_ctrl_alert_test.3471590263 |
| /workspace/coverage/default/41.sram_ctrl_bijection.2721282388 |
| /workspace/coverage/default/41.sram_ctrl_executable.673854463 |
| /workspace/coverage/default/41.sram_ctrl_lc_escalation.342356357 |
| /workspace/coverage/default/41.sram_ctrl_max_throughput.3128181182 |
| /workspace/coverage/default/41.sram_ctrl_mem_partial_access.526335684 |
| /workspace/coverage/default/41.sram_ctrl_mem_walk.79713986 |
| /workspace/coverage/default/41.sram_ctrl_partial_access.1098667063 |
| /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.965944 |
| /workspace/coverage/default/41.sram_ctrl_ram_cfg.4170842556 |
| /workspace/coverage/default/41.sram_ctrl_regwen.752471641 |
| /workspace/coverage/default/41.sram_ctrl_smoke.2611797299 |
| /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.996957714 |
| /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2658287406 |
| /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1607114853 |
| /workspace/coverage/default/42.sram_ctrl_alert_test.480213774 |
| /workspace/coverage/default/42.sram_ctrl_bijection.553303676 |
| /workspace/coverage/default/42.sram_ctrl_executable.61261595 |
| /workspace/coverage/default/42.sram_ctrl_lc_escalation.1944118697 |
| /workspace/coverage/default/42.sram_ctrl_max_throughput.4018988798 |
| /workspace/coverage/default/42.sram_ctrl_mem_partial_access.125143607 |
| /workspace/coverage/default/42.sram_ctrl_mem_walk.3357280607 |
| /workspace/coverage/default/42.sram_ctrl_multiple_keys.1429893457 |
| /workspace/coverage/default/42.sram_ctrl_partial_access.2937428201 |
| /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2262569065 |
| /workspace/coverage/default/42.sram_ctrl_ram_cfg.2144535045 |
| /workspace/coverage/default/42.sram_ctrl_regwen.476937247 |
| /workspace/coverage/default/42.sram_ctrl_smoke.363077089 |
| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1087957097 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3907833627 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2196984732 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.263611630 |
| /workspace/coverage/default/43.sram_ctrl_bijection.2097643256 |
| /workspace/coverage/default/43.sram_ctrl_executable.1320782987 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.452716154 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.2519616302 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2977740419 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.1015843598 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.1165494616 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.469348151 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3928171236 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.1814303390 |
| /workspace/coverage/default/43.sram_ctrl_regwen.1655731929 |
| /workspace/coverage/default/43.sram_ctrl_smoke.2037648075 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.346204191 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3922495046 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.118240027 |
| /workspace/coverage/default/44.sram_ctrl_bijection.3663103661 |
| /workspace/coverage/default/44.sram_ctrl_executable.1219708994 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.1874478447 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.1394451070 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2814133349 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.957090327 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.676479232 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.495731736 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.302178476 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1091639956 |
| /workspace/coverage/default/44.sram_ctrl_regwen.1716215693 |
| /workspace/coverage/default/44.sram_ctrl_smoke.2011352504 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.565932138 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.636639026 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3268161250 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.1056838358 |
| /workspace/coverage/default/45.sram_ctrl_bijection.3389526018 |
| /workspace/coverage/default/45.sram_ctrl_executable.2360335317 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.2540016883 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.2501117539 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3281543634 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.1883807565 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.2541453492 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.2935875502 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4208191894 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.536056251 |
| /workspace/coverage/default/45.sram_ctrl_regwen.2554778663 |
| /workspace/coverage/default/45.sram_ctrl_smoke.2015003749 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1416473625 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.332131057 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.2132800845 |
| /workspace/coverage/default/46.sram_ctrl_bijection.248367204 |
| /workspace/coverage/default/46.sram_ctrl_executable.932848341 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.908192638 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.737777530 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3540548333 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.4138984797 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.1589555849 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.3010367381 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3311040707 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.293559253 |
| /workspace/coverage/default/46.sram_ctrl_regwen.242814294 |
| /workspace/coverage/default/46.sram_ctrl_smoke.3527127934 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1868805747 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3895931676 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.2756201647 |
| /workspace/coverage/default/47.sram_ctrl_bijection.479511434 |
| /workspace/coverage/default/47.sram_ctrl_executable.2806644941 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.3645177976 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.2410593490 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.2440286934 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.1502908955 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.244200139 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.1920363517 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1451696306 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.815992101 |
| /workspace/coverage/default/47.sram_ctrl_regwen.2541201450 |
| /workspace/coverage/default/47.sram_ctrl_smoke.1186739388 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.4280416710 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.633103760 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.1198879050 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2398613741 |
| /workspace/coverage/default/48.sram_ctrl_executable.2974531361 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.3397528024 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.743538329 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3622674963 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.503598808 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.643425958 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.2566422652 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3801138571 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.2076071963 |
| /workspace/coverage/default/48.sram_ctrl_regwen.1277646220 |
| /workspace/coverage/default/48.sram_ctrl_smoke.1576218507 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.2042741626 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.503795733 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.4026347930 |
| /workspace/coverage/default/49.sram_ctrl_bijection.588881827 |
| /workspace/coverage/default/49.sram_ctrl_executable.4063631138 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2142655682 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.1262070726 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.4109973470 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.1224632326 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.904521531 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.3552168083 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.831060911 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.1907598548 |
| /workspace/coverage/default/49.sram_ctrl_regwen.2257050206 |
| /workspace/coverage/default/49.sram_ctrl_smoke.2917874385 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2015810743 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2298734619 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.1312341781 |
| /workspace/coverage/default/5.sram_ctrl_bijection.2003021996 |
| /workspace/coverage/default/5.sram_ctrl_executable.49563947 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.3712088639 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.130422305 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.400928919 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.3779683255 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.1395803557 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.3208391127 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1082103740 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.1069954021 |
| /workspace/coverage/default/5.sram_ctrl_regwen.197511639 |
| /workspace/coverage/default/5.sram_ctrl_smoke.3325754794 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.363618043 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.602291178 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4248749386 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.3368024853 |
| /workspace/coverage/default/6.sram_ctrl_bijection.1331433142 |
| /workspace/coverage/default/6.sram_ctrl_executable.1754070529 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.1068368890 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.756763503 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2224154347 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.1481575110 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1097859627 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.2411141957 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3868143478 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.1544394821 |
| /workspace/coverage/default/6.sram_ctrl_regwen.2952169470 |
| /workspace/coverage/default/6.sram_ctrl_smoke.1978743846 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.98086037 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3036443314 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.4243172407 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1299317445 |
| /workspace/coverage/default/7.sram_ctrl_executable.3005980279 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.4018611241 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.3608828147 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1650073387 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.2381451429 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.4111203128 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.2514900971 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.330958515 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.4146451087 |
| /workspace/coverage/default/7.sram_ctrl_regwen.2373662338 |
| /workspace/coverage/default/7.sram_ctrl_smoke.1835368548 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.208510932 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1702007098 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.224040177 |
| /workspace/coverage/default/8.sram_ctrl_bijection.78040820 |
| /workspace/coverage/default/8.sram_ctrl_executable.25531266 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.1548709044 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.3271919694 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2198373216 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.1176243342 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.928819216 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.1745334813 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2810381653 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.3136219408 |
| /workspace/coverage/default/8.sram_ctrl_smoke.3851709427 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.1307256654 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2912611076 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1334336461 |
| /workspace/coverage/default/9.sram_ctrl_bijection.1117485322 |
| /workspace/coverage/default/9.sram_ctrl_executable.656717425 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.1141157851 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.1629776213 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.4133205164 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.2957139877 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.2927419590 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.2691922728 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2167467458 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.471019485 |
| /workspace/coverage/default/9.sram_ctrl_regwen.1677136050 |
| /workspace/coverage/default/9.sram_ctrl_smoke.1446545165 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2175446974 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.388079778 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3504555214 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.442715469 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:30:53 PM PDT 24 |
53346948946 ps |
| T2 |
/workspace/coverage/default/21.sram_ctrl_bijection.3463859193 |
|
|
May 28 01:30:02 PM PDT 24 |
May 28 02:05:33 PM PDT 24 |
32104756797 ps |
| T3 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1017909608 |
|
|
May 28 01:30:57 PM PDT 24 |
May 28 01:31:11 PM PDT 24 |
952891197 ps |
| T6 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2345037886 |
|
|
May 28 01:29:13 PM PDT 24 |
May 28 01:30:00 PM PDT 24 |
759768661 ps |
| T9 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3448816305 |
|
|
May 28 01:31:29 PM PDT 24 |
May 28 01:34:07 PM PDT 24 |
4948231170 ps |
| T4 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2810381653 |
|
|
May 28 01:29:01 PM PDT 24 |
May 28 01:35:57 PM PDT 24 |
16483216131 ps |
| T5 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3612780947 |
|
|
May 28 01:28:28 PM PDT 24 |
May 28 01:33:24 PM PDT 24 |
12472809141 ps |
| T10 |
/workspace/coverage/default/3.sram_ctrl_executable.3616037828 |
|
|
May 28 01:28:46 PM PDT 24 |
May 28 01:32:28 PM PDT 24 |
15071472776 ps |
| T11 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.677654032 |
|
|
May 28 01:30:03 PM PDT 24 |
May 28 01:38:26 PM PDT 24 |
19876169359 ps |
| T7 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.2795810408 |
|
|
May 28 01:29:46 PM PDT 24 |
May 28 01:30:31 PM PDT 24 |
31162344039 ps |
| T16 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2052945414 |
|
|
May 28 01:31:27 PM PDT 24 |
May 28 01:31:30 PM PDT 24 |
14013434 ps |
| T17 |
/workspace/coverage/default/17.sram_ctrl_alert_test.716920332 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:29:38 PM PDT 24 |
34086839 ps |
| T15 |
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.565932138 |
|
|
May 28 01:33:05 PM PDT 24 |
May 28 01:33:14 PM PDT 24 |
217711470 ps |
| T8 |
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1874478447 |
|
|
May 28 01:33:04 PM PDT 24 |
May 28 01:33:21 PM PDT 24 |
2615972721 ps |
| T18 |
/workspace/coverage/default/34.sram_ctrl_alert_test.999715672 |
|
|
May 28 01:31:38 PM PDT 24 |
May 28 01:31:40 PM PDT 24 |
37153828 ps |
| T12 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.1936346656 |
|
|
May 28 01:30:39 PM PDT 24 |
May 28 01:38:40 PM PDT 24 |
66469757071 ps |
| T22 |
/workspace/coverage/default/8.sram_ctrl_regwen.1511461666 |
|
|
May 28 01:29:05 PM PDT 24 |
May 28 01:46:55 PM PDT 24 |
30221726496 ps |
| T123 |
/workspace/coverage/default/36.sram_ctrl_partial_access.4256366933 |
|
|
May 28 01:31:51 PM PDT 24 |
May 28 01:32:16 PM PDT 24 |
638176339 ps |
| T162 |
/workspace/coverage/default/0.sram_ctrl_alert_test.1074487475 |
|
|
May 28 01:28:28 PM PDT 24 |
May 28 01:28:32 PM PDT 24 |
14742242 ps |
| T160 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3184621658 |
|
|
May 28 01:31:15 PM PDT 24 |
May 28 01:32:53 PM PDT 24 |
8513855079 ps |
| T158 |
/workspace/coverage/default/27.sram_ctrl_alert_test.4069080000 |
|
|
May 28 01:31:03 PM PDT 24 |
May 28 01:31:06 PM PDT 24 |
13203590 ps |
| T124 |
/workspace/coverage/default/30.sram_ctrl_bijection.4101098219 |
|
|
May 28 01:30:59 PM PDT 24 |
May 28 01:58:20 PM PDT 24 |
129694259461 ps |
| T157 |
/workspace/coverage/default/4.sram_ctrl_bijection.3371284255 |
|
|
May 28 01:28:44 PM PDT 24 |
May 28 01:57:07 PM PDT 24 |
27667057439 ps |
| T24 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.3035680585 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 01:30:47 PM PDT 24 |
12260521141 ps |
| T43 |
/workspace/coverage/default/4.sram_ctrl_partial_access.2757563733 |
|
|
May 28 01:28:42 PM PDT 24 |
May 28 01:29:08 PM PDT 24 |
7116673766 ps |
| T117 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.2593618047 |
|
|
May 28 01:30:18 PM PDT 24 |
May 28 01:41:59 PM PDT 24 |
4952633248 ps |
| T13 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2224154347 |
|
|
May 28 01:29:01 PM PDT 24 |
May 28 01:30:23 PM PDT 24 |
2631497996 ps |
| T14 |
/workspace/coverage/default/38.sram_ctrl_regwen.2516073570 |
|
|
May 28 01:32:03 PM PDT 24 |
May 28 01:41:24 PM PDT 24 |
53578108892 ps |
| T79 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.3500331921 |
|
|
May 28 01:31:44 PM PDT 24 |
May 28 01:33:52 PM PDT 24 |
7902647893 ps |
| T80 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1783795822 |
|
|
May 28 01:28:19 PM PDT 24 |
May 28 01:49:27 PM PDT 24 |
170176640288 ps |
| T69 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.636639026 |
|
|
May 28 01:33:06 PM PDT 24 |
May 28 01:35:43 PM PDT 24 |
57776513853 ps |
| T81 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.1736859537 |
|
|
May 28 01:30:00 PM PDT 24 |
May 28 01:34:25 PM PDT 24 |
4862513498 ps |
| T82 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.4114620114 |
|
|
May 28 01:31:04 PM PDT 24 |
May 28 01:32:22 PM PDT 24 |
3989869420 ps |
| T83 |
/workspace/coverage/default/35.sram_ctrl_smoke.1782207340 |
|
|
May 28 01:31:40 PM PDT 24 |
May 28 01:32:04 PM PDT 24 |
1356082006 ps |
| T84 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3779683255 |
|
|
May 28 01:28:45 PM PDT 24 |
May 28 01:31:35 PM PDT 24 |
27645564761 ps |
| T85 |
/workspace/coverage/default/10.sram_ctrl_alert_test.1954742524 |
|
|
May 28 01:29:05 PM PDT 24 |
May 28 01:29:09 PM PDT 24 |
42217181 ps |
| T42 |
/workspace/coverage/default/8.sram_ctrl_bijection.78040820 |
|
|
May 28 01:29:06 PM PDT 24 |
May 28 01:51:16 PM PDT 24 |
76194459172 ps |
| T163 |
/workspace/coverage/default/41.sram_ctrl_partial_access.1098667063 |
|
|
May 28 01:32:27 PM PDT 24 |
May 28 01:32:42 PM PDT 24 |
727934882 ps |
| T161 |
/workspace/coverage/default/10.sram_ctrl_smoke.784073952 |
|
|
May 28 01:29:02 PM PDT 24 |
May 28 01:29:21 PM PDT 24 |
4065230149 ps |
| T49 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2711267204 |
|
|
May 28 01:32:14 PM PDT 24 |
May 28 01:33:18 PM PDT 24 |
36466377839 ps |
| T94 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4109973470 |
|
|
May 28 01:33:52 PM PDT 24 |
May 28 01:35:16 PM PDT 24 |
5330238491 ps |
| T95 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.125143607 |
|
|
May 28 01:32:35 PM PDT 24 |
May 28 01:34:47 PM PDT 24 |
6553863920 ps |
| T114 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1481830340 |
|
|
May 28 01:31:16 PM PDT 24 |
May 28 01:34:14 PM PDT 24 |
4886153798 ps |
| T164 |
/workspace/coverage/default/19.sram_ctrl_bijection.4046636705 |
|
|
May 28 01:29:47 PM PDT 24 |
May 28 02:10:49 PM PDT 24 |
73585793398 ps |
| T159 |
/workspace/coverage/default/15.sram_ctrl_bijection.2739733615 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 02:18:37 PM PDT 24 |
171160607767 ps |
| T165 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2869544229 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 01:48:10 PM PDT 24 |
18941873863 ps |
| T50 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3645177976 |
|
|
May 28 01:33:33 PM PDT 24 |
May 28 01:35:17 PM PDT 24 |
17161013697 ps |
| T166 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.4169119255 |
|
|
May 28 01:29:45 PM PDT 24 |
May 28 01:29:56 PM PDT 24 |
2817798989 ps |
| T167 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.79713986 |
|
|
May 28 01:32:25 PM PDT 24 |
May 28 01:37:49 PM PDT 24 |
13830031615 ps |
| T115 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.4133216791 |
|
|
May 28 01:29:25 PM PDT 24 |
May 28 01:34:18 PM PDT 24 |
120465538136 ps |
| T168 |
/workspace/coverage/default/38.sram_ctrl_bijection.1723379370 |
|
|
May 28 01:32:02 PM PDT 24 |
May 28 02:05:35 PM PDT 24 |
399066408414 ps |
| T26 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2076071963 |
|
|
May 28 01:33:43 PM PDT 24 |
May 28 01:33:47 PM PDT 24 |
1972044827 ps |
| T118 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4111203128 |
|
|
May 28 01:28:59 PM PDT 24 |
May 28 01:52:11 PM PDT 24 |
35192856695 ps |
| T58 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.939308019 |
|
|
May 28 01:30:59 PM PDT 24 |
May 28 01:31:44 PM PDT 24 |
13456901261 ps |
| T169 |
/workspace/coverage/default/43.sram_ctrl_partial_access.469348151 |
|
|
May 28 01:32:47 PM PDT 24 |
May 28 01:33:08 PM PDT 24 |
3868139239 ps |
| T170 |
/workspace/coverage/default/2.sram_ctrl_max_throughput.1001258824 |
|
|
May 28 01:28:33 PM PDT 24 |
May 28 01:30:00 PM PDT 24 |
740568720 ps |
| T59 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.3976258047 |
|
|
May 28 01:30:40 PM PDT 24 |
May 28 01:31:20 PM PDT 24 |
10112296557 ps |
| T25 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2679293315 |
|
|
May 28 01:33:16 PM PDT 24 |
May 28 01:33:28 PM PDT 24 |
1161649324 ps |
| T119 |
/workspace/coverage/default/11.sram_ctrl_executable.2224495771 |
|
|
May 28 01:29:11 PM PDT 24 |
May 28 01:36:40 PM PDT 24 |
18776735284 ps |
| T116 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1814754317 |
|
|
May 28 01:30:56 PM PDT 24 |
May 28 01:37:01 PM PDT 24 |
9309355961 ps |
| T171 |
/workspace/coverage/default/12.sram_ctrl_bijection.3803437780 |
|
|
May 28 01:29:12 PM PDT 24 |
May 28 01:57:31 PM PDT 24 |
84028690026 ps |
| T96 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2573933186 |
|
|
May 28 01:29:01 PM PDT 24 |
May 28 01:31:45 PM PDT 24 |
4546216467 ps |
| T97 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1223715073 |
|
|
May 28 01:28:35 PM PDT 24 |
May 28 01:29:55 PM PDT 24 |
2685143285 ps |
| T172 |
/workspace/coverage/default/23.sram_ctrl_smoke.3961081365 |
|
|
May 28 01:30:03 PM PDT 24 |
May 28 01:30:18 PM PDT 24 |
428100356 ps |
| T173 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1019695441 |
|
|
May 28 01:28:44 PM PDT 24 |
May 28 01:28:48 PM PDT 24 |
12574433 ps |
| T174 |
/workspace/coverage/default/25.sram_ctrl_alert_test.1995990162 |
|
|
May 28 01:30:39 PM PDT 24 |
May 28 01:30:41 PM PDT 24 |
26256241 ps |
| T98 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.82662218 |
|
|
May 28 01:30:57 PM PDT 24 |
May 28 01:32:19 PM PDT 24 |
9708546166 ps |
| T175 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1334336461 |
|
|
May 28 01:28:59 PM PDT 24 |
May 28 01:29:03 PM PDT 24 |
45925204 ps |
| T176 |
/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1935010930 |
|
|
May 28 01:29:37 PM PDT 24 |
May 28 01:36:43 PM PDT 24 |
178196471975 ps |
| T177 |
/workspace/coverage/default/38.sram_ctrl_alert_test.2734301635 |
|
|
May 28 01:32:02 PM PDT 24 |
May 28 01:32:05 PM PDT 24 |
35002810 ps |
| T178 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2411141957 |
|
|
May 28 01:28:45 PM PDT 24 |
May 28 01:28:53 PM PDT 24 |
399436544 ps |
| T179 |
/workspace/coverage/default/29.sram_ctrl_smoke.2551245625 |
|
|
May 28 01:30:54 PM PDT 24 |
May 28 01:31:05 PM PDT 24 |
661488206 ps |
| T180 |
/workspace/coverage/default/34.sram_ctrl_partial_access_b2b.4264185137 |
|
|
May 28 01:31:27 PM PDT 24 |
May 28 01:35:50 PM PDT 24 |
12551289251 ps |
| T181 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.342356357 |
|
|
May 28 01:32:24 PM PDT 24 |
May 28 01:33:34 PM PDT 24 |
44149133194 ps |
| T120 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.3961887145 |
|
|
May 28 01:31:06 PM PDT 24 |
May 28 01:40:57 PM PDT 24 |
32880019184 ps |
| T182 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2691922728 |
|
|
May 28 01:29:02 PM PDT 24 |
May 28 01:29:14 PM PDT 24 |
514467824 ps |
| T99 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2814133349 |
|
|
May 28 01:33:04 PM PDT 24 |
May 28 01:34:31 PM PDT 24 |
15278603203 ps |
| T183 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.3673525899 |
|
|
May 28 01:28:31 PM PDT 24 |
May 28 01:28:51 PM PDT 24 |
14969426558 ps |
| T184 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.3415835396 |
|
|
May 28 01:31:35 PM PDT 24 |
May 28 01:32:40 PM PDT 24 |
9841130665 ps |
| T185 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2168096897 |
|
|
May 28 01:31:05 PM PDT 24 |
May 28 01:32:40 PM PDT 24 |
801751517 ps |
| T186 |
/workspace/coverage/default/5.sram_ctrl_alert_test.1312341781 |
|
|
May 28 01:28:45 PM PDT 24 |
May 28 01:28:49 PM PDT 24 |
62851469 ps |
| T187 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.1015843598 |
|
|
May 28 01:32:49 PM PDT 24 |
May 28 01:35:42 PM PDT 24 |
14111242855 ps |
| T188 |
/workspace/coverage/default/44.sram_ctrl_smoke.2011352504 |
|
|
May 28 01:32:47 PM PDT 24 |
May 28 01:33:59 PM PDT 24 |
1267545514 ps |
| T189 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1702007098 |
|
|
May 28 01:29:00 PM PDT 24 |
May 28 01:29:09 PM PDT 24 |
781932644 ps |
| T100 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.251749218 |
|
|
May 28 01:31:10 PM PDT 24 |
May 28 01:33:34 PM PDT 24 |
5108917536 ps |
| T190 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.2749152134 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:32:21 PM PDT 24 |
13503744843 ps |
| T101 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.449373053 |
|
|
May 28 01:31:51 PM PDT 24 |
May 28 01:34:28 PM PDT 24 |
17408675832 ps |
| T191 |
/workspace/coverage/default/24.sram_ctrl_smoke.441220615 |
|
|
May 28 01:30:15 PM PDT 24 |
May 28 01:30:27 PM PDT 24 |
720581113 ps |
| T192 |
/workspace/coverage/default/46.sram_ctrl_bijection.248367204 |
|
|
May 28 01:33:19 PM PDT 24 |
May 28 01:52:11 PM PDT 24 |
63646027423 ps |
| T193 |
/workspace/coverage/default/43.sram_ctrl_bijection.2097643256 |
|
|
May 28 01:32:35 PM PDT 24 |
May 28 02:01:19 PM PDT 24 |
311139972008 ps |
| T121 |
/workspace/coverage/default/5.sram_ctrl_executable.49563947 |
|
|
May 28 01:28:43 PM PDT 24 |
May 28 01:41:35 PM PDT 24 |
25429339621 ps |
| T23 |
/workspace/coverage/default/31.sram_ctrl_regwen.1331300593 |
|
|
May 28 01:31:06 PM PDT 24 |
May 28 01:55:38 PM PDT 24 |
8729938655 ps |
| T194 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1715264431 |
|
|
May 28 01:30:41 PM PDT 24 |
May 28 01:31:16 PM PDT 24 |
762127398 ps |
| T195 |
/workspace/coverage/default/12.sram_ctrl_alert_test.2475536086 |
|
|
May 28 01:29:19 PM PDT 24 |
May 28 01:29:21 PM PDT 24 |
15787794 ps |
| T196 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.23387726 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 01:32:49 PM PDT 24 |
48482582599 ps |
| T197 |
/workspace/coverage/default/30.sram_ctrl_partial_access.551215110 |
|
|
May 28 01:31:03 PM PDT 24 |
May 28 01:31:15 PM PDT 24 |
3024386032 ps |
| T198 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.4018161382 |
|
|
May 28 01:30:59 PM PDT 24 |
May 28 01:33:44 PM PDT 24 |
7287992323 ps |
| T199 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.1392644994 |
|
|
May 28 01:29:33 PM PDT 24 |
May 28 01:31:38 PM PDT 24 |
7901662999 ps |
| T200 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.1410636238 |
|
|
May 28 01:29:48 PM PDT 24 |
May 28 01:35:04 PM PDT 24 |
14098010498 ps |
| T201 |
/workspace/coverage/default/10.sram_ctrl_partial_access.4240399562 |
|
|
May 28 01:29:00 PM PDT 24 |
May 28 01:30:46 PM PDT 24 |
8408580255 ps |
| T202 |
/workspace/coverage/default/36.sram_ctrl_bijection.774917380 |
|
|
May 28 01:31:49 PM PDT 24 |
May 28 01:49:16 PM PDT 24 |
209229631659 ps |
| T203 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.1625496176 |
|
|
May 28 01:30:01 PM PDT 24 |
May 28 01:33:34 PM PDT 24 |
6438743785 ps |
| T204 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2192115065 |
|
|
May 28 01:30:55 PM PDT 24 |
May 28 01:32:50 PM PDT 24 |
855252568 ps |
| T205 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1024452697 |
|
|
May 28 01:29:16 PM PDT 24 |
May 28 01:34:40 PM PDT 24 |
6119868567 ps |
| T206 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.302115906 |
|
|
May 28 01:31:17 PM PDT 24 |
May 28 01:34:20 PM PDT 24 |
8828050270 ps |
| T207 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2303549245 |
|
|
May 28 01:30:42 PM PDT 24 |
May 28 01:32:11 PM PDT 24 |
9207370437 ps |
| T40 |
/workspace/coverage/default/36.sram_ctrl_regwen.684035170 |
|
|
May 28 01:31:51 PM PDT 24 |
May 28 01:57:22 PM PDT 24 |
66630942193 ps |
| T51 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.996957714 |
|
|
May 28 01:32:40 PM PDT 24 |
May 28 01:32:57 PM PDT 24 |
5519923310 ps |
| T27 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.815992101 |
|
|
May 28 01:33:31 PM PDT 24 |
May 28 01:33:36 PM PDT 24 |
1458124201 ps |
| T208 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1579472655 |
|
|
May 28 01:30:13 PM PDT 24 |
May 28 01:34:07 PM PDT 24 |
14906444665 ps |
| T155 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2198373216 |
|
|
May 28 01:29:05 PM PDT 24 |
May 28 01:31:47 PM PDT 24 |
20550533096 ps |
| T209 |
/workspace/coverage/default/3.sram_ctrl_partial_access.199774291 |
|
|
May 28 01:28:38 PM PDT 24 |
May 28 01:29:16 PM PDT 24 |
1013683411 ps |
| T210 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2483642897 |
|
|
May 28 01:31:06 PM PDT 24 |
May 28 01:31:19 PM PDT 24 |
2706612427 ps |
| T211 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2501117539 |
|
|
May 28 01:33:19 PM PDT 24 |
May 28 01:34:56 PM PDT 24 |
3003564945 ps |
| T212 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3997881297 |
|
|
May 28 01:28:32 PM PDT 24 |
May 28 01:30:01 PM PDT 24 |
3119051443 ps |
| T213 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1848613160 |
|
|
May 28 01:28:31 PM PDT 24 |
May 28 01:28:42 PM PDT 24 |
675112869 ps |
| T214 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.3557848817 |
|
|
May 28 01:28:42 PM PDT 24 |
May 28 01:31:20 PM PDT 24 |
2720971648 ps |
| T215 |
/workspace/coverage/default/46.sram_ctrl_smoke.3527127934 |
|
|
May 28 01:33:18 PM PDT 24 |
May 28 01:33:41 PM PDT 24 |
1495336712 ps |
| T216 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.926955890 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 01:36:40 PM PDT 24 |
30688360936 ps |
| T152 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.4269761547 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:37:10 PM PDT 24 |
78554301647 ps |
| T28 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.2958551389 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 01:29:40 PM PDT 24 |
1438349072 ps |
| T217 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1597779452 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:29:59 PM PDT 24 |
705385258 ps |
| T218 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.2892118574 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 01:29:41 PM PDT 24 |
1342736487 ps |
| T52 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2842627062 |
|
|
May 28 01:30:19 PM PDT 24 |
May 28 01:30:31 PM PDT 24 |
202337790 ps |
| T219 |
/workspace/coverage/default/39.sram_ctrl_bijection.89728716 |
|
|
May 28 01:32:16 PM PDT 24 |
May 28 01:43:32 PM PDT 24 |
20215574027 ps |
| T220 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1517428202 |
|
|
May 28 01:30:19 PM PDT 24 |
May 28 01:31:28 PM PDT 24 |
740500922 ps |
| T221 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.4085108137 |
|
|
May 28 01:32:15 PM PDT 24 |
May 28 01:54:04 PM PDT 24 |
61622157178 ps |
| T222 |
/workspace/coverage/default/15.sram_ctrl_partial_access.2252013508 |
|
|
May 28 01:29:22 PM PDT 24 |
May 28 01:29:38 PM PDT 24 |
556712416 ps |
| T122 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2927419590 |
|
|
May 28 01:29:04 PM PDT 24 |
May 28 01:57:34 PM PDT 24 |
44874783876 ps |
| T223 |
/workspace/coverage/default/35.sram_ctrl_bijection.2972435452 |
|
|
May 28 01:31:40 PM PDT 24 |
May 28 01:40:24 PM PDT 24 |
7551170611 ps |
| T60 |
/workspace/coverage/default/23.sram_ctrl_regwen.1383069785 |
|
|
May 28 01:30:19 PM PDT 24 |
May 28 01:45:57 PM PDT 24 |
40696646859 ps |
| T61 |
/workspace/coverage/default/39.sram_ctrl_mem_partial_access.335310236 |
|
|
May 28 01:32:16 PM PDT 24 |
May 28 01:33:31 PM PDT 24 |
5808576100 ps |
| T41 |
/workspace/coverage/default/17.sram_ctrl_regwen.3460984142 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 01:44:35 PM PDT 24 |
35159718196 ps |
| T62 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1810430671 |
|
|
May 28 01:28:28 PM PDT 24 |
May 28 01:29:00 PM PDT 24 |
3154364929 ps |
| T63 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1091639956 |
|
|
May 28 01:33:05 PM PDT 24 |
May 28 01:33:09 PM PDT 24 |
679767127 ps |
| T64 |
/workspace/coverage/default/31.sram_ctrl_executable.1075253412 |
|
|
May 28 01:31:05 PM PDT 24 |
May 28 01:31:46 PM PDT 24 |
1535155876 ps |
| T65 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2977740419 |
|
|
May 28 01:33:45 PM PDT 24 |
May 28 01:35:02 PM PDT 24 |
4572472956 ps |
| T66 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3898606537 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 01:32:08 PM PDT 24 |
27683965708 ps |
| T67 |
/workspace/coverage/default/47.sram_ctrl_alert_test.2756201647 |
|
|
May 28 01:33:33 PM PDT 24 |
May 28 01:33:35 PM PDT 24 |
38850255 ps |
| T68 |
/workspace/coverage/default/6.sram_ctrl_executable.1754070529 |
|
|
May 28 01:28:45 PM PDT 24 |
May 28 01:57:02 PM PDT 24 |
33769287733 ps |
| T151 |
/workspace/coverage/default/49.sram_ctrl_regwen.2257050206 |
|
|
May 28 01:33:54 PM PDT 24 |
May 28 01:45:23 PM PDT 24 |
13162977627 ps |
| T224 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2349584498 |
|
|
May 28 01:32:18 PM PDT 24 |
May 28 01:40:49 PM PDT 24 |
42236964294 ps |
| T225 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.4259079318 |
|
|
May 28 01:31:38 PM PDT 24 |
May 28 01:36:43 PM PDT 24 |
3628609397 ps |
| T226 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2015810743 |
|
|
May 28 01:33:53 PM PDT 24 |
May 28 01:38:22 PM PDT 24 |
96825012724 ps |
| T227 |
/workspace/coverage/default/20.sram_ctrl_smoke.2912335375 |
|
|
May 28 01:29:45 PM PDT 24 |
May 28 01:29:55 PM PDT 24 |
1489943630 ps |
| T228 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3622674963 |
|
|
May 28 01:33:44 PM PDT 24 |
May 28 01:35:00 PM PDT 24 |
9358710622 ps |
| T229 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.602291178 |
|
|
May 28 01:28:43 PM PDT 24 |
May 28 01:33:49 PM PDT 24 |
23392612672 ps |
| T230 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.210666474 |
|
|
May 28 01:30:19 PM PDT 24 |
May 28 01:32:51 PM PDT 24 |
3956763403 ps |
| T231 |
/workspace/coverage/default/4.sram_ctrl_smoke.522786507 |
|
|
May 28 01:28:42 PM PDT 24 |
May 28 01:28:58 PM PDT 24 |
924218745 ps |
| T232 |
/workspace/coverage/default/45.sram_ctrl_alert_test.1056838358 |
|
|
May 28 01:33:19 PM PDT 24 |
May 28 01:33:22 PM PDT 24 |
45574222 ps |
| T233 |
/workspace/coverage/default/22.sram_ctrl_partial_access.3371684498 |
|
|
May 28 01:30:01 PM PDT 24 |
May 28 01:31:35 PM PDT 24 |
3812060014 ps |
| T150 |
/workspace/coverage/default/16.sram_ctrl_regwen.2435420611 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:38:06 PM PDT 24 |
9261283314 ps |
| T19 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2031925342 |
|
|
May 28 01:28:28 PM PDT 24 |
May 28 01:28:35 PM PDT 24 |
888391564 ps |
| T31 |
/workspace/coverage/default/23.sram_ctrl_executable.2317614151 |
|
|
May 28 01:30:18 PM PDT 24 |
May 28 01:40:18 PM PDT 24 |
16368600903 ps |
| T32 |
/workspace/coverage/default/12.sram_ctrl_executable.610308957 |
|
|
May 28 01:29:24 PM PDT 24 |
May 28 01:34:28 PM PDT 24 |
6872211416 ps |
| T33 |
/workspace/coverage/default/49.sram_ctrl_alert_test.4026347930 |
|
|
May 28 01:33:54 PM PDT 24 |
May 28 01:33:56 PM PDT 24 |
40747320 ps |
| T34 |
/workspace/coverage/default/2.sram_ctrl_partial_access.2835626912 |
|
|
May 28 01:28:30 PM PDT 24 |
May 28 01:29:26 PM PDT 24 |
1562765517 ps |
| T35 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3443483931 |
|
|
May 28 01:30:54 PM PDT 24 |
May 28 01:31:45 PM PDT 24 |
1503496670 ps |
| T36 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.425995332 |
|
|
May 28 01:30:03 PM PDT 24 |
May 28 01:37:40 PM PDT 24 |
18305614072 ps |
| T37 |
/workspace/coverage/default/13.sram_ctrl_regwen.1205473028 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 01:42:14 PM PDT 24 |
100193931783 ps |
| T38 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.904521531 |
|
|
May 28 01:33:42 PM PDT 24 |
May 28 01:38:25 PM PDT 24 |
10821398400 ps |
| T39 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3140991712 |
|
|
May 28 01:29:20 PM PDT 24 |
May 28 01:30:26 PM PDT 24 |
11531557619 ps |
| T234 |
/workspace/coverage/default/42.sram_ctrl_bijection.553303676 |
|
|
May 28 01:32:43 PM PDT 24 |
May 28 02:16:04 PM PDT 24 |
524602015255 ps |
| T235 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.2317891980 |
|
|
May 28 01:31:37 PM PDT 24 |
May 28 01:34:22 PM PDT 24 |
7141797362 ps |
| T236 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2167467458 |
|
|
May 28 01:29:05 PM PDT 24 |
May 28 01:35:41 PM PDT 24 |
25439183975 ps |
| T237 |
/workspace/coverage/default/34.sram_ctrl_partial_access.1263205941 |
|
|
May 28 01:31:26 PM PDT 24 |
May 28 01:31:32 PM PDT 24 |
4863171668 ps |
| T238 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.968006244 |
|
|
May 28 01:31:29 PM PDT 24 |
May 28 01:32:09 PM PDT 24 |
719909366 ps |
| T239 |
/workspace/coverage/default/34.sram_ctrl_executable.887179665 |
|
|
May 28 01:31:27 PM PDT 24 |
May 28 02:01:44 PM PDT 24 |
82551628055 ps |
| T240 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.1853095601 |
|
|
May 28 01:31:52 PM PDT 24 |
May 28 01:42:16 PM PDT 24 |
7717372430 ps |
| T70 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.3508190389 |
|
|
May 28 01:32:04 PM PDT 24 |
May 28 01:33:30 PM PDT 24 |
53998109344 ps |
| T241 |
/workspace/coverage/default/39.sram_ctrl_smoke.3185951403 |
|
|
May 28 01:32:15 PM PDT 24 |
May 28 01:32:28 PM PDT 24 |
3186128475 ps |
| T242 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2792449172 |
|
|
May 28 01:29:33 PM PDT 24 |
May 28 01:29:35 PM PDT 24 |
32612172 ps |
| T243 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3823784175 |
|
|
May 28 01:30:43 PM PDT 24 |
May 28 01:33:01 PM PDT 24 |
1997285923 ps |
| T244 |
/workspace/coverage/default/29.sram_ctrl_bijection.77446709 |
|
|
May 28 01:30:55 PM PDT 24 |
May 28 02:24:01 PM PDT 24 |
662105011267 ps |
| T245 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.4138984797 |
|
|
May 28 01:33:17 PM PDT 24 |
May 28 01:35:56 PM PDT 24 |
13836633662 ps |
| T246 |
/workspace/coverage/default/28.sram_ctrl_partial_access.1826001516 |
|
|
May 28 01:30:57 PM PDT 24 |
May 28 01:32:59 PM PDT 24 |
4901880552 ps |
| T247 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.3364774773 |
|
|
May 28 01:29:14 PM PDT 24 |
May 28 01:29:25 PM PDT 24 |
1421942421 ps |
| T248 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3318076227 |
|
|
May 28 01:29:14 PM PDT 24 |
May 28 01:29:21 PM PDT 24 |
1456047216 ps |
| T249 |
/workspace/coverage/default/22.sram_ctrl_executable.4193621607 |
|
|
May 28 01:30:01 PM PDT 24 |
May 28 01:33:39 PM PDT 24 |
3784320172 ps |
| T250 |
/workspace/coverage/default/17.sram_ctrl_smoke.564754335 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 01:29:55 PM PDT 24 |
3485804917 ps |
| T149 |
/workspace/coverage/default/27.sram_ctrl_executable.441868447 |
|
|
May 28 01:30:59 PM PDT 24 |
May 28 01:57:36 PM PDT 24 |
29075725006 ps |
| T251 |
/workspace/coverage/default/0.sram_ctrl_smoke.664954485 |
|
|
May 28 01:28:19 PM PDT 24 |
May 28 01:28:29 PM PDT 24 |
802951414 ps |
| T252 |
/workspace/coverage/default/7.sram_ctrl_regwen.2373662338 |
|
|
May 28 01:29:00 PM PDT 24 |
May 28 01:44:05 PM PDT 24 |
56192512971 ps |
| T253 |
/workspace/coverage/default/24.sram_ctrl_bijection.3301629801 |
|
|
May 28 01:30:20 PM PDT 24 |
May 28 02:09:33 PM PDT 24 |
227741863440 ps |
| T254 |
/workspace/coverage/default/27.sram_ctrl_regwen.1206098580 |
|
|
May 28 01:30:57 PM PDT 24 |
May 28 01:37:44 PM PDT 24 |
3612728641 ps |
| T255 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.3052638553 |
|
|
May 28 01:32:03 PM PDT 24 |
May 28 01:32:55 PM PDT 24 |
3044243878 ps |
| T256 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.781069715 |
|
|
May 28 01:32:02 PM PDT 24 |
May 28 01:32:07 PM PDT 24 |
2601429285 ps |
| T257 |
/workspace/coverage/default/13.sram_ctrl_partial_access.4014024045 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 01:29:50 PM PDT 24 |
2837266984 ps |
| T258 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.1509045512 |
|
|
May 28 01:31:57 PM PDT 24 |
May 28 01:32:02 PM PDT 24 |
1674060699 ps |
| T20 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.2435048709 |
|
|
May 28 01:28:30 PM PDT 24 |
May 28 01:28:36 PM PDT 24 |
458613473 ps |
| T259 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3000794662 |
|
|
May 28 01:30:02 PM PDT 24 |
May 28 01:36:23 PM PDT 24 |
33572272183 ps |
| T260 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4208191894 |
|
|
May 28 01:33:19 PM PDT 24 |
May 28 01:42:20 PM PDT 24 |
86693660120 ps |
| T261 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.3833497586 |
|
|
May 28 01:31:49 PM PDT 24 |
May 28 01:32:55 PM PDT 24 |
3036472273 ps |
| T262 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1629776213 |
|
|
May 28 01:29:04 PM PDT 24 |
May 28 01:29:40 PM PDT 24 |
1136738932 ps |
| T263 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.4170842556 |
|
|
May 28 01:32:26 PM PDT 24 |
May 28 01:32:31 PM PDT 24 |
375428715 ps |
| T21 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.964476064 |
|
|
May 28 01:28:43 PM PDT 24 |
May 28 01:28:49 PM PDT 24 |
1159642363 ps |
| T71 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.3044598383 |
|
|
May 28 01:31:27 PM PDT 24 |
May 28 01:32:36 PM PDT 24 |
39376110757 ps |
| T264 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1165494616 |
|
|
May 28 01:33:37 PM PDT 24 |
May 28 01:41:54 PM PDT 24 |
31460175296 ps |
| T265 |
/workspace/coverage/default/25.sram_ctrl_regwen.3695377409 |
|
|
May 28 01:30:40 PM PDT 24 |
May 28 01:37:37 PM PDT 24 |
13734901902 ps |
| T266 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.3932861379 |
|
|
May 28 01:31:04 PM PDT 24 |
May 28 01:33:46 PM PDT 24 |
6933998757 ps |
| T53 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2175446974 |
|
|
May 28 01:29:02 PM PDT 24 |
May 28 01:29:24 PM PDT 24 |
1177919467 ps |
| T130 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1125909510 |
|
|
May 28 01:30:56 PM PDT 24 |
May 28 01:35:28 PM PDT 24 |
16423369460 ps |
| T131 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.76632713 |
|
|
May 28 01:29:37 PM PDT 24 |
May 28 01:30:11 PM PDT 24 |
14272656668 ps |
| T132 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.281599487 |
|
|
May 28 01:29:18 PM PDT 24 |
May 28 01:32:15 PM PDT 24 |
25614146098 ps |
| T133 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1451696306 |
|
|
May 28 01:33:29 PM PDT 24 |
May 28 01:37:35 PM PDT 24 |
5865146872 ps |
| T134 |
/workspace/coverage/default/28.sram_ctrl_alert_test.980764346 |
|
|
May 28 01:30:59 PM PDT 24 |
May 28 01:31:04 PM PDT 24 |
18164683 ps |
| T135 |
/workspace/coverage/default/36.sram_ctrl_smoke.1382403633 |
|
|
May 28 01:31:49 PM PDT 24 |
May 28 01:33:04 PM PDT 24 |
4215643677 ps |
| T136 |
/workspace/coverage/default/35.sram_ctrl_partial_access.1456377411 |
|
|
May 28 01:31:43 PM PDT 24 |
May 28 01:31:50 PM PDT 24 |
1576075136 ps |
| T72 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.3698670288 |
|
|
May 28 01:30:03 PM PDT 24 |
May 28 01:50:30 PM PDT 24 |
20233643200 ps |
| T137 |
/workspace/coverage/default/44.sram_ctrl_executable.1219708994 |
|
|
May 28 01:33:05 PM PDT 24 |
May 28 01:44:38 PM PDT 24 |
42466309443 ps |
| T267 |
/workspace/coverage/default/40.sram_ctrl_regwen.2436730716 |
|
|
May 28 01:32:13 PM PDT 24 |
May 28 01:49:35 PM PDT 24 |
14335767737 ps |
| T268 |
/workspace/coverage/default/8.sram_ctrl_alert_test.224040177 |
|
|
May 28 01:29:04 PM PDT 24 |
May 28 01:29:09 PM PDT 24 |
11481117 ps |
| T269 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3868143478 |
|
|
May 28 01:28:46 PM PDT 24 |
May 28 01:33:09 PM PDT 24 |
4778618613 ps |
| T270 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.2381451429 |
|
|
May 28 01:29:01 PM PDT 24 |
May 28 01:34:10 PM PDT 24 |
25001104234 ps |
| T271 |
/workspace/coverage/default/11.sram_ctrl_smoke.3009333496 |
|
|
May 28 01:29:05 PM PDT 24 |
May 28 01:30:18 PM PDT 24 |
4831652915 ps |
| T153 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3352638156 |
|
|
May 28 01:29:12 PM PDT 24 |
May 28 01:38:21 PM PDT 24 |
25475164237 ps |
| T272 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.3535679842 |
|
|
May 28 01:29:56 PM PDT 24 |
May 28 01:30:01 PM PDT 24 |
353804321 ps |
| T273 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1603123817 |
|
|
May 28 01:28:28 PM PDT 24 |
May 28 01:28:49 PM PDT 24 |
1265767717 ps |
| T274 |
/workspace/coverage/default/21.sram_ctrl_partial_access.1208684286 |
|
|
May 28 01:30:00 PM PDT 24 |
May 28 01:30:26 PM PDT 24 |
1500157912 ps |
| T275 |
/workspace/coverage/default/17.sram_ctrl_bijection.899828521 |
|
|
May 28 01:29:34 PM PDT 24 |
May 28 02:14:28 PM PDT 24 |
406617537248 ps |
| T276 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.477722899 |
|
|
May 28 01:29:12 PM PDT 24 |
May 28 01:29:34 PM PDT 24 |
724477910 ps |
| T73 |
/workspace/coverage/default/48.sram_ctrl_regwen.1277646220 |
|
|
May 28 01:33:48 PM PDT 24 |
May 28 01:48:09 PM PDT 24 |
10174949275 ps |
| T277 |
/workspace/coverage/default/20.sram_ctrl_executable.538396412 |
|
|
May 28 01:29:49 PM PDT 24 |
May 28 01:40:43 PM PDT 24 |
24117073584 ps |
| T278 |
/workspace/coverage/default/45.sram_ctrl_bijection.3389526018 |
|
|
May 28 01:33:18 PM PDT 24 |
May 28 02:03:56 PM PDT 24 |
867345552725 ps |
| T279 |
/workspace/coverage/default/22.sram_ctrl_smoke.769615748 |
|
|
May 28 01:30:02 PM PDT 24 |
May 28 01:31:18 PM PDT 24 |
866260075 ps |
| T280 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2710490060 |
|
|
May 28 01:31:27 PM PDT 24 |
May 28 01:33:05 PM PDT 24 |
3429307022 ps |
| T281 |
/workspace/coverage/default/14.sram_ctrl_executable.3995044312 |
|
|
May 28 01:29:14 PM PDT 24 |
May 28 01:50:53 PM PDT 24 |
19824444702 ps |
| T282 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.1814630286 |
|
|
May 28 01:29:35 PM PDT 24 |
May 28 01:31:10 PM PDT 24 |
31980666307 ps |
| T283 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.3226032116 |
|
|
May 28 01:30:02 PM PDT 24 |
May 28 01:49:36 PM PDT 24 |
52934808922 ps |
| T284 |
/workspace/coverage/default/39.sram_ctrl_alert_test.3007227534 |
|
|
May 28 01:32:16 PM PDT 24 |
May 28 01:32:18 PM PDT 24 |
14199565 ps |
| T285 |
/workspace/coverage/default/6.sram_ctrl_bijection.1331433142 |
|
|
May 28 01:28:50 PM PDT 24 |
May 28 01:44:20 PM PDT 24 |
60261701759 ps |
| T286 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.106609231 |
|
|
May 28 01:30:55 PM PDT 24 |
May 28 01:44:02 PM PDT 24 |
15617099636 ps |
| T287 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.147844530 |
|
|
May 28 01:30:58 PM PDT 24 |
May 28 01:33:23 PM PDT 24 |
8722347618 ps |
| T288 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3147464889 |
|
|
May 28 01:31:59 PM PDT 24 |
May 28 01:34:00 PM PDT 24 |
984492295 ps |
| T289 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.3072559715 |
|
|
May 28 01:29:22 PM PDT 24 |
May 28 01:35:00 PM PDT 24 |
81403381071 ps |
| T290 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.850542129 |
|
|
May 28 01:30:55 PM PDT 24 |
May 28 01:31:00 PM PDT 24 |
1413108220 ps |
| T291 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2797167028 |
|
|
May 28 01:31:05 PM PDT 24 |
May 28 01:37:22 PM PDT 24 |
7275260368 ps |
| T292 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.1707864845 |
|
|
May 28 01:29:23 PM PDT 24 |
May 28 01:29:56 PM PDT 24 |
722231716 ps |
| T293 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.2028502460 |
|
|
May 28 01:30:41 PM PDT 24 |
May 28 01:31:44 PM PDT 24 |
1472026614 ps |
| T294 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.4065592760 |
|
|
May 28 01:28:31 PM PDT 24 |
May 28 01:30:56 PM PDT 24 |
2744269092 ps |
| T54 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2845855477 |
|
|
May 28 01:31:18 PM PDT 24 |
May 28 01:31:38 PM PDT 24 |
1022695723 ps |
| T295 |
/workspace/coverage/default/26.sram_ctrl_bijection.1243980624 |
|
|
May 28 01:30:42 PM PDT 24 |
May 28 01:56:14 PM PDT 24 |
922739288476 ps |
| T296 |
/workspace/coverage/default/14.sram_ctrl_partial_access.952406861 |
|
|
May 28 01:29:12 PM PDT 24 |
May 28 01:30:29 PM PDT 24 |
3940949766 ps |
| T297 |
/workspace/coverage/default/28.sram_ctrl_bijection.4257060906 |
|
|
May 28 01:31:00 PM PDT 24 |
May 28 02:00:18 PM PDT 24 |
26765530403 ps |
| T154 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3498378362 |
|
|
May 28 01:30:59 PM PDT 24 |
May 28 01:39:42 PM PDT 24 |
92625525433 ps |
| T298 |
/workspace/coverage/default/40.sram_ctrl_alert_test.3286453311 |
|
|
May 28 01:32:25 PM PDT 24 |
May 28 01:32:28 PM PDT 24 |
52721794 ps |
| T299 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2115910749 |
|
|
May 28 01:29:46 PM PDT 24 |
May 28 01:34:38 PM PDT 24 |
12380717781 ps |
| T300 |
/workspace/coverage/default/11.sram_ctrl_regwen.191509569 |
|
|
May 28 01:29:16 PM PDT 24 |
May 28 01:51:49 PM PDT 24 |
60055712746 ps |
| T301 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3552168083 |
|
|
May 28 01:33:57 PM PDT 24 |
May 28 01:34:06 PM PDT 24 |
829387603 ps |
| T302 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.4095086343 |
|
|
May 28 01:29:02 PM PDT 24 |
May 28 01:30:22 PM PDT 24 |
12178194469 ps |