| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.433356412 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1110889587 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3073891354 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1455243511 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.996396092 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1749420086 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.398695345 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.8665505 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1869383576 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2533820988 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.297950194 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4021601477 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1552946829 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3568857148 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2071210616 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2467311637 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1520435483 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3495407140 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1897453883 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.825604118 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3701575861 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2638550314 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3168577153 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1334149457 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.674376663 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.73266559 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2162009490 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1353266443 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.590217386 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2481238661 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2053152113 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1356839089 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3913098597 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2744548851 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.988044734 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3044362582 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.43484244 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2541111928 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1784248538 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2259782025 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.265979610 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3299747598 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1918613707 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1939185389 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1738297422 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.4039887126 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.112480768 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2150740246 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2560907831 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3758746660 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3134694755 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.465298729 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3953042871 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.636787504 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.336671949 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2566563406 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1255844080 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1469820934 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2755606781 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.927350822 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2754913712 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2287171720 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4115860017 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1135067784 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3964762432 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.394070632 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3248158454 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1034307799 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2302127828 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3107864230 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2155482930 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3242218051 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2877311731 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3642297692 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3445343192 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.914219453 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2600162000 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3346218576 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3807916849 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1659322072 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1585570341 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.952339674 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2892155400 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3169269055 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.644495429 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1672969854 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1756263705 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1945569291 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3577823358 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.516609759 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.109263727 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2595744096 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.755585843 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2594825874 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1574555708 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3879300611 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1120442963 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3319045943 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.668085348 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3201711432 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.975938845 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1230783080 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3686145280 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3838235089 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1937114610 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1784891661 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2130625188 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.4145152627 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3064692309 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1022618207 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1577301771 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3546802105 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3127638966 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2003620242 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3850291775 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.690425339 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2955152905 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3011784205 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3679900344 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4200971951 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.237107990 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2324942874 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.473357907 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1866933983 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.2211363608 |
| /workspace/coverage/default/0.sram_ctrl_bijection.1060129510 |
| /workspace/coverage/default/0.sram_ctrl_executable.434473032 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.766726349 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.828783197 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.858305047 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.3750575242 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.3944128580 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.1354713228 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2548723231 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.1989973162 |
| /workspace/coverage/default/0.sram_ctrl_regwen.425350681 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.257766854 |
| /workspace/coverage/default/0.sram_ctrl_smoke.3009552149 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3365835051 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3827650096 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.1187688691 |
| /workspace/coverage/default/1.sram_ctrl_bijection.585868341 |
| /workspace/coverage/default/1.sram_ctrl_executable.958776146 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.3314577338 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.3409035010 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2905605136 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.1878756156 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.2125925296 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.2893928308 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.287835401 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.2850431058 |
| /workspace/coverage/default/1.sram_ctrl_regwen.3757999632 |
| /workspace/coverage/default/1.sram_ctrl_smoke.930914557 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3379432609 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.849261887 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.925897449 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.2043130532 |
| /workspace/coverage/default/10.sram_ctrl_bijection.4142867150 |
| /workspace/coverage/default/10.sram_ctrl_executable.2968622579 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.2213208967 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.3497427522 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.1085332142 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.1620091888 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.2898812082 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.2777352701 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.690025028 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.751101735 |
| /workspace/coverage/default/10.sram_ctrl_regwen.57159193 |
| /workspace/coverage/default/10.sram_ctrl_smoke.2124691425 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3758585213 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.4171242793 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2737361458 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3718528370 |
| /workspace/coverage/default/11.sram_ctrl_bijection.4150537548 |
| /workspace/coverage/default/11.sram_ctrl_executable.3248124172 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.3667814251 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.3969972770 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1409558119 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.987824423 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.375829844 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.3475012502 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3214033910 |
| /workspace/coverage/default/11.sram_ctrl_regwen.338938203 |
| /workspace/coverage/default/11.sram_ctrl_smoke.4187431203 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.23722627 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.4069874448 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3207226553 |
| /workspace/coverage/default/12.sram_ctrl_bijection.111867246 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.1300851169 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.448662194 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2787672884 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.1062237631 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.1009259131 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.4043786709 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.468978369 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.3627560249 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3968438710 |
| /workspace/coverage/default/12.sram_ctrl_smoke.3915991519 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1216148691 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.570130358 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.540026100 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.3096845485 |
| /workspace/coverage/default/13.sram_ctrl_bijection.810256131 |
| /workspace/coverage/default/13.sram_ctrl_executable.1291030539 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.1245001718 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.41076744 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.2421391717 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.1479886324 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.4127303222 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3163345063 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.1397570050 |
| /workspace/coverage/default/13.sram_ctrl_regwen.4290446647 |
| /workspace/coverage/default/13.sram_ctrl_smoke.1512445636 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.786860825 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1124810432 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1716520246 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.2538208578 |
| /workspace/coverage/default/14.sram_ctrl_bijection.166697523 |
| /workspace/coverage/default/14.sram_ctrl_executable.437994293 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.2969034959 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.2403564285 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.3109630324 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.3735535776 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.1046636792 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.143454338 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3030880995 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.561116831 |
| /workspace/coverage/default/14.sram_ctrl_regwen.21820330 |
| /workspace/coverage/default/14.sram_ctrl_smoke.3129520516 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1025440731 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.3334148449 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.773102033 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.2575016502 |
| /workspace/coverage/default/15.sram_ctrl_bijection.3513442265 |
| /workspace/coverage/default/15.sram_ctrl_executable.3248384907 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.3361445417 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.3171196843 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.1691010317 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.4244085249 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1424584564 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.2009741066 |
| /workspace/coverage/default/15.sram_ctrl_regwen.541853092 |
| /workspace/coverage/default/15.sram_ctrl_smoke.1106776493 |
| /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3442716104 |
| /workspace/coverage/default/15.sram_ctrl_stress_pipeline.4212724756 |
| /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.2596666977 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.2371648664 |
| /workspace/coverage/default/16.sram_ctrl_bijection.1185984815 |
| /workspace/coverage/default/16.sram_ctrl_executable.3694781487 |
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| /workspace/coverage/default/49.sram_ctrl_executable.1286359614 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.1376618448 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.504148337 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.2330791875 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.924197819 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.3170772771 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.4259985084 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3473513242 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.2985407053 |
| /workspace/coverage/default/49.sram_ctrl_regwen.1073982320 |
| /workspace/coverage/default/49.sram_ctrl_smoke.512025199 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.159665469 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.575338205 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1269506411 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.435277633 |
| /workspace/coverage/default/5.sram_ctrl_bijection.2756621832 |
| /workspace/coverage/default/5.sram_ctrl_executable.2791014348 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.767956822 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.3854819347 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3812868472 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.1588715308 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.1904198400 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.485892909 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.981624353 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.3458061616 |
| /workspace/coverage/default/5.sram_ctrl_regwen.2254603867 |
| /workspace/coverage/default/5.sram_ctrl_smoke.2518330670 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.970060383 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3004743179 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1950057708 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.4207385908 |
| /workspace/coverage/default/6.sram_ctrl_bijection.2360789488 |
| /workspace/coverage/default/6.sram_ctrl_executable.3763423351 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.3373242486 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.3262321201 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2277950769 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.3204243019 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1229184097 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.4273918413 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2315862612 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3753906402 |
| /workspace/coverage/default/6.sram_ctrl_regwen.1522470601 |
| /workspace/coverage/default/6.sram_ctrl_smoke.3406518651 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1156514800 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.650176069 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.1391167614 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1642292917 |
| /workspace/coverage/default/7.sram_ctrl_executable.646575455 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.1385103468 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.2776262284 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3976708454 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.2164070597 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.1978580008 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.2354417438 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.60768094 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.1017091001 |
| /workspace/coverage/default/7.sram_ctrl_regwen.2405318618 |
| /workspace/coverage/default/7.sram_ctrl_smoke.2029732566 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.765980927 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3581554049 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3520134709 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.1166757605 |
| /workspace/coverage/default/8.sram_ctrl_bijection.1741396458 |
| /workspace/coverage/default/8.sram_ctrl_executable.3246798468 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.232254629 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.464592140 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1350365901 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.699989665 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.2870260614 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.2334307275 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.639179018 |
| /workspace/coverage/default/8.sram_ctrl_regwen.616248380 |
| /workspace/coverage/default/8.sram_ctrl_smoke.2962290400 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.379585758 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3533817368 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.2364340479 |
| /workspace/coverage/default/9.sram_ctrl_bijection.1985141411 |
| /workspace/coverage/default/9.sram_ctrl_executable.1306772652 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.869251241 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2566246280 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1130925690 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.1612550342 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.3801457714 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.2571085308 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1379682224 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.353092471 |
| /workspace/coverage/default/9.sram_ctrl_regwen.3879063627 |
| /workspace/coverage/default/9.sram_ctrl_smoke.273747334 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3956725492 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.994901691 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2069941222 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.987824423 |
|
|
Jun 02 12:45:31 PM PDT 24 |
Jun 02 12:50:40 PM PDT 24 |
14275583312 ps |
| T2 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1657286764 |
|
|
Jun 02 12:45:42 PM PDT 24 |
Jun 02 12:46:09 PM PDT 24 |
18238381691 ps |
| T3 |
/workspace/coverage/default/48.sram_ctrl_alert_test.3367166769 |
|
|
Jun 02 12:48:56 PM PDT 24 |
Jun 02 12:48:58 PM PDT 24 |
43680965 ps |
| T10 |
/workspace/coverage/default/2.sram_ctrl_alert_test.2029014754 |
|
|
Jun 02 12:45:12 PM PDT 24 |
Jun 02 12:45:13 PM PDT 24 |
36090524 ps |
| T4 |
/workspace/coverage/default/16.sram_ctrl_regwen.2809403603 |
|
|
Jun 02 12:45:43 PM PDT 24 |
Jun 02 12:56:20 PM PDT 24 |
25077955467 ps |
| T5 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.1192832547 |
|
|
Jun 02 12:46:41 PM PDT 24 |
Jun 02 12:49:32 PM PDT 24 |
13346720398 ps |
| T6 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.4142612728 |
|
|
Jun 02 12:45:47 PM PDT 24 |
Jun 02 12:52:48 PM PDT 24 |
9329874113 ps |
| T11 |
/workspace/coverage/default/39.sram_ctrl_max_throughput.995035030 |
|
|
Jun 02 12:47:34 PM PDT 24 |
Jun 02 12:48:20 PM PDT 24 |
2879255205 ps |
| T12 |
/workspace/coverage/default/13.sram_ctrl_partial_access.4127303222 |
|
|
Jun 02 12:45:37 PM PDT 24 |
Jun 02 12:45:48 PM PDT 24 |
1444470727 ps |
| T13 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.4028044010 |
|
|
Jun 02 12:46:14 PM PDT 24 |
Jun 02 12:50:26 PM PDT 24 |
5260687475 ps |
| T14 |
/workspace/coverage/default/25.sram_ctrl_partial_access.3911678381 |
|
|
Jun 02 12:46:06 PM PDT 24 |
Jun 02 12:46:32 PM PDT 24 |
1900605833 ps |
| T17 |
/workspace/coverage/default/30.sram_ctrl_bijection.2015186487 |
|
|
Jun 02 12:46:34 PM PDT 24 |
Jun 02 01:11:35 PM PDT 24 |
22092992580 ps |
| T18 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.2252875394 |
|
|
Jun 02 12:46:48 PM PDT 24 |
Jun 02 12:50:34 PM PDT 24 |
20588336306 ps |
| T15 |
/workspace/coverage/default/43.sram_ctrl_smoke.1113400096 |
|
|
Jun 02 12:48:08 PM PDT 24 |
Jun 02 12:48:21 PM PDT 24 |
817219020 ps |
| T30 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.659689594 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:46:06 PM PDT 24 |
1605282474 ps |
| T43 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1546301832 |
|
|
Jun 02 12:47:55 PM PDT 24 |
Jun 02 12:48:38 PM PDT 24 |
4324245603 ps |
| T44 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1978580008 |
|
|
Jun 02 12:45:22 PM PDT 24 |
Jun 02 01:19:12 PM PDT 24 |
68441508390 ps |
| T22 |
/workspace/coverage/default/33.sram_ctrl_regwen.969622778 |
|
|
Jun 02 12:47:03 PM PDT 24 |
Jun 02 01:01:56 PM PDT 24 |
3278583756 ps |
| T27 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.2718047634 |
|
|
Jun 02 12:46:41 PM PDT 24 |
Jun 02 12:47:09 PM PDT 24 |
708350167 ps |
| T113 |
/workspace/coverage/default/7.sram_ctrl_bijection.1642292917 |
|
|
Jun 02 12:45:38 PM PDT 24 |
Jun 02 01:06:39 PM PDT 24 |
41954550235 ps |
| T45 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3533817368 |
|
|
Jun 02 12:45:30 PM PDT 24 |
Jun 02 12:45:52 PM PDT 24 |
6451508238 ps |
| T16 |
/workspace/coverage/default/22.sram_ctrl_regwen.2851869106 |
|
|
Jun 02 12:45:58 PM PDT 24 |
Jun 02 01:00:53 PM PDT 24 |
10408589437 ps |
| T26 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.911313996 |
|
|
Jun 02 12:45:55 PM PDT 24 |
Jun 02 12:46:25 PM PDT 24 |
4989865066 ps |
| T63 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1298489693 |
|
|
Jun 02 12:48:16 PM PDT 24 |
Jun 02 12:48:58 PM PDT 24 |
464429157 ps |
| T64 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.440320955 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:49:05 PM PDT 24 |
4138533364 ps |
| T65 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.3067777975 |
|
|
Jun 02 12:46:18 PM PDT 24 |
Jun 02 12:49:10 PM PDT 24 |
11054083034 ps |
| T51 |
/workspace/coverage/default/45.sram_ctrl_smoke.3179547500 |
|
|
Jun 02 12:48:13 PM PDT 24 |
Jun 02 12:48:33 PM PDT 24 |
1752349480 ps |
| T7 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.4199307886 |
|
|
Jun 02 12:47:55 PM PDT 24 |
Jun 02 12:49:41 PM PDT 24 |
169592018910 ps |
| T66 |
/workspace/coverage/default/38.sram_ctrl_executable.1547766144 |
|
|
Jun 02 12:47:29 PM PDT 24 |
Jun 02 01:00:21 PM PDT 24 |
71947061056 ps |
| T67 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.1106515283 |
|
|
Jun 02 12:46:30 PM PDT 24 |
Jun 02 12:48:52 PM PDT 24 |
772887843 ps |
| T49 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.4284079622 |
|
|
Jun 02 12:45:43 PM PDT 24 |
Jun 02 12:47:09 PM PDT 24 |
10178835733 ps |
| T68 |
/workspace/coverage/default/17.sram_ctrl_smoke.4017136470 |
|
|
Jun 02 12:45:44 PM PDT 24 |
Jun 02 12:46:55 PM PDT 24 |
3015060541 ps |
| T78 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.333407552 |
|
|
Jun 02 12:46:08 PM PDT 24 |
Jun 02 12:46:24 PM PDT 24 |
2877121937 ps |
| T50 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.379585758 |
|
|
Jun 02 12:45:30 PM PDT 24 |
Jun 02 12:50:51 PM PDT 24 |
6151843449 ps |
| T79 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.757604277 |
|
|
Jun 02 12:45:59 PM PDT 24 |
Jun 02 12:46:12 PM PDT 24 |
2861079131 ps |
| T114 |
/workspace/coverage/default/20.sram_ctrl_executable.383247715 |
|
|
Jun 02 12:45:57 PM PDT 24 |
Jun 02 01:07:06 PM PDT 24 |
39624254036 ps |
| T148 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.2957226456 |
|
|
Jun 02 12:45:53 PM PDT 24 |
Jun 02 12:46:44 PM PDT 24 |
1499918287 ps |
| T9 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.1845158590 |
|
|
Jun 02 12:45:16 PM PDT 24 |
Jun 02 12:45:21 PM PDT 24 |
871627103 ps |
| T35 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3296619773 |
|
|
Jun 02 12:47:08 PM PDT 24 |
Jun 02 12:53:17 PM PDT 24 |
14961308212 ps |
| T19 |
/workspace/coverage/default/13.sram_ctrl_alert_test.3096845485 |
|
|
Jun 02 12:45:31 PM PDT 24 |
Jun 02 12:45:32 PM PDT 24 |
16524274 ps |
| T36 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.448662194 |
|
|
Jun 02 12:45:45 PM PDT 24 |
Jun 02 12:47:33 PM PDT 24 |
780782581 ps |
| T37 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2109047702 |
|
|
Jun 02 12:45:55 PM PDT 24 |
Jun 02 12:48:07 PM PDT 24 |
2317250988 ps |
| T38 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.855457489 |
|
|
Jun 02 12:46:31 PM PDT 24 |
Jun 02 12:48:25 PM PDT 24 |
761727119 ps |
| T31 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.2735948852 |
|
|
Jun 02 12:46:17 PM PDT 24 |
Jun 02 12:46:21 PM PDT 24 |
4215467817 ps |
| T39 |
/workspace/coverage/default/36.sram_ctrl_bijection.1466636055 |
|
|
Jun 02 12:47:20 PM PDT 24 |
Jun 02 01:21:31 PM PDT 24 |
367168624522 ps |
| T40 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3764881539 |
|
|
Jun 02 12:48:27 PM PDT 24 |
Jun 02 12:54:13 PM PDT 24 |
5035756064 ps |
| T8 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.2361767649 |
|
|
Jun 02 12:47:24 PM PDT 24 |
Jun 02 12:48:14 PM PDT 24 |
85580696496 ps |
| T149 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3739638379 |
|
|
Jun 02 12:48:11 PM PDT 24 |
Jun 02 12:48:36 PM PDT 24 |
5038909255 ps |
| T25 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.470120897 |
|
|
Jun 02 12:45:53 PM PDT 24 |
Jun 02 12:46:10 PM PDT 24 |
4546128165 ps |
| T89 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.103001282 |
|
|
Jun 02 12:46:19 PM PDT 24 |
Jun 02 12:48:52 PM PDT 24 |
5286341700 ps |
| T69 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1009259131 |
|
|
Jun 02 12:45:27 PM PDT 24 |
Jun 02 01:00:43 PM PDT 24 |
36764117165 ps |
| T150 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.1631740766 |
|
|
Jun 02 12:45:24 PM PDT 24 |
Jun 02 01:13:13 PM PDT 24 |
22457153791 ps |
| T151 |
/workspace/coverage/default/2.sram_ctrl_bijection.3836019395 |
|
|
Jun 02 12:45:05 PM PDT 24 |
Jun 02 01:13:41 PM PDT 24 |
101186856761 ps |
| T152 |
/workspace/coverage/default/37.sram_ctrl_alert_test.4091162756 |
|
|
Jun 02 12:47:29 PM PDT 24 |
Jun 02 12:47:30 PM PDT 24 |
12426228 ps |
| T70 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2051831776 |
|
|
Jun 02 12:48:08 PM PDT 24 |
Jun 02 01:10:07 PM PDT 24 |
5613071154 ps |
| T153 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.851684010 |
|
|
Jun 02 12:45:44 PM PDT 24 |
Jun 02 12:46:35 PM PDT 24 |
770957244 ps |
| T154 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1950057708 |
|
|
Jun 02 12:45:36 PM PDT 24 |
Jun 02 12:48:06 PM PDT 24 |
3216446371 ps |
| T144 |
/workspace/coverage/default/41.sram_ctrl_partial_access.379185844 |
|
|
Jun 02 12:47:55 PM PDT 24 |
Jun 02 12:48:53 PM PDT 24 |
1230220403 ps |
| T32 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1017091001 |
|
|
Jun 02 12:45:18 PM PDT 24 |
Jun 02 12:45:22 PM PDT 24 |
1542167932 ps |
| T112 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.447794919 |
|
|
Jun 02 12:45:23 PM PDT 24 |
Jun 02 12:56:29 PM PDT 24 |
126414954466 ps |
| T55 |
/workspace/coverage/default/25.sram_ctrl_regwen.1842197136 |
|
|
Jun 02 12:46:11 PM PDT 24 |
Jun 02 12:52:38 PM PDT 24 |
3766336969 ps |
| T24 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3944046606 |
|
|
Jun 02 12:48:45 PM PDT 24 |
Jun 02 12:49:37 PM PDT 24 |
28465248185 ps |
| T115 |
/workspace/coverage/default/48.sram_ctrl_executable.1767479147 |
|
|
Jun 02 12:48:49 PM PDT 24 |
Jun 02 12:56:34 PM PDT 24 |
19714121641 ps |
| T155 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.849261887 |
|
|
Jun 02 12:45:00 PM PDT 24 |
Jun 02 12:48:59 PM PDT 24 |
8110051010 ps |
| T156 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1446230342 |
|
|
Jun 02 12:48:49 PM PDT 24 |
Jun 02 12:48:57 PM PDT 24 |
705856021 ps |
| T157 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.2044970522 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:48:35 PM PDT 24 |
10517101196 ps |
| T158 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1160864746 |
|
|
Jun 02 12:46:48 PM PDT 24 |
Jun 02 12:46:57 PM PDT 24 |
759103488 ps |
| T20 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.3667230849 |
|
|
Jun 02 12:45:29 PM PDT 24 |
Jun 02 12:45:34 PM PDT 24 |
943243571 ps |
| T159 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3854147209 |
|
|
Jun 02 12:45:43 PM PDT 24 |
Jun 02 12:51:35 PM PDT 24 |
98673964330 ps |
| T160 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.2895991439 |
|
|
Jun 02 12:46:49 PM PDT 24 |
Jun 02 12:49:38 PM PDT 24 |
27722557348 ps |
| T116 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.3839580666 |
|
|
Jun 02 12:45:42 PM PDT 24 |
Jun 02 01:04:41 PM PDT 24 |
22135747513 ps |
| T161 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.2403564285 |
|
|
Jun 02 12:45:30 PM PDT 24 |
Jun 02 12:47:00 PM PDT 24 |
1531450596 ps |
| T162 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.499558794 |
|
|
Jun 02 12:46:10 PM PDT 24 |
Jun 02 12:46:14 PM PDT 24 |
1351715362 ps |
| T163 |
/workspace/coverage/default/11.sram_ctrl_partial_access.3475012502 |
|
|
Jun 02 12:45:34 PM PDT 24 |
Jun 02 12:46:10 PM PDT 24 |
1349667992 ps |
| T164 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1255452290 |
|
|
Jun 02 12:48:22 PM PDT 24 |
Jun 02 12:52:54 PM PDT 24 |
41346202090 ps |
| T165 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3497427522 |
|
|
Jun 02 12:45:31 PM PDT 24 |
Jun 02 12:45:42 PM PDT 24 |
1364148654 ps |
| T166 |
/workspace/coverage/default/28.sram_ctrl_partial_access.2829942359 |
|
|
Jun 02 12:46:27 PM PDT 24 |
Jun 02 12:47:32 PM PDT 24 |
2860804456 ps |
| T167 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.1062237631 |
|
|
Jun 02 12:45:43 PM PDT 24 |
Jun 02 12:51:22 PM PDT 24 |
55331007438 ps |
| T28 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3350461400 |
|
|
Jun 02 12:46:15 PM PDT 24 |
Jun 02 12:46:38 PM PDT 24 |
622945990 ps |
| T41 |
/workspace/coverage/default/43.sram_ctrl_executable.3611485368 |
|
|
Jun 02 12:48:10 PM PDT 24 |
Jun 02 01:00:38 PM PDT 24 |
11833336985 ps |
| T168 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2559594576 |
|
|
Jun 02 12:47:23 PM PDT 24 |
Jun 02 12:47:30 PM PDT 24 |
3037294625 ps |
| T169 |
/workspace/coverage/default/28.sram_ctrl_bijection.4228861686 |
|
|
Jun 02 12:46:26 PM PDT 24 |
Jun 02 01:01:44 PM PDT 24 |
220557860634 ps |
| T170 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2575016502 |
|
|
Jun 02 12:45:54 PM PDT 24 |
Jun 02 12:45:56 PM PDT 24 |
12244773 ps |
| T171 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.1605246829 |
|
|
Jun 02 12:47:49 PM PDT 24 |
Jun 02 12:47:53 PM PDT 24 |
362290281 ps |
| T172 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2421391717 |
|
|
Jun 02 12:45:37 PM PDT 24 |
Jun 02 12:48:05 PM PDT 24 |
2688667662 ps |
| T29 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.682859447 |
|
|
Jun 02 12:47:03 PM PDT 24 |
Jun 02 12:47:33 PM PDT 24 |
1007534277 ps |
| T71 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.3998966594 |
|
|
Jun 02 12:45:44 PM PDT 24 |
Jun 02 12:47:48 PM PDT 24 |
19453024834 ps |
| T173 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.344247970 |
|
|
Jun 02 12:46:32 PM PDT 24 |
Jun 02 12:50:42 PM PDT 24 |
4067395184 ps |
| T90 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.3751787197 |
|
|
Jun 02 12:46:58 PM PDT 24 |
Jun 02 12:47:44 PM PDT 24 |
1930231684 ps |
| T141 |
/workspace/coverage/default/37.sram_ctrl_executable.3824549996 |
|
|
Jun 02 12:47:24 PM PDT 24 |
Jun 02 12:58:08 PM PDT 24 |
27614368985 ps |
| T56 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.1653349391 |
|
|
Jun 02 12:47:27 PM PDT 24 |
Jun 02 12:47:36 PM PDT 24 |
253738454 ps |
| T174 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.1387442661 |
|
|
Jun 02 12:46:01 PM PDT 24 |
Jun 02 12:47:40 PM PDT 24 |
2980618935 ps |
| T175 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3970821763 |
|
|
Jun 02 12:46:59 PM PDT 24 |
Jun 02 12:48:53 PM PDT 24 |
820566839 ps |
| T176 |
/workspace/coverage/default/35.sram_ctrl_bijection.438318233 |
|
|
Jun 02 12:47:10 PM PDT 24 |
Jun 02 01:20:21 PM PDT 24 |
360143907851 ps |
| T91 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.746097521 |
|
|
Jun 02 12:47:28 PM PDT 24 |
Jun 02 12:49:02 PM PDT 24 |
5226958467 ps |
| T177 |
/workspace/coverage/default/21.sram_ctrl_smoke.3679279000 |
|
|
Jun 02 12:45:57 PM PDT 24 |
Jun 02 12:46:41 PM PDT 24 |
872013383 ps |
| T178 |
/workspace/coverage/default/38.sram_ctrl_alert_test.3318996658 |
|
|
Jun 02 12:47:34 PM PDT 24 |
Jun 02 12:47:35 PM PDT 24 |
16887217 ps |
| T179 |
/workspace/coverage/default/35.sram_ctrl_smoke.3241354494 |
|
|
Jun 02 12:47:09 PM PDT 24 |
Jun 02 12:47:25 PM PDT 24 |
536553700 ps |
| T180 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.3237002547 |
|
|
Jun 02 12:48:21 PM PDT 24 |
Jun 02 12:52:27 PM PDT 24 |
16426221773 ps |
| T57 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1098684550 |
|
|
Jun 02 12:48:09 PM PDT 24 |
Jun 02 12:48:26 PM PDT 24 |
1042123970 ps |
| T181 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.963650716 |
|
|
Jun 02 12:45:55 PM PDT 24 |
Jun 02 12:45:59 PM PDT 24 |
498891231 ps |
| T182 |
/workspace/coverage/default/19.sram_ctrl_alert_test.2768403965 |
|
|
Jun 02 12:45:53 PM PDT 24 |
Jun 02 12:45:54 PM PDT 24 |
127247156 ps |
| T42 |
/workspace/coverage/default/15.sram_ctrl_executable.3248384907 |
|
|
Jun 02 12:45:44 PM PDT 24 |
Jun 02 01:10:53 PM PDT 24 |
72800512491 ps |
| T183 |
/workspace/coverage/default/18.sram_ctrl_smoke.2651977893 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:46:22 PM PDT 24 |
891992583 ps |
| T184 |
/workspace/coverage/default/12.sram_ctrl_alert_test.4164177036 |
|
|
Jun 02 12:45:39 PM PDT 24 |
Jun 02 12:45:41 PM PDT 24 |
15068794 ps |
| T185 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2737361458 |
|
|
Jun 02 12:45:28 PM PDT 24 |
Jun 02 12:45:55 PM PDT 24 |
2854177933 ps |
| T23 |
/workspace/coverage/default/0.sram_ctrl_regwen.425350681 |
|
|
Jun 02 12:45:12 PM PDT 24 |
Jun 02 01:08:12 PM PDT 24 |
114722736488 ps |
| T186 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1608686064 |
|
|
Jun 02 12:46:50 PM PDT 24 |
Jun 02 12:47:09 PM PDT 24 |
1436745129 ps |
| T187 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2125925296 |
|
|
Jun 02 12:45:08 PM PDT 24 |
Jun 02 01:22:27 PM PDT 24 |
36052363943 ps |
| T188 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.1612550342 |
|
|
Jun 02 12:45:37 PM PDT 24 |
Jun 02 12:51:13 PM PDT 24 |
21598730281 ps |
| T189 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.2262168300 |
|
|
Jun 02 12:46:20 PM PDT 24 |
Jun 02 12:51:58 PM PDT 24 |
20697885666 ps |
| T190 |
/workspace/coverage/default/33.sram_ctrl_alert_test.3771862764 |
|
|
Jun 02 12:47:07 PM PDT 24 |
Jun 02 12:47:08 PM PDT 24 |
29241296 ps |
| T191 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1011898043 |
|
|
Jun 02 12:46:09 PM PDT 24 |
Jun 02 12:51:49 PM PDT 24 |
26693310277 ps |
| T192 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.3964570823 |
|
|
Jun 02 12:45:17 PM PDT 24 |
Jun 02 12:45:36 PM PDT 24 |
2911296119 ps |
| T139 |
/workspace/coverage/default/40.sram_ctrl_regwen.2753084539 |
|
|
Jun 02 12:47:48 PM PDT 24 |
Jun 02 01:08:47 PM PDT 24 |
85111841974 ps |
| T193 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3440569666 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:46:06 PM PDT 24 |
353652492 ps |
| T194 |
/workspace/coverage/default/1.sram_ctrl_smoke.930914557 |
|
|
Jun 02 12:45:05 PM PDT 24 |
Jun 02 12:45:21 PM PDT 24 |
1072131625 ps |
| T195 |
/workspace/coverage/default/31.sram_ctrl_smoke.2237738448 |
|
|
Jun 02 12:46:40 PM PDT 24 |
Jun 02 12:46:57 PM PDT 24 |
874564387 ps |
| T196 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1655944829 |
|
|
Jun 02 12:45:54 PM PDT 24 |
Jun 02 12:47:33 PM PDT 24 |
33675471949 ps |
| T197 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.574736090 |
|
|
Jun 02 12:45:49 PM PDT 24 |
Jun 02 12:50:47 PM PDT 24 |
20195840293 ps |
| T142 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.468978369 |
|
|
Jun 02 12:45:36 PM PDT 24 |
Jun 02 12:51:01 PM PDT 24 |
274753545467 ps |
| T92 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.2054344944 |
|
|
Jun 02 12:46:49 PM PDT 24 |
Jun 02 12:48:07 PM PDT 24 |
9754547929 ps |
| T198 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.3889741362 |
|
|
Jun 02 12:46:08 PM PDT 24 |
Jun 02 12:50:20 PM PDT 24 |
4109177064 ps |
| T93 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3094798189 |
|
|
Jun 02 12:46:06 PM PDT 24 |
Jun 02 12:47:34 PM PDT 24 |
2613622108 ps |
| T199 |
/workspace/coverage/default/14.sram_ctrl_bijection.166697523 |
|
|
Jun 02 12:45:40 PM PDT 24 |
Jun 02 01:04:33 PM PDT 24 |
283372868059 ps |
| T200 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.2924588611 |
|
|
Jun 02 12:45:42 PM PDT 24 |
Jun 02 12:45:47 PM PDT 24 |
5581428145 ps |
| T201 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1146801650 |
|
|
Jun 02 12:45:32 PM PDT 24 |
Jun 02 12:45:37 PM PDT 24 |
1974773176 ps |
| T202 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2983854443 |
|
|
Jun 02 12:46:41 PM PDT 24 |
Jun 02 12:46:44 PM PDT 24 |
350320757 ps |
| T203 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.1917347636 |
|
|
Jun 02 12:46:36 PM PDT 24 |
Jun 02 12:49:15 PM PDT 24 |
834519574 ps |
| T204 |
/workspace/coverage/default/3.sram_ctrl_alert_test.4127602559 |
|
|
Jun 02 12:45:22 PM PDT 24 |
Jun 02 12:45:23 PM PDT 24 |
17954940 ps |
| T205 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2367206495 |
|
|
Jun 02 12:46:50 PM PDT 24 |
Jun 02 12:46:51 PM PDT 24 |
12094050 ps |
| T206 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.459988970 |
|
|
Jun 02 12:45:52 PM PDT 24 |
Jun 02 12:47:01 PM PDT 24 |
10705782237 ps |
| T207 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.329515985 |
|
|
Jun 02 12:47:02 PM PDT 24 |
Jun 02 01:00:06 PM PDT 24 |
16208428704 ps |
| T208 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1490177043 |
|
|
Jun 02 12:48:15 PM PDT 24 |
Jun 02 12:49:20 PM PDT 24 |
4383533730 ps |
| T209 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3708358311 |
|
|
Jun 02 12:46:13 PM PDT 24 |
Jun 02 12:50:26 PM PDT 24 |
4828650823 ps |
| T94 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.3010943846 |
|
|
Jun 02 12:45:54 PM PDT 24 |
Jun 02 12:46:59 PM PDT 24 |
3564281986 ps |
| T210 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1640854473 |
|
|
Jun 02 12:48:14 PM PDT 24 |
Jun 02 12:48:54 PM PDT 24 |
1483214021 ps |
| T211 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2213149603 |
|
|
Jun 02 12:46:04 PM PDT 24 |
Jun 02 12:51:26 PM PDT 24 |
5495242394 ps |
| T212 |
/workspace/coverage/default/47.sram_ctrl_alert_test.1631466476 |
|
|
Jun 02 12:48:45 PM PDT 24 |
Jun 02 12:48:46 PM PDT 24 |
33887388 ps |
| T137 |
/workspace/coverage/default/12.sram_ctrl_executable.2442680955 |
|
|
Jun 02 12:45:43 PM PDT 24 |
Jun 02 01:06:57 PM PDT 24 |
307369893099 ps |
| T213 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2988941386 |
|
|
Jun 02 12:48:29 PM PDT 24 |
Jun 02 12:48:46 PM PDT 24 |
973115497 ps |
| T95 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.2359599938 |
|
|
Jun 02 12:45:16 PM PDT 24 |
Jun 02 12:46:33 PM PDT 24 |
1387057636 ps |
| T214 |
/workspace/coverage/default/11.sram_ctrl_smoke.4187431203 |
|
|
Jun 02 12:45:23 PM PDT 24 |
Jun 02 12:45:28 PM PDT 24 |
1437050070 ps |
| T215 |
/workspace/coverage/default/24.sram_ctrl_alert_test.1085767622 |
|
|
Jun 02 12:46:05 PM PDT 24 |
Jun 02 12:46:06 PM PDT 24 |
56595177 ps |
| T216 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2719111882 |
|
|
Jun 02 12:46:41 PM PDT 24 |
Jun 02 12:51:47 PM PDT 24 |
8268561060 ps |
| T58 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1216148691 |
|
|
Jun 02 12:45:36 PM PDT 24 |
Jun 02 12:45:53 PM PDT 24 |
1746443917 ps |
| T217 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1011865609 |
|
|
Jun 02 12:46:17 PM PDT 24 |
Jun 02 12:46:59 PM PDT 24 |
8708251147 ps |
| T218 |
/workspace/coverage/default/38.sram_ctrl_smoke.2377256679 |
|
|
Jun 02 12:47:30 PM PDT 24 |
Jun 02 12:47:36 PM PDT 24 |
701224050 ps |
| T96 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1462115332 |
|
|
Jun 02 12:46:09 PM PDT 24 |
Jun 02 12:47:22 PM PDT 24 |
2786393924 ps |
| T219 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2566246280 |
|
|
Jun 02 12:45:25 PM PDT 24 |
Jun 02 12:46:26 PM PDT 24 |
3331007174 ps |
| T220 |
/workspace/coverage/default/44.sram_ctrl_bijection.422541498 |
|
|
Jun 02 12:48:10 PM PDT 24 |
Jun 02 01:19:26 PM PDT 24 |
72349502032 ps |
| T221 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1989973162 |
|
|
Jun 02 12:45:06 PM PDT 24 |
Jun 02 12:45:11 PM PDT 24 |
713969760 ps |
| T222 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.773102033 |
|
|
Jun 02 12:45:46 PM PDT 24 |
Jun 02 12:45:54 PM PDT 24 |
807494663 ps |
| T223 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.60768094 |
|
|
Jun 02 12:45:22 PM PDT 24 |
Jun 02 12:50:51 PM PDT 24 |
35075501780 ps |
| T224 |
/workspace/coverage/default/18.sram_ctrl_partial_access.3875717944 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:46:53 PM PDT 24 |
810093936 ps |
| T225 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1409558119 |
|
|
Jun 02 12:45:25 PM PDT 24 |
Jun 02 12:46:52 PM PDT 24 |
3218663260 ps |
| T226 |
/workspace/coverage/default/33.sram_ctrl_partial_access.2427833573 |
|
|
Jun 02 12:46:56 PM PDT 24 |
Jun 02 12:47:15 PM PDT 24 |
914992374 ps |
| T227 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3589343228 |
|
|
Jun 02 12:46:10 PM PDT 24 |
Jun 02 12:54:41 PM PDT 24 |
85374296137 ps |
| T140 |
/workspace/coverage/default/40.sram_ctrl_executable.269301580 |
|
|
Jun 02 12:47:49 PM PDT 24 |
Jun 02 12:50:12 PM PDT 24 |
19911716219 ps |
| T228 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.1335623367 |
|
|
Jun 02 12:46:05 PM PDT 24 |
Jun 02 12:47:44 PM PDT 24 |
16997492441 ps |
| T72 |
/workspace/coverage/default/33.sram_ctrl_executable.2477025187 |
|
|
Jun 02 12:46:58 PM PDT 24 |
Jun 02 01:01:32 PM PDT 24 |
30009412146 ps |
| T229 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.695654787 |
|
|
Jun 02 12:45:59 PM PDT 24 |
Jun 02 12:47:17 PM PDT 24 |
1390028069 ps |
| T73 |
/workspace/coverage/default/49.sram_ctrl_stress_all.159665469 |
|
|
Jun 02 12:49:00 PM PDT 24 |
Jun 02 02:52:12 PM PDT 24 |
386409396080 ps |
| T138 |
/workspace/coverage/default/41.sram_ctrl_regwen.150212860 |
|
|
Jun 02 12:47:58 PM PDT 24 |
Jun 02 12:49:14 PM PDT 24 |
1672384640 ps |
| T230 |
/workspace/coverage/default/34.sram_ctrl_smoke.16278913 |
|
|
Jun 02 12:47:01 PM PDT 24 |
Jun 02 12:47:33 PM PDT 24 |
1337536934 ps |
| T231 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3806207331 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:48:48 PM PDT 24 |
18627811228 ps |
| T232 |
/workspace/coverage/default/41.sram_ctrl_alert_test.4024942853 |
|
|
Jun 02 12:47:55 PM PDT 24 |
Jun 02 12:47:56 PM PDT 24 |
13231437 ps |
| T233 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.743180545 |
|
|
Jun 02 12:48:27 PM PDT 24 |
Jun 02 12:53:42 PM PDT 24 |
24021749101 ps |
| T234 |
/workspace/coverage/default/24.sram_ctrl_partial_access.3595688930 |
|
|
Jun 02 12:46:15 PM PDT 24 |
Jun 02 12:46:27 PM PDT 24 |
519919141 ps |
| T235 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1529887022 |
|
|
Jun 02 12:48:23 PM PDT 24 |
Jun 02 12:50:48 PM PDT 24 |
2464050888 ps |
| T236 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2725717737 |
|
|
Jun 02 12:46:16 PM PDT 24 |
Jun 02 12:46:23 PM PDT 24 |
703462205 ps |
| T237 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.3638420304 |
|
|
Jun 02 12:47:30 PM PDT 24 |
Jun 02 12:50:04 PM PDT 24 |
10952698313 ps |
| T238 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1716520246 |
|
|
Jun 02 12:45:42 PM PDT 24 |
Jun 02 12:46:04 PM PDT 24 |
1420599727 ps |
| T239 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2334307275 |
|
|
Jun 02 12:45:44 PM PDT 24 |
Jun 02 12:46:10 PM PDT 24 |
6612217159 ps |
| T240 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2969034959 |
|
|
Jun 02 12:45:47 PM PDT 24 |
Jun 02 12:47:07 PM PDT 24 |
45150204124 ps |
| T241 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.811801111 |
|
|
Jun 02 12:45:11 PM PDT 24 |
Jun 02 12:47:51 PM PDT 24 |
6039290811 ps |
| T145 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.424946173 |
|
|
Jun 02 12:47:01 PM PDT 24 |
Jun 02 12:48:20 PM PDT 24 |
2668278368 ps |
| T242 |
/workspace/coverage/default/41.sram_ctrl_executable.3090263664 |
|
|
Jun 02 12:47:55 PM PDT 24 |
Jun 02 12:53:31 PM PDT 24 |
25235116442 ps |
| T243 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.2057761300 |
|
|
Jun 02 12:48:49 PM PDT 24 |
Jun 02 12:54:35 PM PDT 24 |
42143745059 ps |
| T244 |
/workspace/coverage/default/39.sram_ctrl_regwen.567952866 |
|
|
Jun 02 12:47:34 PM PDT 24 |
Jun 02 12:56:06 PM PDT 24 |
58877928675 ps |
| T245 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.548490631 |
|
|
Jun 02 12:47:00 PM PDT 24 |
Jun 02 12:48:27 PM PDT 24 |
2803125739 ps |
| T246 |
/workspace/coverage/default/16.sram_ctrl_bijection.1185984815 |
|
|
Jun 02 12:46:00 PM PDT 24 |
Jun 02 01:13:40 PM PDT 24 |
72434804597 ps |
| T247 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.66654292 |
|
|
Jun 02 12:48:02 PM PDT 24 |
Jun 02 12:49:52 PM PDT 24 |
3032313198 ps |
| T248 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.1185302143 |
|
|
Jun 02 12:46:33 PM PDT 24 |
Jun 02 12:46:37 PM PDT 24 |
1396461363 ps |
| T249 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.428990527 |
|
|
Jun 02 12:47:56 PM PDT 24 |
Jun 02 12:48:03 PM PDT 24 |
2774480332 ps |
| T97 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.505775568 |
|
|
Jun 02 12:45:32 PM PDT 24 |
Jun 02 12:48:03 PM PDT 24 |
6410299204 ps |
| T250 |
/workspace/coverage/default/12.sram_ctrl_bijection.111867246 |
|
|
Jun 02 12:45:46 PM PDT 24 |
Jun 02 01:05:08 PM PDT 24 |
62373301022 ps |
| T251 |
/workspace/coverage/default/34.sram_ctrl_alert_test.4121085732 |
|
|
Jun 02 12:47:03 PM PDT 24 |
Jun 02 12:47:04 PM PDT 24 |
152764668 ps |
| T252 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1910715959 |
|
|
Jun 02 12:46:35 PM PDT 24 |
Jun 02 12:48:43 PM PDT 24 |
7312015125 ps |
| T253 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3814445694 |
|
|
Jun 02 12:47:52 PM PDT 24 |
Jun 02 12:48:29 PM PDT 24 |
3597576889 ps |
| T254 |
/workspace/coverage/default/41.sram_ctrl_bijection.3858238009 |
|
|
Jun 02 12:47:52 PM PDT 24 |
Jun 02 01:09:47 PM PDT 24 |
105318402922 ps |
| T255 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2696352503 |
|
|
Jun 02 12:48:28 PM PDT 24 |
Jun 02 12:49:42 PM PDT 24 |
877781295 ps |
| T256 |
/workspace/coverage/default/8.sram_ctrl_alert_test.1166757605 |
|
|
Jun 02 12:45:27 PM PDT 24 |
Jun 02 12:45:28 PM PDT 24 |
59023143 ps |
| T257 |
/workspace/coverage/default/1.sram_ctrl_regwen.3757999632 |
|
|
Jun 02 12:45:06 PM PDT 24 |
Jun 02 12:59:57 PM PDT 24 |
31525001722 ps |
| T146 |
/workspace/coverage/default/2.sram_ctrl_regwen.486163280 |
|
|
Jun 02 12:45:20 PM PDT 24 |
Jun 02 01:07:34 PM PDT 24 |
24891290612 ps |
| T258 |
/workspace/coverage/default/36.sram_ctrl_regwen.2051712923 |
|
|
Jun 02 12:47:18 PM PDT 24 |
Jun 02 12:55:38 PM PDT 24 |
9294219946 ps |
| T259 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.4238690221 |
|
|
Jun 02 12:45:53 PM PDT 24 |
Jun 02 12:45:57 PM PDT 24 |
1346639162 ps |
| T260 |
/workspace/coverage/default/35.sram_ctrl_alert_test.4094127621 |
|
|
Jun 02 12:47:15 PM PDT 24 |
Jun 02 12:47:16 PM PDT 24 |
54083171 ps |
| T59 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1025440731 |
|
|
Jun 02 12:45:42 PM PDT 24 |
Jun 02 12:45:55 PM PDT 24 |
618205382 ps |
| T261 |
/workspace/coverage/default/36.sram_ctrl_alert_test.4059332604 |
|
|
Jun 02 12:47:17 PM PDT 24 |
Jun 02 12:47:18 PM PDT 24 |
53821289 ps |
| T262 |
/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2119360573 |
|
|
Jun 02 12:47:29 PM PDT 24 |
Jun 02 12:48:57 PM PDT 24 |
858043393 ps |
| T263 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.3334148449 |
|
|
Jun 02 12:45:41 PM PDT 24 |
Jun 02 12:49:55 PM PDT 24 |
4872168379 ps |
| T264 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.3859965950 |
|
|
Jun 02 12:47:01 PM PDT 24 |
Jun 02 12:48:42 PM PDT 24 |
3043583016 ps |
| T265 |
/workspace/coverage/default/29.sram_ctrl_partial_access.3700040025 |
|
|
Jun 02 12:46:29 PM PDT 24 |
Jun 02 12:46:51 PM PDT 24 |
4743432656 ps |
| T266 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.1178214288 |
|
|
Jun 02 12:46:49 PM PDT 24 |
Jun 02 12:52:45 PM PDT 24 |
4784120888 ps |
| T267 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.1282956611 |
|
|
Jun 02 12:46:25 PM PDT 24 |
Jun 02 12:50:47 PM PDT 24 |
10805314043 ps |
| T60 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3758585213 |
|
|
Jun 02 12:45:29 PM PDT 24 |
Jun 02 12:45:55 PM PDT 24 |
3165299518 ps |
| T143 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1424584564 |
|
|
Jun 02 12:45:31 PM PDT 24 |
Jun 02 12:49:49 PM PDT 24 |
45752806721 ps |
| T268 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.4115717625 |
|
|
Jun 02 12:47:10 PM PDT 24 |
Jun 02 12:47:15 PM PDT 24 |
1536465100 ps |
| T269 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3753906402 |
|
|
Jun 02 12:45:18 PM PDT 24 |
Jun 02 12:45:23 PM PDT 24 |
2204476073 ps |
| T270 |
/workspace/coverage/default/26.sram_ctrl_partial_access.1297660196 |
|
|
Jun 02 12:46:14 PM PDT 24 |
Jun 02 12:46:19 PM PDT 24 |
828383826 ps |
| T271 |
/workspace/coverage/default/18.sram_ctrl_alert_test.2463019830 |
|
|
Jun 02 12:45:58 PM PDT 24 |
Jun 02 12:46:00 PM PDT 24 |
38833660 ps |
| T272 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4069874448 |
|
|
Jun 02 12:45:31 PM PDT 24 |
Jun 02 12:51:36 PM PDT 24 |
7805967585 ps |
| T74 |
/workspace/coverage/default/45.sram_ctrl_executable.1778898514 |
|
|
Jun 02 12:48:21 PM PDT 24 |
Jun 02 01:22:15 PM PDT 24 |
127498239410 ps |
| T273 |
/workspace/coverage/default/25.sram_ctrl_bijection.3639019904 |
|
|
Jun 02 12:46:04 PM PDT 24 |
Jun 02 01:01:12 PM PDT 24 |
13867079583 ps |
| T274 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2777352701 |
|
|
Jun 02 12:45:26 PM PDT 24 |
Jun 02 12:45:43 PM PDT 24 |
614960368 ps |
| T275 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2925829025 |
|
|
Jun 02 12:46:12 PM PDT 24 |
Jun 02 12:48:49 PM PDT 24 |
17323826524 ps |
| T276 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1068686339 |
|
|
Jun 02 12:48:21 PM PDT 24 |
Jun 02 12:50:45 PM PDT 24 |
10116792294 ps |
| T277 |
/workspace/coverage/default/9.sram_ctrl_executable.1306772652 |
|
|
Jun 02 12:45:28 PM PDT 24 |
Jun 02 12:51:15 PM PDT 24 |
10511087797 ps |
| T278 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1085332142 |
|
|
Jun 02 12:45:26 PM PDT 24 |
Jun 02 12:46:53 PM PDT 24 |
4327241925 ps |
| T75 |
/workspace/coverage/default/35.sram_ctrl_executable.4202471742 |
|
|
Jun 02 12:47:08 PM PDT 24 |
Jun 02 01:12:51 PM PDT 24 |
34376010832 ps |
| T279 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.3969972770 |
|
|
Jun 02 12:45:25 PM PDT 24 |
Jun 02 12:46:20 PM PDT 24 |
747221962 ps |
| T76 |
/workspace/coverage/default/42.sram_ctrl_regwen.2981863632 |
|
|
Jun 02 12:48:01 PM PDT 24 |
Jun 02 01:21:01 PM PDT 24 |
14102094854 ps |
| T280 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.728859293 |
|
|
Jun 02 12:45:53 PM PDT 24 |
Jun 02 12:46:36 PM PDT 24 |
1500604766 ps |
| T281 |
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.99835629 |
|
|
Jun 02 12:48:09 PM PDT 24 |
Jun 02 12:54:10 PM PDT 24 |
29722879117 ps |
| T282 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2330791875 |
|
|
Jun 02 12:49:10 PM PDT 24 |
Jun 02 12:50:29 PM PDT 24 |
2628866956 ps |
| T283 |
/workspace/coverage/default/27.sram_ctrl_smoke.820660116 |
|
|
Jun 02 12:46:17 PM PDT 24 |
Jun 02 12:46:49 PM PDT 24 |
1204637916 ps |
| T284 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2315862612 |
|
|
Jun 02 12:45:21 PM PDT 24 |
Jun 02 12:52:01 PM PDT 24 |
71898476456 ps |
| T147 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.3554682155 |
|
|
Jun 02 12:45:20 PM PDT 24 |
Jun 02 12:47:28 PM PDT 24 |
23385960182 ps |
| T61 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3442716104 |
|
|
Jun 02 12:45:51 PM PDT 24 |
Jun 02 12:46:33 PM PDT 24 |
1215738782 ps |
| T62 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.765980927 |
|
|
Jun 02 12:45:29 PM PDT 24 |
Jun 02 12:45:41 PM PDT 24 |
675755019 ps |
| T285 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.621329062 |
|
|
Jun 02 12:45:52 PM PDT 24 |
Jun 02 01:10:33 PM PDT 24 |
17064185173 ps |
| T286 |
/workspace/coverage/default/17.sram_ctrl_alert_test.3276983417 |
|
|
Jun 02 12:46:01 PM PDT 24 |
Jun 02 12:46:03 PM PDT 24 |
40388718 ps |
| T287 |
/workspace/coverage/default/47.sram_ctrl_regwen.2207853758 |
|
|
Jun 02 12:48:39 PM PDT 24 |
Jun 02 12:51:51 PM PDT 24 |
37247295717 ps |
| T288 |
/workspace/coverage/default/4.sram_ctrl_smoke.1694442449 |
|
|
Jun 02 12:45:26 PM PDT 24 |
Jun 02 12:45:40 PM PDT 24 |
434517629 ps |
| T289 |
/workspace/coverage/default/46.sram_ctrl_regwen.3282092872 |
|
|
Jun 02 12:48:28 PM PDT 24 |
Jun 02 01:09:02 PM PDT 24 |
19873298762 ps |
| T290 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1156514800 |
|
|
Jun 02 12:45:41 PM PDT 24 |
Jun 02 12:48:57 PM PDT 24 |
16569727326 ps |
| T291 |
/workspace/coverage/default/42.sram_ctrl_alert_test.2116161760 |
|
|
Jun 02 12:48:08 PM PDT 24 |
Jun 02 12:48:09 PM PDT 24 |
12617505 ps |
| T292 |
/workspace/coverage/default/13.sram_ctrl_regwen.4290446647 |
|
|
Jun 02 12:45:45 PM PDT 24 |
Jun 02 12:51:13 PM PDT 24 |
8569569785 ps |
| T293 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.858305047 |
|
|
Jun 02 12:45:06 PM PDT 24 |
Jun 02 12:46:12 PM PDT 24 |
3859082256 ps |
| T294 |
/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3535108398 |
|
|
Jun 02 12:46:35 PM PDT 24 |
Jun 02 12:48:38 PM PDT 24 |
11362678942 ps |
| T295 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2548723231 |
|
|
Jun 02 12:45:29 PM PDT 24 |
Jun 02 12:51:17 PM PDT 24 |
25790012741 ps |
| T296 |
/workspace/coverage/default/22.sram_ctrl_alert_test.106130969 |
|
|
Jun 02 12:46:02 PM PDT 24 |
Jun 02 12:46:03 PM PDT 24 |
18470444 ps |
| T297 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.1588715308 |
|
|
Jun 02 12:45:30 PM PDT 24 |
Jun 02 12:50:27 PM PDT 24 |
18103120265 ps |
| T298 |
/workspace/coverage/default/24.sram_ctrl_bijection.3273905349 |
|
|
Jun 02 12:45:59 PM PDT 24 |
Jun 02 01:15:33 PM PDT 24 |
105003610118 ps |
| T299 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2326194355 |
|
|
Jun 02 12:45:55 PM PDT 24 |
Jun 02 12:50:35 PM PDT 24 |
18363634888 ps |
| T300 |
/workspace/coverage/default/23.sram_ctrl_alert_test.3286184043 |
|
|
Jun 02 12:46:12 PM PDT 24 |
Jun 02 12:46:13 PM PDT 24 |
43908542 ps |
| T301 |
/workspace/coverage/default/1.sram_ctrl_executable.958776146 |
|
|
Jun 02 12:45:07 PM PDT 24 |
Jun 02 12:55:15 PM PDT 24 |
13058694425 ps |
| T21 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.2369447935 |
|
|
Jun 02 12:45:22 PM PDT 24 |
Jun 02 12:45:25 PM PDT 24 |
637679720 ps |
| T302 |
/workspace/coverage/default/42.sram_ctrl_smoke.1292866373 |
|
|
Jun 02 12:47:56 PM PDT 24 |
Jun 02 12:48:05 PM PDT 24 |
1966442615 ps |