Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.38 99.03 92.48 99.31 100.00 95.35 98.40 97.07


Total tests in report: 1027
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
68.75 68.75 94.48 94.48 65.52 65.52 41.18 41.18 66.67 66.67 83.25 83.25 94.47 94.47 35.65 35.65 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1439462127
80.62 11.87 95.29 0.81 77.01 11.49 93.42 52.24 71.43 4.76 87.03 3.77 94.61 0.15 45.52 9.87 /workspace/coverage/default/41.sram_ctrl_executable.560541273
88.06 7.44 96.26 0.97 85.07 8.06 96.07 2.65 71.43 0.00 89.62 2.59 96.07 1.46 81.90 36.38 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1491891418
91.31 3.25 97.24 0.97 85.19 0.12 96.07 0.00 90.48 19.05 91.51 1.89 96.80 0.73 81.90 0.00 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3193490749
94.16 2.85 98.38 1.14 87.91 2.73 96.42 0.34 100.00 9.52 94.10 2.59 96.94 0.15 85.37 3.47 /workspace/coverage/default/38.sram_ctrl_stress_all.3537294281
95.05 0.89 98.54 0.16 88.51 0.59 96.63 0.21 100.00 0.00 94.81 0.71 96.94 0.00 89.95 4.57 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3150290322
95.42 0.37 98.78 0.24 88.63 0.12 96.83 0.21 100.00 0.00 95.05 0.24 97.09 0.15 91.59 1.65 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2028505022
95.71 0.29 98.78 0.00 88.63 0.00 96.83 0.00 100.00 0.00 95.05 0.00 97.09 0.00 93.60 2.01 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1139326577
95.97 0.26 98.78 0.00 88.86 0.24 96.90 0.07 100.00 0.00 95.05 0.00 98.40 1.31 93.78 0.18 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1276279460
96.18 0.21 98.78 0.00 89.22 0.36 97.45 0.55 100.00 0.00 95.05 0.00 98.40 0.00 94.33 0.55 /workspace/coverage/default/44.sram_ctrl_alert_test.960540560
96.31 0.13 98.78 0.00 89.22 0.00 97.66 0.21 100.00 0.00 95.05 0.00 98.40 0.00 95.06 0.73 /workspace/coverage/default/11.sram_ctrl_stress_all.3413913880
96.44 0.13 98.86 0.08 89.22 0.00 98.48 0.83 100.00 0.00 95.05 0.00 98.40 0.00 95.06 0.00 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3631138028
96.55 0.11 99.03 0.16 89.22 0.00 98.62 0.14 100.00 0.00 95.52 0.47 98.40 0.00 95.06 0.00 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.655849935
96.65 0.10 99.03 0.00 89.22 0.00 98.62 0.00 100.00 0.00 95.52 0.00 98.40 0.00 95.80 0.73 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2531840144
96.74 0.09 99.03 0.00 89.22 0.00 99.24 0.62 100.00 0.00 95.52 0.00 98.40 0.00 95.80 0.00 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.420158660
96.79 0.05 99.03 0.00 89.22 0.00 99.24 0.00 100.00 0.00 95.52 0.00 98.40 0.00 96.16 0.37 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3252820772
96.85 0.05 99.03 0.00 89.22 0.00 99.24 0.00 100.00 0.00 95.52 0.00 98.40 0.00 96.53 0.37 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.37326437
96.90 0.05 99.03 0.00 89.22 0.00 99.24 0.00 100.00 0.00 95.52 0.00 98.40 0.00 96.89 0.37 /workspace/coverage/default/1.sram_ctrl_stress_all.548418165
96.93 0.03 99.03 0.00 89.22 0.00 99.24 0.00 100.00 0.00 95.52 0.00 98.40 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1839582221
96.94 0.01 99.03 0.00 89.22 0.00 99.31 0.07 100.00 0.00 95.52 0.00 98.40 0.00 97.07 0.00 /workspace/coverage/default/16.sram_ctrl_mem_walk.1026940

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2935466897
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2697666363
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3225099363
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2632522180
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.4243971726
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1110162052
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.359984985
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1971432210
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1258281725
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3584645302
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.554802441
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.29916280
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1751695076
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1416205896
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2061460869
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3637995156
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4148744075
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3956512811
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3309556499
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.146650483
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1130952012
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2275263813
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.841380843
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.81355103
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2834736112
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.232537642
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2682475106
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.4084074279
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2187068413
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3951256762
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2742997363
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.754778272
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2641127231
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1792875637
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3286232131
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2320836613
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1219481131
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3957421398
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1247722297
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3530486376
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3584199861
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.320636080
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.4167267438
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1281555154
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.679587335
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1232274185
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.851467013
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1162748592
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.609452473
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3013719769
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2246053119
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3588731458
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1201810212
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.508476836
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2382277707
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3317490246
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3814920551
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4291302183
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2952751510
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.402013898
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3457792435
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3795777141
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3152166828
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2743317418
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2292707326
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3415231272
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3447434350
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1568901954
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2703712936
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2504405391
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1564920497
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1899620886
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3591309998
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.4132922607
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3188612825
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1740041000
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1563718186
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.885027138
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.930927608
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.667587783
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1054396014
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3156691854
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.480807242
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.664314144
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3653977457
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.307395284
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3688412258
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1972078619
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2307095302
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1583141630
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2274739584
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.752404100
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3467728958
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.33512317
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2787300002
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2012174926
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2361934139
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.663789590
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.772761565
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.606071272
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2102816656
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.38484529
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1468104655
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.4053706292
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1768583076
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2312589049
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3437167042
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2253319377
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2042363646
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3660444950
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.740005223
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4002488814
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2279580425
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4007428778
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3474048330
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.98243277
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1626622083
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3086549057
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2783559807
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.200489634
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1883476769
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1565191231
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1446412657
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1132466872
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1499345163
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4216122727
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.826810430
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2348327877
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1513389099
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.956265305
/workspace/coverage/default/0.sram_ctrl_alert_test.425619641
/workspace/coverage/default/0.sram_ctrl_bijection.3667531610
/workspace/coverage/default/0.sram_ctrl_executable.2178281411
/workspace/coverage/default/0.sram_ctrl_lc_escalation.383045151
/workspace/coverage/default/0.sram_ctrl_max_throughput.4277748840
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2910170427
/workspace/coverage/default/0.sram_ctrl_mem_walk.4199523348
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1297338618
/workspace/coverage/default/0.sram_ctrl_partial_access.4038656462
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.551394108
/workspace/coverage/default/0.sram_ctrl_ram_cfg.330004793
/workspace/coverage/default/0.sram_ctrl_regwen.916557184
/workspace/coverage/default/0.sram_ctrl_smoke.2100089517
/workspace/coverage/default/0.sram_ctrl_stress_all.614765728
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3083832462
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3139999953
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1696296313
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3331480229
/workspace/coverage/default/1.sram_ctrl_alert_test.2318098186
/workspace/coverage/default/1.sram_ctrl_executable.892082207
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4102194781
/workspace/coverage/default/1.sram_ctrl_max_throughput.1378968117
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3565633442
/workspace/coverage/default/1.sram_ctrl_mem_walk.3216450227
/workspace/coverage/default/1.sram_ctrl_multiple_keys.772392168
/workspace/coverage/default/1.sram_ctrl_partial_access.3609681460
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2402569997
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1651370469
/workspace/coverage/default/1.sram_ctrl_regwen.2829616839
/workspace/coverage/default/1.sram_ctrl_smoke.613331799
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4268536783
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.57585853
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3801141287
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.991494834
/workspace/coverage/default/10.sram_ctrl_alert_test.3116846124
/workspace/coverage/default/10.sram_ctrl_bijection.1298338312
/workspace/coverage/default/10.sram_ctrl_executable.2026581314
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1722904238
/workspace/coverage/default/10.sram_ctrl_max_throughput.656527576
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2592863281
/workspace/coverage/default/10.sram_ctrl_mem_walk.3309723305
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3539176415
/workspace/coverage/default/10.sram_ctrl_partial_access.1368172289
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2913592790
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2882037394
/workspace/coverage/default/10.sram_ctrl_regwen.4099169985
/workspace/coverage/default/10.sram_ctrl_smoke.3859402033
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1040384117
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2112555242
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3895902755
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2980560378
/workspace/coverage/default/11.sram_ctrl_alert_test.3934480970
/workspace/coverage/default/11.sram_ctrl_bijection.1366618079
/workspace/coverage/default/11.sram_ctrl_executable.2319141043
/workspace/coverage/default/11.sram_ctrl_lc_escalation.109801457
/workspace/coverage/default/11.sram_ctrl_max_throughput.274314628
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3030441248
/workspace/coverage/default/11.sram_ctrl_mem_walk.1509378512
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2558161128
/workspace/coverage/default/11.sram_ctrl_partial_access.1294646378
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1876611648
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1933930356
/workspace/coverage/default/11.sram_ctrl_regwen.1332548450
/workspace/coverage/default/11.sram_ctrl_smoke.2620916990
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3637765864
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3955214318
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.131870225
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3274366746
/workspace/coverage/default/12.sram_ctrl_alert_test.1613309203
/workspace/coverage/default/12.sram_ctrl_bijection.3304859260
/workspace/coverage/default/12.sram_ctrl_executable.1398076053
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3802900332
/workspace/coverage/default/12.sram_ctrl_max_throughput.2415571676
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/workspace/coverage/default/43.sram_ctrl_bijection.2003271399
/workspace/coverage/default/43.sram_ctrl_executable.1806099868
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1935255063
/workspace/coverage/default/43.sram_ctrl_max_throughput.624091784
/workspace/coverage/default/43.sram_ctrl_mem_walk.3199950143
/workspace/coverage/default/43.sram_ctrl_multiple_keys.4091702093
/workspace/coverage/default/43.sram_ctrl_partial_access.2943385110
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1200624833
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2175403123
/workspace/coverage/default/43.sram_ctrl_regwen.2304003896
/workspace/coverage/default/43.sram_ctrl_smoke.1175910138
/workspace/coverage/default/43.sram_ctrl_stress_all.560510903
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.756137567
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.108612322
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.740786419
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3913402136
/workspace/coverage/default/44.sram_ctrl_bijection.1976756803
/workspace/coverage/default/44.sram_ctrl_executable.3407281
/workspace/coverage/default/44.sram_ctrl_lc_escalation.545277595
/workspace/coverage/default/44.sram_ctrl_max_throughput.2881987158
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1815369104
/workspace/coverage/default/44.sram_ctrl_mem_walk.4219363083
/workspace/coverage/default/44.sram_ctrl_multiple_keys.500984794
/workspace/coverage/default/44.sram_ctrl_partial_access.3006572534
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.4275001743
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2085232546
/workspace/coverage/default/44.sram_ctrl_regwen.2705751388
/workspace/coverage/default/44.sram_ctrl_smoke.447359752
/workspace/coverage/default/44.sram_ctrl_stress_all.3199073352
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2048495219
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1979991755
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4046383401
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2345465092
/workspace/coverage/default/45.sram_ctrl_alert_test.2086963050
/workspace/coverage/default/45.sram_ctrl_bijection.4247550498
/workspace/coverage/default/45.sram_ctrl_executable.2005010275
/workspace/coverage/default/45.sram_ctrl_lc_escalation.829255623
/workspace/coverage/default/45.sram_ctrl_max_throughput.4125932447
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2221152642
/workspace/coverage/default/45.sram_ctrl_mem_walk.2774825687
/workspace/coverage/default/45.sram_ctrl_multiple_keys.615041803
/workspace/coverage/default/45.sram_ctrl_partial_access.2330048244
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3002282043
/workspace/coverage/default/45.sram_ctrl_ram_cfg.404147834
/workspace/coverage/default/45.sram_ctrl_regwen.4217151852
/workspace/coverage/default/45.sram_ctrl_smoke.3209032507
/workspace/coverage/default/45.sram_ctrl_stress_all.225058721
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1715303493
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1787513563
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1719574804
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.448337715
/workspace/coverage/default/46.sram_ctrl_alert_test.1511418114
/workspace/coverage/default/46.sram_ctrl_bijection.3266897244
/workspace/coverage/default/46.sram_ctrl_executable.2192102877
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2255056323
/workspace/coverage/default/46.sram_ctrl_max_throughput.2199088448
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2626628940
/workspace/coverage/default/46.sram_ctrl_mem_walk.2771348588
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2634922767
/workspace/coverage/default/46.sram_ctrl_partial_access.833173511
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2740599776
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2845397636
/workspace/coverage/default/46.sram_ctrl_regwen.1453748178
/workspace/coverage/default/46.sram_ctrl_smoke.185301468
/workspace/coverage/default/46.sram_ctrl_stress_all.478302631
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.222542329
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2172223564
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3489355179
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.4113265593
/workspace/coverage/default/47.sram_ctrl_alert_test.3110603190
/workspace/coverage/default/47.sram_ctrl_bijection.2468480078
/workspace/coverage/default/47.sram_ctrl_executable.541543172
/workspace/coverage/default/47.sram_ctrl_lc_escalation.309518993
/workspace/coverage/default/47.sram_ctrl_max_throughput.3767376270
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1496460782
/workspace/coverage/default/47.sram_ctrl_mem_walk.3182987585
/workspace/coverage/default/47.sram_ctrl_multiple_keys.4011242151
/workspace/coverage/default/47.sram_ctrl_partial_access.2947947040
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3352417843
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4225391620
/workspace/coverage/default/47.sram_ctrl_regwen.2767732271
/workspace/coverage/default/47.sram_ctrl_smoke.1906668325
/workspace/coverage/default/47.sram_ctrl_stress_all.1376014093
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.675024223
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3660297574
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1162885089
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1172240676
/workspace/coverage/default/48.sram_ctrl_alert_test.2887038169
/workspace/coverage/default/48.sram_ctrl_executable.1072775304
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2967829204
/workspace/coverage/default/48.sram_ctrl_max_throughput.3289783471
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2884356036
/workspace/coverage/default/48.sram_ctrl_mem_walk.3504100103
/workspace/coverage/default/48.sram_ctrl_multiple_keys.877162781
/workspace/coverage/default/48.sram_ctrl_partial_access.2709443018
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1275074079
/workspace/coverage/default/48.sram_ctrl_ram_cfg.427338831
/workspace/coverage/default/48.sram_ctrl_regwen.397469722
/workspace/coverage/default/48.sram_ctrl_smoke.574078513
/workspace/coverage/default/48.sram_ctrl_stress_all.2847789197
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1519080933
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.863869742
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3317376932
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3011848924
/workspace/coverage/default/49.sram_ctrl_alert_test.3769166983
/workspace/coverage/default/49.sram_ctrl_bijection.595989013
/workspace/coverage/default/49.sram_ctrl_executable.512823768
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3472205046
/workspace/coverage/default/49.sram_ctrl_max_throughput.1240393714
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.567960784
/workspace/coverage/default/49.sram_ctrl_mem_walk.2857024895
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3446217837
/workspace/coverage/default/49.sram_ctrl_partial_access.4067093745
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1813960178
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2319729819
/workspace/coverage/default/49.sram_ctrl_regwen.1176973123
/workspace/coverage/default/49.sram_ctrl_smoke.2494130706
/workspace/coverage/default/49.sram_ctrl_stress_all.1211691020
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.860533213
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4161898469
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3401419291
/workspace/coverage/default/5.sram_ctrl_alert_test.4146178671
/workspace/coverage/default/5.sram_ctrl_bijection.3332569154
/workspace/coverage/default/5.sram_ctrl_executable.2488362777
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3215945553
/workspace/coverage/default/5.sram_ctrl_max_throughput.1595313660
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2425815328
/workspace/coverage/default/5.sram_ctrl_mem_walk.3700202655
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2223357268
/workspace/coverage/default/5.sram_ctrl_partial_access.558575976
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2627337210
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2338895014
/workspace/coverage/default/5.sram_ctrl_regwen.1174382898
/workspace/coverage/default/5.sram_ctrl_smoke.4068161372
/workspace/coverage/default/5.sram_ctrl_stress_all.3450249367
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1350873868
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2620328155
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2858394692
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2691762236
/workspace/coverage/default/6.sram_ctrl_alert_test.3114450892
/workspace/coverage/default/6.sram_ctrl_bijection.2575389328
/workspace/coverage/default/6.sram_ctrl_executable.23738797
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1383974749
/workspace/coverage/default/6.sram_ctrl_max_throughput.1863630187
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4220366344
/workspace/coverage/default/6.sram_ctrl_mem_walk.1231222130
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3058316030
/workspace/coverage/default/6.sram_ctrl_partial_access.464045575
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3697874785
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2154977371
/workspace/coverage/default/6.sram_ctrl_regwen.1944958851
/workspace/coverage/default/6.sram_ctrl_smoke.1697387344
/workspace/coverage/default/6.sram_ctrl_stress_all.665474028
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3524263184
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.338053982
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.21359347
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2964153373
/workspace/coverage/default/7.sram_ctrl_alert_test.2797420779
/workspace/coverage/default/7.sram_ctrl_bijection.823462585
/workspace/coverage/default/7.sram_ctrl_executable.2722758300
/workspace/coverage/default/7.sram_ctrl_lc_escalation.999190468
/workspace/coverage/default/7.sram_ctrl_max_throughput.2320406768
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3587966014
/workspace/coverage/default/7.sram_ctrl_mem_walk.3208521820
/workspace/coverage/default/7.sram_ctrl_multiple_keys.718553321
/workspace/coverage/default/7.sram_ctrl_partial_access.357045670
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.484939793
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3099269170
/workspace/coverage/default/7.sram_ctrl_regwen.820488336
/workspace/coverage/default/7.sram_ctrl_smoke.3666174874
/workspace/coverage/default/7.sram_ctrl_stress_all.4293623402
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.166410249
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1033356496
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.585343524
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.495341274
/workspace/coverage/default/8.sram_ctrl_alert_test.174206696
/workspace/coverage/default/8.sram_ctrl_bijection.716595501
/workspace/coverage/default/8.sram_ctrl_executable.2134549675
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2602463487
/workspace/coverage/default/8.sram_ctrl_max_throughput.429140181
/workspace/coverage/default/8.sram_ctrl_mem_walk.1680898112
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3156296931
/workspace/coverage/default/8.sram_ctrl_partial_access.819906167
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.4028408208
/workspace/coverage/default/8.sram_ctrl_ram_cfg.453115873
/workspace/coverage/default/8.sram_ctrl_regwen.2778598495
/workspace/coverage/default/8.sram_ctrl_smoke.2719433758
/workspace/coverage/default/8.sram_ctrl_stress_all.1514919899
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3607786169
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.4241444854
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2187728353
/workspace/coverage/default/9.sram_ctrl_alert_test.3860260782
/workspace/coverage/default/9.sram_ctrl_bijection.2957870866
/workspace/coverage/default/9.sram_ctrl_executable.2586232010
/workspace/coverage/default/9.sram_ctrl_lc_escalation.4217579629
/workspace/coverage/default/9.sram_ctrl_max_throughput.602274674
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.849243986
/workspace/coverage/default/9.sram_ctrl_mem_walk.1921087438
/workspace/coverage/default/9.sram_ctrl_multiple_keys.4163901480
/workspace/coverage/default/9.sram_ctrl_partial_access.2302595285
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1844679046
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3329546234
/workspace/coverage/default/9.sram_ctrl_regwen.2296092147
/workspace/coverage/default/9.sram_ctrl_smoke.1229088341
/workspace/coverage/default/9.sram_ctrl_stress_all.3205750060
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3594884740
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3635371385
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.987008284



Total test records in report: 1027
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2028505022 Jun 10 05:33:32 PM PDT 24 Jun 10 05:38:21 PM PDT 24 8237791620 ps
T2 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.987008284 Jun 10 05:30:10 PM PDT 24 Jun 10 05:30:20 PM PDT 24 684880072 ps
T3 /workspace/coverage/default/14.sram_ctrl_partial_access.3035554603 Jun 10 05:30:48 PM PDT 24 Jun 10 05:31:12 PM PDT 24 997682806 ps
T8 /workspace/coverage/default/2.sram_ctrl_max_throughput.2917737510 Jun 10 05:29:55 PM PDT 24 Jun 10 05:31:23 PM PDT 24 775294755 ps
T4 /workspace/coverage/default/30.sram_ctrl_executable.977182446 Jun 10 05:31:16 PM PDT 24 Jun 10 05:37:45 PM PDT 24 38106182906 ps
T9 /workspace/coverage/default/3.sram_ctrl_alert_test.619998203 Jun 10 05:30:09 PM PDT 24 Jun 10 05:30:10 PM PDT 24 18113680 ps
T10 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1439462127 Jun 10 05:32:47 PM PDT 24 Jun 10 05:34:18 PM PDT 24 2633045943 ps
T11 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.740786419 Jun 10 05:32:45 PM PDT 24 Jun 10 05:33:26 PM PDT 24 892052741 ps
T12 /workspace/coverage/default/14.sram_ctrl_alert_test.955570670 Jun 10 05:30:59 PM PDT 24 Jun 10 05:31:00 PM PDT 24 67322449 ps
T13 /workspace/coverage/default/16.sram_ctrl_mem_walk.1026940 Jun 10 05:30:55 PM PDT 24 Jun 10 05:36:17 PM PDT 24 230410552868 ps
T19 /workspace/coverage/default/20.sram_ctrl_executable.154236438 Jun 10 05:30:57 PM PDT 24 Jun 10 05:54:40 PM PDT 24 9237478233 ps
T5 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1179591677 Jun 10 05:30:42 PM PDT 24 Jun 10 05:31:39 PM PDT 24 8414413518 ps
T22 /workspace/coverage/default/41.sram_ctrl_executable.560541273 Jun 10 05:32:35 PM PDT 24 Jun 10 05:45:37 PM PDT 24 14728664950 ps
T23 /workspace/coverage/default/15.sram_ctrl_ram_cfg.1523241367 Jun 10 05:30:25 PM PDT 24 Jun 10 05:30:29 PM PDT 24 1348006209 ps
T24 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3639635506 Jun 10 05:32:06 PM PDT 24 Jun 10 05:32:10 PM PDT 24 369126819 ps
T26 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.444859341 Jun 10 05:30:17 PM PDT 24 Jun 10 05:33:05 PM PDT 24 23189061467 ps
T25 /workspace/coverage/default/46.sram_ctrl_ram_cfg.2845397636 Jun 10 05:33:22 PM PDT 24 Jun 10 05:33:26 PM PDT 24 1358237148 ps
T28 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.1929973363 Jun 10 05:31:06 PM PDT 24 Jun 10 05:47:21 PM PDT 24 35496395183 ps
T27 /workspace/coverage/default/7.sram_ctrl_smoke.3666174874 Jun 10 05:30:06 PM PDT 24 Jun 10 05:30:18 PM PDT 24 1887153460 ps
T58 /workspace/coverage/default/11.sram_ctrl_executable.2319141043 Jun 10 05:30:43 PM PDT 24 Jun 10 05:43:25 PM PDT 24 36020398374 ps
T48 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1339638477 Jun 10 05:30:39 PM PDT 24 Jun 10 05:38:26 PM PDT 24 27731880250 ps
T142 /workspace/coverage/default/3.sram_ctrl_ram_cfg.3462078439 Jun 10 05:29:56 PM PDT 24 Jun 10 05:30:00 PM PDT 24 1408804090 ps
T29 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1172240676 Jun 10 05:33:24 PM PDT 24 Jun 10 05:50:26 PM PDT 24 23338651098 ps
T145 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.501314645 Jun 10 05:32:36 PM PDT 24 Jun 10 05:33:51 PM PDT 24 3126164530 ps
T6 /workspace/coverage/default/11.sram_ctrl_stress_all.3413913880 Jun 10 05:30:41 PM PDT 24 Jun 10 06:23:59 PM PDT 24 411086182231 ps
T30 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3274366746 Jun 10 05:30:47 PM PDT 24 Jun 10 05:54:09 PM PDT 24 21497977620 ps
T15 /workspace/coverage/default/46.sram_ctrl_regwen.1453748178 Jun 10 05:33:11 PM PDT 24 Jun 10 05:55:32 PM PDT 24 64287129731 ps
T95 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2930802403 Jun 10 05:32:25 PM PDT 24 Jun 10 05:36:20 PM PDT 24 44757506039 ps
T141 /workspace/coverage/default/22.sram_ctrl_max_throughput.3899745134 Jun 10 05:30:41 PM PDT 24 Jun 10 05:31:40 PM PDT 24 1993131987 ps
T49 /workspace/coverage/default/28.sram_ctrl_executable.4050618683 Jun 10 05:31:29 PM PDT 24 Jun 10 05:44:44 PM PDT 24 30192070602 ps
T51 /workspace/coverage/default/26.sram_ctrl_bijection.910054891 Jun 10 05:31:04 PM PDT 24 Jun 10 05:50:10 PM PDT 24 64288243353 ps
T130 /workspace/coverage/default/39.sram_ctrl_executable.2855722429 Jun 10 05:32:15 PM PDT 24 Jun 10 05:46:55 PM PDT 24 179204352908 ps
T52 /workspace/coverage/default/22.sram_ctrl_bijection.2921182542 Jun 10 05:31:05 PM PDT 24 Jun 10 06:12:12 PM PDT 24 69100110996 ps
T7 /workspace/coverage/default/38.sram_ctrl_stress_all.3537294281 Jun 10 05:32:18 PM PDT 24 Jun 10 06:33:40 PM PDT 24 204276420553 ps
T38 /workspace/coverage/default/14.sram_ctrl_mem_walk.1128265950 Jun 10 05:30:23 PM PDT 24 Jun 10 05:35:30 PM PDT 24 20996668550 ps
T56 /workspace/coverage/default/40.sram_ctrl_lc_escalation.2073321148 Jun 10 05:32:25 PM PDT 24 Jun 10 05:32:41 PM PDT 24 2084712597 ps
T146 /workspace/coverage/default/9.sram_ctrl_ram_cfg.3329546234 Jun 10 05:30:48 PM PDT 24 Jun 10 05:30:52 PM PDT 24 349620756 ps
T50 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.2988463007 Jun 10 05:30:23 PM PDT 24 Jun 10 05:32:58 PM PDT 24 20799106126 ps
T143 /workspace/coverage/default/28.sram_ctrl_max_throughput.3212080884 Jun 10 05:31:28 PM PDT 24 Jun 10 05:32:17 PM PDT 24 729840304 ps
T39 /workspace/coverage/default/18.sram_ctrl_mem_walk.4012412269 Jun 10 05:30:55 PM PDT 24 Jun 10 05:36:23 PM PDT 24 55303799654 ps
T16 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1491891418 Jun 10 05:30:45 PM PDT 24 Jun 10 05:33:56 PM PDT 24 7688148489 ps
T64 /workspace/coverage/default/18.sram_ctrl_max_throughput.3459938878 Jun 10 05:30:29 PM PDT 24 Jun 10 05:33:09 PM PDT 24 1001282032 ps
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T68 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.4202715330 Jun 10 05:31:55 PM PDT 24 Jun 10 05:35:44 PM PDT 24 5271579309 ps
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T20 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3487566511 Jun 10 05:30:36 PM PDT 24 Jun 10 05:30:57 PM PDT 24 773181107 ps
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T110 /workspace/coverage/default/24.sram_ctrl_partial_access.340802448 Jun 10 05:31:23 PM PDT 24 Jun 10 05:31:27 PM PDT 24 1397205966 ps
T98 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.958504134 Jun 10 05:30:46 PM PDT 24 Jun 10 05:34:19 PM PDT 24 6801171701 ps
T37 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1532774380 Jun 10 05:32:19 PM PDT 24 Jun 10 05:34:52 PM PDT 24 10606081207 ps
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T113 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2996048065 Jun 10 05:30:45 PM PDT 24 Jun 10 05:31:01 PM PDT 24 3635538685 ps
T152 /workspace/coverage/default/40.sram_ctrl_partial_access.2064267940 Jun 10 05:32:18 PM PDT 24 Jun 10 05:33:37 PM PDT 24 1604484778 ps
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T155 /workspace/coverage/default/0.sram_ctrl_lc_escalation.383045151 Jun 10 05:29:49 PM PDT 24 Jun 10 05:30:50 PM PDT 24 10828080038 ps
T44 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1611707760 Jun 10 05:31:11 PM PDT 24 Jun 10 05:31:33 PM PDT 24 822213029 ps
T86 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.1549054610 Jun 10 05:30:53 PM PDT 24 Jun 10 05:48:48 PM PDT 24 13579917026 ps
T59 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1681978232 Jun 10 05:32:10 PM PDT 24 Jun 10 05:32:21 PM PDT 24 428498478 ps
T156 /workspace/coverage/default/13.sram_ctrl_max_throughput.3053594301 Jun 10 05:30:47 PM PDT 24 Jun 10 05:32:55 PM PDT 24 798699902 ps
T34 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.655849935 Jun 10 05:30:12 PM PDT 24 Jun 10 05:31:39 PM PDT 24 2999513787 ps
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T40 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1815369104 Jun 10 05:32:54 PM PDT 24 Jun 10 05:35:50 PM PDT 24 12344629723 ps
T14 /workspace/coverage/default/9.sram_ctrl_alert_test.3860260782 Jun 10 05:30:20 PM PDT 24 Jun 10 05:30:22 PM PDT 24 12731605 ps
T159 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.3011848924 Jun 10 05:33:38 PM PDT 24 Jun 10 05:52:43 PM PDT 24 42885648330 ps
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T161 /workspace/coverage/default/36.sram_ctrl_alert_test.1015104751 Jun 10 05:32:05 PM PDT 24 Jun 10 05:32:06 PM PDT 24 14497227 ps
T162 /workspace/coverage/default/27.sram_ctrl_smoke.4025783505 Jun 10 05:31:29 PM PDT 24 Jun 10 05:32:07 PM PDT 24 755768946 ps
T163 /workspace/coverage/default/8.sram_ctrl_max_throughput.429140181 Jun 10 05:30:06 PM PDT 24 Jun 10 05:30:36 PM PDT 24 1487426093 ps
T164 /workspace/coverage/default/29.sram_ctrl_smoke.4193280802 Jun 10 05:31:27 PM PDT 24 Jun 10 05:31:41 PM PDT 24 777384306 ps
T165 /workspace/coverage/default/10.sram_ctrl_alert_test.3116846124 Jun 10 05:30:16 PM PDT 24 Jun 10 05:30:17 PM PDT 24 21698910 ps
T128 /workspace/coverage/default/31.sram_ctrl_executable.1463818670 Jun 10 05:31:29 PM PDT 24 Jun 10 05:47:14 PM PDT 24 23358236900 ps
T139 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2626628940 Jun 10 05:33:22 PM PDT 24 Jun 10 05:34:45 PM PDT 24 5058624568 ps
T100 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.3635371385 Jun 10 05:30:12 PM PDT 24 Jun 10 05:34:10 PM PDT 24 8293021423 ps
T166 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.2530941091 Jun 10 05:30:36 PM PDT 24 Jun 10 06:01:13 PM PDT 24 18050313412 ps
T167 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1006457222 Jun 10 05:31:24 PM PDT 24 Jun 10 05:34:28 PM PDT 24 3010903713 ps
T168 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2339354390 Jun 10 05:30:23 PM PDT 24 Jun 10 05:46:55 PM PDT 24 54731254371 ps
T169 /workspace/coverage/default/3.sram_ctrl_max_throughput.1384744683 Jun 10 05:30:21 PM PDT 24 Jun 10 05:31:56 PM PDT 24 1833164989 ps
T114 /workspace/coverage/default/20.sram_ctrl_lc_escalation.81978998 Jun 10 05:31:07 PM PDT 24 Jun 10 05:31:58 PM PDT 24 9257397736 ps
T170 /workspace/coverage/default/4.sram_ctrl_regwen.2560127418 Jun 10 05:30:00 PM PDT 24 Jun 10 05:57:52 PM PDT 24 71541132441 ps
T171 /workspace/coverage/default/13.sram_ctrl_alert_test.3595914306 Jun 10 05:30:23 PM PDT 24 Jun 10 05:30:25 PM PDT 24 21224460 ps
T131 /workspace/coverage/default/48.sram_ctrl_stress_all.2847789197 Jun 10 05:33:27 PM PDT 24 Jun 10 05:50:39 PM PDT 24 26650869440 ps
T132 /workspace/coverage/default/34.sram_ctrl_regwen.2784114534 Jun 10 05:31:54 PM PDT 24 Jun 10 05:47:26 PM PDT 24 3601533897 ps
T172 /workspace/coverage/default/35.sram_ctrl_mem_walk.1031331131 Jun 10 05:31:55 PM PDT 24 Jun 10 05:34:58 PM PDT 24 20662252388 ps
T173 /workspace/coverage/default/17.sram_ctrl_mem_walk.456572167 Jun 10 05:30:51 PM PDT 24 Jun 10 05:33:56 PM PDT 24 38315282565 ps
T129 /workspace/coverage/default/15.sram_ctrl_stress_all.1853197076 Jun 10 05:30:26 PM PDT 24 Jun 10 07:35:09 PM PDT 24 261552325993 ps
T174 /workspace/coverage/default/47.sram_ctrl_executable.541543172 Jun 10 05:33:15 PM PDT 24 Jun 10 05:43:10 PM PDT 24 5275287647 ps
T60 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.8809018 Jun 10 05:30:47 PM PDT 24 Jun 10 05:31:11 PM PDT 24 1161820806 ps
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T176 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.2618989158 Jun 10 05:30:47 PM PDT 24 Jun 10 06:04:29 PM PDT 24 64346717270 ps
T177 /workspace/coverage/default/49.sram_ctrl_smoke.2494130706 Jun 10 05:33:37 PM PDT 24 Jun 10 05:33:48 PM PDT 24 441142036 ps
T178 /workspace/coverage/default/30.sram_ctrl_regwen.2003307078 Jun 10 05:31:17 PM PDT 24 Jun 10 05:51:45 PM PDT 24 22471396603 ps
T179 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3631138028 Jun 10 05:30:25 PM PDT 24 Jun 10 05:30:30 PM PDT 24 945217168 ps
T180 /workspace/coverage/default/13.sram_ctrl_executable.974060517 Jun 10 05:30:56 PM PDT 24 Jun 10 05:37:31 PM PDT 24 20153352849 ps
T181 /workspace/coverage/default/7.sram_ctrl_lc_escalation.999190468 Jun 10 05:30:40 PM PDT 24 Jun 10 05:31:32 PM PDT 24 8858805290 ps
T182 /workspace/coverage/default/47.sram_ctrl_smoke.1906668325 Jun 10 05:33:22 PM PDT 24 Jun 10 05:33:34 PM PDT 24 476053618 ps
T183 /workspace/coverage/default/25.sram_ctrl_bijection.2797108354 Jun 10 05:30:58 PM PDT 24 Jun 10 05:56:09 PM PDT 24 83330692526 ps
T184 /workspace/coverage/default/25.sram_ctrl_ram_cfg.181347181 Jun 10 05:31:01 PM PDT 24 Jun 10 05:31:05 PM PDT 24 1526950380 ps
T185 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3205694130 Jun 10 05:32:19 PM PDT 24 Jun 10 05:38:20 PM PDT 24 24785523415 ps
T186 /workspace/coverage/default/20.sram_ctrl_smoke.330563990 Jun 10 05:30:36 PM PDT 24 Jun 10 05:32:59 PM PDT 24 1309257330 ps
T187 /workspace/coverage/default/11.sram_ctrl_smoke.2620916990 Jun 10 05:30:46 PM PDT 24 Jun 10 05:31:06 PM PDT 24 4746157634 ps
T188 /workspace/coverage/default/8.sram_ctrl_lc_escalation.2602463487 Jun 10 05:30:44 PM PDT 24 Jun 10 05:31:45 PM PDT 24 114105807276 ps
T189 /workspace/coverage/default/30.sram_ctrl_lc_escalation.2547940306 Jun 10 05:31:19 PM PDT 24 Jun 10 05:32:29 PM PDT 24 41983347411 ps
T41 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.2963413875 Jun 10 05:31:50 PM PDT 24 Jun 10 05:34:48 PM PDT 24 20737147734 ps
T190 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2838709795 Jun 10 05:30:24 PM PDT 24 Jun 10 05:31:47 PM PDT 24 2454604419 ps
T191 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1183633775 Jun 10 05:31:06 PM PDT 24 Jun 10 05:44:17 PM PDT 24 45720014683 ps
T192 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.541274811 Jun 10 05:31:27 PM PDT 24 Jun 10 05:39:54 PM PDT 24 47416377532 ps
T193 /workspace/coverage/default/19.sram_ctrl_stress_pipeline.3621635971 Jun 10 05:31:05 PM PDT 24 Jun 10 05:34:26 PM PDT 24 3699083878 ps
T194 /workspace/coverage/default/6.sram_ctrl_max_throughput.1863630187 Jun 10 05:30:04 PM PDT 24 Jun 10 05:30:42 PM PDT 24 720232343 ps
T195 /workspace/coverage/default/39.sram_ctrl_alert_test.898761006 Jun 10 05:32:20 PM PDT 24 Jun 10 05:32:21 PM PDT 24 14485497 ps
T196 /workspace/coverage/default/8.sram_ctrl_stress_all.1514919899 Jun 10 05:30:46 PM PDT 24 Jun 10 06:46:53 PM PDT 24 129850758016 ps
T197 /workspace/coverage/default/37.sram_ctrl_max_throughput.1699565757 Jun 10 05:32:03 PM PDT 24 Jun 10 05:33:05 PM PDT 24 4059692353 ps
T198 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2218260620 Jun 10 05:31:10 PM PDT 24 Jun 10 05:37:55 PM PDT 24 6540810177 ps
T199 /workspace/coverage/default/47.sram_ctrl_alert_test.3110603190 Jun 10 05:33:22 PM PDT 24 Jun 10 05:33:23 PM PDT 24 22418282 ps
T200 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2744178259 Jun 10 05:30:33 PM PDT 24 Jun 10 05:35:55 PM PDT 24 14006534312 ps
T201 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2691762236 Jun 10 05:30:32 PM PDT 24 Jun 10 05:44:30 PM PDT 24 12101356957 ps
T42 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3637765864 Jun 10 05:30:22 PM PDT 24 Jun 10 05:32:25 PM PDT 24 12880820346 ps
T202 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.1379471482 Jun 10 05:32:18 PM PDT 24 Jun 10 05:35:38 PM PDT 24 3619983430 ps
T203 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1749306094 Jun 10 05:30:57 PM PDT 24 Jun 10 05:57:25 PM PDT 24 13487236987 ps
T204 /workspace/coverage/default/34.sram_ctrl_partial_access.3498323233 Jun 10 05:31:51 PM PDT 24 Jun 10 05:32:26 PM PDT 24 3569636387 ps
T205 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.260118783 Jun 10 05:31:13 PM PDT 24 Jun 10 05:36:40 PM PDT 24 5492584533 ps
T206 /workspace/coverage/default/33.sram_ctrl_executable.1679256 Jun 10 05:31:40 PM PDT 24 Jun 10 05:49:14 PM PDT 24 54487877884 ps
T207 /workspace/coverage/default/17.sram_ctrl_bijection.630250705 Jun 10 05:30:47 PM PDT 24 Jun 10 06:19:06 PM PDT 24 330429972333 ps
T61 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3032048921 Jun 10 05:30:57 PM PDT 24 Jun 10 05:31:06 PM PDT 24 210085824 ps
T208 /workspace/coverage/default/33.sram_ctrl_mem_walk.1727613419 Jun 10 05:31:45 PM PDT 24 Jun 10 05:37:10 PM PDT 24 16942370789 ps
T209 /workspace/coverage/default/4.sram_ctrl_stress_all.1803133064 Jun 10 05:30:00 PM PDT 24 Jun 10 06:39:35 PM PDT 24 65807574066 ps
T210 /workspace/coverage/default/45.sram_ctrl_smoke.3209032507 Jun 10 05:32:53 PM PDT 24 Jun 10 05:33:07 PM PDT 24 3701941322 ps
T133 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2254713831 Jun 10 05:32:10 PM PDT 24 Jun 10 05:40:45 PM PDT 24 40712666085 ps
T211 /workspace/coverage/default/46.sram_ctrl_partial_access.833173511 Jun 10 05:33:07 PM PDT 24 Jun 10 05:35:28 PM PDT 24 1312044902 ps
T212 /workspace/coverage/default/44.sram_ctrl_alert_test.960540560 Jun 10 05:32:59 PM PDT 24 Jun 10 05:33:00 PM PDT 24 15115436 ps
T213 /workspace/coverage/default/29.sram_ctrl_stress_all.1750942536 Jun 10 05:31:13 PM PDT 24 Jun 10 06:50:46 PM PDT 24 68677644618 ps
T214 /workspace/coverage/default/38.sram_ctrl_bijection.601159941 Jun 10 05:32:07 PM PDT 24 Jun 10 06:11:44 PM PDT 24 112912090797 ps
T215 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2578998501 Jun 10 05:30:24 PM PDT 24 Jun 10 05:30:32 PM PDT 24 4758278197 ps
T216 /workspace/coverage/default/11.sram_ctrl_alert_test.3934480970 Jun 10 05:30:23 PM PDT 24 Jun 10 05:30:24 PM PDT 24 16657502 ps
T62 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1866873583 Jun 10 05:31:37 PM PDT 24 Jun 10 05:31:56 PM PDT 24 560273294 ps
T217 /workspace/coverage/default/3.sram_ctrl_partial_access.1063354974 Jun 10 05:29:56 PM PDT 24 Jun 10 05:30:04 PM PDT 24 526872909 ps
T218 /workspace/coverage/default/23.sram_ctrl_mem_walk.1443724922 Jun 10 05:31:11 PM PDT 24 Jun 10 05:36:56 PM PDT 24 20690828106 ps
T219 /workspace/coverage/default/6.sram_ctrl_regwen.1944958851 Jun 10 05:30:03 PM PDT 24 Jun 10 05:38:01 PM PDT 24 100349136126 ps
T220 /workspace/coverage/default/18.sram_ctrl_alert_test.2572774516 Jun 10 05:31:09 PM PDT 24 Jun 10 05:31:10 PM PDT 24 35063268 ps
T221 /workspace/coverage/default/49.sram_ctrl_executable.512823768 Jun 10 05:33:39 PM PDT 24 Jun 10 05:35:07 PM PDT 24 1767125822 ps
T222 /workspace/coverage/default/14.sram_ctrl_max_throughput.52009901 Jun 10 05:30:24 PM PDT 24 Jun 10 05:32:48 PM PDT 24 3177540214 ps
T223 /workspace/coverage/default/15.sram_ctrl_partial_access.412373147 Jun 10 05:30:23 PM PDT 24 Jun 10 05:30:54 PM PDT 24 16218308083 ps
T224 /workspace/coverage/default/9.sram_ctrl_stress_all.3205750060 Jun 10 05:30:42 PM PDT 24 Jun 10 06:28:08 PM PDT 24 130000169626 ps
T225 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3759015417 Jun 10 05:30:21 PM PDT 24 Jun 10 05:30:58 PM PDT 24 769825882 ps
T226 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1499784086 Jun 10 05:30:56 PM PDT 24 Jun 10 05:31:29 PM PDT 24 18219552003 ps
T227 /workspace/coverage/default/10.sram_ctrl_mem_walk.3309723305 Jun 10 05:30:46 PM PDT 24 Jun 10 05:36:45 PM PDT 24 21112508905 ps
T228 /workspace/coverage/default/45.sram_ctrl_mem_walk.2774825687 Jun 10 05:33:01 PM PDT 24 Jun 10 05:35:26 PM PDT 24 2642277011 ps
T229 /workspace/coverage/default/48.sram_ctrl_mem_walk.3504100103 Jun 10 05:33:28 PM PDT 24 Jun 10 05:35:36 PM PDT 24 2083409318 ps
T230 /workspace/coverage/default/16.sram_ctrl_max_throughput.3785278011 Jun 10 05:30:27 PM PDT 24 Jun 10 05:31:29 PM PDT 24 3092512158 ps
T231 /workspace/coverage/default/12.sram_ctrl_bijection.3304859260 Jun 10 05:30:23 PM PDT 24 Jun 10 05:56:25 PM PDT 24 545117944612 ps
T232 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3886919617 Jun 10 05:31:40 PM PDT 24 Jun 10 05:31:44 PM PDT 24 433785886 ps
T233 /workspace/coverage/default/9.sram_ctrl_executable.2586232010 Jun 10 05:30:37 PM PDT 24 Jun 10 05:34:28 PM PDT 24 12722339797 ps
T234 /workspace/coverage/default/38.sram_ctrl_executable.2632999647 Jun 10 05:32:11 PM PDT 24 Jun 10 06:02:42 PM PDT 24 9753416048 ps
T235 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.413723028 Jun 10 05:30:37 PM PDT 24 Jun 10 05:33:06 PM PDT 24 3456465176 ps
T236 /workspace/coverage/default/25.sram_ctrl_partial_access.2257934281 Jun 10 05:30:53 PM PDT 24 Jun 10 05:31:02 PM PDT 24 810745716 ps
T237 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2670665113 Jun 10 05:31:06 PM PDT 24 Jun 10 05:37:57 PM PDT 24 15988846909 ps
T238 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2773921027 Jun 10 05:29:54 PM PDT 24 Jun 10 05:30:41 PM PDT 24 2964057791 ps
T63 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1519080933 Jun 10 05:33:30 PM PDT 24 Jun 10 05:33:41 PM PDT 24 302415245 ps
T239 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2591787681 Jun 10 05:30:29 PM PDT 24 Jun 10 05:31:06 PM PDT 24 7527396522 ps
T240 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1221266392 Jun 10 05:29:58 PM PDT 24 Jun 10 05:46:21 PM PDT 24 68683487648 ps
T241 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3610460119 Jun 10 05:30:05 PM PDT 24 Jun 10 05:30:12 PM PDT 24 3066725019 ps
T242 /workspace/coverage/default/22.sram_ctrl_ram_cfg.1046176514 Jun 10 05:30:47 PM PDT 24 Jun 10 05:30:52 PM PDT 24 788124893 ps
T243 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3801981528 Jun 10 05:31:14 PM PDT 24 Jun 10 05:31:18 PM PDT 24 1344540324 ps
T244 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.927428615 Jun 10 05:32:42 PM PDT 24 Jun 10 05:44:39 PM PDT 24 129724200959 ps
T245 /workspace/coverage/default/10.sram_ctrl_partial_access.1368172289 Jun 10 05:30:47 PM PDT 24 Jun 10 05:31:20 PM PDT 24 727313269 ps
T246 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.495341274 Jun 10 05:30:12 PM PDT 24 Jun 10 05:42:56 PM PDT 24 11456454784 ps
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T248 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3965398462 Jun 10 05:30:34 PM PDT 24 Jun 10 05:35:36 PM PDT 24 8804803920 ps
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T251 /workspace/coverage/default/47.sram_ctrl_partial_access.2947947040 Jun 10 05:33:14 PM PDT 24 Jun 10 05:33:32 PM PDT 24 409102229 ps
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T31 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3193490749 Jun 10 05:31:51 PM PDT 24 Jun 10 05:32:52 PM PDT 24 16157583896 ps
T253 /workspace/coverage/default/45.sram_ctrl_bijection.4247550498 Jun 10 05:32:59 PM PDT 24 Jun 10 06:01:14 PM PDT 24 150580006497 ps
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T255 /workspace/coverage/default/38.sram_ctrl_lc_escalation.1336325887 Jun 10 05:32:07 PM PDT 24 Jun 10 05:33:30 PM PDT 24 97120596006 ps
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T270 /workspace/coverage/default/41.sram_ctrl_lc_escalation.628691469 Jun 10 05:32:36 PM PDT 24 Jun 10 05:33:11 PM PDT 24 39185209523 ps
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T273 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.1234904064 Jun 10 05:30:55 PM PDT 24 Jun 10 05:32:18 PM PDT 24 5599324370 ps
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T290 /workspace/coverage/default/43.sram_ctrl_lc_escalation.1935255063 Jun 10 05:32:50 PM PDT 24 Jun 10 05:33:40 PM PDT 24 8275505760 ps
T291 /workspace/coverage/default/19.sram_ctrl_bijection.3480744551 Jun 10 05:30:31 PM PDT 24 Jun 10 05:48:25 PM PDT 24 63583476623 ps
T292 /workspace/coverage/default/16.sram_ctrl_ram_cfg.857553143 Jun 10 05:31:04 PM PDT 24 Jun 10 05:31:07 PM PDT 24 348794173 ps
T293 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.2659822614 Jun 10 05:31:27 PM PDT 24 Jun 10 05:32:31 PM PDT 24 992169599 ps
T294 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3331480229 Jun 10 05:29:54 PM PDT 24 Jun 10 05:48:16 PM PDT 24 10275698796 ps
T295 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1696296313 Jun 10 05:29:54 PM PDT 24 Jun 10 05:30:01 PM PDT 24 3043838264 ps
T296 /workspace/coverage/default/15.sram_ctrl_max_throughput.4147927430 Jun 10 05:30:49 PM PDT 24 Jun 10 05:31:00 PM PDT 24 6660140955 ps
T297 /workspace/coverage/default/42.sram_ctrl_bijection.3154967761 Jun 10 05:32:38 PM PDT 24 Jun 10 05:57:38 PM PDT 24 54301489616 ps
T298 /workspace/coverage/default/36.sram_ctrl_partial_access.1218973827 Jun 10 05:32:06 PM PDT 24 Jun 10 05:32:16 PM PDT 24 3365772066 ps
T299 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3058316030 Jun 10 05:30:04 PM PDT 24 Jun 10 05:41:47 PM PDT 24 6904791254 ps
T300 /workspace/coverage/default/5.sram_ctrl_ram_cfg.2338895014 Jun 10 05:30:04 PM PDT 24 Jun 10 05:30:07 PM PDT 24 2593545757 ps
T301 /workspace/coverage/default/49.sram_ctrl_ram_cfg.2319729819 Jun 10 05:33:36 PM PDT 24 Jun 10 05:33:40 PM PDT 24 682378697 ps
T302 /workspace/coverage/default/4.sram_ctrl_mem_walk.4217099763 Jun 10 05:29:59 PM PDT 24 Jun 10 05:32:32 PM PDT 24 6740427794 ps
T303 /workspace/coverage/default/7.sram_ctrl_mem_walk.3208521820 Jun 10 05:30:06 PM PDT 24 Jun 10 05:32:18 PM PDT 24 4027992327 ps
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