Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.97	99.19	94.27	99.72	100.00	96.03	99.12	97.44

Total tests in report: 1034

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
75.60	75.60	93.05	93.05	76.18	76.18	86.71	86.71	33.33	33.33	85.07	85.07	93.27	93.27	61.61	61.61	/workspace/coverage/default/9.sram_ctrl_stress_all.529417442
93.00	17.40	98.45	5.40	87.68	11.49	96.14	9.44	95.24	61.90	94.08	9.00	95.18	1.90	84.28	22.67	/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1670580612
93.98	0.97	98.61	0.16	88.27	0.59	96.35	0.21	95.24	0.00	94.79	0.71	95.18	0.00	89.40	5.12	/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2399521158
94.85	0.87	98.69	0.08	88.27	0.00	96.35	0.00	100.00	4.76	95.02	0.24	96.20	1.02	89.40	0.00	/workspace/coverage/default/23.sram_ctrl_mem_partial_access.2513964608
95.47	0.63	98.94	0.25	88.27	0.00	96.35	0.00	100.00	0.00	95.50	0.47	96.20	0.00	93.05	3.66	/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3535182768
96.08	0.61	99.10	0.16	90.28	2.01	96.76	0.41	100.00	0.00	96.21	0.71	96.78	0.58	93.42	0.37	/workspace/coverage/default/0.sram_ctrl_sec_cm.3808607762
96.51	0.43	99.10	0.00	90.28	0.00	98.42	1.65	100.00	0.00	96.21	0.00	97.08	0.29	94.52	1.10	/workspace/coverage/default/49.sram_ctrl_stress_all.743601601
96.73	0.21	99.10	0.00	90.64	0.36	98.83	0.41	100.00	0.00	96.21	0.00	97.08	0.00	95.25	0.73	/workspace/coverage/default/10.sram_ctrl_alert_test.3580038719
96.94	0.21	99.10	0.00	90.88	0.24	98.90	0.07	100.00	0.00	96.21	0.00	98.25	1.17	95.25	0.00	/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2201461104
97.07	0.13	99.18	0.08	90.88	0.00	99.72	0.83	100.00	0.00	96.21	0.00	98.25	0.00	95.25	0.00	/workspace/coverage/default/13.sram_ctrl_ram_cfg.875629305
97.17	0.10	99.18	0.00	90.88	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.25	0.00	95.98	0.73	/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3516351266
97.28	0.10	99.18	0.00	90.88	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.73	95.98	0.00	/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4027600219
97.36	0.08	99.18	0.00	90.88	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	96.53	0.55	/workspace/coverage/default/27.sram_ctrl_stress_all.2924999959
97.41	0.05	99.18	0.00	90.88	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	96.89	0.37	/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.219767792
97.45	0.04	99.18	0.00	91.00	0.12	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	97.07	0.18	/workspace/coverage/default/15.sram_ctrl_lc_escalation.3663582047
97.48	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	97.26	0.18	/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3088015783
97.50	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.98	0.00	97.44	0.18	/workspace/coverage/default/12.sram_ctrl_stress_all.3025017953
97.52	0.02	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.15	97.44	0.00	/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1556099426

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1791690744
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3622741695
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1532115811
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3095241282
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1277774230
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2517718092
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2872517697
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4030611780
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3045666037
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2223908454
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3188847358
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2020681459
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.660888832
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2320878607
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2531920500
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.387881249
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2963534333
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1603042278
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1787631016
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2388519961
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1334621850
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3262898451
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1682522979
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1419712336
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.678342132
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.960763093
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1678740855
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1504876844
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1172294096
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1780057889
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3140319592
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3763110255
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3968158742
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4126810846
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2569461246
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1008379674
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2475719037
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1082870960
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2321198246
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2749064163
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2451692014
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.431258287
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3202179684
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.994116820
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4152453520
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2458695550
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.90516063
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2910375637
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.200461981
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.976725302
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1736813500
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3449581570
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.4169436194
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2584333679
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4070874707
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4089345032
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2161337497
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4138256783
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.183545786
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1983207502
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3797214107
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1684647501
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.776880660
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3220780889
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2938329748
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2653899117
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.58726340
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3563539726
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3134109111
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3792836551
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.20003573
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.311224868
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2877211021
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2063056514
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3961797723
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3831398288
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1411498318
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3575387004
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.744660172
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.635547996
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.4018619198
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1297062818
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1829670607
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4032311349
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3264238082
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3699969382
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.4284035183
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2443401964
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3254252179
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.884665745
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4134782048
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2476273131
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1666596974
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4031361702
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2455478511
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3922707956
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4274104018
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.586476886
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3174093069
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2981139289
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2777679206
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1353576801
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3501641733
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1851709792
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.853740277
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3545583573
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.682160708
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2441991236
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.4259050363
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1139258589
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2106094726
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1529675367
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3156426191
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.170340358
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2143640648
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.478847719
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.327359896
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3053187088
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3552661603
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1424169661
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2044837988
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3596641572
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2858440464
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4022250148
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1131440017
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.693273532
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2173700526
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2994129449
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2113774635
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.93742075
/workspace/coverage/default/0.sram_ctrl_alert_test.4275747798
/workspace/coverage/default/0.sram_ctrl_bijection.2527639961
/workspace/coverage/default/0.sram_ctrl_executable.3952251320
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1685708114
/workspace/coverage/default/0.sram_ctrl_max_throughput.3565251899
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1446010736
/workspace/coverage/default/0.sram_ctrl_mem_walk.2210629848
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3173016348
/workspace/coverage/default/0.sram_ctrl_partial_access.1169670939
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2307948168
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1379301362
/workspace/coverage/default/0.sram_ctrl_regwen.3025690861
/workspace/coverage/default/0.sram_ctrl_smoke.3915397019
/workspace/coverage/default/0.sram_ctrl_stress_all.2517203669
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.4223222686
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4095858546
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3560978011
/workspace/coverage/default/1.sram_ctrl_alert_test.1526888013
/workspace/coverage/default/1.sram_ctrl_bijection.4082590025
/workspace/coverage/default/1.sram_ctrl_executable.154969980
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2457274679
/workspace/coverage/default/1.sram_ctrl_max_throughput.3274692050
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1377340245
/workspace/coverage/default/1.sram_ctrl_mem_walk.1265479233
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3889069376
/workspace/coverage/default/1.sram_ctrl_partial_access.642483212
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3549163489
/workspace/coverage/default/1.sram_ctrl_regwen.731341958
/workspace/coverage/default/1.sram_ctrl_sec_cm.2921099941
/workspace/coverage/default/1.sram_ctrl_smoke.1923138197
/workspace/coverage/default/1.sram_ctrl_stress_all.218919854
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1288803424
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1918442077
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3495435122
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.812803053
/workspace/coverage/default/10.sram_ctrl_bijection.3385238698
/workspace/coverage/default/10.sram_ctrl_executable.1117083712
/workspace/coverage/default/10.sram_ctrl_lc_escalation.442089880
/workspace/coverage/default/10.sram_ctrl_max_throughput.2191797421
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1568212708
/workspace/coverage/default/10.sram_ctrl_mem_walk.1888917387
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2104856557
/workspace/coverage/default/10.sram_ctrl_partial_access.4074792817
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1831378100
/workspace/coverage/default/10.sram_ctrl_ram_cfg.4090108851
/workspace/coverage/default/10.sram_ctrl_regwen.93819470
/workspace/coverage/default/10.sram_ctrl_smoke.121840150
/workspace/coverage/default/10.sram_ctrl_stress_all.1463052756
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4281527274
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2774825026
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.69499056
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1965241585
/workspace/coverage/default/11.sram_ctrl_alert_test.3557739824
/workspace/coverage/default/11.sram_ctrl_bijection.2183365848
/workspace/coverage/default/11.sram_ctrl_executable.4197292199
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1781062766
/workspace/coverage/default/11.sram_ctrl_max_throughput.345914043
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2591146365
/workspace/coverage/default/11.sram_ctrl_mem_walk.2399322745
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1864355515
/workspace/coverage/default/11.sram_ctrl_partial_access.3937299322
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3068134196
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3857392336
/workspace/coverage/default/11.sram_ctrl_regwen.2981340572
/workspace/coverage/default/11.sram_ctrl_smoke.1091267914
/workspace/coverage/default/11.sram_ctrl_stress_all.3508065377
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.90633968
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/workspace/coverage/default/42.sram_ctrl_partial_access.1666878829
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.963935309
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2665841273
/workspace/coverage/default/42.sram_ctrl_regwen.32883308
/workspace/coverage/default/42.sram_ctrl_smoke.3532262482
/workspace/coverage/default/42.sram_ctrl_stress_all.1871378975
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3175757966
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1382061444
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1292715413
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.420078725
/workspace/coverage/default/43.sram_ctrl_alert_test.1686161602
/workspace/coverage/default/43.sram_ctrl_bijection.1815965575
/workspace/coverage/default/43.sram_ctrl_executable.1755783930
/workspace/coverage/default/43.sram_ctrl_lc_escalation.917885796
/workspace/coverage/default/43.sram_ctrl_max_throughput.1793509811
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2829158057
/workspace/coverage/default/43.sram_ctrl_mem_walk.1669693878
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2339404839
/workspace/coverage/default/43.sram_ctrl_partial_access.93469520
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3044587039
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3884667974
/workspace/coverage/default/43.sram_ctrl_regwen.3074532446
/workspace/coverage/default/43.sram_ctrl_smoke.3122854294
/workspace/coverage/default/43.sram_ctrl_stress_all.1519775728
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2747536171
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3689849165
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.745021716
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4233969075
/workspace/coverage/default/44.sram_ctrl_alert_test.3389420723
/workspace/coverage/default/44.sram_ctrl_bijection.2493482287
/workspace/coverage/default/44.sram_ctrl_executable.3370340094
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3643838923
/workspace/coverage/default/44.sram_ctrl_max_throughput.4207246959
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2138317701
/workspace/coverage/default/44.sram_ctrl_mem_walk.3194049990
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3968541533
/workspace/coverage/default/44.sram_ctrl_partial_access.678467952
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3800595093
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2627589274
/workspace/coverage/default/44.sram_ctrl_regwen.4126616974
/workspace/coverage/default/44.sram_ctrl_smoke.4288074178
/workspace/coverage/default/44.sram_ctrl_stress_all.2945655247
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3870874621
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3446804044
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1754264085
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1930240735
/workspace/coverage/default/45.sram_ctrl_alert_test.481973253
/workspace/coverage/default/45.sram_ctrl_bijection.3597317901
/workspace/coverage/default/45.sram_ctrl_executable.2606680306
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2163752990
/workspace/coverage/default/45.sram_ctrl_max_throughput.2700793296
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1494601516
/workspace/coverage/default/45.sram_ctrl_mem_walk.2569221035
/workspace/coverage/default/45.sram_ctrl_multiple_keys.317693860
/workspace/coverage/default/45.sram_ctrl_partial_access.782968789
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3945570926
/workspace/coverage/default/45.sram_ctrl_ram_cfg.871405207
/workspace/coverage/default/45.sram_ctrl_regwen.1098068636
/workspace/coverage/default/45.sram_ctrl_smoke.1488553618
/workspace/coverage/default/45.sram_ctrl_stress_all.3734952692
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.744160939
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1872707443
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2457782956
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3763068203
/workspace/coverage/default/46.sram_ctrl_alert_test.1304749434
/workspace/coverage/default/46.sram_ctrl_bijection.1789111794
/workspace/coverage/default/46.sram_ctrl_executable.2168786431
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3937162872
/workspace/coverage/default/46.sram_ctrl_max_throughput.10480034
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1480746017
/workspace/coverage/default/46.sram_ctrl_mem_walk.870573835
/workspace/coverage/default/46.sram_ctrl_multiple_keys.132677056
/workspace/coverage/default/46.sram_ctrl_partial_access.561572579
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.426976973
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2745332829
/workspace/coverage/default/46.sram_ctrl_regwen.1493479389
/workspace/coverage/default/46.sram_ctrl_smoke.2000602877
/workspace/coverage/default/46.sram_ctrl_stress_all.1461118725
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3295129285
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.141709504
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2411474367
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.4134712050
/workspace/coverage/default/47.sram_ctrl_alert_test.2277520062
/workspace/coverage/default/47.sram_ctrl_bijection.3209302456
/workspace/coverage/default/47.sram_ctrl_executable.2926544213
/workspace/coverage/default/47.sram_ctrl_lc_escalation.4234185080
/workspace/coverage/default/47.sram_ctrl_max_throughput.4004234709
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3796164804
/workspace/coverage/default/47.sram_ctrl_mem_walk.2154742758
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2021458794
/workspace/coverage/default/47.sram_ctrl_partial_access.2224110944
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3147309713
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2255587600
/workspace/coverage/default/47.sram_ctrl_regwen.2539831409
/workspace/coverage/default/47.sram_ctrl_smoke.1795469209
/workspace/coverage/default/47.sram_ctrl_stress_all.2126202191
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.991168173
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2870962068
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3796688588
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1287252071
/workspace/coverage/default/48.sram_ctrl_alert_test.3341583879
/workspace/coverage/default/48.sram_ctrl_bijection.3191408362
/workspace/coverage/default/48.sram_ctrl_executable.773777020
/workspace/coverage/default/48.sram_ctrl_lc_escalation.439190156
/workspace/coverage/default/48.sram_ctrl_max_throughput.2756393257
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3973439246
/workspace/coverage/default/48.sram_ctrl_mem_walk.1896961226
/workspace/coverage/default/48.sram_ctrl_multiple_keys.631414534
/workspace/coverage/default/48.sram_ctrl_partial_access.2812025955
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.301559136
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2467905259
/workspace/coverage/default/48.sram_ctrl_regwen.3857588346
/workspace/coverage/default/48.sram_ctrl_smoke.3290548601
/workspace/coverage/default/48.sram_ctrl_stress_all.2336761201
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1388586329
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.952218318
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3923501169
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1258768684
/workspace/coverage/default/49.sram_ctrl_alert_test.4262543769
/workspace/coverage/default/49.sram_ctrl_bijection.410056079
/workspace/coverage/default/49.sram_ctrl_executable.3368669231
/workspace/coverage/default/49.sram_ctrl_lc_escalation.214656208
/workspace/coverage/default/49.sram_ctrl_max_throughput.3383466493
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1553340113
/workspace/coverage/default/49.sram_ctrl_mem_walk.3032424200
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1880155479
/workspace/coverage/default/49.sram_ctrl_partial_access.3424498713
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1800935770
/workspace/coverage/default/49.sram_ctrl_ram_cfg.410996824
/workspace/coverage/default/49.sram_ctrl_regwen.1033855173
/workspace/coverage/default/49.sram_ctrl_smoke.3500719826
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1404206811
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2266278165
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.164304853
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1768047210
/workspace/coverage/default/5.sram_ctrl_alert_test.3310259378
/workspace/coverage/default/5.sram_ctrl_bijection.3170018520
/workspace/coverage/default/5.sram_ctrl_executable.2738166403
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3087469127
/workspace/coverage/default/5.sram_ctrl_max_throughput.1960402253
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3646169855
/workspace/coverage/default/5.sram_ctrl_mem_walk.3187731463
/workspace/coverage/default/5.sram_ctrl_multiple_keys.774022331
/workspace/coverage/default/5.sram_ctrl_partial_access.2473371394
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2081095952
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2449177599
/workspace/coverage/default/5.sram_ctrl_regwen.631328087
/workspace/coverage/default/5.sram_ctrl_smoke.514633374
/workspace/coverage/default/5.sram_ctrl_stress_all.1649600218
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3326561585
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.993380655
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2737923785
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1414704530
/workspace/coverage/default/6.sram_ctrl_alert_test.714676629
/workspace/coverage/default/6.sram_ctrl_bijection.2179042930
/workspace/coverage/default/6.sram_ctrl_executable.338066852
/workspace/coverage/default/6.sram_ctrl_lc_escalation.378931773
/workspace/coverage/default/6.sram_ctrl_max_throughput.231263472
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3895559643
/workspace/coverage/default/6.sram_ctrl_mem_walk.797172138
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3131613472
/workspace/coverage/default/6.sram_ctrl_partial_access.1043789619
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.283607418
/workspace/coverage/default/6.sram_ctrl_ram_cfg.4048999751
/workspace/coverage/default/6.sram_ctrl_regwen.792933239
/workspace/coverage/default/6.sram_ctrl_smoke.220841408
/workspace/coverage/default/6.sram_ctrl_stress_all.2163176947
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1030894559
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2757612067
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3379459375
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2893539918
/workspace/coverage/default/7.sram_ctrl_alert_test.526808024
/workspace/coverage/default/7.sram_ctrl_bijection.1753311361
/workspace/coverage/default/7.sram_ctrl_executable.3267406134
/workspace/coverage/default/7.sram_ctrl_lc_escalation.810181839
/workspace/coverage/default/7.sram_ctrl_max_throughput.2729919978
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1292068156
/workspace/coverage/default/7.sram_ctrl_mem_walk.1456044014
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3896428049
/workspace/coverage/default/7.sram_ctrl_partial_access.496089114
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.52824053
/workspace/coverage/default/7.sram_ctrl_ram_cfg.102625562
/workspace/coverage/default/7.sram_ctrl_regwen.1057782733
/workspace/coverage/default/7.sram_ctrl_smoke.4293041356
/workspace/coverage/default/7.sram_ctrl_stress_all.1635163361
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3474323305
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1545441771
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1231714082
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.4031090237
/workspace/coverage/default/8.sram_ctrl_alert_test.891755694
/workspace/coverage/default/8.sram_ctrl_bijection.1765981822
/workspace/coverage/default/8.sram_ctrl_executable.3856915372
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3685152975
/workspace/coverage/default/8.sram_ctrl_max_throughput.2647266449
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2550755493
/workspace/coverage/default/8.sram_ctrl_mem_walk.1776338338
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1302024528
/workspace/coverage/default/8.sram_ctrl_partial_access.1263706076
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2057320547
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1540828353
/workspace/coverage/default/8.sram_ctrl_regwen.2460003598
/workspace/coverage/default/8.sram_ctrl_smoke.1353870746
/workspace/coverage/default/8.sram_ctrl_stress_all.2770497830
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2489285238
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3414667864
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1072458908
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4054970046
/workspace/coverage/default/9.sram_ctrl_alert_test.4262692274
/workspace/coverage/default/9.sram_ctrl_bijection.4181359549
/workspace/coverage/default/9.sram_ctrl_executable.2428610635
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3214494048
/workspace/coverage/default/9.sram_ctrl_max_throughput.1977449022
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2133716302
/workspace/coverage/default/9.sram_ctrl_mem_walk.1837880110
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1250448199
/workspace/coverage/default/9.sram_ctrl_partial_access.780509116
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.119837547
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3338939862
/workspace/coverage/default/9.sram_ctrl_regwen.245539400
/workspace/coverage/default/9.sram_ctrl_smoke.3731676283
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.6165526
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2808210964
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2875307474

Total test records in report: 1034

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/16.sram_ctrl_smoke.1605324451	Jun 27 06:49:51 PM PDT 24	Jun 27 06:50:13 PM PDT 24	3481759048 ps
T2	/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2724438388	Jun 27 06:54:53 PM PDT 24	Jun 27 06:58:50 PM PDT 24	4276363693 ps
T3	/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.2616697942	Jun 27 06:51:05 PM PDT 24	Jun 27 06:52:13 PM PDT 24	9182142176 ps
T4	/workspace/coverage/default/9.sram_ctrl_stress_all.529417442	Jun 27 06:49:40 PM PDT 24	Jun 27 08:26:36 PM PDT 24	431707204267 ps
T8	/workspace/coverage/default/38.sram_ctrl_alert_test.2165731299	Jun 27 06:54:26 PM PDT 24	Jun 27 06:54:28 PM PDT 24	37775234 ps
T5	/workspace/coverage/default/1.sram_ctrl_executable.154969980	Jun 27 06:48:59 PM PDT 24	Jun 27 07:00:18 PM PDT 24	43367642615 ps
T9	/workspace/coverage/default/26.sram_ctrl_ram_cfg.127098749	Jun 27 06:51:40 PM PDT 24	Jun 27 06:51:46 PM PDT 24	1413475531 ps
T10	/workspace/coverage/default/14.sram_ctrl_max_throughput.3115111018	Jun 27 06:49:48 PM PDT 24	Jun 27 06:50:00 PM PDT 24	676798703 ps
T11	/workspace/coverage/default/37.sram_ctrl_smoke.1227111928	Jun 27 06:53:52 PM PDT 24	Jun 27 06:54:02 PM PDT 24	3254903629 ps
T6	/workspace/coverage/default/49.sram_ctrl_stress_all.743601601	Jun 27 06:56:42 PM PDT 24	Jun 27 08:47:14 PM PDT 24	219689979346 ps
T37	/workspace/coverage/default/14.sram_ctrl_executable.2578516987	Jun 27 06:49:54 PM PDT 24	Jun 27 06:57:40 PM PDT 24	3798625059 ps
T7	/workspace/coverage/default/10.sram_ctrl_stress_all.1463052756	Jun 27 06:49:39 PM PDT 24	Jun 27 07:38:01 PM PDT 24	416932762820 ps
T72	/workspace/coverage/default/13.sram_ctrl_max_throughput.559412322	Jun 27 06:49:43 PM PDT 24	Jun 27 06:51:14 PM PDT 24	3079774688 ps
T39	/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3964216132	Jun 27 06:51:55 PM PDT 24	Jun 27 06:55:17 PM PDT 24	3569575171 ps
T21	/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.301633694	Jun 27 06:50:22 PM PDT 24	Jun 27 06:50:39 PM PDT 24	335586574 ps
T78	/workspace/coverage/default/44.sram_ctrl_max_throughput.4207246959	Jun 27 06:55:31 PM PDT 24	Jun 27 06:55:59 PM PDT 24	3077071974 ps
T24	/workspace/coverage/default/20.sram_ctrl_ram_cfg.3612590427	Jun 27 06:50:36 PM PDT 24	Jun 27 06:50:44 PM PDT 24	1354191334 ps
T79	/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3039065933	Jun 27 06:49:49 PM PDT 24	Jun 27 06:50:15 PM PDT 24	738668306 ps
T68	/workspace/coverage/default/27.sram_ctrl_stress_all.2924999959	Jun 27 06:51:55 PM PDT 24	Jun 27 08:23:39 PM PDT 24	284701444180 ps
T38	/workspace/coverage/default/4.sram_ctrl_mem_walk.3989191721	Jun 27 06:49:26 PM PDT 24	Jun 27 06:55:12 PM PDT 24	18544280120 ps
T18	/workspace/coverage/default/31.sram_ctrl_stress_all.12936510	Jun 27 06:52:49 PM PDT 24	Jun 27 07:22:05 PM PDT 24	31476830170 ps
T20	/workspace/coverage/default/25.sram_ctrl_stress_all.1643703586	Jun 27 06:51:30 PM PDT 24	Jun 27 07:31:40 PM PDT 24	85651286052 ps
T56	/workspace/coverage/default/29.sram_ctrl_multiple_keys.3839547174	Jun 27 06:52:06 PM PDT 24	Jun 27 07:11:22 PM PDT 24	39495040615 ps
T22	/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1670580612	Jun 27 06:48:59 PM PDT 24	Jun 27 06:50:46 PM PDT 24	2078932991 ps
T57	/workspace/coverage/default/19.sram_ctrl_smoke.4033757229	Jun 27 06:50:34 PM PDT 24	Jun 27 06:50:56 PM PDT 24	844483775 ps
T58	/workspace/coverage/default/43.sram_ctrl_smoke.3122854294	Jun 27 06:55:08 PM PDT 24	Jun 27 06:55:40 PM PDT 24	1530006907 ps
T59	/workspace/coverage/default/42.sram_ctrl_executable.1581482248	Jun 27 06:55:06 PM PDT 24	Jun 27 07:02:12 PM PDT 24	5276368334 ps
T12	/workspace/coverage/default/21.sram_ctrl_alert_test.4049424457	Jun 27 06:50:51 PM PDT 24	Jun 27 06:50:54 PM PDT 24	86976568 ps
T43	/workspace/coverage/default/35.sram_ctrl_mem_walk.2424234758	Jun 27 06:53:40 PM PDT 24	Jun 27 06:58:56 PM PDT 24	57634164430 ps
T23	/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3478781030	Jun 27 06:51:17 PM PDT 24	Jun 27 06:51:32 PM PDT 24	206406963 ps
T51	/workspace/coverage/default/38.sram_ctrl_mem_walk.1801938958	Jun 27 06:54:27 PM PDT 24	Jun 27 06:57:22 PM PDT 24	31429442212 ps
T64	/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3511826035	Jun 27 06:52:21 PM PDT 24	Jun 27 06:52:39 PM PDT 24	1374414563 ps
T40	/workspace/coverage/default/18.sram_ctrl_access_during_key_req.1634995458	Jun 27 06:50:22 PM PDT 24	Jun 27 07:04:41 PM PDT 24	11878806167 ps
T52	/workspace/coverage/default/7.sram_ctrl_mem_walk.1456044014	Jun 27 06:49:28 PM PDT 24	Jun 27 06:55:18 PM PDT 24	106563629230 ps
T91	/workspace/coverage/default/10.sram_ctrl_executable.1117083712	Jun 27 06:49:41 PM PDT 24	Jun 27 07:08:41 PM PDT 24	24660900406 ps
T92	/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.758840493	Jun 27 06:54:14 PM PDT 24	Jun 27 06:54:22 PM PDT 24	678393644 ps
T19	/workspace/coverage/default/6.sram_ctrl_regwen.792933239	Jun 27 06:49:29 PM PDT 24	Jun 27 07:02:13 PM PDT 24	8054487065 ps
T53	/workspace/coverage/default/29.sram_ctrl_mem_walk.699417605	Jun 27 06:52:18 PM PDT 24	Jun 27 06:54:54 PM PDT 24	13841326106 ps
T41	/workspace/coverage/default/14.sram_ctrl_access_during_key_req.958751375	Jun 27 06:49:49 PM PDT 24	Jun 27 07:19:52 PM PDT 24	75998854662 ps
T93	/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3833347366	Jun 27 06:50:23 PM PDT 24	Jun 27 06:53:24 PM PDT 24	3151287447 ps
T94	/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3535182768	Jun 27 06:48:59 PM PDT 24	Jun 27 06:53:48 PM PDT 24	13348216762 ps
T54	/workspace/coverage/default/34.sram_ctrl_mem_walk.4015902289	Jun 27 06:53:26 PM PDT 24	Jun 27 06:56:16 PM PDT 24	28785480016 ps
T160	/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3260760533	Jun 27 06:54:53 PM PDT 24	Jun 27 06:56:55 PM PDT 24	1589113944 ps
T161	/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.4251041264	Jun 27 06:50:01 PM PDT 24	Jun 27 06:50:53 PM PDT 24	1502392220 ps
T80	/workspace/coverage/default/41.sram_ctrl_lc_escalation.3953351584	Jun 27 06:54:54 PM PDT 24	Jun 27 06:55:54 PM PDT 24	9671142220 ps
T73	/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.767780314	Jun 27 06:53:00 PM PDT 24	Jun 27 06:53:09 PM PDT 24	836986480 ps
T137	/workspace/coverage/default/11.sram_ctrl_mem_walk.2399322745	Jun 27 06:49:38 PM PDT 24	Jun 27 06:51:58 PM PDT 24	4033569009 ps
T138	/workspace/coverage/default/25.sram_ctrl_max_throughput.988388630	Jun 27 06:51:23 PM PDT 24	Jun 27 06:51:31 PM PDT 24	680476063 ps
T139	/workspace/coverage/default/16.sram_ctrl_max_throughput.3318083829	Jun 27 06:50:04 PM PDT 24	Jun 27 06:50:17 PM PDT 24	1647110429 ps
T81	/workspace/coverage/default/36.sram_ctrl_lc_escalation.738225391	Jun 27 06:53:40 PM PDT 24	Jun 27 06:54:17 PM PDT 24	24806137819 ps
T117	/workspace/coverage/default/34.sram_ctrl_stress_pipeline.1549278567	Jun 27 06:53:10 PM PDT 24	Jun 27 06:58:05 PM PDT 24	4847588484 ps
T14	/workspace/coverage/default/5.sram_ctrl_alert_test.3310259378	Jun 27 06:49:27 PM PDT 24	Jun 27 06:49:32 PM PDT 24	23119936 ps
T98	/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2171733946	Jun 27 06:53:12 PM PDT 24	Jun 27 06:54:36 PM PDT 24	8988610288 ps
T140	/workspace/coverage/default/10.sram_ctrl_partial_access.4074792817	Jun 27 06:49:42 PM PDT 24	Jun 27 06:50:05 PM PDT 24	2510747583 ps
T82	/workspace/coverage/default/3.sram_ctrl_regwen.2503912466	Jun 27 06:49:16 PM PDT 24	Jun 27 06:53:38 PM PDT 24	7558524884 ps
T13	/workspace/coverage/default/10.sram_ctrl_alert_test.3580038719	Jun 27 06:49:44 PM PDT 24	Jun 27 06:49:50 PM PDT 24	38524573 ps
T162	/workspace/coverage/default/22.sram_ctrl_max_throughput.2211356435	Jun 27 06:50:55 PM PDT 24	Jun 27 06:53:55 PM PDT 24	3181681861 ps
T99	/workspace/coverage/default/41.sram_ctrl_mem_partial_access.2950977026	Jun 27 06:54:58 PM PDT 24	Jun 27 06:56:03 PM PDT 24	3862524785 ps
T163	/workspace/coverage/default/19.sram_ctrl_multiple_keys.2776457710	Jun 27 06:50:35 PM PDT 24	Jun 27 07:08:05 PM PDT 24	13401928864 ps
T164	/workspace/coverage/default/11.sram_ctrl_smoke.1091267914	Jun 27 06:49:39 PM PDT 24	Jun 27 06:49:48 PM PDT 24	1481900091 ps
T42	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.2083424646	Jun 27 06:50:34 PM PDT 24	Jun 27 06:54:12 PM PDT 24	29158218896 ps
T165	/workspace/coverage/default/25.sram_ctrl_multiple_keys.1972775390	Jun 27 06:51:18 PM PDT 24	Jun 27 06:53:26 PM PDT 24	5618078938 ps
T83	/workspace/coverage/default/49.sram_ctrl_regwen.1033855173	Jun 27 06:56:43 PM PDT 24	Jun 27 07:07:58 PM PDT 24	10018342285 ps
T166	/workspace/coverage/default/18.sram_ctrl_partial_access.424270741	Jun 27 06:50:23 PM PDT 24	Jun 27 06:50:40 PM PDT 24	2205584786 ps
T167	/workspace/coverage/default/15.sram_ctrl_multiple_keys.1936602669	Jun 27 06:50:02 PM PDT 24	Jun 27 07:09:05 PM PDT 24	159283004681 ps
T168	/workspace/coverage/default/39.sram_ctrl_alert_test.2672454725	Jun 27 06:54:46 PM PDT 24	Jun 27 06:54:47 PM PDT 24	13293700 ps
T169	/workspace/coverage/default/49.sram_ctrl_lc_escalation.214656208	Jun 27 06:56:41 PM PDT 24	Jun 27 06:57:44 PM PDT 24	44595559374 ps
T55	/workspace/coverage/default/43.sram_ctrl_mem_walk.1669693878	Jun 27 06:55:25 PM PDT 24	Jun 27 07:00:23 PM PDT 24	10722516354 ps
T100	/workspace/coverage/default/39.sram_ctrl_mem_partial_access.877181474	Jun 27 06:54:44 PM PDT 24	Jun 27 06:56:15 PM PDT 24	32964370518 ps
T170	/workspace/coverage/default/7.sram_ctrl_bijection.1753311361	Jun 27 06:49:20 PM PDT 24	Jun 27 07:10:55 PM PDT 24	77879144209 ps
T171	/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3495435122	Jun 27 06:48:58 PM PDT 24	Jun 27 06:49:25 PM PDT 24	750208081 ps
T118	/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.283607418	Jun 27 06:49:26 PM PDT 24	Jun 27 06:52:11 PM PDT 24	11079508544 ps
T46	/workspace/coverage/default/23.sram_ctrl_mem_partial_access.2513964608	Jun 27 06:51:11 PM PDT 24	Jun 27 06:52:38 PM PDT 24	6579795950 ps
T49	/workspace/coverage/default/3.sram_ctrl_mem_walk.1183253105	Jun 27 06:49:12 PM PDT 24	Jun 27 06:55:13 PM PDT 24	128415448483 ps
T25	/workspace/coverage/default/49.sram_ctrl_ram_cfg.410996824	Jun 27 06:56:40 PM PDT 24	Jun 27 06:56:44 PM PDT 24	358091060 ps
T172	/workspace/coverage/default/3.sram_ctrl_ram_cfg.3348266953	Jun 27 06:49:14 PM PDT 24	Jun 27 06:49:21 PM PDT 24	679525468 ps
T173	/workspace/coverage/default/22.sram_ctrl_partial_access.42254689	Jun 27 06:50:52 PM PDT 24	Jun 27 06:51:54 PM PDT 24	1580910475 ps
T101	/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2554701125	Jun 27 06:50:54 PM PDT 24	Jun 27 07:05:56 PM PDT 24	61998540909 ps
T174	/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2240109249	Jun 27 06:50:35 PM PDT 24	Jun 27 06:51:18 PM PDT 24	1302345914 ps
T175	/workspace/coverage/default/20.sram_ctrl_multiple_keys.1570022646	Jun 27 06:50:37 PM PDT 24	Jun 27 07:09:12 PM PDT 24	38923114563 ps
T176	/workspace/coverage/default/32.sram_ctrl_regwen.1052617741	Jun 27 06:53:01 PM PDT 24	Jun 27 07:05:52 PM PDT 24	2807897480 ps
T177	/workspace/coverage/default/33.sram_ctrl_bijection.1610030466	Jun 27 06:53:00 PM PDT 24	Jun 27 07:05:48 PM PDT 24	67627410044 ps
T102	/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3895559643	Jun 27 06:49:25 PM PDT 24	Jun 27 06:50:50 PM PDT 24	5555468647 ps
T178	/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.367243056	Jun 27 06:51:57 PM PDT 24	Jun 27 06:54:13 PM PDT 24	3124569128 ps
T179	/workspace/coverage/default/8.sram_ctrl_multiple_keys.1302024528	Jun 27 06:49:27 PM PDT 24	Jun 27 07:01:18 PM PDT 24	5075894252 ps
T103	/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2842414910	Jun 27 06:50:39 PM PDT 24	Jun 27 06:53:21 PM PDT 24	19991682446 ps
T113	/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1446010736	Jun 27 06:48:59 PM PDT 24	Jun 27 06:51:04 PM PDT 24	1918042156 ps
T180	/workspace/coverage/default/37.sram_ctrl_access_during_key_req.1728146796	Jun 27 06:54:08 PM PDT 24	Jun 27 07:08:36 PM PDT 24	10787274927 ps
T181	/workspace/coverage/default/42.sram_ctrl_partial_access.1666878829	Jun 27 06:55:08 PM PDT 24	Jun 27 06:58:12 PM PDT 24	1990932749 ps
T182	/workspace/coverage/default/6.sram_ctrl_smoke.220841408	Jun 27 06:49:26 PM PDT 24	Jun 27 06:49:47 PM PDT 24	1539356851 ps
T183	/workspace/coverage/default/34.sram_ctrl_executable.1145692357	Jun 27 06:53:14 PM PDT 24	Jun 27 07:10:32 PM PDT 24	61042544651 ps
T184	/workspace/coverage/default/23.sram_ctrl_access_during_key_req.2018381438	Jun 27 06:51:12 PM PDT 24	Jun 27 07:07:53 PM PDT 24	29159060989 ps
T141	/workspace/coverage/default/29.sram_ctrl_stress_all.2037271318	Jun 27 06:52:17 PM PDT 24	Jun 27 07:29:28 PM PDT 24	219124034361 ps
T119	/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3671986480	Jun 27 06:54:44 PM PDT 24	Jun 27 06:57:56 PM PDT 24	7744679886 ps
T185	/workspace/coverage/default/30.sram_ctrl_lc_escalation.4013584376	Jun 27 06:52:38 PM PDT 24	Jun 27 06:53:29 PM PDT 24	8344434492 ps
T186	/workspace/coverage/default/7.sram_ctrl_regwen.1057782733	Jun 27 06:49:28 PM PDT 24	Jun 27 07:05:02 PM PDT 24	59364373263 ps
T187	/workspace/coverage/default/16.sram_ctrl_partial_access.2852382159	Jun 27 06:49:52 PM PDT 24	Jun 27 06:50:19 PM PDT 24	1773053541 ps
T188	/workspace/coverage/default/40.sram_ctrl_multiple_keys.2235778216	Jun 27 06:54:45 PM PDT 24	Jun 27 06:55:44 PM PDT 24	6281243532 ps
T189	/workspace/coverage/default/35.sram_ctrl_partial_access.3592538345	Jun 27 06:53:28 PM PDT 24	Jun 27 06:53:37 PM PDT 24	3078265899 ps
T190	/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2591146365	Jun 27 06:49:42 PM PDT 24	Jun 27 06:52:32 PM PDT 24	8813702359 ps
T154	/workspace/coverage/default/8.sram_ctrl_regwen.2460003598	Jun 27 06:49:44 PM PDT 24	Jun 27 07:17:56 PM PDT 24	18749235606 ps
T191	/workspace/coverage/default/1.sram_ctrl_max_throughput.3274692050	Jun 27 06:49:02 PM PDT 24	Jun 27 06:50:40 PM PDT 24	758749236 ps
T192	/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1768047210	Jun 27 06:49:26 PM PDT 24	Jun 27 06:50:01 PM PDT 24	4597350828 ps
T193	/workspace/coverage/default/47.sram_ctrl_stress_all.2126202191	Jun 27 06:56:12 PM PDT 24	Jun 27 08:06:10 PM PDT 24	129336748109 ps
T194	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.683609504	Jun 27 06:49:43 PM PDT 24	Jun 27 06:54:13 PM PDT 24	9629695971 ps
T195	/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1754264085	Jun 27 06:55:36 PM PDT 24	Jun 27 06:58:37 PM PDT 24	3129761330 ps
T196	/workspace/coverage/default/47.sram_ctrl_ram_cfg.2255587600	Jun 27 06:56:08 PM PDT 24	Jun 27 06:56:12 PM PDT 24	712698431 ps
T197	/workspace/coverage/default/32.sram_ctrl_lc_escalation.3293887504	Jun 27 06:52:55 PM PDT 24	Jun 27 06:54:13 PM PDT 24	56210400462 ps
T198	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.1186427389	Jun 27 06:49:51 PM PDT 24	Jun 27 07:00:03 PM PDT 24	57240151759 ps
T199	/workspace/coverage/default/5.sram_ctrl_smoke.514633374	Jun 27 06:49:26 PM PDT 24	Jun 27 06:49:41 PM PDT 24	758339976 ps
T200	/workspace/coverage/default/13.sram_ctrl_ram_cfg.875629305	Jun 27 06:49:50 PM PDT 24	Jun 27 06:49:56 PM PDT 24	346482345 ps
T47	/workspace/coverage/default/14.sram_ctrl_mem_partial_access.2286446064	Jun 27 06:50:00 PM PDT 24	Jun 27 06:53:09 PM PDT 24	23158608001 ps
T201	/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1372949531	Jun 27 06:50:03 PM PDT 24	Jun 27 06:52:45 PM PDT 24	29166707739 ps
T202	/workspace/coverage/default/0.sram_ctrl_stress_all.2517203669	Jun 27 06:49:00 PM PDT 24	Jun 27 08:42:15 PM PDT 24	205086530652 ps
T203	/workspace/coverage/default/4.sram_ctrl_smoke.1621170947	Jun 27 06:49:26 PM PDT 24	Jun 27 06:49:53 PM PDT 24	2633064172 ps
T155	/workspace/coverage/default/39.sram_ctrl_stress_all.2626923458	Jun 27 06:54:43 PM PDT 24	Jun 27 09:33:54 PM PDT 24	285253090242 ps
T204	/workspace/coverage/default/36.sram_ctrl_access_during_key_req.1949668856	Jun 27 06:53:40 PM PDT 24	Jun 27 07:05:30 PM PDT 24	30949605092 ps
T205	/workspace/coverage/default/20.sram_ctrl_bijection.483894023	Jun 27 06:50:38 PM PDT 24	Jun 27 07:04:29 PM PDT 24	43361546663 ps
T206	/workspace/coverage/default/42.sram_ctrl_mem_partial_access.1915340178	Jun 27 06:55:06 PM PDT 24	Jun 27 06:56:23 PM PDT 24	6069219162 ps
T207	/workspace/coverage/default/13.sram_ctrl_mem_walk.2915795014	Jun 27 06:49:50 PM PDT 24	Jun 27 06:56:11 PM PDT 24	57476488624 ps
T208	/workspace/coverage/default/17.sram_ctrl_alert_test.214277859	Jun 27 06:50:23 PM PDT 24	Jun 27 06:50:26 PM PDT 24	12304832 ps
T209	/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3993839829	Jun 27 06:53:00 PM PDT 24	Jun 27 06:57:56 PM PDT 24	3651946189 ps
T210	/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1694995491	Jun 27 06:52:48 PM PDT 24	Jun 27 06:53:21 PM PDT 24	745487119 ps
T211	/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3923501169	Jun 27 06:56:24 PM PDT 24	Jun 27 06:58:42 PM PDT 24	785344339 ps
T212	/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1553340113	Jun 27 06:56:41 PM PDT 24	Jun 27 06:58:07 PM PDT 24	5007649414 ps
T213	/workspace/coverage/default/32.sram_ctrl_max_throughput.203274460	Jun 27 06:52:50 PM PDT 24	Jun 27 06:52:59 PM PDT 24	2031435728 ps
T214	/workspace/coverage/default/21.sram_ctrl_regwen.2188514239	Jun 27 06:50:50 PM PDT 24	Jun 27 07:04:20 PM PDT 24	15927493217 ps
T215	/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2237333682	Jun 27 06:50:03 PM PDT 24	Jun 27 06:56:53 PM PDT 24	65939332382 ps
T50	/workspace/coverage/default/15.sram_ctrl_mem_partial_access.563521077	Jun 27 06:49:56 PM PDT 24	Jun 27 06:52:30 PM PDT 24	4978345011 ps
T216	/workspace/coverage/default/40.sram_ctrl_lc_escalation.1562580033	Jun 27 06:54:46 PM PDT 24	Jun 27 06:55:18 PM PDT 24	9131939512 ps
T217	/workspace/coverage/default/40.sram_ctrl_smoke.250520490	Jun 27 06:54:44 PM PDT 24	Jun 27 06:54:56 PM PDT 24	2660052489 ps
T159	/workspace/coverage/default/38.sram_ctrl_multiple_keys.3409123497	Jun 27 06:54:14 PM PDT 24	Jun 27 07:04:06 PM PDT 24	22638104838 ps
T218	/workspace/coverage/default/2.sram_ctrl_mem_walk.2210279049	Jun 27 06:49:12 PM PDT 24	Jun 27 06:53:41 PM PDT 24	35799570983 ps
T219	/workspace/coverage/default/40.sram_ctrl_bijection.1523484040	Jun 27 06:54:43 PM PDT 24	Jun 27 07:23:48 PM PDT 24	26427915383 ps
T220	/workspace/coverage/default/20.sram_ctrl_regwen.1109978720	Jun 27 06:50:36 PM PDT 24	Jun 27 06:57:47 PM PDT 24	29032193974 ps
T221	/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1231714082	Jun 27 06:49:29 PM PDT 24	Jun 27 06:50:28 PM PDT 24	1532721733 ps
T74	/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1030894559	Jun 27 06:49:25 PM PDT 24	Jun 27 06:49:49 PM PDT 24	2319644120 ps
T222	/workspace/coverage/default/49.sram_ctrl_bijection.410056079	Jun 27 06:56:24 PM PDT 24	Jun 27 07:08:54 PM PDT 24	170658361835 ps
T223	/workspace/coverage/default/15.sram_ctrl_lc_escalation.3663582047	Jun 27 06:49:55 PM PDT 24	Jun 27 06:50:35 PM PDT 24	11355949287 ps
T224	/workspace/coverage/default/41.sram_ctrl_alert_test.2896499704	Jun 27 06:54:55 PM PDT 24	Jun 27 06:54:58 PM PDT 24	35961714 ps
T225	/workspace/coverage/default/32.sram_ctrl_partial_access.2106095933	Jun 27 06:52:48 PM PDT 24	Jun 27 06:54:44 PM PDT 24	1798449929 ps
T226	/workspace/coverage/default/5.sram_ctrl_stress_pipeline.993380655	Jun 27 06:49:26 PM PDT 24	Jun 27 06:52:10 PM PDT 24	13784199763 ps
T227	/workspace/coverage/default/26.sram_ctrl_mem_walk.3565418991	Jun 27 06:51:28 PM PDT 24	Jun 27 06:54:40 PM PDT 24	79558925276 ps
T228	/workspace/coverage/default/1.sram_ctrl_multiple_keys.3889069376	Jun 27 06:49:00 PM PDT 24	Jun 27 07:09:37 PM PDT 24	23635739121 ps
T229	/workspace/coverage/default/43.sram_ctrl_executable.1755783930	Jun 27 06:55:30 PM PDT 24	Jun 27 07:09:09 PM PDT 24	101093818320 ps
T157	/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3988128640	Jun 27 06:49:51 PM PDT 24	Jun 27 06:59:33 PM PDT 24	73854556988 ps
T230	/workspace/coverage/default/30.sram_ctrl_access_during_key_req.435038204	Jun 27 06:52:36 PM PDT 24	Jun 27 07:01:00 PM PDT 24	37284837652 ps
T231	/workspace/coverage/default/4.sram_ctrl_ram_cfg.477876496	Jun 27 06:49:28 PM PDT 24	Jun 27 06:49:36 PM PDT 24	347549870 ps
T232	/workspace/coverage/default/35.sram_ctrl_ram_cfg.3805804981	Jun 27 06:53:40 PM PDT 24	Jun 27 06:53:45 PM PDT 24	2788903018 ps
T156	/workspace/coverage/default/12.sram_ctrl_stress_all.3025017953	Jun 27 06:49:49 PM PDT 24	Jun 27 07:26:45 PM PDT 24	295179030492 ps
T233	/workspace/coverage/default/42.sram_ctrl_smoke.3532262482	Jun 27 06:54:56 PM PDT 24	Jun 27 06:55:40 PM PDT 24	3081745200 ps
T234	/workspace/coverage/default/48.sram_ctrl_partial_access.2812025955	Jun 27 06:56:12 PM PDT 24	Jun 27 06:56:22 PM PDT 24	2553554172 ps
T235	/workspace/coverage/default/14.sram_ctrl_multiple_keys.3731762895	Jun 27 06:49:56 PM PDT 24	Jun 27 06:56:22 PM PDT 24	3923569377 ps
T236	/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2774825026	Jun 27 06:49:41 PM PDT 24	Jun 27 06:54:59 PM PDT 24	16139459297 ps
T237	/workspace/coverage/default/37.sram_ctrl_multiple_keys.615184595	Jun 27 06:53:52 PM PDT 24	Jun 27 07:06:14 PM PDT 24	38026170064 ps
T238	/workspace/coverage/default/35.sram_ctrl_multiple_keys.1537347130	Jun 27 06:53:26 PM PDT 24	Jun 27 07:10:49 PM PDT 24	46287402545 ps
T239	/workspace/coverage/default/21.sram_ctrl_stress_pipeline.1183819687	Jun 27 06:50:35 PM PDT 24	Jun 27 06:53:50 PM PDT 24	12953738165 ps
T240	/workspace/coverage/default/43.sram_ctrl_multiple_keys.2339404839	Jun 27 06:55:07 PM PDT 24	Jun 27 07:16:07 PM PDT 24	33265748689 ps
T241	/workspace/coverage/default/45.sram_ctrl_lc_escalation.2163752990	Jun 27 06:55:47 PM PDT 24	Jun 27 06:56:47 PM PDT 24	8800703593 ps
T75	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1285749700	Jun 27 06:49:16 PM PDT 24	Jun 27 06:53:46 PM PDT 24	1923820141 ps
T242	/workspace/coverage/default/3.sram_ctrl_alert_test.2069567985	Jun 27 06:49:14 PM PDT 24	Jun 27 06:49:18 PM PDT 24	14026134 ps
T243	/workspace/coverage/default/43.sram_ctrl_max_throughput.1793509811	Jun 27 06:55:18 PM PDT 24	Jun 27 06:55:57 PM PDT 24	742461924 ps
T244	/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1017944165	Jun 27 06:53:13 PM PDT 24	Jun 27 06:53:43 PM PDT 24	713994819 ps
T245	/workspace/coverage/default/8.sram_ctrl_bijection.1765981822	Jun 27 06:49:27 PM PDT 24	Jun 27 07:06:33 PM PDT 24	28937454271 ps
T246	/workspace/coverage/default/35.sram_ctrl_lc_escalation.1954790603	Jun 27 06:53:28 PM PDT 24	Jun 27 06:54:19 PM PDT 24	28728201726 ps
T247	/workspace/coverage/default/15.sram_ctrl_alert_test.2533706319	Jun 27 06:49:57 PM PDT 24	Jun 27 06:49:59 PM PDT 24	23307033 ps
T48	/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1377340245	Jun 27 06:48:55 PM PDT 24	Jun 27 06:51:43 PM PDT 24	11339276802 ps
T248	/workspace/coverage/default/18.sram_ctrl_multiple_keys.3240610302	Jun 27 06:50:23 PM PDT 24	Jun 27 07:04:54 PM PDT 24	19044621633 ps
T249	/workspace/coverage/default/47.sram_ctrl_lc_escalation.4234185080	Jun 27 06:56:08 PM PDT 24	Jun 27 06:56:46 PM PDT 24	6045913947 ps
T250	/workspace/coverage/default/39.sram_ctrl_smoke.4141885151	Jun 27 06:54:25 PM PDT 24	Jun 27 06:56:07 PM PDT 24	1198042068 ps
T251	/workspace/coverage/default/48.sram_ctrl_ram_cfg.2467905259	Jun 27 06:56:24 PM PDT 24	Jun 27 06:56:28 PM PDT 24	359249390 ps
T252	/workspace/coverage/default/18.sram_ctrl_regwen.2795097866	Jun 27 06:50:24 PM PDT 24	Jun 27 07:02:03 PM PDT 24	2851182024 ps
T44	/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.4027600219	Jun 27 06:49:49 PM PDT 24	Jun 27 06:52:56 PM PDT 24	4733661545 ps
T253	/workspace/coverage/default/36.sram_ctrl_regwen.279641080	Jun 27 06:53:52 PM PDT 24	Jun 27 07:02:10 PM PDT 24	22211854435 ps
T254	/workspace/coverage/default/31.sram_ctrl_alert_test.2193325999	Jun 27 06:52:50 PM PDT 24	Jun 27 06:52:53 PM PDT 24	43327939 ps
T255	/workspace/coverage/default/42.sram_ctrl_mem_walk.3622510391	Jun 27 06:55:06 PM PDT 24	Jun 27 06:57:38 PM PDT 24	10516286453 ps
T76	/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1116772795	Jun 27 06:51:42 PM PDT 24	Jun 27 06:51:51 PM PDT 24	1359761879 ps
T256	/workspace/coverage/default/45.sram_ctrl_alert_test.481973253	Jun 27 06:55:44 PM PDT 24	Jun 27 06:55:46 PM PDT 24	41959829 ps
T257	/workspace/coverage/default/12.sram_ctrl_multiple_keys.1929017737	Jun 27 06:49:41 PM PDT 24	Jun 27 07:15:40 PM PDT 24	51303931828 ps
T258	/workspace/coverage/default/8.sram_ctrl_ram_cfg.1540828353	Jun 27 06:49:39 PM PDT 24	Jun 27 06:49:47 PM PDT 24	725495838 ps
T259	/workspace/coverage/default/45.sram_ctrl_partial_access.782968789	Jun 27 06:55:46 PM PDT 24	Jun 27 06:56:18 PM PDT 24	19796843101 ps
T260	/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2650299479	Jun 27 06:49:14 PM PDT 24	Jun 27 06:50:05 PM PDT 24	746020575 ps
T261	/workspace/coverage/default/45.sram_ctrl_regwen.1098068636	Jun 27 06:55:45 PM PDT 24	Jun 27 07:03:43 PM PDT 24	35602429488 ps
T60	/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1494601516	Jun 27 06:55:46 PM PDT 24	Jun 27 06:58:03 PM PDT 24	2613774864 ps
T262	/workspace/coverage/default/43.sram_ctrl_alert_test.1686161602	Jun 27 06:55:32 PM PDT 24	Jun 27 06:55:34 PM PDT 24	42001696 ps
T263	/workspace/coverage/default/49.sram_ctrl_multiple_keys.1880155479	Jun 27 06:56:21 PM PDT 24	Jun 27 07:10:59 PM PDT 24	98826251592 ps
T264	/workspace/coverage/default/2.sram_ctrl_regwen.1842257491	Jun 27 06:49:12 PM PDT 24	Jun 27 07:11:16 PM PDT 24	5249368764 ps
T265	/workspace/coverage/default/40.sram_ctrl_alert_test.1381813241	Jun 27 06:54:55 PM PDT 24	Jun 27 06:54:59 PM PDT 24	23612815 ps
T266	/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3147309713	Jun 27 06:56:08 PM PDT 24	Jun 27 07:00:30 PM PDT 24	5130426112 ps
T267	/workspace/coverage/default/8.sram_ctrl_alert_test.891755694	Jun 27 06:49:39 PM PDT 24	Jun 27 06:49:44 PM PDT 24	27578804 ps
T268	/workspace/coverage/default/21.sram_ctrl_lc_escalation.2165326042	Jun 27 06:50:51 PM PDT 24	Jun 27 06:51:50 PM PDT 24	19287467895 ps
T269	/workspace/coverage/default/27.sram_ctrl_executable.1920681454	Jun 27 06:51:44 PM PDT 24	Jun 27 07:07:33 PM PDT 24	6758453349 ps
T270	/workspace/coverage/default/45.sram_ctrl_stress_all.3734952692	Jun 27 06:55:44 PM PDT 24	Jun 27 07:54:51 PM PDT 24	167366513133 ps
T77	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4281527274	Jun 27 06:49:45 PM PDT 24	Jun 27 06:50:03 PM PDT 24	4280270912 ps
T271	/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.119837547	Jun 27 06:49:44 PM PDT 24	Jun 27 06:53:43 PM PDT 24	8197188429 ps
T272	/workspace/coverage/default/39.sram_ctrl_regwen.2402530295	Jun 27 06:54:27 PM PDT 24	Jun 27 06:56:33 PM PDT 24	2770173876 ps
T273	/workspace/coverage/default/17.sram_ctrl_multiple_keys.2938367678	Jun 27 06:50:01 PM PDT 24	Jun 27 06:56:26 PM PDT 24	4223716829 ps
T274	/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4242933271	Jun 27 06:52:07 PM PDT 24	Jun 27 06:54:36 PM PDT 24	3131702905 ps
T275	/workspace/coverage/default/36.sram_ctrl_smoke.1350059720	Jun 27 06:53:40 PM PDT 24	Jun 27 06:53:48 PM PDT 24	6223788329 ps
T276	/workspace/coverage/default/6.sram_ctrl_ram_cfg.4048999751	Jun 27 06:49:24 PM PDT 24	Jun 27 06:49:29 PM PDT 24	344336294 ps
T277	/workspace/coverage/default/20.sram_ctrl_stress_all.2149182737	Jun 27 06:50:36 PM PDT 24	Jun 27 09:05:14 PM PDT 24	542637243188 ps
T278	/workspace/coverage/default/24.sram_ctrl_bijection.3688987297	Jun 27 06:51:07 PM PDT 24	Jun 27 07:30:21 PM PDT 24	150846701105 ps
T279	/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3955238773	Jun 27 06:51:29 PM PDT 24	Jun 27 06:55:14 PM PDT 24	3734449199 ps
T280	/workspace/coverage/default/29.sram_ctrl_alert_test.939943666	Jun 27 06:52:21 PM PDT 24	Jun 27 06:52:23 PM PDT 24	37978823 ps
T281	/workspace/coverage/default/6.sram_ctrl_mem_walk.797172138	Jun 27 06:49:28 PM PDT 24	Jun 27 06:52:17 PM PDT 24	25674229589 ps
T282	/workspace/coverage/default/36.sram_ctrl_multiple_keys.1412330370	Jun 27 06:53:39 PM PDT 24	Jun 27 07:06:18 PM PDT 24	20140304822 ps
T283	/workspace/coverage/default/27.sram_ctrl_partial_access.630692114	Jun 27 06:51:43 PM PDT 24	Jun 27 06:52:04 PM PDT 24	3726225305 ps
T284	/workspace/coverage/default/9.sram_ctrl_partial_access.780509116	Jun 27 06:49:44 PM PDT 24	Jun 27 06:51:01 PM PDT 24	2191397964 ps
T285	/workspace/coverage/default/5.sram_ctrl_mem_walk.3187731463	Jun 27 06:49:24 PM PDT 24	Jun 27 06:52:36 PM PDT 24	8999811801 ps
T286	/workspace/coverage/default/15.sram_ctrl_ram_cfg.1710019784	Jun 27 06:49:56 PM PDT 24	Jun 27 06:50:02 PM PDT 24	372472508 ps
T287	/workspace/coverage/default/44.sram_ctrl_mem_walk.3194049990	Jun 27 06:55:32 PM PDT 24	Jun 27 06:58:07 PM PDT 24	14452834928 ps
T288	/workspace/coverage/default/49.sram_ctrl_alert_test.4262543769	Jun 27 06:56:41 PM PDT 24	Jun 27 06:56:43 PM PDT 24	27632076 ps
T289	/workspace/coverage/default/20.sram_ctrl_alert_test.4254143818	Jun 27 06:50:35 PM PDT 24	Jun 27 06:50:38 PM PDT 24	104612745 ps
T290	/workspace/coverage/default/7.sram_ctrl_max_throughput.2729919978	Jun 27 06:49:26 PM PDT 24	Jun 27 06:49:45 PM PDT 24	5326757452 ps
T291	/workspace/coverage/default/42.sram_ctrl_ram_cfg.2665841273	Jun 27 06:55:09 PM PDT 24	Jun 27 06:55:14 PM PDT 24	872526367 ps
T292	/workspace/coverage/default/8.sram_ctrl_executable.3856915372	Jun 27 06:49:44 PM PDT 24	Jun 27 07:10:15 PM PDT 24	163508743466 ps
T293	/workspace/coverage/default/28.sram_ctrl_stress_all.2511342478	Jun 27 06:52:07 PM PDT 24	Jun 27 08:31:48 PM PDT 24	167411534498 ps
T294	/workspace/coverage/default/34.sram_ctrl_smoke.1014609458	Jun 27 06:53:13 PM PDT 24	Jun 27 06:53:32 PM PDT 24	2851975347 ps
T15	/workspace/coverage/default/0.sram_ctrl_sec_cm.3808607762	Jun 27 06:49:10 PM PDT 24	Jun 27 06:49:13 PM PDT 24	129275720 ps
T28	/workspace/coverage/default/5.sram_ctrl_partial_access.2473371394	Jun 27 06:49:28 PM PDT 24	Jun 27 06:49:55 PM PDT 24	1834887362 ps
T29	/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1437409228	Jun 27 06:54:09 PM PDT 24	Jun 27 06:58:54 PM PDT 24	14098614078 ps
T30	/workspace/coverage/default/47.sram_ctrl_regwen.2539831409	Jun 27 06:56:09 PM PDT 24	Jun 27 07:15:23 PM PDT 24	69642511745 ps
T31	/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3100759578	Jun 27 06:52:37 PM PDT 24	Jun 27 06:58:32 PM PDT 24	7304717534 ps
T32	/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3766230583	Jun 27 06:51:29 PM PDT 24	Jun 27 06:52:54 PM PDT 24	9428821946 ps
T33	/workspace/coverage/default/17.sram_ctrl_smoke.2752289173	Jun 27 06:50:02 PM PDT 24	Jun 27 06:50:20 PM PDT 24	5131841443 ps
T34	/workspace/coverage/default/40.sram_ctrl_mem_walk.3832113539	Jun 27 06:54:43 PM PDT 24	Jun 27 06:59:37 PM PDT 24	10715177830 ps
T35	/workspace/coverage/default/2.sram_ctrl_bijection.1872046579	Jun 27 06:49:13 PM PDT 24	Jun 27 07:25:36 PM PDT 24	191966923994 ps
T36	/workspace/coverage/default/39.sram_ctrl_lc_escalation.3654011895	Jun 27 06:54:27 PM PDT 24	Jun 27 06:55:18 PM PDT 24	44300317310 ps
T295	/workspace/coverage/default/27.sram_ctrl_alert_test.886530347	Jun 27 06:51:56 PM PDT 24	Jun 27 06:51:58 PM PDT 24	12538259 ps
T296	/workspace/coverage/default/11.sram_ctrl_alert_test.3557739824	Jun 27 06:49:40 PM PDT 24	Jun 27 06:49:44 PM PDT 24	26745270 ps
T297	/workspace/coverage/default/7.sram_ctrl_stress_all.1635163361	Jun 27 06:49:26 PM PDT 24	Jun 27 06:52:16 PM PDT 24	84482343834 ps
T298	/workspace/coverage/default/6.sram_ctrl_partial_access.1043789619	Jun 27 06:49:27 PM PDT 24	Jun 27 06:49:51 PM PDT 24	607478383 ps
T299	/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3446804044	Jun 27 06:55:31 PM PDT 24	Jun 27 07:01:08 PM PDT 24	4736165820 ps
T300	/workspace/coverage/default/18.sram_ctrl_max_throughput.2344098948	Jun 27 06:50:22 PM PDT 24	Jun 27 06:51:25 PM PDT 24	2905060163 ps
T301	/workspace/coverage/default/13.sram_ctrl_smoke.2735502937	Jun 27 06:49:53 PM PDT 24	Jun 27 06:50:06 PM PDT 24	822079052 ps
T302	/workspace/coverage/default/22.sram_ctrl_regwen.2202065735	Jun 27 06:50:53 PM PDT 24	Jun 27 07:09:31 PM PDT 24	24709167708 ps
T303	/workspace/coverage/default/17.sram_ctrl_executable.641748861	Jun 27 06:50:02 PM PDT 24	Jun 27 07:00:59 PM PDT 24	25358582468 ps
T304	/workspace/coverage/default/41.sram_ctrl_multiple_keys.794279823	Jun 27 06:54:54 PM PDT 24	Jun 27 07:13:46 PM PDT 24	70748376575 ps
T305	/workspace/coverage/default/3.sram_ctrl_bijection.2723722050	Jun 27 06:49:16 PM PDT 24	Jun 27 07:13:14 PM PDT 24	61850935443 ps
T306	/workspace/coverage/default/42.sram_ctrl_lc_escalation.3938688030	Jun 27 06:55:07 PM PDT 24	Jun 27 06:55:56 PM PDT 24	15870040438 ps
T61	/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3474323305	Jun 27 06:49:28 PM PDT 24	Jun 27 06:50:07 PM PDT 24	4070240117 ps
T307	/workspace/coverage/default/19.sram_ctrl_alert_test.1066722460	Jun 27 06:50:37 PM PDT 24	Jun 27 06:50:42 PM PDT 24	54010402 ps
T308	/workspace/coverage/default/9.sram_ctrl_bijection.4181359549	Jun 27 06:49:43 PM PDT 24	Jun 27 07:07:15 PM PDT 24	30771313929 ps
T309	/workspace/coverage/default/2.sram_ctrl_alert_test.2189445671	Jun 27 06:49:14 PM PDT 24	Jun 27 06:49:18 PM PDT 24	13426306 ps
T310	/workspace/coverage/default/15.sram_ctrl_executable.2746401556	Jun 27 06:49:52 PM PDT 24	Jun 27 07:15:11 PM PDT 24	101077385913 ps
T311	/workspace/coverage/default/2.sram_ctrl_partial_access.1957206547	Jun 27 06:49:14 PM PDT 24	Jun 27 06:51:47 PM PDT 24	963167712 ps
T312	/workspace/coverage/default/21.sram_ctrl_access_during_key_req.114259280	Jun 27 06:50:50 PM PDT 24	Jun 27 07:09:48 PM PDT 24	14509568468 ps
T313	/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3046486595	Jun 27 06:50:52 PM PDT 24	Jun 27 06:51:12 PM PDT 24	732820785 ps
T314	/workspace/coverage/default/23.sram_ctrl_executable.3807433667	Jun 27 06:51:05 PM PDT 24	Jun 27 07:17:57 PM PDT 24	93782954271 ps
T315	/workspace/coverage/default/33.sram_ctrl_mem_walk.1267266858	Jun 27 06:53:12 PM PDT 24	Jun 27 06:58:28 PM PDT 24	14430891334 ps