Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.97	99.19	94.27	99.72	100.00	96.03	99.12	97.44

Total tests in report: 1038

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
72.58	72.58	92.23	92.23	72.39	72.39	93.18	93.18	33.33	33.33	81.52	81.52	93.57	93.57	41.86	41.86	/workspace/coverage/default/38.sram_ctrl_lc_escalation.1036978029
85.25	12.67	95.83	3.60	79.15	6.75	93.80	0.62	71.43	38.10	86.49	4.98	95.47	1.90	74.59	32.72	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.103235438
90.48	5.23	97.47	1.64	80.69	1.54	93.80	0.00	100.00	28.57	90.28	3.79	96.35	0.88	74.77	0.18	/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3558827457
93.23	2.75	98.28	0.82	85.78	5.09	95.32	1.52	100.00	0.00	93.13	2.84	96.35	0.00	83.73	8.96	/workspace/coverage/default/16.sram_ctrl_stress_all.147280329
94.23	1.00	98.77	0.49	87.20	1.42	97.66	2.34	100.00	0.00	94.08	0.95	96.49	0.15	85.37	1.65	/workspace/coverage/default/37.sram_ctrl_mem_partial_access.1999758300
95.18	0.95	98.94	0.16	88.03	0.83	97.87	0.21	100.00	0.00	94.79	0.71	96.49	0.00	90.13	4.75	/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4229583335
95.75	0.57	99.10	0.16	89.81	1.78	98.28	0.41	100.00	0.00	95.50	0.71	97.08	0.58	90.49	0.37	/workspace/coverage/default/0.sram_ctrl_sec_cm.73954807
96.14	0.39	99.10	0.00	89.81	0.00	98.28	0.00	100.00	0.00	95.50	0.00	97.08	0.00	93.24	2.74	/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3738776343
96.40	0.26	99.10	0.00	90.17	0.36	98.42	0.14	100.00	0.00	95.73	0.24	97.81	0.73	93.60	0.37	/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2323310087
96.60	0.20	99.10	0.00	90.17	0.00	98.48	0.07	100.00	0.00	95.73	0.00	99.12	1.32	93.60	0.00	/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2562356114
96.79	0.19	99.10	0.00	90.52	0.36	98.90	0.41	100.00	0.00	95.73	0.00	99.12	0.00	94.15	0.55	/workspace/coverage/default/14.sram_ctrl_alert_test.1230971376
96.97	0.18	99.10	0.00	90.52	0.00	98.90	0.00	100.00	0.00	95.73	0.00	99.12	0.00	95.43	1.28	/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.160132730
97.11	0.14	99.10	0.00	90.76	0.24	98.90	0.00	100.00	0.00	95.73	0.00	99.12	0.00	96.16	0.73	/workspace/coverage/default/39.sram_ctrl_stress_all.2232711405
97.24	0.13	99.18	0.08	90.76	0.00	99.72	0.83	100.00	0.00	95.73	0.00	99.12	0.00	96.16	0.00	/workspace/coverage/default/0.sram_ctrl_ram_cfg.759513426
97.33	0.08	99.18	0.00	90.88	0.12	99.72	0.00	100.00	0.00	96.21	0.47	99.12	0.00	96.16	0.00	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.694318320
97.40	0.08	99.18	0.00	90.88	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.71	0.55	/workspace/coverage/default/11.sram_ctrl_regwen.1808836414
97.45	0.04	99.18	0.00	91.00	0.12	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.89	0.18	/workspace/coverage/default/12.sram_ctrl_stress_all.3591266026
97.47	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.07	0.18	/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4249425518
97.50	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.26	0.18	/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1658233407
97.52	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.44	0.18	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1683123779

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2789521959
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2190759654
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4081471318
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.623565674
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3289723589
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3294942112
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1248870173
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2577977565
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1612346895
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1718584960
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1989378608
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.313143456
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3939685483
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2188164883
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2924454434
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2224745471
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.360900919
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1302410696
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1724341251
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3155581897
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.4258961334
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2072863320
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.879391687
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2262451771
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2316548832
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1540096378
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1108703944
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2136532416
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.171536457
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2799200665
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.149215629
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1436949767
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1417720648
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3147136130
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4160184029
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2395297656
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4017156636
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1129525283
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1275912549
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4121993711
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4124171914
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3558658871
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1021961971
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.666762653
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.340077529
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.4093154877
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1811291340
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.585709814
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1653246564
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3914231270
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.132731570
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2552219799
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2983955399
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3320656499
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2095130800
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2816847538
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2334242269
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1934596177
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2608983545
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4294870024
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2995371530
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3915874658
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1628951174
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.169696443
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2342856776
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3546880768
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2173248333
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3814092807
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.267506674
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1751114323
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3897082483
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.756424427
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2008308700
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1422882928
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.531323435
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3527103311
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1231796275
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2003875980
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2952557871
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1479078975
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3639461989
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3863788934
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3680525248
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2038463428
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2336963045
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1511252315
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1371307654
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1568851294
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2567024237
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3831273337
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1872574320
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3427295275
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.636292613
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3705519872
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3621257392
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.614722768
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3195722687
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3010276944
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2048487709
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2695993111
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3683464873
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3183566652
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.391487458
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.4207726153
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3460145104
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1557020953
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2501437750
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.31324593
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3539143239
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3305350464
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1943307287
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2993673151
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1898034113
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3652334044
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3730695125
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1259141932
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1104692625
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2657557485
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1777516038
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3273090064
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3042038390
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3860359715
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1489227643
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.830136642
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3239213187
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1114527811
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.696770242
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3116886557
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1991072051
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1821569617
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1657200910
/workspace/coverage/default/0.sram_ctrl_alert_test.212067117
/workspace/coverage/default/0.sram_ctrl_bijection.124398256
/workspace/coverage/default/0.sram_ctrl_executable.2898917331
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1266991718
/workspace/coverage/default/0.sram_ctrl_max_throughput.888866190
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1489978957
/workspace/coverage/default/0.sram_ctrl_mem_walk.486731094
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3936888436
/workspace/coverage/default/0.sram_ctrl_partial_access.3253821992
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1969126901
/workspace/coverage/default/0.sram_ctrl_regwen.2486622810
/workspace/coverage/default/0.sram_ctrl_smoke.1865374533
/workspace/coverage/default/0.sram_ctrl_stress_all.3110562652
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2708324314
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1995814148
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1941165339
/workspace/coverage/default/1.sram_ctrl_alert_test.4201592782
/workspace/coverage/default/1.sram_ctrl_bijection.2310064539
/workspace/coverage/default/1.sram_ctrl_executable.3858718478
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1890027338
/workspace/coverage/default/1.sram_ctrl_max_throughput.1599851186
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4027773393
/workspace/coverage/default/1.sram_ctrl_mem_walk.4130081082
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1003858702
/workspace/coverage/default/1.sram_ctrl_partial_access.2400295829
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1643250962
/workspace/coverage/default/1.sram_ctrl_ram_cfg.241232307
/workspace/coverage/default/1.sram_ctrl_regwen.1358729385
/workspace/coverage/default/1.sram_ctrl_sec_cm.3842148179
/workspace/coverage/default/1.sram_ctrl_smoke.3995645212
/workspace/coverage/default/1.sram_ctrl_stress_all.3876058047
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2266740579
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1248770616
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3742467110
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.896814185
/workspace/coverage/default/10.sram_ctrl_alert_test.3442499613
/workspace/coverage/default/10.sram_ctrl_bijection.656866450
/workspace/coverage/default/10.sram_ctrl_executable.3442561603
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1835062141
/workspace/coverage/default/10.sram_ctrl_max_throughput.1054354642
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1080439451
/workspace/coverage/default/10.sram_ctrl_mem_walk.824680924
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1561573163
/workspace/coverage/default/10.sram_ctrl_partial_access.3340002351
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.4069001895
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1983674688
/workspace/coverage/default/10.sram_ctrl_regwen.1778904776
/workspace/coverage/default/10.sram_ctrl_smoke.1166399554
/workspace/coverage/default/10.sram_ctrl_stress_all.2202199155
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2214916072
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.924449358
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3225394159
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.789221027
/workspace/coverage/default/11.sram_ctrl_alert_test.584020897
/workspace/coverage/default/11.sram_ctrl_bijection.987545107
/workspace/coverage/default/11.sram_ctrl_executable.1299180669
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2172551498
/workspace/coverage/default/11.sram_ctrl_max_throughput.1582867949
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1870790053
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/workspace/coverage/default/42.sram_ctrl_access_during_key_req.3658578462
/workspace/coverage/default/42.sram_ctrl_alert_test.3798303306
/workspace/coverage/default/42.sram_ctrl_bijection.3534866166
/workspace/coverage/default/42.sram_ctrl_executable.905688153
/workspace/coverage/default/42.sram_ctrl_lc_escalation.3186019114
/workspace/coverage/default/42.sram_ctrl_max_throughput.3159535613
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.1426350836
/workspace/coverage/default/42.sram_ctrl_mem_walk.1590624877
/workspace/coverage/default/42.sram_ctrl_multiple_keys.749984508
/workspace/coverage/default/42.sram_ctrl_partial_access.3935520723
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1480506982
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2292600871
/workspace/coverage/default/42.sram_ctrl_regwen.1556718452
/workspace/coverage/default/42.sram_ctrl_smoke.990222460
/workspace/coverage/default/42.sram_ctrl_stress_all.1597300415
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.825465558
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1360186715
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1201174259
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1640775771
/workspace/coverage/default/43.sram_ctrl_alert_test.4006777024
/workspace/coverage/default/43.sram_ctrl_executable.495668647
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1155156986
/workspace/coverage/default/43.sram_ctrl_max_throughput.2934763004
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.193508153
/workspace/coverage/default/43.sram_ctrl_mem_walk.3346181470
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3800895943
/workspace/coverage/default/43.sram_ctrl_partial_access.1491184019
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3189160560
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3373582047
/workspace/coverage/default/43.sram_ctrl_regwen.1933773711
/workspace/coverage/default/43.sram_ctrl_smoke.2430910719
/workspace/coverage/default/43.sram_ctrl_stress_all.8193756
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2848847310
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1042508809
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.15709672
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2228833658
/workspace/coverage/default/44.sram_ctrl_alert_test.1302235256
/workspace/coverage/default/44.sram_ctrl_bijection.2465792708
/workspace/coverage/default/44.sram_ctrl_executable.390564439
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1600940422
/workspace/coverage/default/44.sram_ctrl_max_throughput.609368305
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.78253368
/workspace/coverage/default/44.sram_ctrl_mem_walk.2008369925
/workspace/coverage/default/44.sram_ctrl_multiple_keys.4271452197
/workspace/coverage/default/44.sram_ctrl_partial_access.1748940151
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.786899944
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3098630390
/workspace/coverage/default/44.sram_ctrl_regwen.2814455917
/workspace/coverage/default/44.sram_ctrl_smoke.1274434465
/workspace/coverage/default/44.sram_ctrl_stress_all.4057772165
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3242226229
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3142821949
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.370709406
/workspace/coverage/default/45.sram_ctrl_alert_test.1220679748
/workspace/coverage/default/45.sram_ctrl_bijection.2761637689
/workspace/coverage/default/45.sram_ctrl_executable.3262804769
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1207274369
/workspace/coverage/default/45.sram_ctrl_max_throughput.1549064623
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.401992425
/workspace/coverage/default/45.sram_ctrl_mem_walk.3846857240
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2162103434
/workspace/coverage/default/45.sram_ctrl_partial_access.3649725733
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.327396628
/workspace/coverage/default/45.sram_ctrl_ram_cfg.315342199
/workspace/coverage/default/45.sram_ctrl_regwen.525601250
/workspace/coverage/default/45.sram_ctrl_smoke.2421675291
/workspace/coverage/default/45.sram_ctrl_stress_all.2201564442
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4127312587
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1545305705
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1432350942
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.580883721
/workspace/coverage/default/46.sram_ctrl_alert_test.2292260521
/workspace/coverage/default/46.sram_ctrl_bijection.733508680
/workspace/coverage/default/46.sram_ctrl_executable.3152438005
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2636467243
/workspace/coverage/default/46.sram_ctrl_max_throughput.3782094738
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.595399297
/workspace/coverage/default/46.sram_ctrl_mem_walk.1458480266
/workspace/coverage/default/46.sram_ctrl_multiple_keys.36298534
/workspace/coverage/default/46.sram_ctrl_partial_access.3858367580
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2147888404
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2414723517
/workspace/coverage/default/46.sram_ctrl_regwen.3767795127
/workspace/coverage/default/46.sram_ctrl_smoke.3134360149
/workspace/coverage/default/46.sram_ctrl_stress_all.1389616659
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.106355691
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4180365031
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.81627785
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.712389531
/workspace/coverage/default/47.sram_ctrl_alert_test.2774901758
/workspace/coverage/default/47.sram_ctrl_bijection.2425902592
/workspace/coverage/default/47.sram_ctrl_executable.2577355053
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3426742800
/workspace/coverage/default/47.sram_ctrl_max_throughput.3880891441
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4172913420
/workspace/coverage/default/47.sram_ctrl_mem_walk.1607871186
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2299389864
/workspace/coverage/default/47.sram_ctrl_partial_access.3777145741
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2228327024
/workspace/coverage/default/47.sram_ctrl_ram_cfg.270703782
/workspace/coverage/default/47.sram_ctrl_regwen.3896877884
/workspace/coverage/default/47.sram_ctrl_smoke.1380663893
/workspace/coverage/default/47.sram_ctrl_stress_all.3392564674
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3775258988
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1488657729
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2112397982
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1227302273
/workspace/coverage/default/48.sram_ctrl_alert_test.2385780051
/workspace/coverage/default/48.sram_ctrl_bijection.1236482470
/workspace/coverage/default/48.sram_ctrl_executable.785386649
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1077967745
/workspace/coverage/default/48.sram_ctrl_max_throughput.2252899779
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3499601459
/workspace/coverage/default/48.sram_ctrl_mem_walk.3955588590
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2120565193
/workspace/coverage/default/48.sram_ctrl_partial_access.3788104228
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1757407541
/workspace/coverage/default/48.sram_ctrl_ram_cfg.711143880
/workspace/coverage/default/48.sram_ctrl_regwen.765983389
/workspace/coverage/default/48.sram_ctrl_smoke.1457708919
/workspace/coverage/default/48.sram_ctrl_stress_all.3731150986
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3550594568
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2407735170
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3168432320
/workspace/coverage/default/49.sram_ctrl_alert_test.2970368460
/workspace/coverage/default/49.sram_ctrl_bijection.789516478
/workspace/coverage/default/49.sram_ctrl_executable.2480907124
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1706768780
/workspace/coverage/default/49.sram_ctrl_max_throughput.3003545606
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2227223576
/workspace/coverage/default/49.sram_ctrl_mem_walk.2495678957
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3719700785
/workspace/coverage/default/49.sram_ctrl_partial_access.1028760701
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.919470043
/workspace/coverage/default/49.sram_ctrl_ram_cfg.15638255
/workspace/coverage/default/49.sram_ctrl_regwen.3088887909
/workspace/coverage/default/49.sram_ctrl_smoke.1781961759
/workspace/coverage/default/49.sram_ctrl_stress_all.2983396032
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1445478683
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2925466510
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1210053444
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.110015264
/workspace/coverage/default/5.sram_ctrl_alert_test.3399424969
/workspace/coverage/default/5.sram_ctrl_bijection.2766078049
/workspace/coverage/default/5.sram_ctrl_executable.2775224916
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1049355025
/workspace/coverage/default/5.sram_ctrl_max_throughput.2562908635
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1769625169
/workspace/coverage/default/5.sram_ctrl_mem_walk.2395808775
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2867980289
/workspace/coverage/default/5.sram_ctrl_partial_access.3748006003
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2205279114
/workspace/coverage/default/5.sram_ctrl_ram_cfg.817626931
/workspace/coverage/default/5.sram_ctrl_regwen.663779152
/workspace/coverage/default/5.sram_ctrl_smoke.719135917
/workspace/coverage/default/5.sram_ctrl_stress_all.3305728237
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.288627752
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1559555259
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1708963402
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.920193526
/workspace/coverage/default/6.sram_ctrl_alert_test.3347008639
/workspace/coverage/default/6.sram_ctrl_bijection.2056652155
/workspace/coverage/default/6.sram_ctrl_executable.319845574
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1570763406
/workspace/coverage/default/6.sram_ctrl_max_throughput.3720060768
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2140645519
/workspace/coverage/default/6.sram_ctrl_mem_walk.4094634357
/workspace/coverage/default/6.sram_ctrl_multiple_keys.814782457
/workspace/coverage/default/6.sram_ctrl_partial_access.336696334
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1380510638
/workspace/coverage/default/6.sram_ctrl_ram_cfg.525158116
/workspace/coverage/default/6.sram_ctrl_regwen.327960776
/workspace/coverage/default/6.sram_ctrl_smoke.1095511197
/workspace/coverage/default/6.sram_ctrl_stress_all.2618767789
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2451284188
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3980495529
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3769930956
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.595486429
/workspace/coverage/default/7.sram_ctrl_alert_test.2465107138
/workspace/coverage/default/7.sram_ctrl_bijection.3224103138
/workspace/coverage/default/7.sram_ctrl_executable.580186687
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1253845320
/workspace/coverage/default/7.sram_ctrl_max_throughput.57066622
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1067426472
/workspace/coverage/default/7.sram_ctrl_mem_walk.3747561450
/workspace/coverage/default/7.sram_ctrl_multiple_keys.889437439
/workspace/coverage/default/7.sram_ctrl_partial_access.695524528
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4170311983
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1238418420
/workspace/coverage/default/7.sram_ctrl_regwen.1400620835
/workspace/coverage/default/7.sram_ctrl_smoke.1296785842
/workspace/coverage/default/7.sram_ctrl_stress_all.3377065637
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1810381722
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.587358662
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3310126487
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.242448101
/workspace/coverage/default/8.sram_ctrl_alert_test.1496539270
/workspace/coverage/default/8.sram_ctrl_bijection.1734557641
/workspace/coverage/default/8.sram_ctrl_executable.3790645696
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1309070822
/workspace/coverage/default/8.sram_ctrl_max_throughput.1994442377
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3049657988
/workspace/coverage/default/8.sram_ctrl_mem_walk.3329266850
/workspace/coverage/default/8.sram_ctrl_multiple_keys.16781730
/workspace/coverage/default/8.sram_ctrl_partial_access.2852522568
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3848108939
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3055703829
/workspace/coverage/default/8.sram_ctrl_regwen.73576783
/workspace/coverage/default/8.sram_ctrl_smoke.224576210
/workspace/coverage/default/8.sram_ctrl_stress_all.3217858457
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.403565463
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3338486111
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2647356605
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2178352660
/workspace/coverage/default/9.sram_ctrl_alert_test.3353611279
/workspace/coverage/default/9.sram_ctrl_bijection.1721728357
/workspace/coverage/default/9.sram_ctrl_executable.2875527534
/workspace/coverage/default/9.sram_ctrl_lc_escalation.225764244
/workspace/coverage/default/9.sram_ctrl_max_throughput.2081210451
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1771046157
/workspace/coverage/default/9.sram_ctrl_mem_walk.2571890398
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2974031932
/workspace/coverage/default/9.sram_ctrl_partial_access.3087420576
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1896018640
/workspace/coverage/default/9.sram_ctrl_ram_cfg.603324092
/workspace/coverage/default/9.sram_ctrl_regwen.4137101076
/workspace/coverage/default/9.sram_ctrl_smoke.3427659962
/workspace/coverage/default/9.sram_ctrl_stress_all.2674152053
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2688176888
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2890746827
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1643236604

Total test records in report: 1038

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/42.sram_ctrl_bijection.3534866166	Jun 30 04:45:42 PM PDT 24	Jun 30 05:01:53 PM PDT 24	13866537866 ps
T2	/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.200078391	Jun 30 04:44:03 PM PDT 24	Jun 30 04:44:16 PM PDT 24	1074155209 ps
T3	/workspace/coverage/default/2.sram_ctrl_partial_access.2240599541	Jun 30 04:43:38 PM PDT 24	Jun 30 04:44:03 PM PDT 24	6585620092 ps
T4	/workspace/coverage/default/21.sram_ctrl_regwen.3981251764	Jun 30 04:44:22 PM PDT 24	Jun 30 04:49:29 PM PDT 24	2435159403 ps
T6	/workspace/coverage/default/38.sram_ctrl_lc_escalation.1036978029	Jun 30 04:45:19 PM PDT 24	Jun 30 04:46:19 PM PDT 24	19932157604 ps
T9	/workspace/coverage/default/14.sram_ctrl_smoke.3863088005	Jun 30 04:44:05 PM PDT 24	Jun 30 04:44:16 PM PDT 24	2938045309 ps
T5	/workspace/coverage/default/31.sram_ctrl_partial_access.2589428543	Jun 30 04:44:48 PM PDT 24	Jun 30 04:45:09 PM PDT 24	3674507210 ps
T10	/workspace/coverage/default/10.sram_ctrl_multiple_keys.1561573163	Jun 30 04:43:51 PM PDT 24	Jun 30 05:00:03 PM PDT 24	46202339185 ps
T11	/workspace/coverage/default/4.sram_ctrl_alert_test.3268792274	Jun 30 04:43:51 PM PDT 24	Jun 30 04:43:53 PM PDT 24	13743990 ps
T12	/workspace/coverage/default/37.sram_ctrl_mem_partial_access.1999758300	Jun 30 04:45:21 PM PDT 24	Jun 30 04:47:40 PM PDT 24	1722350624 ps
T39	/workspace/coverage/default/21.sram_ctrl_bijection.1747864311	Jun 30 04:44:23 PM PDT 24	Jun 30 04:57:12 PM PDT 24	21645168755 ps
T7	/workspace/coverage/default/45.sram_ctrl_lc_escalation.1207274369	Jun 30 04:45:57 PM PDT 24	Jun 30 04:46:57 PM PDT 24	34445676440 ps
T43	/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1415124184	Jun 30 04:44:43 PM PDT 24	Jun 30 05:01:26 PM PDT 24	23608465447 ps
T44	/workspace/coverage/default/16.sram_ctrl_partial_access.2005199519	Jun 30 04:44:23 PM PDT 24	Jun 30 04:44:40 PM PDT 24	562840239 ps
T42	/workspace/coverage/default/18.sram_ctrl_multiple_keys.3573041183	Jun 30 04:44:01 PM PDT 24	Jun 30 05:07:21 PM PDT 24	87365108056 ps
T45	/workspace/coverage/default/6.sram_ctrl_access_during_key_req.920193526	Jun 30 04:43:39 PM PDT 24	Jun 30 05:09:37 PM PDT 24	83677246369 ps
T86	/workspace/coverage/default/39.sram_ctrl_bijection.420103227	Jun 30 04:45:20 PM PDT 24	Jun 30 04:55:03 PM PDT 24	35466949294 ps
T48	/workspace/coverage/default/29.sram_ctrl_mem_walk.411232741	Jun 30 04:44:42 PM PDT 24	Jun 30 04:47:43 PM PDT 24	62918412244 ps
T22	/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2323310087	Jun 30 04:44:20 PM PDT 24	Jun 30 04:44:45 PM PDT 24	4035122757 ps
T23	/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.2863427202	Jun 30 04:44:11 PM PDT 24	Jun 30 04:44:42 PM PDT 24	4672300960 ps
T61	/workspace/coverage/default/44.sram_ctrl_multiple_keys.4271452197	Jun 30 04:45:51 PM PDT 24	Jun 30 04:50:56 PM PDT 24	14875088403 ps
T62	/workspace/coverage/default/43.sram_ctrl_multiple_keys.3800895943	Jun 30 04:45:42 PM PDT 24	Jun 30 05:05:00 PM PDT 24	18931565914 ps
T49	/workspace/coverage/default/25.sram_ctrl_mem_partial_access.3047508753	Jun 30 04:44:34 PM PDT 24	Jun 30 04:45:55 PM PDT 24	5516998581 ps
T63	/workspace/coverage/default/33.sram_ctrl_bijection.196503770	Jun 30 04:44:56 PM PDT 24	Jun 30 05:00:40 PM PDT 24	20067288640 ps
T8	/workspace/coverage/default/47.sram_ctrl_lc_escalation.3426742800	Jun 30 04:46:14 PM PDT 24	Jun 30 04:47:38 PM PDT 24	51450614687 ps
T24	/workspace/coverage/default/1.sram_ctrl_regwen.1358729385	Jun 30 04:43:40 PM PDT 24	Jun 30 04:50:02 PM PDT 24	3847094355 ps
T19	/workspace/coverage/default/15.sram_ctrl_stress_all.1815382741	Jun 30 04:44:21 PM PDT 24	Jun 30 06:38:38 PM PDT 24	173057064763 ps
T67	/workspace/coverage/default/5.sram_ctrl_mem_walk.2395808775	Jun 30 04:43:41 PM PDT 24	Jun 30 04:46:01 PM PDT 24	4122556768 ps
T51	/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.1807389369	Jun 30 04:44:29 PM PDT 24	Jun 30 04:44:53 PM PDT 24	10900052453 ps
T20	/workspace/coverage/default/35.sram_ctrl_regwen.2065046561	Jun 30 04:45:12 PM PDT 24	Jun 30 04:50:06 PM PDT 24	1659998162 ps
T25	/workspace/coverage/default/15.sram_ctrl_ram_cfg.880281151	Jun 30 04:44:23 PM PDT 24	Jun 30 04:44:28 PM PDT 24	369891838 ps
T68	/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3550594568	Jun 30 04:46:15 PM PDT 24	Jun 30 04:52:29 PM PDT 24	71738348558 ps
T137	/workspace/coverage/default/11.sram_ctrl_bijection.987545107	Jun 30 04:43:58 PM PDT 24	Jun 30 05:09:02 PM PDT 24	158918197642 ps
T40	/workspace/coverage/default/28.sram_ctrl_regwen.3345935601	Jun 30 04:44:35 PM PDT 24	Jun 30 05:02:33 PM PDT 24	31422945639 ps
T104	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1683123779	Jun 30 04:44:12 PM PDT 24	Jun 30 04:48:46 PM PDT 24	24175553362 ps
T138	/workspace/coverage/default/27.sram_ctrl_max_throughput.2918884357	Jun 30 04:44:34 PM PDT 24	Jun 30 04:45:14 PM PDT 24	3001189487 ps
T47	/workspace/coverage/default/16.sram_ctrl_stress_all.147280329	Jun 30 04:44:06 PM PDT 24	Jun 30 05:51:42 PM PDT 24	103462909282 ps
T50	/workspace/coverage/default/40.sram_ctrl_mem_walk.2285514292	Jun 30 04:45:39 PM PDT 24	Jun 30 04:50:52 PM PDT 24	57669485185 ps
T41	/workspace/coverage/default/31.sram_ctrl_mem_partial_access.3558827457	Jun 30 04:44:51 PM PDT 24	Jun 30 04:47:41 PM PDT 24	34096515977 ps
T76	/workspace/coverage/default/39.sram_ctrl_stress_all.2232711405	Jun 30 04:45:31 PM PDT 24	Jun 30 05:49:27 PM PDT 24	810261523953 ps
T59	/workspace/coverage/default/1.sram_ctrl_mem_walk.4130081082	Jun 30 04:43:36 PM PDT 24	Jun 30 04:48:34 PM PDT 24	5257283004 ps
T139	/workspace/coverage/default/22.sram_ctrl_max_throughput.975064491	Jun 30 04:44:22 PM PDT 24	Jun 30 04:45:07 PM PDT 24	744501185 ps
T46	/workspace/coverage/default/45.sram_ctrl_access_during_key_req.370709406	Jun 30 04:46:00 PM PDT 24	Jun 30 05:00:34 PM PDT 24	43867417578 ps
T26	/workspace/coverage/default/12.sram_ctrl_ram_cfg.3214721143	Jun 30 04:43:58 PM PDT 24	Jun 30 04:44:02 PM PDT 24	1349833202 ps
T140	/workspace/coverage/default/38.sram_ctrl_smoke.2286668414	Jun 30 04:45:25 PM PDT 24	Jun 30 04:45:34 PM PDT 24	1687358099 ps
T89	/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1204271969	Jun 30 04:43:49 PM PDT 24	Jun 30 04:46:22 PM PDT 24	4576804618 ps
T56	/workspace/coverage/default/20.sram_ctrl_mem_walk.2710790973	Jun 30 04:44:27 PM PDT 24	Jun 30 04:50:25 PM PDT 24	35866069645 ps
T141	/workspace/coverage/default/1.sram_ctrl_max_throughput.1599851186	Jun 30 04:43:29 PM PDT 24	Jun 30 04:45:06 PM PDT 24	3137132127 ps
T58	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.103235438	Jun 30 04:46:25 PM PDT 24	Jun 30 04:47:13 PM PDT 24	650371793 ps
T142	/workspace/coverage/default/17.sram_ctrl_multiple_keys.146586144	Jun 30 04:44:18 PM PDT 24	Jun 30 04:54:32 PM PDT 24	17621402702 ps
T143	/workspace/coverage/default/3.sram_ctrl_max_throughput.3451481837	Jun 30 04:43:39 PM PDT 24	Jun 30 04:45:43 PM PDT 24	4019761276 ps
T90	/workspace/coverage/default/23.sram_ctrl_access_during_key_req.3619839632	Jun 30 04:44:25 PM PDT 24	Jun 30 05:19:09 PM PDT 24	21331806278 ps
T144	/workspace/coverage/default/21.sram_ctrl_max_throughput.4311943	Jun 30 04:44:24 PM PDT 24	Jun 30 04:44:53 PM PDT 24	756157575 ps
T105	/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3848108939	Jun 30 04:43:59 PM PDT 24	Jun 30 04:50:21 PM PDT 24	32158803797 ps
T129	/workspace/coverage/default/11.sram_ctrl_regwen.1808836414	Jun 30 04:44:07 PM PDT 24	Jun 30 04:58:13 PM PDT 24	8216480840 ps
T57	/workspace/coverage/default/23.sram_ctrl_mem_walk.2035396716	Jun 30 04:44:31 PM PDT 24	Jun 30 04:47:35 PM PDT 24	41317293541 ps
T13	/workspace/coverage/default/30.sram_ctrl_alert_test.4223109577	Jun 30 04:44:49 PM PDT 24	Jun 30 04:44:50 PM PDT 24	12790744 ps
T55	/workspace/coverage/default/36.sram_ctrl_mem_partial_access.3821874078	Jun 30 04:45:15 PM PDT 24	Jun 30 04:48:13 PM PDT 24	19541033726 ps
T106	/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1911752248	Jun 30 04:44:30 PM PDT 24	Jun 30 04:49:43 PM PDT 24	15162686316 ps
T133	/workspace/coverage/default/20.sram_ctrl_executable.475909252	Jun 30 04:44:17 PM PDT 24	Jun 30 04:59:07 PM PDT 24	26553032992 ps
T21	/workspace/coverage/default/5.sram_ctrl_lc_escalation.1049355025	Jun 30 04:43:49 PM PDT 24	Jun 30 04:44:34 PM PDT 24	43440411237 ps
T74	/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2451284188	Jun 30 04:43:50 PM PDT 24	Jun 30 04:44:02 PM PDT 24	1345711552 ps
T145	/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.4195807631	Jun 30 04:45:19 PM PDT 24	Jun 30 04:45:56 PM PDT 24	1515903910 ps
T91	/workspace/coverage/default/33.sram_ctrl_access_during_key_req.1501948238	Jun 30 04:45:02 PM PDT 24	Jun 30 04:56:42 PM PDT 24	9953437858 ps
T116	/workspace/coverage/default/45.sram_ctrl_stress_all.2201564442	Jun 30 04:46:00 PM PDT 24	Jun 30 05:54:56 PM PDT 24	126305987824 ps
T146	/workspace/coverage/default/39.sram_ctrl_regwen.3759287366	Jun 30 04:45:29 PM PDT 24	Jun 30 04:55:41 PM PDT 24	42214187193 ps
T134	/workspace/coverage/default/23.sram_ctrl_multiple_keys.2966388236	Jun 30 04:44:30 PM PDT 24	Jun 30 05:01:11 PM PDT 24	15785140747 ps
T147	/workspace/coverage/default/6.sram_ctrl_max_throughput.3720060768	Jun 30 04:43:48 PM PDT 24	Jun 30 04:45:13 PM PDT 24	8204553327 ps
T14	/workspace/coverage/default/8.sram_ctrl_alert_test.1496539270	Jun 30 04:44:10 PM PDT 24	Jun 30 04:44:11 PM PDT 24	46291490 ps
T148	/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2242639852	Jun 30 04:44:36 PM PDT 24	Jun 30 04:45:06 PM PDT 24	2884407699 ps
T27	/workspace/coverage/default/28.sram_ctrl_ram_cfg.2723344165	Jun 30 04:44:33 PM PDT 24	Jun 30 04:44:39 PM PDT 24	349763572 ps
T149	/workspace/coverage/default/46.sram_ctrl_mem_walk.1458480266	Jun 30 04:46:06 PM PDT 24	Jun 30 04:48:24 PM PDT 24	28181987467 ps
T150	/workspace/coverage/default/18.sram_ctrl_partial_access.1650985738	Jun 30 04:44:14 PM PDT 24	Jun 30 04:44:19 PM PDT 24	350705100 ps
T151	/workspace/coverage/default/10.sram_ctrl_partial_access.3340002351	Jun 30 04:44:03 PM PDT 24	Jun 30 04:44:26 PM PDT 24	5344543592 ps
T15	/workspace/coverage/default/35.sram_ctrl_alert_test.1245207774	Jun 30 04:45:12 PM PDT 24	Jun 30 04:45:13 PM PDT 24	22384997 ps
T152	/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1210053444	Jun 30 04:46:25 PM PDT 24	Jun 30 04:46:53 PM PDT 24	3014670251 ps
T153	/workspace/coverage/default/9.sram_ctrl_bijection.1721728357	Jun 30 04:43:58 PM PDT 24	Jun 30 04:53:24 PM PDT 24	93094734023 ps
T154	/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3659773220	Jun 30 04:44:47 PM PDT 24	Jun 30 04:44:55 PM PDT 24	2524836833 ps
T155	/workspace/coverage/default/7.sram_ctrl_max_throughput.57066622	Jun 30 04:43:49 PM PDT 24	Jun 30 04:43:56 PM PDT 24	676112637 ps
T156	/workspace/coverage/default/3.sram_ctrl_partial_access.1519890543	Jun 30 04:43:47 PM PDT 24	Jun 30 04:43:55 PM PDT 24	2104389555 ps
T97	/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3535962962	Jun 30 04:44:33 PM PDT 24	Jun 30 05:03:44 PM PDT 24	9419033597 ps
T157	/workspace/coverage/default/6.sram_ctrl_lc_escalation.1570763406	Jun 30 04:43:41 PM PDT 24	Jun 30 04:43:56 PM PDT 24	7121118697 ps
T107	/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1545305705	Jun 30 04:46:02 PM PDT 24	Jun 30 04:51:28 PM PDT 24	7425511193 ps
T117	/workspace/coverage/default/13.sram_ctrl_lc_escalation.2815199880	Jun 30 04:44:05 PM PDT 24	Jun 30 04:44:40 PM PDT 24	18013504844 ps
T158	/workspace/coverage/default/17.sram_ctrl_executable.3904100944	Jun 30 04:44:18 PM PDT 24	Jun 30 04:49:24 PM PDT 24	22115903580 ps
T159	/workspace/coverage/default/43.sram_ctrl_lc_escalation.1155156986	Jun 30 04:45:41 PM PDT 24	Jun 30 04:46:26 PM PDT 24	6865677952 ps
T160	/workspace/coverage/default/25.sram_ctrl_lc_escalation.305244211	Jun 30 04:44:30 PM PDT 24	Jun 30 04:45:32 PM PDT 24	53696363921 ps
T161	/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1643236604	Jun 30 04:43:44 PM PDT 24	Jun 30 04:43:52 PM PDT 24	721226526 ps
T162	/workspace/coverage/default/34.sram_ctrl_mem_walk.3244413792	Jun 30 04:45:04 PM PDT 24	Jun 30 04:47:15 PM PDT 24	8220595041 ps
T98	/workspace/coverage/default/14.sram_ctrl_mem_partial_access.942524378	Jun 30 04:44:03 PM PDT 24	Jun 30 04:46:48 PM PDT 24	10209400964 ps
T163	/workspace/coverage/default/39.sram_ctrl_max_throughput.2829381621	Jun 30 04:45:31 PM PDT 24	Jun 30 04:47:34 PM PDT 24	15242579294 ps
T164	/workspace/coverage/default/27.sram_ctrl_regwen.2293506245	Jun 30 04:44:33 PM PDT 24	Jun 30 05:11:02 PM PDT 24	23841201456 ps
T165	/workspace/coverage/default/23.sram_ctrl_smoke.2734354710	Jun 30 04:44:29 PM PDT 24	Jun 30 04:46:23 PM PDT 24	3190224246 ps
T108	/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4172913420	Jun 30 04:46:12 PM PDT 24	Jun 30 04:48:20 PM PDT 24	3313017228 ps
T166	/workspace/coverage/default/32.sram_ctrl_multiple_keys.3890527771	Jun 30 04:44:52 PM PDT 24	Jun 30 04:54:11 PM PDT 24	4988316650 ps
T167	/workspace/coverage/default/1.sram_ctrl_partial_access.2400295829	Jun 30 04:43:30 PM PDT 24	Jun 30 04:44:05 PM PDT 24	1782860871 ps
T131	/workspace/coverage/default/8.sram_ctrl_regwen.73576783	Jun 30 04:43:51 PM PDT 24	Jun 30 05:06:55 PM PDT 24	61746639662 ps
T109	/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1515548018	Jun 30 04:44:33 PM PDT 24	Jun 30 04:53:10 PM PDT 24	80389183356 ps
T168	/workspace/coverage/default/5.sram_ctrl_smoke.719135917	Jun 30 04:43:51 PM PDT 24	Jun 30 04:44:23 PM PDT 24	407362276 ps
T169	/workspace/coverage/default/18.sram_ctrl_lc_escalation.3459716783	Jun 30 04:44:03 PM PDT 24	Jun 30 04:45:17 PM PDT 24	44238258100 ps
T170	/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2482977341	Jun 30 04:44:03 PM PDT 24	Jun 30 04:52:04 PM PDT 24	7480545315 ps
T135	/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3738776343	Jun 30 04:44:05 PM PDT 24	Jun 30 04:51:42 PM PDT 24	85047564239 ps
T171	/workspace/coverage/default/48.sram_ctrl_ram_cfg.711143880	Jun 30 04:46:22 PM PDT 24	Jun 30 04:46:26 PM PDT 24	2237698240 ps
T130	/workspace/coverage/default/1.sram_ctrl_executable.3858718478	Jun 30 04:43:51 PM PDT 24	Jun 30 04:54:35 PM PDT 24	10839765012 ps
T172	/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1941165339	Jun 30 04:43:56 PM PDT 24	Jun 30 04:58:08 PM PDT 24	7536206875 ps
T173	/workspace/coverage/default/41.sram_ctrl_max_throughput.1611288887	Jun 30 04:45:36 PM PDT 24	Jun 30 04:47:19 PM PDT 24	768063341 ps
T174	/workspace/coverage/default/19.sram_ctrl_ram_cfg.68860991	Jun 30 04:44:13 PM PDT 24	Jun 30 04:44:17 PM PDT 24	607810883 ps
T60	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.492018974	Jun 30 04:45:35 PM PDT 24	Jun 30 04:48:17 PM PDT 24	10176020375 ps
T175	/workspace/coverage/default/5.sram_ctrl_multiple_keys.2867980289	Jun 30 04:43:48 PM PDT 24	Jun 30 05:09:48 PM PDT 24	18789503273 ps
T132	/workspace/coverage/default/10.sram_ctrl_stress_all.2202199155	Jun 30 04:43:54 PM PDT 24	Jun 30 05:42:53 PM PDT 24	105155755830 ps
T176	/workspace/coverage/default/33.sram_ctrl_partial_access.3891875147	Jun 30 04:44:57 PM PDT 24	Jun 30 04:45:11 PM PDT 24	985089362 ps
T177	/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2902789064	Jun 30 04:44:50 PM PDT 24	Jun 30 04:45:07 PM PDT 24	1517440191 ps
T178	/workspace/coverage/default/46.sram_ctrl_access_during_key_req.580883721	Jun 30 04:46:06 PM PDT 24	Jun 30 04:58:04 PM PDT 24	23557627917 ps
T179	/workspace/coverage/default/23.sram_ctrl_stress_pipeline.2499404115	Jun 30 04:44:26 PM PDT 24	Jun 30 04:49:00 PM PDT 24	14421232245 ps
T180	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3189160560	Jun 30 04:45:43 PM PDT 24	Jun 30 04:51:32 PM PDT 24	5503654008 ps
T136	/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1480506982	Jun 30 04:45:43 PM PDT 24	Jun 30 04:48:51 PM PDT 24	9275187543 ps
T181	/workspace/coverage/default/17.sram_ctrl_stress_all.4216450132	Jun 30 04:44:14 PM PDT 24	Jun 30 05:26:34 PM PDT 24	35101247054 ps
T182	/workspace/coverage/default/4.sram_ctrl_ram_cfg.2895838919	Jun 30 04:43:47 PM PDT 24	Jun 30 04:43:51 PM PDT 24	709977305 ps
T183	/workspace/coverage/default/22.sram_ctrl_lc_escalation.3170266018	Jun 30 04:44:26 PM PDT 24	Jun 30 04:44:59 PM PDT 24	5137395976 ps
T184	/workspace/coverage/default/36.sram_ctrl_multiple_keys.514021582	Jun 30 04:45:16 PM PDT 24	Jun 30 05:06:55 PM PDT 24	61229889658 ps
T185	/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.81627785	Jun 30 04:45:58 PM PDT 24	Jun 30 04:46:21 PM PDT 24	2953441877 ps
T186	/workspace/coverage/default/38.sram_ctrl_stress_all.4023446252	Jun 30 04:45:25 PM PDT 24	Jun 30 06:30:23 PM PDT 24	985717848385 ps
T187	/workspace/coverage/default/26.sram_ctrl_ram_cfg.3979643840	Jun 30 04:44:36 PM PDT 24	Jun 30 04:44:40 PM PDT 24	675882589 ps
T188	/workspace/coverage/default/17.sram_ctrl_regwen.2936789316	Jun 30 04:44:22 PM PDT 24	Jun 30 04:58:32 PM PDT 24	9063575524 ps
T189	/workspace/coverage/default/20.sram_ctrl_max_throughput.1527882194	Jun 30 04:44:17 PM PDT 24	Jun 30 04:44:35 PM PDT 24	699112890 ps
T190	/workspace/coverage/default/48.sram_ctrl_stress_all.3731150986	Jun 30 04:46:18 PM PDT 24	Jun 30 06:37:26 PM PDT 24	41876086484 ps
T52	/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1445478683	Jun 30 04:46:26 PM PDT 24	Jun 30 04:48:59 PM PDT 24	2652562441 ps
T191	/workspace/coverage/default/9.sram_ctrl_partial_access.3087420576	Jun 30 04:43:45 PM PDT 24	Jun 30 04:43:55 PM PDT 24	3214595011 ps
T192	/workspace/coverage/default/37.sram_ctrl_smoke.148487093	Jun 30 04:45:13 PM PDT 24	Jun 30 04:45:56 PM PDT 24	2963630147 ps
T193	/workspace/coverage/default/13.sram_ctrl_executable.2492168122	Jun 30 04:44:06 PM PDT 24	Jun 30 04:50:55 PM PDT 24	38696491154 ps
T194	/workspace/coverage/default/5.sram_ctrl_regwen.663779152	Jun 30 04:43:43 PM PDT 24	Jun 30 04:45:57 PM PDT 24	1310374256 ps
T195	/workspace/coverage/default/14.sram_ctrl_bijection.3305755963	Jun 30 04:44:00 PM PDT 24	Jun 30 05:23:05 PM PDT 24	254669678220 ps
T196	/workspace/coverage/default/27.sram_ctrl_lc_escalation.4230594037	Jun 30 04:44:33 PM PDT 24	Jun 30 04:45:51 PM PDT 24	27209327873 ps
T197	/workspace/coverage/default/10.sram_ctrl_regwen.1778904776	Jun 30 04:44:03 PM PDT 24	Jun 30 05:02:22 PM PDT 24	6836273399 ps
T198	/workspace/coverage/default/48.sram_ctrl_lc_escalation.1077967745	Jun 30 04:46:15 PM PDT 24	Jun 30 04:47:42 PM PDT 24	13406968592 ps
T199	/workspace/coverage/default/9.sram_ctrl_executable.2875527534	Jun 30 04:43:42 PM PDT 24	Jun 30 04:51:52 PM PDT 24	9944385438 ps
T200	/workspace/coverage/default/44.sram_ctrl_max_throughput.609368305	Jun 30 04:45:52 PM PDT 24	Jun 30 04:46:06 PM PDT 24	718731301 ps
T201	/workspace/coverage/default/32.sram_ctrl_max_throughput.1124952300	Jun 30 04:44:52 PM PDT 24	Jun 30 04:45:19 PM PDT 24	751715679 ps
T202	/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2147888404	Jun 30 04:45:57 PM PDT 24	Jun 30 04:49:00 PM PDT 24	12915544573 ps
T75	/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2743946752	Jun 30 04:44:01 PM PDT 24	Jun 30 04:44:10 PM PDT 24	891036137 ps
T203	/workspace/coverage/default/42.sram_ctrl_ram_cfg.2292600871	Jun 30 04:45:44 PM PDT 24	Jun 30 04:45:48 PM PDT 24	1991480534 ps
T204	/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.301968694	Jun 30 04:44:30 PM PDT 24	Jun 30 04:46:05 PM PDT 24	1581702613 ps
T205	/workspace/coverage/default/16.sram_ctrl_multiple_keys.3029658248	Jun 30 04:44:21 PM PDT 24	Jun 30 04:58:37 PM PDT 24	32040309144 ps
T206	/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1896018640	Jun 30 04:43:55 PM PDT 24	Jun 30 04:48:11 PM PDT 24	45628519666 ps
T207	/workspace/coverage/default/23.sram_ctrl_ram_cfg.2386819916	Jun 30 04:44:31 PM PDT 24	Jun 30 04:44:36 PM PDT 24	910638101 ps
T208	/workspace/coverage/default/38.sram_ctrl_bijection.1270500952	Jun 30 04:45:24 PM PDT 24	Jun 30 05:04:51 PM PDT 24	41197586846 ps
T209	/workspace/coverage/default/35.sram_ctrl_max_throughput.1420804799	Jun 30 04:45:13 PM PDT 24	Jun 30 04:45:21 PM PDT 24	717536161 ps
T210	/workspace/coverage/default/0.sram_ctrl_ram_cfg.759513426	Jun 30 04:43:28 PM PDT 24	Jun 30 04:43:34 PM PDT 24	6718519461 ps
T211	/workspace/coverage/default/16.sram_ctrl_executable.937037176	Jun 30 04:44:21 PM PDT 24	Jun 30 05:05:07 PM PDT 24	188816938692 ps
T212	/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2752688694	Jun 30 04:44:22 PM PDT 24	Jun 30 04:50:11 PM PDT 24	56414479661 ps
T213	/workspace/coverage/default/10.sram_ctrl_executable.3442561603	Jun 30 04:43:51 PM PDT 24	Jun 30 05:15:25 PM PDT 24	13091573901 ps
T214	/workspace/coverage/default/19.sram_ctrl_alert_test.2531992347	Jun 30 04:44:22 PM PDT 24	Jun 30 04:44:24 PM PDT 24	55700887 ps
T215	/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3980495529	Jun 30 04:43:32 PM PDT 24	Jun 30 04:47:36 PM PDT 24	3739634958 ps
T64	/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4027773393	Jun 30 04:43:32 PM PDT 24	Jun 30 04:44:59 PM PDT 24	30651489753 ps
T216	/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1488657729	Jun 30 04:46:06 PM PDT 24	Jun 30 04:50:09 PM PDT 24	14546518741 ps
T217	/workspace/coverage/default/11.sram_ctrl_partial_access.2617304766	Jun 30 04:43:57 PM PDT 24	Jun 30 04:44:08 PM PDT 24	1293045841 ps
T218	/workspace/coverage/default/12.sram_ctrl_regwen.1593163101	Jun 30 04:44:03 PM PDT 24	Jun 30 04:57:00 PM PDT 24	48428119559 ps
T219	/workspace/coverage/default/15.sram_ctrl_partial_access.2536718882	Jun 30 04:44:11 PM PDT 24	Jun 30 04:44:18 PM PDT 24	2005524409 ps
T65	/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3394998124	Jun 30 04:45:17 PM PDT 24	Jun 30 04:47:35 PM PDT 24	3209523721 ps
T220	/workspace/coverage/default/14.sram_ctrl_stress_all.4039865919	Jun 30 04:44:04 PM PDT 24	Jun 30 05:29:09 PM PDT 24	279697953652 ps
T221	/workspace/coverage/default/18.sram_ctrl_alert_test.2893972312	Jun 30 04:44:11 PM PDT 24	Jun 30 04:44:13 PM PDT 24	82951555 ps
T222	/workspace/coverage/default/4.sram_ctrl_lc_escalation.1521120918	Jun 30 04:43:45 PM PDT 24	Jun 30 04:44:24 PM PDT 24	24142049539 ps
T223	/workspace/coverage/default/16.sram_ctrl_stress_pipeline.4121329798	Jun 30 04:44:13 PM PDT 24	Jun 30 04:47:11 PM PDT 24	9867809330 ps
T224	/workspace/coverage/default/25.sram_ctrl_smoke.3242133067	Jun 30 04:44:31 PM PDT 24	Jun 30 04:44:48 PM PDT 24	6369898881 ps
T225	/workspace/coverage/default/4.sram_ctrl_max_throughput.816431317	Jun 30 04:43:52 PM PDT 24	Jun 30 04:44:11 PM PDT 24	8661385249 ps
T66	/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3312329960	Jun 30 04:45:39 PM PDT 24	Jun 30 04:46:15 PM PDT 24	1314068148 ps
T226	/workspace/coverage/default/7.sram_ctrl_lc_escalation.1253845320	Jun 30 04:43:42 PM PDT 24	Jun 30 04:44:44 PM PDT 24	22545908719 ps
T227	/workspace/coverage/default/6.sram_ctrl_mem_walk.4094634357	Jun 30 04:43:45 PM PDT 24	Jun 30 04:48:56 PM PDT 24	24255317830 ps
T228	/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3282058168	Jun 30 04:43:34 PM PDT 24	Jun 30 04:51:47 PM PDT 24	7855740784 ps
T229	/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3225394159	Jun 30 04:44:07 PM PDT 24	Jun 30 04:44:15 PM PDT 24	2770943180 ps
T230	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.681062100	Jun 30 04:44:32 PM PDT 24	Jun 30 04:47:36 PM PDT 24	6585408389 ps
T231	/workspace/coverage/default/16.sram_ctrl_max_throughput.4032400259	Jun 30 04:44:23 PM PDT 24	Jun 30 04:44:34 PM PDT 24	705063869 ps
T232	/workspace/coverage/default/45.sram_ctrl_smoke.2421675291	Jun 30 04:46:00 PM PDT 24	Jun 30 04:47:20 PM PDT 24	5425527586 ps
T233	/workspace/coverage/default/18.sram_ctrl_stress_pipeline.3298968610	Jun 30 04:44:22 PM PDT 24	Jun 30 04:48:44 PM PDT 24	3798591245 ps
T234	/workspace/coverage/default/25.sram_ctrl_ram_cfg.1519762513	Jun 30 04:44:36 PM PDT 24	Jun 30 04:44:41 PM PDT 24	2578901471 ps
T235	/workspace/coverage/default/24.sram_ctrl_stress_pipeline.249643472	Jun 30 04:44:30 PM PDT 24	Jun 30 04:48:08 PM PDT 24	11777210493 ps
T236	/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3427517260	Jun 30 04:44:32 PM PDT 24	Jun 30 04:47:05 PM PDT 24	12780678198 ps
T237	/workspace/coverage/default/12.sram_ctrl_stress_all.3591266026	Jun 30 04:43:59 PM PDT 24	Jun 30 05:56:28 PM PDT 24	290873445288 ps
T238	/workspace/coverage/default/29.sram_ctrl_multiple_keys.3992517196	Jun 30 04:44:39 PM PDT 24	Jun 30 04:48:50 PM PDT 24	16078231860 ps
T239	/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2925466510	Jun 30 04:46:19 PM PDT 24	Jun 30 04:49:30 PM PDT 24	11271723199 ps
T240	/workspace/coverage/default/14.sram_ctrl_executable.3692989582	Jun 30 04:44:14 PM PDT 24	Jun 30 05:12:37 PM PDT 24	146128336786 ps
T241	/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3873710861	Jun 30 04:44:32 PM PDT 24	Jun 30 04:49:38 PM PDT 24	5752402832 ps
T242	/workspace/coverage/default/31.sram_ctrl_stress_pipeline.3445849558	Jun 30 04:44:48 PM PDT 24	Jun 30 04:47:17 PM PDT 24	19773745565 ps
T243	/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.3567174454	Jun 30 04:44:27 PM PDT 24	Jun 30 04:46:05 PM PDT 24	3294564005 ps
T244	/workspace/coverage/default/19.sram_ctrl_multiple_keys.771067737	Jun 30 04:44:12 PM PDT 24	Jun 30 05:05:39 PM PDT 24	24516486043 ps
T245	/workspace/coverage/default/21.sram_ctrl_mem_walk.1674702402	Jun 30 04:44:33 PM PDT 24	Jun 30 04:52:13 PM PDT 24	360028782879 ps
T246	/workspace/coverage/default/7.sram_ctrl_stress_all.3377065637	Jun 30 04:43:48 PM PDT 24	Jun 30 05:18:18 PM PDT 24	47547146371 ps
T247	/workspace/coverage/default/2.sram_ctrl_stress_all.2466166135	Jun 30 04:43:50 PM PDT 24	Jun 30 05:30:43 PM PDT 24	51103372782 ps
T248	/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.242088197	Jun 30 04:44:12 PM PDT 24	Jun 30 04:49:57 PM PDT 24	14743026669 ps
T249	/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1849347714	Jun 30 04:44:44 PM PDT 24	Jun 30 04:51:31 PM PDT 24	31949208116 ps
T250	/workspace/coverage/default/40.sram_ctrl_regwen.3726680133	Jun 30 04:45:29 PM PDT 24	Jun 30 05:01:58 PM PDT 24	30703294860 ps
T251	/workspace/coverage/default/7.sram_ctrl_smoke.1296785842	Jun 30 04:43:49 PM PDT 24	Jun 30 04:43:55 PM PDT 24	1572284897 ps
T252	/workspace/coverage/default/20.sram_ctrl_ram_cfg.2499842296	Jun 30 04:44:26 PM PDT 24	Jun 30 04:44:29 PM PDT 24	360747755 ps
T253	/workspace/coverage/default/31.sram_ctrl_max_throughput.2706864359	Jun 30 04:44:48 PM PDT 24	Jun 30 04:45:53 PM PDT 24	1873785240 ps
T254	/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3979781016	Jun 30 04:43:48 PM PDT 24	Jun 30 04:51:09 PM PDT 24	8131650501 ps
T255	/workspace/coverage/default/26.sram_ctrl_bijection.2397718068	Jun 30 04:44:35 PM PDT 24	Jun 30 05:23:10 PM PDT 24	520492617635 ps
T256	/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2205279114	Jun 30 04:43:33 PM PDT 24	Jun 30 04:52:35 PM PDT 24	23676443711 ps
T257	/workspace/coverage/default/15.sram_ctrl_alert_test.967707806	Jun 30 04:44:22 PM PDT 24	Jun 30 04:44:24 PM PDT 24	35685735 ps
T258	/workspace/coverage/default/12.sram_ctrl_lc_escalation.2438511136	Jun 30 04:44:03 PM PDT 24	Jun 30 04:44:30 PM PDT 24	3893196891 ps
T259	/workspace/coverage/default/33.sram_ctrl_ram_cfg.2357669443	Jun 30 04:44:56 PM PDT 24	Jun 30 04:45:00 PM PDT 24	1543214617 ps
T260	/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.626479651	Jun 30 04:44:42 PM PDT 24	Jun 30 04:47:44 PM PDT 24	9779629989 ps
T261	/workspace/coverage/default/15.sram_ctrl_regwen.895547024	Jun 30 04:44:26 PM PDT 24	Jun 30 04:52:44 PM PDT 24	5070885509 ps
T262	/workspace/coverage/default/49.sram_ctrl_bijection.789516478	Jun 30 04:46:18 PM PDT 24	Jun 30 05:01:16 PM PDT 24	38581965862 ps
T263	/workspace/coverage/default/7.sram_ctrl_ram_cfg.1238418420	Jun 30 04:44:00 PM PDT 24	Jun 30 04:44:04 PM PDT 24	1397784464 ps
T264	/workspace/coverage/default/33.sram_ctrl_multiple_keys.3581994471	Jun 30 04:44:53 PM PDT 24	Jun 30 04:57:19 PM PDT 24	70143246357 ps
T265	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.643856859	Jun 30 04:45:27 PM PDT 24	Jun 30 04:48:06 PM PDT 24	3259075246 ps
T266	/workspace/coverage/default/15.sram_ctrl_bijection.1686236677	Jun 30 04:44:07 PM PDT 24	Jun 30 05:07:28 PM PDT 24	73424625565 ps
T267	/workspace/coverage/default/18.sram_ctrl_mem_partial_access.1621166826	Jun 30 04:44:11 PM PDT 24	Jun 30 04:46:41 PM PDT 24	6405431673 ps
T268	/workspace/coverage/default/14.sram_ctrl_partial_access.1013906140	Jun 30 04:44:00 PM PDT 24	Jun 30 04:44:24 PM PDT 24	962530382 ps
T269	/workspace/coverage/default/22.sram_ctrl_multiple_keys.3060815051	Jun 30 04:44:29 PM PDT 24	Jun 30 04:49:30 PM PDT 24	12477909574 ps
T270	/workspace/coverage/default/6.sram_ctrl_partial_access.336696334	Jun 30 04:43:36 PM PDT 24	Jun 30 04:43:41 PM PDT 24	2104824385 ps
T271	/workspace/coverage/default/13.sram_ctrl_bijection.79197736	Jun 30 04:44:00 PM PDT 24	Jun 30 05:16:15 PM PDT 24	130335269418 ps
T272	/workspace/coverage/default/26.sram_ctrl_mem_walk.765846862	Jun 30 04:44:34 PM PDT 24	Jun 30 04:50:34 PM PDT 24	44908252761 ps
T273	/workspace/coverage/default/48.sram_ctrl_executable.785386649	Jun 30 04:46:20 PM PDT 24	Jun 30 05:05:00 PM PDT 24	14835633692 ps
T274	/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1657200910	Jun 30 04:43:31 PM PDT 24	Jun 30 04:46:11 PM PDT 24	8063147768 ps
T275	/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2824155011	Jun 30 04:45:04 PM PDT 24	Jun 30 04:47:38 PM PDT 24	2945987202 ps
T276	/workspace/coverage/default/35.sram_ctrl_bijection.3373276899	Jun 30 04:45:03 PM PDT 24	Jun 30 04:55:54 PM PDT 24	19035793921 ps
T277	/workspace/coverage/default/17.sram_ctrl_max_throughput.219985753	Jun 30 04:44:11 PM PDT 24	Jun 30 04:46:16 PM PDT 24	2395600105 ps
T278	/workspace/coverage/default/33.sram_ctrl_mem_partial_access.1707911557	Jun 30 04:44:57 PM PDT 24	Jun 30 04:46:18 PM PDT 24	2467215367 ps
T279	/workspace/coverage/default/41.sram_ctrl_mem_walk.941154031	Jun 30 04:45:34 PM PDT 24	Jun 30 04:49:47 PM PDT 24	3947120903 ps
T280	/workspace/coverage/default/0.sram_ctrl_lc_escalation.1266991718	Jun 30 04:43:24 PM PDT 24	Jun 30 04:43:49 PM PDT 24	3618120468 ps
T281	/workspace/coverage/default/5.sram_ctrl_max_throughput.2562908635	Jun 30 04:43:43 PM PDT 24	Jun 30 04:44:22 PM PDT 24	919080259 ps
T282	/workspace/coverage/default/27.sram_ctrl_executable.121019558	Jun 30 04:44:32 PM PDT 24	Jun 30 04:51:35 PM PDT 24	16562320969 ps
T283	/workspace/coverage/default/8.sram_ctrl_lc_escalation.1309070822	Jun 30 04:43:45 PM PDT 24	Jun 30 04:44:11 PM PDT 24	4363535428 ps
T284	/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1080439451	Jun 30 04:43:57 PM PDT 24	Jun 30 04:46:47 PM PDT 24	20396413715 ps
T285	/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.907377165	Jun 30 04:45:11 PM PDT 24	Jun 30 04:45:51 PM PDT 24	2721845076 ps
T286	/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1248770616	Jun 30 04:43:25 PM PDT 24	Jun 30 04:49:05 PM PDT 24	8743746273 ps
T287	/workspace/coverage/default/32.sram_ctrl_bijection.2693955850	Jun 30 04:44:50 PM PDT 24	Jun 30 05:00:37 PM PDT 24	149383087091 ps
T288	/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3242226229	Jun 30 04:45:50 PM PDT 24	Jun 30 04:48:03 PM PDT 24	2392457207 ps
T289	/workspace/coverage/default/47.sram_ctrl_mem_walk.1607871186	Jun 30 04:46:14 PM PDT 24	Jun 30 04:48:28 PM PDT 24	7313762417 ps
T290	/workspace/coverage/default/44.sram_ctrl_executable.390564439	Jun 30 04:45:51 PM PDT 24	Jun 30 04:54:26 PM PDT 24	63357526211 ps
T291	/workspace/coverage/default/26.sram_ctrl_smoke.2732538553	Jun 30 04:44:31 PM PDT 24	Jun 30 04:44:48 PM PDT 24	3365390665 ps
T292	/workspace/coverage/default/0.sram_ctrl_multiple_keys.3936888436	Jun 30 04:43:28 PM PDT 24	Jun 30 04:52:29 PM PDT 24	29880291366 ps
T293	/workspace/coverage/default/45.sram_ctrl_ram_cfg.315342199	Jun 30 04:45:58 PM PDT 24	Jun 30 04:46:02 PM PDT 24	463413541 ps
T294	/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1930802231	Jun 30 04:45:21 PM PDT 24	Jun 30 04:46:16 PM PDT 24	2522538147 ps
T295	/workspace/coverage/default/4.sram_ctrl_partial_access.2290042652	Jun 30 04:43:43 PM PDT 24	Jun 30 04:43:48 PM PDT 24	756221256 ps
T92	/workspace/coverage/default/30.sram_ctrl_mem_partial_access.2012474301	Jun 30 04:44:51 PM PDT 24	Jun 30 04:47:32 PM PDT 24	41341679009 ps
T296	/workspace/coverage/default/39.sram_ctrl_access_during_key_req.3493546420	Jun 30 04:45:30 PM PDT 24	Jun 30 04:51:26 PM PDT 24	4972281209 ps
T297	/workspace/coverage/default/30.sram_ctrl_smoke.21849874	Jun 30 04:44:43 PM PDT 24	Jun 30 04:45:02 PM PDT 24	1586680001 ps
T298	/workspace/coverage/default/23.sram_ctrl_partial_access.2585636735	Jun 30 04:44:32 PM PDT 24	Jun 30 04:46:58 PM PDT 24	1056497409 ps
T299	/workspace/coverage/default/21.sram_ctrl_executable.1185395402	Jun 30 04:44:24 PM PDT 24	Jun 30 04:55:02 PM PDT 24	27026905984 ps
T300	/workspace/coverage/default/42.sram_ctrl_executable.905688153	Jun 30 04:45:41 PM PDT 24	Jun 30 04:55:19 PM PDT 24	6475210549 ps
T301	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.4071076039	Jun 30 04:44:07 PM PDT 24	Jun 30 04:50:32 PM PDT 24	59650640880 ps
T302	/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.429586036	Jun 30 04:44:19 PM PDT 24	Jun 30 04:44:32 PM PDT 24	1551201097 ps
T303	/workspace/coverage/default/32.sram_ctrl_mem_walk.22478308	Jun 30 04:44:56 PM PDT 24	Jun 30 04:47:06 PM PDT 24	2019621023 ps
T304	/workspace/coverage/default/24.sram_ctrl_smoke.16605687	Jun 30 04:44:32 PM PDT 24	Jun 30 04:46:03 PM PDT 24	1141231538 ps
T305	/workspace/coverage/default/44.sram_ctrl_smoke.1274434465	Jun 30 04:45:53 PM PDT 24	Jun 30 04:46:51 PM PDT 24	2095985810 ps
T112	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2090500105	Jun 30 04:45:17 PM PDT 24	Jun 30 04:45:28 PM PDT 24	1478582667 ps
T53	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.694318320	Jun 30 04:45:58 PM PDT 24	Jun 30 04:46:29 PM PDT 24	3205148099 ps
T306	/workspace/coverage/default/41.sram_ctrl_partial_access.3306768016	Jun 30 04:45:36 PM PDT 24	Jun 30 04:47:19 PM PDT 24	1115388930 ps