Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.97	99.19	94.27	99.72	100.00	96.03	99.12	97.44

Total tests in report: 1035

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
82.08	82.08	94.93	94.93	81.04	81.04	93.53	93.53	47.62	47.62	86.02	86.02	94.30	94.30	77.15	77.15	/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2472219243
89.55	7.47	97.38	2.45	82.46	1.42	94.32	0.79	90.48	42.86	90.28	4.27	94.44	0.15	77.51	0.37	/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3000113344
92.60	3.04	98.53	1.14	84.83	2.37	94.73	0.41	100.00	9.52	92.89	2.61	95.47	1.02	81.72	4.20	/workspace/coverage/default/6.sram_ctrl_stress_all.1234597909
93.99	1.40	98.77	0.25	87.68	2.84	95.97	1.24	100.00	0.00	94.55	1.66	95.61	0.15	85.37	3.66	/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3248261386
94.95	0.95	98.94	0.16	88.51	0.83	96.18	0.21	100.00	0.00	95.26	0.71	95.61	0.00	90.13	4.75	/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1971946076
95.55	0.60	98.94	0.00	88.51	0.00	97.83	1.65	100.00	0.00	95.26	0.00	95.61	0.00	92.69	2.56	/workspace/coverage/default/27.sram_ctrl_executable.3476317130
96.12	0.57	99.10	0.16	90.28	1.78	98.24	0.41	100.00	0.00	95.97	0.71	96.20	0.58	93.05	0.37	/workspace/coverage/default/0.sram_ctrl_sec_cm.438154641
96.38	0.26	99.10	0.00	90.40	0.12	98.24	0.00	100.00	0.00	96.21	0.24	96.20	0.00	94.52	1.46	/workspace/coverage/default/27.sram_ctrl_stress_all.2457677749
96.61	0.22	99.10	0.00	90.76	0.36	98.73	0.48	100.00	0.00	96.21	0.00	96.20	0.00	95.25	0.73	/workspace/coverage/default/19.sram_ctrl_alert_test.2627634058
96.80	0.20	99.10	0.00	90.76	0.00	98.79	0.07	100.00	0.00	96.21	0.00	97.51	1.32	95.25	0.00	/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2804081391
96.94	0.14	99.10	0.00	90.76	0.00	98.86	0.07	100.00	0.00	96.21	0.00	98.39	0.88	95.25	0.00	/workspace/coverage/default/35.sram_ctrl_access_during_key_req.3679435983
97.07	0.13	99.18	0.08	90.76	0.00	99.72	0.86	100.00	0.00	96.21	0.00	98.39	0.00	95.25	0.00	/workspace/coverage/default/36.sram_ctrl_ram_cfg.3050127334
97.20	0.13	99.18	0.00	90.76	0.00	99.72	0.00	100.00	0.00	96.21	0.00	98.39	0.00	96.16	0.91	/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3391718056
97.31	0.10	99.18	0.00	90.76	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.73	96.16	0.00	/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2886924571
97.39	0.09	99.18	0.00	91.00	0.24	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.53	0.37	/workspace/coverage/default/34.sram_ctrl_stress_all.4246601889
97.47	0.08	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.07	0.55	/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2718785527
97.50	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.26	0.18	/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2457619110
97.52	0.03	99.18	0.00	91.00	0.00	99.72	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.44	0.18	/workspace/coverage/default/0.sram_ctrl_executable.195861887

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.91693770
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3213506395
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1172074625
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2623000016
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2901645533
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2339538166
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.975018695
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.979598293
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1830624370
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2983568430
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3556790715
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.412704558
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.236440924
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3149776333
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1469005068
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1029426253
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2977031284
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2546610523
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3787821414
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3647407895
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1816824321
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3836593115
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.130217169
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2812098657
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2512049147
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2013877488
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2887597504
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.723603905
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2032672577
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3727051488
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2379630623
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3208029441
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3411724285
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1406750243
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2256600424
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2848452292
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.360300719
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3435698294
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2059556727
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2221638968
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2734870683
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.169144397
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2925166243
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1287001262
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1284791652
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1553896021
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2098614075
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2507131704
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3579661173
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3174165879
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3120906572
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3787800342
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1698199565
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1385813542
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3642485449
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3742533837
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3198700343
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2768274470
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3242308239
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1793819786
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3718415951
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.985547756
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1251633605
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3914830163
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.477785738
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1565238596
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2251148369
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.723503747
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3150897174
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.648422900
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1739673240
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.58484571
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2481258243
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.921387580
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1749618873
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3150401158
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.722070518
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2802951909
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1909999350
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3031626785
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3958669685
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3858394963
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1275753944
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3579606466
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.352119604
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2094794438
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1090579414
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3616813717
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3990924352
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.432473943
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3224898934
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.253074297
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4153832668
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1105364293
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2231238000
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3472501908
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1911507751
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1038740075
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1258021000
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2229345844
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3961580519
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3309060478
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1799643081
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.501747760
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.68950145
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.337783646
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4254879490
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.4241277863
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2308835932
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2730982415
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.757926396
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2572419373
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.375580550
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3791919455
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1624780503
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1867626264
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.756281987
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1158865304
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3417750768
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.591443694
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2211780504
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2798691936
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4159944094
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1278104882
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2213973390
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.4012840822
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1349068008
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2416214357
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4141133569
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1168024514
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3411189057
/workspace/coverage/default/0.sram_ctrl_alert_test.1949735266
/workspace/coverage/default/0.sram_ctrl_bijection.3976562268
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2338965518
/workspace/coverage/default/0.sram_ctrl_max_throughput.569968604
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3287681991
/workspace/coverage/default/0.sram_ctrl_mem_walk.3924097301
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1371811188
/workspace/coverage/default/0.sram_ctrl_partial_access.3567755074
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.331696103
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2524108007
/workspace/coverage/default/0.sram_ctrl_regwen.2840659516
/workspace/coverage/default/0.sram_ctrl_smoke.294299894
/workspace/coverage/default/0.sram_ctrl_stress_all.3617458329
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2128256255
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.963729359
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3611012908
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3734326905
/workspace/coverage/default/1.sram_ctrl_alert_test.2809805888
/workspace/coverage/default/1.sram_ctrl_bijection.2906487443
/workspace/coverage/default/1.sram_ctrl_executable.2016617570
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1889528226
/workspace/coverage/default/1.sram_ctrl_max_throughput.1632537584
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2037860694
/workspace/coverage/default/1.sram_ctrl_mem_walk.1526358946
/workspace/coverage/default/1.sram_ctrl_partial_access.3932136250
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1390613151
/workspace/coverage/default/1.sram_ctrl_ram_cfg.179715992
/workspace/coverage/default/1.sram_ctrl_regwen.697298949
/workspace/coverage/default/1.sram_ctrl_sec_cm.905831404
/workspace/coverage/default/1.sram_ctrl_smoke.3628441736
/workspace/coverage/default/1.sram_ctrl_stress_all.2341415513
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.317675684
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1401858891
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1608476883
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1267638531
/workspace/coverage/default/10.sram_ctrl_alert_test.310507643
/workspace/coverage/default/10.sram_ctrl_bijection.2229522724
/workspace/coverage/default/10.sram_ctrl_executable.3425396451
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1170037521
/workspace/coverage/default/10.sram_ctrl_max_throughput.956072729
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1298070471
/workspace/coverage/default/10.sram_ctrl_mem_walk.2288395621
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1868676597
/workspace/coverage/default/10.sram_ctrl_partial_access.3374243746
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2810094435
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2400950599
/workspace/coverage/default/10.sram_ctrl_regwen.458488056
/workspace/coverage/default/10.sram_ctrl_smoke.1844801712
/workspace/coverage/default/10.sram_ctrl_stress_all.4121175676
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1782640315
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.957113280
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3450664769
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2928369624
/workspace/coverage/default/11.sram_ctrl_alert_test.703264972
/workspace/coverage/default/11.sram_ctrl_bijection.1948936847
/workspace/coverage/default/11.sram_ctrl_executable.817800553
/workspace/coverage/default/11.sram_ctrl_lc_escalation.662995306
/workspace/coverage/default/11.sram_ctrl_max_throughput.2304815281
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.486195381
/workspace/coverage/default/11.sram_ctrl_mem_walk.3069835843
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4145997455
/workspace/coverage/default/11.sram_ctrl_partial_access.112617697
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2151047249
/workspace/coverage/default/11.sram_ctrl_ram_cfg.4001479064
/workspace/coverage/default/11.sram_ctrl_regwen.575746096
/workspace/coverage/default/11.sram_ctrl_smoke.3212188112
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/workspace/coverage/default/42.sram_ctrl_mem_partial_access.647784456
/workspace/coverage/default/42.sram_ctrl_mem_walk.1788747680
/workspace/coverage/default/42.sram_ctrl_multiple_keys.3932282715
/workspace/coverage/default/42.sram_ctrl_partial_access.1639736152
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3221018977
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2992833310
/workspace/coverage/default/42.sram_ctrl_regwen.1280880746
/workspace/coverage/default/42.sram_ctrl_smoke.1316736168
/workspace/coverage/default/42.sram_ctrl_stress_all.3854720939
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1660785190
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2103469574
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3627084298
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1128806588
/workspace/coverage/default/43.sram_ctrl_alert_test.1916626464
/workspace/coverage/default/43.sram_ctrl_bijection.1837932084
/workspace/coverage/default/43.sram_ctrl_executable.4294089803
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3538732161
/workspace/coverage/default/43.sram_ctrl_max_throughput.1477681048
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.689797757
/workspace/coverage/default/43.sram_ctrl_mem_walk.3443252789
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2657560459
/workspace/coverage/default/43.sram_ctrl_partial_access.1384441094
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2934492051
/workspace/coverage/default/43.sram_ctrl_ram_cfg.151981423
/workspace/coverage/default/43.sram_ctrl_regwen.3624433383
/workspace/coverage/default/43.sram_ctrl_smoke.1111265694
/workspace/coverage/default/43.sram_ctrl_stress_all.705380896
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.334777587
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.4048773074
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2399329898
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2463168274
/workspace/coverage/default/44.sram_ctrl_alert_test.463397977
/workspace/coverage/default/44.sram_ctrl_executable.1146279494
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1433010365
/workspace/coverage/default/44.sram_ctrl_max_throughput.4034438787
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1952024400
/workspace/coverage/default/44.sram_ctrl_mem_walk.3051327340
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1539632801
/workspace/coverage/default/44.sram_ctrl_partial_access.3641820170
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.516020098
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2303917679
/workspace/coverage/default/44.sram_ctrl_regwen.1903102779
/workspace/coverage/default/44.sram_ctrl_smoke.1754716641
/workspace/coverage/default/44.sram_ctrl_stress_all.969152967
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3020523357
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3064564773
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4261996598
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3642406871
/workspace/coverage/default/45.sram_ctrl_alert_test.960470934
/workspace/coverage/default/45.sram_ctrl_executable.1924449680
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2915404321
/workspace/coverage/default/45.sram_ctrl_max_throughput.978145582
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2990645867
/workspace/coverage/default/45.sram_ctrl_mem_walk.807680404
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2228528006
/workspace/coverage/default/45.sram_ctrl_partial_access.837010433
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4228945368
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3666514304
/workspace/coverage/default/45.sram_ctrl_regwen.4184598518
/workspace/coverage/default/45.sram_ctrl_smoke.3676881226
/workspace/coverage/default/45.sram_ctrl_stress_all.3075233766
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2165841571
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.254453007
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1112794603
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1665129703
/workspace/coverage/default/46.sram_ctrl_alert_test.389201046
/workspace/coverage/default/46.sram_ctrl_bijection.1299806381
/workspace/coverage/default/46.sram_ctrl_executable.1984033508
/workspace/coverage/default/46.sram_ctrl_lc_escalation.81327387
/workspace/coverage/default/46.sram_ctrl_max_throughput.1952541263
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2578312968
/workspace/coverage/default/46.sram_ctrl_mem_walk.2632690938
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3159120775
/workspace/coverage/default/46.sram_ctrl_partial_access.2675531106
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.266546421
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3328876223
/workspace/coverage/default/46.sram_ctrl_regwen.938695075
/workspace/coverage/default/46.sram_ctrl_smoke.4177484445
/workspace/coverage/default/46.sram_ctrl_stress_all.1563476665
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3914579806
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.380151004
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2935323595
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1309218415
/workspace/coverage/default/47.sram_ctrl_alert_test.3426934395
/workspace/coverage/default/47.sram_ctrl_bijection.4218639004
/workspace/coverage/default/47.sram_ctrl_executable.1590462395
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1830328537
/workspace/coverage/default/47.sram_ctrl_max_throughput.1616640972
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2788948472
/workspace/coverage/default/47.sram_ctrl_mem_walk.1172170609
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2021701508
/workspace/coverage/default/47.sram_ctrl_partial_access.1744643136
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1828250375
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2606823538
/workspace/coverage/default/47.sram_ctrl_regwen.3364260145
/workspace/coverage/default/47.sram_ctrl_smoke.2230350906
/workspace/coverage/default/47.sram_ctrl_stress_all.219604081
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.106160312
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1547055132
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1072860044
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2060982400
/workspace/coverage/default/48.sram_ctrl_alert_test.986474614
/workspace/coverage/default/48.sram_ctrl_bijection.39620481
/workspace/coverage/default/48.sram_ctrl_executable.331527165
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3220593617
/workspace/coverage/default/48.sram_ctrl_max_throughput.1055224028
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2315617944
/workspace/coverage/default/48.sram_ctrl_mem_walk.1713017387
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1975933460
/workspace/coverage/default/48.sram_ctrl_partial_access.2455981101
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.805029879
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3296395194
/workspace/coverage/default/48.sram_ctrl_regwen.2637639240
/workspace/coverage/default/48.sram_ctrl_smoke.2607425604
/workspace/coverage/default/48.sram_ctrl_stress_all.1365360028
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.594875904
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2344345964
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3403565688
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3358188618
/workspace/coverage/default/49.sram_ctrl_alert_test.1596637843
/workspace/coverage/default/49.sram_ctrl_bijection.2263341149
/workspace/coverage/default/49.sram_ctrl_executable.1517057737
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3089784139
/workspace/coverage/default/49.sram_ctrl_max_throughput.3869696473
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2718244047
/workspace/coverage/default/49.sram_ctrl_mem_walk.4129407380
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1259252247
/workspace/coverage/default/49.sram_ctrl_partial_access.2002544747
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3501113486
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1283291421
/workspace/coverage/default/49.sram_ctrl_regwen.666858393
/workspace/coverage/default/49.sram_ctrl_smoke.2299689061
/workspace/coverage/default/49.sram_ctrl_stress_all.684846295
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4178747053
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2322500594
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.861899421
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3333409768
/workspace/coverage/default/5.sram_ctrl_alert_test.3236865396
/workspace/coverage/default/5.sram_ctrl_bijection.2544706021
/workspace/coverage/default/5.sram_ctrl_executable.3851683375
/workspace/coverage/default/5.sram_ctrl_lc_escalation.214465531
/workspace/coverage/default/5.sram_ctrl_max_throughput.1679408518
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1355325495
/workspace/coverage/default/5.sram_ctrl_mem_walk.747831507
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4285248154
/workspace/coverage/default/5.sram_ctrl_partial_access.3433247374
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.25288485
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3700199557
/workspace/coverage/default/5.sram_ctrl_regwen.2230347168
/workspace/coverage/default/5.sram_ctrl_smoke.1402097462
/workspace/coverage/default/5.sram_ctrl_stress_all.1628320604
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1939128389
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1479114305
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.817600303
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3542304017
/workspace/coverage/default/6.sram_ctrl_alert_test.1375873513
/workspace/coverage/default/6.sram_ctrl_bijection.1474429765
/workspace/coverage/default/6.sram_ctrl_executable.2511809728
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2123546263
/workspace/coverage/default/6.sram_ctrl_max_throughput.129497662
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2301188177
/workspace/coverage/default/6.sram_ctrl_mem_walk.61002152
/workspace/coverage/default/6.sram_ctrl_multiple_keys.950999737
/workspace/coverage/default/6.sram_ctrl_partial_access.202348397
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.582097570
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1588525594
/workspace/coverage/default/6.sram_ctrl_regwen.264798031
/workspace/coverage/default/6.sram_ctrl_smoke.3626989329
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2632246995
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.360219491
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1368968496
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3386787299
/workspace/coverage/default/7.sram_ctrl_alert_test.3207747610
/workspace/coverage/default/7.sram_ctrl_bijection.649189154
/workspace/coverage/default/7.sram_ctrl_executable.153011063
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3736419843
/workspace/coverage/default/7.sram_ctrl_max_throughput.3520780600
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.8250117
/workspace/coverage/default/7.sram_ctrl_mem_walk.3230225403
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3958458647
/workspace/coverage/default/7.sram_ctrl_partial_access.2592885551
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.660211405
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1925261479
/workspace/coverage/default/7.sram_ctrl_regwen.2517563835
/workspace/coverage/default/7.sram_ctrl_smoke.3433681594
/workspace/coverage/default/7.sram_ctrl_stress_all.3048893427
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3421112680
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3439229108
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1803453312
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1747144840
/workspace/coverage/default/8.sram_ctrl_alert_test.1772649185
/workspace/coverage/default/8.sram_ctrl_bijection.640943863
/workspace/coverage/default/8.sram_ctrl_executable.700083453
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1257567777
/workspace/coverage/default/8.sram_ctrl_max_throughput.1630350704
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2722316465
/workspace/coverage/default/8.sram_ctrl_mem_walk.1688425633
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3070382928
/workspace/coverage/default/8.sram_ctrl_partial_access.3526807292
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1861557421
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3076721813
/workspace/coverage/default/8.sram_ctrl_regwen.934467490
/workspace/coverage/default/8.sram_ctrl_smoke.482815962
/workspace/coverage/default/8.sram_ctrl_stress_all.2678489991
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2365713768
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2702344134
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1193432134
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.439532517
/workspace/coverage/default/9.sram_ctrl_alert_test.3741901944
/workspace/coverage/default/9.sram_ctrl_bijection.748530370
/workspace/coverage/default/9.sram_ctrl_executable.1992256825
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1169718692
/workspace/coverage/default/9.sram_ctrl_max_throughput.4034109772
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1263034057
/workspace/coverage/default/9.sram_ctrl_mem_walk.1912836205
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2150691171
/workspace/coverage/default/9.sram_ctrl_partial_access.2608379886
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2837646043
/workspace/coverage/default/9.sram_ctrl_ram_cfg.664834631
/workspace/coverage/default/9.sram_ctrl_regwen.1435866691
/workspace/coverage/default/9.sram_ctrl_smoke.699230808
/workspace/coverage/default/9.sram_ctrl_stress_all.1289726908
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1474595904
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3350839135

Total test records in report: 1035

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/30.sram_ctrl_mem_partial_access.3764796947	Jul 07 04:57:11 PM PDT 24	Jul 07 04:59:23 PM PDT 24	1641159327 ps
T2	/workspace/coverage/default/35.sram_ctrl_access_during_key_req.3679435983	Jul 07 04:58:18 PM PDT 24	Jul 07 05:18:00 PM PDT 24	14397371361 ps
T3	/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2472219243	Jul 07 04:53:41 PM PDT 24	Jul 07 04:55:56 PM PDT 24	6739974868 ps
T6	/workspace/coverage/default/6.sram_ctrl_stress_all.1234597909	Jul 07 04:53:38 PM PDT 24	Jul 07 05:30:11 PM PDT 24	47646161426 ps
T9	/workspace/coverage/default/6.sram_ctrl_smoke.3626989329	Jul 07 04:53:28 PM PDT 24	Jul 07 04:53:45 PM PDT 24	649359304 ps
T10	/workspace/coverage/default/30.sram_ctrl_access_during_key_req.2195492586	Jul 07 04:57:04 PM PDT 24	Jul 07 05:13:19 PM PDT 24	12657906301 ps
T4	/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3287681991	Jul 07 04:53:18 PM PDT 24	Jul 07 04:55:43 PM PDT 24	1836991453 ps
T7	/workspace/coverage/default/43.sram_ctrl_lc_escalation.3538732161	Jul 07 05:00:00 PM PDT 24	Jul 07 05:01:06 PM PDT 24	12042750587 ps
T5	/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3248261386	Jul 07 04:54:24 PM PDT 24	Jul 07 05:01:57 PM PDT 24	20432123472 ps
T11	/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1411633761	Jul 07 04:55:06 PM PDT 24	Jul 07 04:55:38 PM PDT 24	2886088493 ps
T54	/workspace/coverage/default/31.sram_ctrl_stress_pipeline.464207878	Jul 07 04:57:13 PM PDT 24	Jul 07 05:01:04 PM PDT 24	47010297374 ps
T24	/workspace/coverage/default/27.sram_ctrl_executable.3476317130	Jul 07 04:56:28 PM PDT 24	Jul 07 05:15:56 PM PDT 24	19019132288 ps
T79	/workspace/coverage/default/10.sram_ctrl_max_throughput.956072729	Jul 07 04:53:44 PM PDT 24	Jul 07 04:54:17 PM PDT 24	742934997 ps
T22	/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1050284509	Jul 07 04:53:34 PM PDT 24	Jul 07 04:53:45 PM PDT 24	390231966 ps
T8	/workspace/coverage/default/35.sram_ctrl_lc_escalation.1897339045	Jul 07 04:58:18 PM PDT 24	Jul 07 05:00:07 PM PDT 24	63987496035 ps
T12	/workspace/coverage/default/19.sram_ctrl_alert_test.2627634058	Jul 07 04:54:51 PM PDT 24	Jul 07 04:54:52 PM PDT 24	39932054 ps
T41	/workspace/coverage/default/41.sram_ctrl_multiple_keys.3866042774	Jul 07 04:59:35 PM PDT 24	Jul 07 05:03:11 PM PDT 24	9442835688 ps
T155	/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2935323595	Jul 07 05:00:49 PM PDT 24	Jul 07 05:00:59 PM PDT 24	724238554 ps
T39	/workspace/coverage/default/15.sram_ctrl_regwen.649580392	Jul 07 04:54:09 PM PDT 24	Jul 07 05:12:55 PM PDT 24	53850611350 ps
T18	/workspace/coverage/default/29.sram_ctrl_regwen.961181648	Jul 07 04:56:52 PM PDT 24	Jul 07 05:09:57 PM PDT 24	2137872814 ps
T115	/workspace/coverage/default/15.sram_ctrl_bijection.1445236480	Jul 07 04:54:06 PM PDT 24	Jul 07 05:25:14 PM PDT 24	163137756570 ps
T40	/workspace/coverage/default/31.sram_ctrl_mem_walk.2738013984	Jul 07 04:57:25 PM PDT 24	Jul 07 05:03:31 PM PDT 24	42185980787 ps
T108	/workspace/coverage/default/6.sram_ctrl_stress_pipeline.360219491	Jul 07 04:53:30 PM PDT 24	Jul 07 04:55:26 PM PDT 24	11359887247 ps
T43	/workspace/coverage/default/3.sram_ctrl_executable.3256638973	Jul 07 04:53:28 PM PDT 24	Jul 07 05:22:30 PM PDT 24	104591001367 ps
T156	/workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2064983774	Jul 07 04:58:59 PM PDT 24	Jul 07 05:01:39 PM PDT 24	1557906750 ps
T94	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.4155690527	Jul 07 04:59:30 PM PDT 24	Jul 07 05:00:49 PM PDT 24	2461185084 ps
T157	/workspace/coverage/default/27.sram_ctrl_max_throughput.4027146058	Jul 07 04:56:28 PM PDT 24	Jul 07 04:58:09 PM PDT 24	749230655 ps
T109	/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1367630193	Jul 07 04:53:50 PM PDT 24	Jul 07 04:59:28 PM PDT 24	20008282270 ps
T110	/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2796669042	Jul 07 04:57:00 PM PDT 24	Jul 07 05:00:59 PM PDT 24	12137142935 ps
T74	/workspace/coverage/default/40.sram_ctrl_lc_escalation.2272127456	Jul 07 04:59:28 PM PDT 24	Jul 07 05:00:18 PM PDT 24	9169637117 ps
T158	/workspace/coverage/default/45.sram_ctrl_smoke.3676881226	Jul 07 05:00:25 PM PDT 24	Jul 07 05:00:36 PM PDT 24	462833616 ps
T21	/workspace/coverage/default/33.sram_ctrl_lc_escalation.620536569	Jul 07 04:57:48 PM PDT 24	Jul 07 04:59:32 PM PDT 24	14785786372 ps
T159	/workspace/coverage/default/31.sram_ctrl_smoke.1408479616	Jul 07 04:57:14 PM PDT 24	Jul 07 04:57:28 PM PDT 24	2024298479 ps
T25	/workspace/coverage/default/31.sram_ctrl_ram_cfg.1027592940	Jul 07 04:57:22 PM PDT 24	Jul 07 04:57:26 PM PDT 24	1605807199 ps
T160	/workspace/coverage/default/31.sram_ctrl_partial_access.3741495827	Jul 07 04:57:15 PM PDT 24	Jul 07 04:57:21 PM PDT 24	2145284624 ps
T154	/workspace/coverage/default/16.sram_ctrl_bijection.2777538719	Jul 07 04:54:13 PM PDT 24	Jul 07 05:23:10 PM PDT 24	22880482609 ps
T153	/workspace/coverage/default/27.sram_ctrl_bijection.3862418523	Jul 07 04:56:21 PM PDT 24	Jul 07 05:19:28 PM PDT 24	212970970859 ps
T161	/workspace/coverage/default/16.sram_ctrl_partial_access.2067355600	Jul 07 04:54:15 PM PDT 24	Jul 07 04:54:35 PM PDT 24	581330573 ps
T146	/workspace/coverage/default/28.sram_ctrl_executable.3225728183	Jul 07 04:56:41 PM PDT 24	Jul 07 04:58:53 PM PDT 24	26138257043 ps
T75	/workspace/coverage/default/3.sram_ctrl_lc_escalation.1735192908	Jul 07 04:53:23 PM PDT 24	Jul 07 04:55:05 PM PDT 24	15623895500 ps
T42	/workspace/coverage/default/36.sram_ctrl_access_during_key_req.10121699	Jul 07 04:58:31 PM PDT 24	Jul 07 05:22:23 PM PDT 24	17466700355 ps
T26	/workspace/coverage/default/16.sram_ctrl_ram_cfg.585370235	Jul 07 04:54:18 PM PDT 24	Jul 07 04:54:22 PM PDT 24	357135978 ps
T19	/workspace/coverage/default/27.sram_ctrl_stress_all.2457677749	Jul 07 04:56:29 PM PDT 24	Jul 07 05:55:36 PM PDT 24	234315216376 ps
T23	/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2072923298	Jul 07 04:58:50 PM PDT 24	Jul 07 05:00:46 PM PDT 24	8439282885 ps
T27	/workspace/coverage/default/10.sram_ctrl_ram_cfg.2400950599	Jul 07 04:53:41 PM PDT 24	Jul 07 04:53:45 PM PDT 24	694336016 ps
T111	/workspace/coverage/default/11.sram_ctrl_stress_pipeline.121173867	Jul 07 04:53:47 PM PDT 24	Jul 07 04:59:28 PM PDT 24	4821463052 ps
T162	/workspace/coverage/default/14.sram_ctrl_bijection.1394385927	Jul 07 04:53:56 PM PDT 24	Jul 07 05:04:38 PM PDT 24	16737952620 ps
T163	/workspace/coverage/default/12.sram_ctrl_ram_cfg.2794302109	Jul 07 04:53:51 PM PDT 24	Jul 07 04:53:55 PM PDT 24	358894663 ps
T76	/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.2961182790	Jul 07 04:57:10 PM PDT 24	Jul 07 04:57:24 PM PDT 24	283800921 ps
T95	/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1350678592	Jul 07 04:56:43 PM PDT 24	Jul 07 04:59:26 PM PDT 24	17503858017 ps
T164	/workspace/coverage/default/35.sram_ctrl_multiple_keys.2194976428	Jul 07 04:58:19 PM PDT 24	Jul 07 05:20:33 PM PDT 24	12005678394 ps
T165	/workspace/coverage/default/29.sram_ctrl_smoke.3428901292	Jul 07 04:56:43 PM PDT 24	Jul 07 04:56:50 PM PDT 24	7460529395 ps
T20	/workspace/coverage/default/10.sram_ctrl_stress_all.4121175676	Jul 07 04:53:46 PM PDT 24	Jul 07 06:09:29 PM PDT 24	293751144888 ps
T96	/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1355325495	Jul 07 04:53:30 PM PDT 24	Jul 07 04:56:01 PM PDT 24	5197096892 ps
T112	/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2926251182	Jul 07 04:56:46 PM PDT 24	Jul 07 05:04:28 PM PDT 24	42144934897 ps
T149	/workspace/coverage/default/17.sram_ctrl_executable.370753882	Jul 07 04:54:30 PM PDT 24	Jul 07 05:14:54 PM PDT 24	28928266998 ps
T47	/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1782640315	Jul 07 04:53:49 PM PDT 24	Jul 07 04:54:17 PM PDT 24	1067571414 ps
T59	/workspace/coverage/default/42.sram_ctrl_access_during_key_req.2661390750	Jul 07 04:59:53 PM PDT 24	Jul 07 05:03:28 PM PDT 24	5830468626 ps
T60	/workspace/coverage/default/7.sram_ctrl_max_throughput.3520780600	Jul 07 04:53:34 PM PDT 24	Jul 07 04:53:41 PM PDT 24	3936727798 ps
T61	/workspace/coverage/default/41.sram_ctrl_executable.1237473149	Jul 07 04:59:39 PM PDT 24	Jul 07 05:04:47 PM PDT 24	13969143891 ps
T62	/workspace/coverage/default/12.sram_ctrl_lc_escalation.750548516	Jul 07 04:53:55 PM PDT 24	Jul 07 04:54:04 PM PDT 24	1167853330 ps
T63	/workspace/coverage/default/11.sram_ctrl_stress_all.4030743768	Jul 07 04:53:44 PM PDT 24	Jul 07 06:14:27 PM PDT 24	963743093961 ps
T64	/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.34855270	Jul 07 04:56:10 PM PDT 24	Jul 07 04:59:26 PM PDT 24	1077336156 ps
T65	/workspace/coverage/default/24.sram_ctrl_max_throughput.4213098400	Jul 07 04:55:51 PM PDT 24	Jul 07 04:56:16 PM PDT 24	748191359 ps
T66	/workspace/coverage/default/21.sram_ctrl_bijection.378573938	Jul 07 04:55:06 PM PDT 24	Jul 07 05:07:39 PM PDT 24	43292138856 ps
T67	/workspace/coverage/default/37.sram_ctrl_ram_cfg.1221837505	Jul 07 04:58:50 PM PDT 24	Jul 07 04:58:53 PM PDT 24	351073715 ps
T166	/workspace/coverage/default/25.sram_ctrl_lc_escalation.3974812209	Jul 07 04:56:04 PM PDT 24	Jul 07 04:57:42 PM PDT 24	27141791970 ps
T131	/workspace/coverage/default/19.sram_ctrl_lc_escalation.2226362643	Jul 07 04:54:44 PM PDT 24	Jul 07 04:55:46 PM PDT 24	31190886428 ps
T52	/workspace/coverage/default/40.sram_ctrl_mem_walk.1556659527	Jul 07 04:59:31 PM PDT 24	Jul 07 05:04:47 PM PDT 24	5365610907 ps
T167	/workspace/coverage/default/35.sram_ctrl_ram_cfg.235973179	Jul 07 04:58:18 PM PDT 24	Jul 07 04:58:22 PM PDT 24	1428146447 ps
T168	/workspace/coverage/default/4.sram_ctrl_bijection.1331314928	Jul 07 04:53:25 PM PDT 24	Jul 07 05:24:42 PM PDT 24	112721695121 ps
T169	/workspace/coverage/default/10.sram_ctrl_multiple_keys.1868676597	Jul 07 04:53:40 PM PDT 24	Jul 07 05:06:11 PM PDT 24	30248958364 ps
T48	/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3421112680	Jul 07 04:53:36 PM PDT 24	Jul 07 04:54:39 PM PDT 24	29847872873 ps
T125	/workspace/coverage/default/37.sram_ctrl_bijection.1288989902	Jul 07 04:58:40 PM PDT 24	Jul 07 05:08:42 PM PDT 24	17089849265 ps
T126	/workspace/coverage/default/37.sram_ctrl_regwen.1320024257	Jul 07 04:58:44 PM PDT 24	Jul 07 05:21:40 PM PDT 24	51426548100 ps
T97	/workspace/coverage/default/27.sram_ctrl_access_during_key_req.214540714	Jul 07 04:56:27 PM PDT 24	Jul 07 04:58:57 PM PDT 24	4063246720 ps
T127	/workspace/coverage/default/43.sram_ctrl_smoke.1111265694	Jul 07 04:59:57 PM PDT 24	Jul 07 05:00:14 PM PDT 24	7692437142 ps
T128	/workspace/coverage/default/5.sram_ctrl_executable.3851683375	Jul 07 04:53:31 PM PDT 24	Jul 07 05:05:21 PM PDT 24	68693087186 ps
T113	/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1474595904	Jul 07 04:53:37 PM PDT 24	Jul 07 04:57:04 PM PDT 24	11036313303 ps
T129	/workspace/coverage/default/17.sram_ctrl_bijection.2651784706	Jul 07 04:54:26 PM PDT 24	Jul 07 05:34:06 PM PDT 24	403024592993 ps
T130	/workspace/coverage/default/15.sram_ctrl_multiple_keys.1442863611	Jul 07 04:54:09 PM PDT 24	Jul 07 05:16:05 PM PDT 24	83551014753 ps
T49	/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1054082250	Jul 07 04:59:46 PM PDT 24	Jul 07 05:01:02 PM PDT 24	5786536886 ps
T77	/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2128256255	Jul 07 04:53:16 PM PDT 24	Jul 07 04:53:26 PM PDT 24	3811899972 ps
T170	/workspace/coverage/default/37.sram_ctrl_smoke.2385163464	Jul 07 04:58:39 PM PDT 24	Jul 07 04:58:46 PM PDT 24	1477652505 ps
T171	/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3627084298	Jul 07 04:59:51 PM PDT 24	Jul 07 05:00:17 PM PDT 24	4756171501 ps
T150	/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.538060428	Jul 07 04:59:40 PM PDT 24	Jul 07 05:05:45 PM PDT 24	16926612176 ps
T172	/workspace/coverage/default/46.sram_ctrl_multiple_keys.3159120775	Jul 07 05:00:39 PM PDT 24	Jul 07 05:19:14 PM PDT 24	38837327839 ps
T173	/workspace/coverage/default/26.sram_ctrl_regwen.1393573937	Jul 07 04:56:18 PM PDT 24	Jul 07 05:04:03 PM PDT 24	2198047355 ps
T174	/workspace/coverage/default/12.sram_ctrl_smoke.1988454807	Jul 07 04:53:59 PM PDT 24	Jul 07 04:54:39 PM PDT 24	2773637385 ps
T175	/workspace/coverage/default/36.sram_ctrl_ram_cfg.3050127334	Jul 07 04:58:32 PM PDT 24	Jul 07 04:58:35 PM PDT 24	1459230603 ps
T176	/workspace/coverage/default/19.sram_ctrl_smoke.2924704334	Jul 07 04:54:42 PM PDT 24	Jul 07 04:55:59 PM PDT 24	784251826 ps
T104	/workspace/coverage/default/21.sram_ctrl_mem_partial_access.622417364	Jul 07 04:55:14 PM PDT 24	Jul 07 04:56:26 PM PDT 24	4348912193 ps
T78	/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3692622569	Jul 07 04:59:32 PM PDT 24	Jul 07 04:59:41 PM PDT 24	204967392 ps
T177	/workspace/coverage/default/47.sram_ctrl_partial_access.1744643136	Jul 07 05:00:56 PM PDT 24	Jul 07 05:01:54 PM PDT 24	2310408481 ps
T178	/workspace/coverage/default/9.sram_ctrl_multiple_keys.2150691171	Jul 07 04:53:39 PM PDT 24	Jul 07 05:05:09 PM PDT 24	5505971677 ps
T179	/workspace/coverage/default/26.sram_ctrl_bijection.18959621	Jul 07 04:56:12 PM PDT 24	Jul 07 05:26:17 PM PDT 24	119650539803 ps
T180	/workspace/coverage/default/48.sram_ctrl_lc_escalation.3220593617	Jul 07 05:01:18 PM PDT 24	Jul 07 05:02:34 PM PDT 24	12234610179 ps
T181	/workspace/coverage/default/11.sram_ctrl_max_throughput.2304815281	Jul 07 04:53:50 PM PDT 24	Jul 07 04:55:41 PM PDT 24	776798632 ps
T182	/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3613996188	Jul 07 04:53:49 PM PDT 24	Jul 07 04:55:19 PM PDT 24	4812746195 ps
T183	/workspace/coverage/default/43.sram_ctrl_partial_access.1384441094	Jul 07 05:00:05 PM PDT 24	Jul 07 05:00:56 PM PDT 24	1549472330 ps
T184	/workspace/coverage/default/29.sram_ctrl_bijection.1867317766	Jul 07 04:56:47 PM PDT 24	Jul 07 05:24:13 PM PDT 24	23414831543 ps
T185	/workspace/coverage/default/21.sram_ctrl_max_throughput.162112805	Jul 07 04:55:09 PM PDT 24	Jul 07 04:57:26 PM PDT 24	2829385310 ps
T152	/workspace/coverage/default/8.sram_ctrl_regwen.934467490	Jul 07 04:53:37 PM PDT 24	Jul 07 05:05:05 PM PDT 24	43260975606 ps
T186	/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1620644028	Jul 07 04:53:25 PM PDT 24	Jul 07 04:57:17 PM PDT 24	4187190062 ps
T187	/workspace/coverage/default/43.sram_ctrl_regwen.3624433383	Jul 07 05:00:05 PM PDT 24	Jul 07 05:13:54 PM PDT 24	101170258962 ps
T13	/workspace/coverage/default/24.sram_ctrl_alert_test.2816522187	Jul 07 04:55:56 PM PDT 24	Jul 07 04:55:57 PM PDT 24	15298025 ps
T44	/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3000113344	Jul 07 04:59:44 PM PDT 24	Jul 07 05:00:44 PM PDT 24	8671203483 ps
T188	/workspace/coverage/default/12.sram_ctrl_max_throughput.3605823970	Jul 07 04:53:46 PM PDT 24	Jul 07 04:53:52 PM PDT 24	1857967848 ps
T189	/workspace/coverage/default/4.sram_ctrl_ram_cfg.3804536179	Jul 07 04:53:26 PM PDT 24	Jul 07 04:53:31 PM PDT 24	1985891225 ps
T151	/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.805029879	Jul 07 05:01:17 PM PDT 24	Jul 07 05:09:09 PM PDT 24	72713368097 ps
T190	/workspace/coverage/default/41.sram_ctrl_bijection.164330608	Jul 07 04:59:35 PM PDT 24	Jul 07 05:07:53 PM PDT 24	7049135586 ps
T191	/workspace/coverage/default/27.sram_ctrl_lc_escalation.3753988820	Jul 07 04:56:27 PM PDT 24	Jul 07 04:57:05 PM PDT 24	29080042178 ps
T192	/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1323372966	Jul 07 04:59:11 PM PDT 24	Jul 07 05:06:17 PM PDT 24	85040471495 ps
T193	/workspace/coverage/default/29.sram_ctrl_max_throughput.1967975112	Jul 07 04:56:47 PM PDT 24	Jul 07 04:57:37 PM PDT 24	742686504 ps
T194	/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2416954672	Jul 07 04:56:17 PM PDT 24	Jul 07 04:58:57 PM PDT 24	5493561101 ps
T195	/workspace/coverage/default/34.sram_ctrl_executable.3769720209	Jul 07 04:58:03 PM PDT 24	Jul 07 05:00:16 PM PDT 24	1988935190 ps
T196	/workspace/coverage/default/3.sram_ctrl_max_throughput.870074583	Jul 07 04:53:23 PM PDT 24	Jul 07 04:54:14 PM PDT 24	3002490571 ps
T197	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3245004623	Jul 07 04:53:49 PM PDT 24	Jul 07 05:01:24 PM PDT 24	92858732639 ps
T198	/workspace/coverage/default/16.sram_ctrl_max_throughput.2058095304	Jul 07 04:54:23 PM PDT 24	Jul 07 04:55:08 PM PDT 24	746158129 ps
T199	/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1390613151	Jul 07 04:53:18 PM PDT 24	Jul 07 05:00:01 PM PDT 24	29785293949 ps
T200	/workspace/coverage/default/22.sram_ctrl_multiple_keys.721399736	Jul 07 04:55:17 PM PDT 24	Jul 07 05:15:13 PM PDT 24	45509348150 ps
T201	/workspace/coverage/default/49.sram_ctrl_max_throughput.3869696473	Jul 07 05:01:31 PM PDT 24	Jul 07 05:01:53 PM PDT 24	731565674 ps
T202	/workspace/coverage/default/17.sram_ctrl_max_throughput.2390720203	Jul 07 04:54:26 PM PDT 24	Jul 07 04:55:19 PM PDT 24	3002191461 ps
T132	/workspace/coverage/default/17.sram_ctrl_lc_escalation.254815943	Jul 07 04:54:22 PM PDT 24	Jul 07 04:55:09 PM PDT 24	14957232719 ps
T148	/workspace/coverage/default/28.sram_ctrl_regwen.2677817165	Jul 07 04:56:45 PM PDT 24	Jul 07 05:07:57 PM PDT 24	13168458758 ps
T203	/workspace/coverage/default/18.sram_ctrl_stress_pipeline.4050150093	Jul 07 04:54:31 PM PDT 24	Jul 07 05:02:03 PM PDT 24	5800111718 ps
T204	/workspace/coverage/default/0.sram_ctrl_executable.195861887	Jul 07 04:53:16 PM PDT 24	Jul 07 05:00:32 PM PDT 24	7221426189 ps
T205	/workspace/coverage/default/43.sram_ctrl_mem_partial_access.689797757	Jul 07 05:00:09 PM PDT 24	Jul 07 05:02:45 PM PDT 24	9113911772 ps
T206	/workspace/coverage/default/38.sram_ctrl_multiple_keys.4078721404	Jul 07 04:58:54 PM PDT 24	Jul 07 05:17:54 PM PDT 24	8620689366 ps
T207	/workspace/coverage/default/41.sram_ctrl_smoke.1966088067	Jul 07 04:59:36 PM PDT 24	Jul 07 05:00:42 PM PDT 24	1105151422 ps
T208	/workspace/coverage/default/32.sram_ctrl_max_throughput.679816348	Jul 07 04:57:37 PM PDT 24	Jul 07 04:59:44 PM PDT 24	794734172 ps
T209	/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4261996598	Jul 07 05:00:12 PM PDT 24	Jul 07 05:00:25 PM PDT 24	2798875582 ps
T210	/workspace/coverage/default/4.sram_ctrl_smoke.1404321029	Jul 07 04:53:28 PM PDT 24	Jul 07 04:53:45 PM PDT 24	12428492190 ps
T211	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3562139731	Jul 07 04:53:53 PM PDT 24	Jul 07 04:56:35 PM PDT 24	4957520650 ps
T14	/workspace/coverage/default/15.sram_ctrl_alert_test.3054231057	Jul 07 04:54:17 PM PDT 24	Jul 07 04:54:18 PM PDT 24	24956947 ps
T212	/workspace/coverage/default/17.sram_ctrl_ram_cfg.2911764779	Jul 07 04:54:27 PM PDT 24	Jul 07 04:54:31 PM PDT 24	1347692217 ps
T213	/workspace/coverage/default/17.sram_ctrl_alert_test.3599428123	Jul 07 04:54:32 PM PDT 24	Jul 07 04:54:33 PM PDT 24	21572415 ps
T214	/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1309218415	Jul 07 05:01:05 PM PDT 24	Jul 07 05:09:52 PM PDT 24	14867416370 ps
T215	/workspace/coverage/default/47.sram_ctrl_smoke.2230350906	Jul 07 05:00:50 PM PDT 24	Jul 07 05:00:57 PM PDT 24	3264401595 ps
T216	/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2718193240	Jul 07 04:57:47 PM PDT 24	Jul 07 05:02:44 PM PDT 24	20013538693 ps
T217	/workspace/coverage/default/40.sram_ctrl_bijection.1492339183	Jul 07 04:59:29 PM PDT 24	Jul 07 05:08:42 PM PDT 24	8208132617 ps
T218	/workspace/coverage/default/42.sram_ctrl_max_throughput.2455490618	Jul 07 04:59:53 PM PDT 24	Jul 07 05:01:20 PM PDT 24	1489481269 ps
T51	/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3916551351	Jul 07 04:57:38 PM PDT 24	Jul 07 04:59:06 PM PDT 24	3106835543 ps
T219	/workspace/coverage/default/20.sram_ctrl_bijection.798245823	Jul 07 04:54:49 PM PDT 24	Jul 07 05:35:13 PM PDT 24	31833717154 ps
T220	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.317675684	Jul 07 04:53:18 PM PDT 24	Jul 07 04:55:01 PM PDT 24	4117711033 ps
T221	/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2218112592	Jul 07 04:56:21 PM PDT 24	Jul 07 04:56:39 PM PDT 24	879555683 ps
T222	/workspace/coverage/default/22.sram_ctrl_alert_test.3065126252	Jul 07 04:55:29 PM PDT 24	Jul 07 04:55:30 PM PDT 24	23483015 ps
T223	/workspace/coverage/default/49.sram_ctrl_partial_access.2002544747	Jul 07 05:01:32 PM PDT 24	Jul 07 05:01:58 PM PDT 24	10108343779 ps
T224	/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2462465744	Jul 07 04:54:26 PM PDT 24	Jul 07 05:00:19 PM PDT 24	4656834260 ps
T225	/workspace/coverage/default/49.sram_ctrl_multiple_keys.1259252247	Jul 07 05:01:31 PM PDT 24	Jul 07 05:25:23 PM PDT 24	10711766050 ps
T55	/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.88327441	Jul 07 04:54:42 PM PDT 24	Jul 07 04:54:58 PM PDT 24	413796034 ps
T226	/workspace/coverage/default/4.sram_ctrl_alert_test.1994365328	Jul 07 04:53:37 PM PDT 24	Jul 07 04:53:38 PM PDT 24	27297353 ps
T227	/workspace/coverage/default/27.sram_ctrl_regwen.2676252724	Jul 07 04:56:25 PM PDT 24	Jul 07 05:22:52 PM PDT 24	42600810184 ps
T228	/workspace/coverage/default/8.sram_ctrl_alert_test.1772649185	Jul 07 04:53:36 PM PDT 24	Jul 07 04:53:37 PM PDT 24	45192122 ps
T229	/workspace/coverage/default/30.sram_ctrl_partial_access.1800645933	Jul 07 04:57:01 PM PDT 24	Jul 07 04:57:10 PM PDT 24	2596672273 ps
T230	/workspace/coverage/default/48.sram_ctrl_multiple_keys.1975933460	Jul 07 05:01:14 PM PDT 24	Jul 07 05:23:51 PM PDT 24	34374403947 ps
T231	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3743499285	Jul 07 04:53:48 PM PDT 24	Jul 07 04:59:17 PM PDT 24	24598435229 ps
T232	/workspace/coverage/default/4.sram_ctrl_regwen.1500584163	Jul 07 04:53:29 PM PDT 24	Jul 07 05:02:36 PM PDT 24	2224798917 ps
T233	/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3221018977	Jul 07 04:59:47 PM PDT 24	Jul 07 05:05:13 PM PDT 24	12321763322 ps
T234	/workspace/coverage/default/25.sram_ctrl_alert_test.4118173070	Jul 07 04:56:08 PM PDT 24	Jul 07 04:56:09 PM PDT 24	44080707 ps
T133	/workspace/coverage/default/36.sram_ctrl_lc_escalation.2582356911	Jul 07 04:58:31 PM PDT 24	Jul 07 04:59:32 PM PDT 24	16947151337 ps
T235	/workspace/coverage/default/34.sram_ctrl_access_during_key_req.4260161994	Jul 07 04:57:58 PM PDT 24	Jul 07 05:18:25 PM PDT 24	10093082199 ps
T236	/workspace/coverage/default/14.sram_ctrl_executable.4212768855	Jul 07 04:54:03 PM PDT 24	Jul 07 05:13:29 PM PDT 24	81873690274 ps
T237	/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3145275996	Jul 07 04:56:02 PM PDT 24	Jul 07 05:01:01 PM PDT 24	12215523432 ps
T238	/workspace/coverage/default/1.sram_ctrl_partial_access.3932136250	Jul 07 04:53:17 PM PDT 24	Jul 07 04:54:13 PM PDT 24	14569302307 ps
T239	/workspace/coverage/default/5.sram_ctrl_max_throughput.1679408518	Jul 07 04:53:27 PM PDT 24	Jul 07 04:55:01 PM PDT 24	807605574 ps
T53	/workspace/coverage/default/11.sram_ctrl_mem_partial_access.486195381	Jul 07 04:53:46 PM PDT 24	Jul 07 04:55:13 PM PDT 24	2970905153 ps
T240	/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3040618189	Jul 07 04:57:47 PM PDT 24	Jul 07 04:58:08 PM PDT 24	4384376071 ps
T241	/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1473122503	Jul 07 04:57:04 PM PDT 24	Jul 07 04:57:14 PM PDT 24	788783623 ps
T242	/workspace/coverage/default/18.sram_ctrl_lc_escalation.1020215827	Jul 07 04:54:37 PM PDT 24	Jul 07 04:54:41 PM PDT 24	367481231 ps
T243	/workspace/coverage/default/30.sram_ctrl_executable.1317425466	Jul 07 04:57:07 PM PDT 24	Jul 07 05:12:11 PM PDT 24	9609456560 ps
T244	/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3411189057	Jul 07 04:53:23 PM PDT 24	Jul 07 05:09:53 PM PDT 24	65083194338 ps
T245	/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3335973124	Jul 07 04:54:22 PM PDT 24	Jul 07 04:54:47 PM PDT 24	3162247309 ps
T246	/workspace/coverage/default/30.sram_ctrl_multiple_keys.4196555843	Jul 07 04:56:55 PM PDT 24	Jul 07 04:57:58 PM PDT 24	4930068085 ps
T56	/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2990645867	Jul 07 05:00:35 PM PDT 24	Jul 07 05:03:32 PM PDT 24	115689122383 ps
T247	/workspace/coverage/default/8.sram_ctrl_executable.700083453	Jul 07 04:53:36 PM PDT 24	Jul 07 05:08:44 PM PDT 24	10864055138 ps
T248	/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3914579806	Jul 07 05:00:52 PM PDT 24	Jul 07 05:01:20 PM PDT 24	2758329929 ps
T249	/workspace/coverage/default/42.sram_ctrl_ram_cfg.2992833310	Jul 07 04:59:55 PM PDT 24	Jul 07 04:59:59 PM PDT 24	351166816 ps
T250	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.835466446	Jul 07 04:54:30 PM PDT 24	Jul 07 04:55:56 PM PDT 24	1759829993 ps
T251	/workspace/coverage/default/35.sram_ctrl_stress_pipeline.766253479	Jul 07 04:58:12 PM PDT 24	Jul 07 05:01:17 PM PDT 24	8059662800 ps
T252	/workspace/coverage/default/37.sram_ctrl_access_during_key_req.1155789612	Jul 07 04:58:48 PM PDT 24	Jul 07 05:19:14 PM PDT 24	121793958092 ps
T253	/workspace/coverage/default/47.sram_ctrl_lc_escalation.1830328537	Jul 07 05:01:04 PM PDT 24	Jul 07 05:02:34 PM PDT 24	45768613455 ps
T254	/workspace/coverage/default/28.sram_ctrl_stress_all.4192124153	Jul 07 04:56:45 PM PDT 24	Jul 07 06:07:42 PM PDT 24	134870699753 ps
T57	/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.334777587	Jul 07 05:00:10 PM PDT 24	Jul 07 05:05:04 PM PDT 24	3133304050 ps
T255	/workspace/coverage/default/24.sram_ctrl_ram_cfg.1212435217	Jul 07 04:55:52 PM PDT 24	Jul 07 04:55:56 PM PDT 24	352611653 ps
T116	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3020523357	Jul 07 05:00:17 PM PDT 24	Jul 07 05:00:44 PM PDT 24	3849593211 ps
T256	/workspace/coverage/default/31.sram_ctrl_max_throughput.1289742358	Jul 07 04:57:15 PM PDT 24	Jul 07 04:58:52 PM PDT 24	769930322 ps
T257	/workspace/coverage/default/24.sram_ctrl_smoke.2553532306	Jul 07 04:55:48 PM PDT 24	Jul 07 04:56:08 PM PDT 24	539127531 ps
T258	/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2523526376	Jul 07 04:58:28 PM PDT 24	Jul 07 04:59:46 PM PDT 24	2977850546 ps
T259	/workspace/coverage/default/17.sram_ctrl_mem_partial_access.638585485	Jul 07 04:54:27 PM PDT 24	Jul 07 04:55:41 PM PDT 24	1012885487 ps
T260	/workspace/coverage/default/22.sram_ctrl_smoke.2500236084	Jul 07 04:55:19 PM PDT 24	Jul 07 04:55:26 PM PDT 24	4271235058 ps
T261	/workspace/coverage/default/34.sram_ctrl_stress_all.4246601889	Jul 07 04:58:07 PM PDT 24	Jul 07 05:48:35 PM PDT 24	190565532564 ps
T117	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2599421734	Jul 07 04:53:23 PM PDT 24	Jul 07 04:53:48 PM PDT 24	840586333 ps
T262	/workspace/coverage/default/21.sram_ctrl_lc_escalation.1685385415	Jul 07 04:55:12 PM PDT 24	Jul 07 04:56:10 PM PDT 24	17823651496 ps
T263	/workspace/coverage/default/9.sram_ctrl_regwen.1435866691	Jul 07 04:53:39 PM PDT 24	Jul 07 05:08:45 PM PDT 24	14836827514 ps
T264	/workspace/coverage/default/4.sram_ctrl_mem_walk.1097367619	Jul 07 04:53:38 PM PDT 24	Jul 07 04:55:41 PM PDT 24	3876255911 ps
T58	/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2632246995	Jul 07 04:53:33 PM PDT 24	Jul 07 04:57:18 PM PDT 24	1714635773 ps
T265	/workspace/coverage/default/22.sram_ctrl_partial_access.2075145514	Jul 07 04:55:25 PM PDT 24	Jul 07 04:55:31 PM PDT 24	5875253300 ps
T266	/workspace/coverage/default/40.sram_ctrl_multiple_keys.1182579592	Jul 07 04:59:24 PM PDT 24	Jul 07 05:18:53 PM PDT 24	20511698218 ps
T267	/workspace/coverage/default/12.sram_ctrl_stress_all.2063756930	Jul 07 04:53:48 PM PDT 24	Jul 07 06:29:48 PM PDT 24	106402229485 ps
T268	/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3323957135	Jul 07 04:54:08 PM PDT 24	Jul 07 04:59:35 PM PDT 24	22759088759 ps
T269	/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1079857509	Jul 07 04:59:09 PM PDT 24	Jul 07 04:59:39 PM PDT 24	1439036300 ps
T270	/workspace/coverage/default/35.sram_ctrl_regwen.3330973466	Jul 07 04:58:18 PM PDT 24	Jul 07 05:09:47 PM PDT 24	6014717070 ps
T271	/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.266546421	Jul 07 05:00:46 PM PDT 24	Jul 07 05:07:27 PM PDT 24	16830731815 ps
T272	/workspace/coverage/default/17.sram_ctrl_partial_access.3985083813	Jul 07 04:54:26 PM PDT 24	Jul 07 04:57:17 PM PDT 24	2018744949 ps
T273	/workspace/coverage/default/46.sram_ctrl_max_throughput.1952541263	Jul 07 05:00:47 PM PDT 24	Jul 07 05:00:58 PM PDT 24	728793708 ps
T274	/workspace/coverage/default/47.sram_ctrl_bijection.4218639004	Jul 07 05:00:56 PM PDT 24	Jul 07 05:35:14 PM PDT 24	29133318443 ps
T275	/workspace/coverage/default/28.sram_ctrl_alert_test.1485594483	Jul 07 04:56:42 PM PDT 24	Jul 07 04:56:43 PM PDT 24	21577952 ps
T276	/workspace/coverage/default/3.sram_ctrl_smoke.4205286147	Jul 07 04:53:23 PM PDT 24	Jul 07 04:53:30 PM PDT 24	702251926 ps
T277	/workspace/coverage/default/46.sram_ctrl_regwen.938695075	Jul 07 05:00:51 PM PDT 24	Jul 07 05:21:27 PM PDT 24	32128081436 ps
T278	/workspace/coverage/default/42.sram_ctrl_bijection.3447734327	Jul 07 04:59:48 PM PDT 24	Jul 07 05:14:28 PM PDT 24	12788877412 ps
T279	/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2037860694	Jul 07 04:53:15 PM PDT 24	Jul 07 04:55:46 PM PDT 24	4737137507 ps
T280	/workspace/coverage/default/24.sram_ctrl_lc_escalation.2219395949	Jul 07 04:55:52 PM PDT 24	Jul 07 04:57:27 PM PDT 24	31563250334 ps
T281	/workspace/coverage/default/14.sram_ctrl_lc_escalation.2737284372	Jul 07 04:54:02 PM PDT 24	Jul 07 04:55:24 PM PDT 24	50205123569 ps
T282	/workspace/coverage/default/27.sram_ctrl_smoke.2066812694	Jul 07 04:56:22 PM PDT 24	Jul 07 04:56:46 PM PDT 24	1479827222 ps
T283	/workspace/coverage/default/6.sram_ctrl_lc_escalation.2123546263	Jul 07 04:53:34 PM PDT 24	Jul 07 04:53:55 PM PDT 24	3487431238 ps
T284	/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1845295101	Jul 07 04:53:57 PM PDT 24	Jul 07 04:58:17 PM PDT 24	18193930529 ps
T285	/workspace/coverage/default/10.sram_ctrl_lc_escalation.1170037521	Jul 07 04:53:40 PM PDT 24	Jul 07 04:54:15 PM PDT 24	4930906978 ps
T286	/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3335377644	Jul 07 04:58:00 PM PDT 24	Jul 07 05:04:29 PM PDT 24	4578985598 ps
T287	/workspace/coverage/default/1.sram_ctrl_max_throughput.1632537584	Jul 07 04:53:14 PM PDT 24	Jul 07 04:55:42 PM PDT 24	1565120681 ps
T288	/workspace/coverage/default/46.sram_ctrl_smoke.4177484445	Jul 07 05:00:39 PM PDT 24	Jul 07 05:03:11 PM PDT 24	925994302 ps
T289	/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1193432134	Jul 07 04:53:37 PM PDT 24	Jul 07 04:53:50 PM PDT 24	724664750 ps
T290	/workspace/coverage/default/28.sram_ctrl_lc_escalation.319135995	Jul 07 04:56:36 PM PDT 24	Jul 07 04:58:14 PM PDT 24	33470018063 ps
T291	/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2463168274	Jul 07 05:00:14 PM PDT 24	Jul 07 05:04:30 PM PDT 24	4153315236 ps
T292	/workspace/coverage/default/26.sram_ctrl_max_throughput.2068023970	Jul 07 04:56:17 PM PDT 24	Jul 07 04:57:26 PM PDT 24	854598281 ps
T293	/workspace/coverage/default/36.sram_ctrl_multiple_keys.1884093862	Jul 07 04:58:27 PM PDT 24	Jul 07 05:28:39 PM PDT 24	29521300848 ps
T294	/workspace/coverage/default/43.sram_ctrl_ram_cfg.151981423	Jul 07 05:00:06 PM PDT 24	Jul 07 05:00:09 PM PDT 24	346924057 ps
T295	/workspace/coverage/default/9.sram_ctrl_bijection.748530370	Jul 07 04:53:44 PM PDT 24	Jul 07 05:11:07 PM PDT 24	33584500940 ps
T296	/workspace/coverage/default/10.sram_ctrl_alert_test.310507643	Jul 07 04:53:51 PM PDT 24	Jul 07 04:53:52 PM PDT 24	51815291 ps
T118	/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.277331060	Jul 07 04:55:02 PM PDT 24	Jul 07 04:55:28 PM PDT 24	3581934081 ps
T297	/workspace/coverage/default/44.sram_ctrl_stress_all.969152967	Jul 07 05:00:19 PM PDT 24	Jul 07 05:46:29 PM PDT 24	155163048859 ps
T147	/workspace/coverage/default/6.sram_ctrl_executable.2511809728	Jul 07 04:53:44 PM PDT 24	Jul 07 05:12:43 PM PDT 24	18247088617 ps
T298	/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3327471440	Jul 07 04:55:53 PM PDT 24	Jul 07 04:56:00 PM PDT 24	703503766 ps
T299	/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3440474899	Jul 07 04:58:59 PM PDT 24	Jul 07 05:03:10 PM PDT 24	32308480130 ps
T300	/workspace/coverage/default/24.sram_ctrl_executable.3491697932	Jul 07 04:55:52 PM PDT 24	Jul 07 05:09:35 PM PDT 24	45326226337 ps
T301	/workspace/coverage/default/45.sram_ctrl_alert_test.960470934	Jul 07 05:00:39 PM PDT 24	Jul 07 05:00:40 PM PDT 24	38892734 ps
T302	/workspace/coverage/default/27.sram_ctrl_multiple_keys.87078547	Jul 07 04:56:24 PM PDT 24	Jul 07 05:10:46 PM PDT 24	23316841912 ps
T303	/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1828250375	Jul 07 05:01:02 PM PDT 24	Jul 07 05:05:01 PM PDT 24	22486663530 ps
T304	/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1263034057	Jul 07 04:53:40 PM PDT 24	Jul 07 04:55:15 PM PDT 24	10913991328 ps
T305	/workspace/coverage/default/12.sram_ctrl_executable.1544644845	Jul 07 04:53:50 PM PDT 24	Jul 07 05:00:58 PM PDT 24	5147681207 ps
T306	/workspace/coverage/default/22.sram_ctrl_regwen.2989912429	Jul 07 04:55:28 PM PDT 24	Jul 07 05:08:21 PM PDT 24	3332826766 ps
T307	/workspace/coverage/default/28.sram_ctrl_multiple_keys.2458951550	Jul 07 04:56:30 PM PDT 24	Jul 07 05:01:01 PM PDT 24	3766400132 ps
T308	/workspace/coverage/default/48.sram_ctrl_regwen.2637639240	Jul 07 05:01:23 PM PDT 24	Jul 07 05:12:38 PM PDT 24	11586194223 ps
T309	/workspace/coverage/default/7.sram_ctrl_stress_all.3048893427	Jul 07 04:53:33 PM PDT 24	Jul 07 06:01:00 PM PDT 24	84937901090 ps
T310	/workspace/coverage/default/10.sram_ctrl_partial_access.3374243746	Jul 07 04:53:43 PM PDT 24	Jul 07 04:54:07 PM PDT 24	1997902226 ps
T311	/workspace/coverage/default/28.sram_ctrl_access_during_key_req.1248014712	Jul 07 04:56:40 PM PDT 24	Jul 07 05:07:28 PM PDT 24	16712491795 ps
T312	/workspace/coverage/default/27.sram_ctrl_alert_test.319642323	Jul 07 04:56:32 PM PDT 24	Jul 07 04:56:33 PM PDT 24	56791354 ps
T313	/workspace/coverage/default/34.sram_ctrl_regwen.2914983723	Jul 07 04:58:03 PM PDT 24	Jul 07 05:06:43 PM PDT 24	10346265040 ps
T314	/workspace/coverage/default/36.sram_ctrl_executable.1108309415	Jul 07 04:58:31 PM PDT 24	Jul 07 05:17:20 PM PDT 24	184470183487 ps
T315	/workspace/coverage/default/30.sram_ctrl_mem_walk.1774188750	Jul 07 04:57:07 PM PDT 24	Jul 07 05:02:52 PM PDT 24	47741456253 ps