Group : mem_bkdr_scb_pkg::mem_bkdr_scb#(32,32)::b2b_access_types_cg
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Group : mem_bkdr_scb_pkg::mem_bkdr_scb#(32,32)::b2b_access_types_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_mem_bkdr_scb_0/mem_bkdr_scb.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
mem_bkdr_scb 100.00 1 100 1 64 64




Group Instance : mem_bkdr_scb
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance mem_bkdr_scb

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 10 0 10 100.00
Crosses 32 0 32 100.00


Variables for Group Instance mem_bkdr_scb
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
b2b_access_types_cp 4 0 4 100.00 100 1 1 4
b2b_partial_types_cp 4 0 4 100.00 100 1 1 4
raw_hazard_cp 2 0 2 100.00 100 1 1 2


Crosses for Group Instance mem_bkdr_scb
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
all_cross 32 0 32 100.00 100 1 1 0


Summary for Variable b2b_access_types_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 4 0 4 100.00


Automatically Generated Bins for b2b_access_types_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 985789 1 T10 101 T19 130 T20 62
auto[1] 10691478 1 T2 9362 T3 51050 T8 792
auto[2] 772170 1 T10 109 T19 87 T20 40
auto[3] 10395601 1 T2 4710 T3 50905 T8 762



Summary for Variable b2b_partial_types_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 4 0 4 100.00


Automatically Generated Bins for b2b_partial_types_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 14608308 1 T2 11653 T3 83936 T8 1554
auto[1] 2121889 1 T2 1153 T3 8624 T4 132
auto[2] 2160903 1 T2 1147 T3 8556 T4 109
auto[3] 3953938 1 T2 119 T3 839 T4 631



Summary for Variable raw_hazard_cp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for raw_hazard_cp

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 9257331 1 T2 14071 T3 101954 T8 1554
auto[1] 13587707 1 T2 1 T3 1 T12 2



Summary for Cross all_cross

Samples crossed: raw_hazard_cp b2b_access_types_cp b2b_partial_types_cp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 32 0 32 100.00


Automatically Generated Cross Bins for all_cross

Bins
raw_hazard_cpb2b_access_types_cpb2b_partial_types_cpCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] auto[0] auto[0] 350161 1 T10 80 T19 108 T20 51
auto[0] auto[0] auto[1] 35757 1 T10 9 T19 8 T20 7
auto[0] auto[0] auto[2] 36043 1 T10 10 T19 13 T20 4
auto[0] auto[0] auto[3] 54376 1 T10 2 T19 1 T6 122
auto[0] auto[1] auto[0] 3326856 1 T2 7764 T3 42059 T8 792
auto[0] auto[1] auto[1] 349106 1 T2 737 T3 4315 T4 67
auto[0] auto[1] auto[2] 356289 1 T2 780 T3 4245 T4 46
auto[0] auto[1] auto[3] 291628 1 T2 80 T3 430 T4 312
auto[0] auto[2] auto[0] 251399 1 T6 12137 T7 30 T90 2
auto[0] auto[2] auto[1] 28633 1 T6 1265 T7 2 T90 379
auto[0] auto[2] auto[2] 28993 1 T10 96 T19 77 T20 37
auto[0] auto[2] auto[3] 41569 1 T10 13 T19 10 T20 3
auto[0] auto[3] auto[0] 3153248 1 T2 3888 T3 41876 T8 762
auto[0] auto[3] auto[1] 335586 1 T2 416 T3 4309 T4 65
auto[0] auto[3] auto[2] 351118 1 T2 367 T3 4311 T4 63
auto[0] auto[3] auto[3] 266569 1 T2 39 T3 409 T4 319
auto[1] auto[0] auto[0] 17130 1 T6 1 T32 129 T36 192
auto[1] auto[0] auto[1] 75822 1 T32 637 T36 977 T141 4230
auto[1] auto[0] auto[2] 75966 1 T32 635 T36 940 T141 4280
auto[1] auto[0] auto[3] 340534 1 T90 1 T91 1 T92 1
auto[1] auto[1] auto[0] 3748963 1 T2 1 T3 1 T12 1
auto[1] auto[1] auto[1] 643940 1 T37 8916 T39 6945 T41 7401
auto[1] auto[1] auto[2] 615404 1 T12 1 T37 9078 T39 7097
auto[1] auto[1] auto[3] 1359292 1 T37 859 T39 701 T41 33709
auto[1] auto[2] auto[0] 12276 1 T141 857 T142 311 T143 249
auto[1] auto[2] auto[1] 56350 1 T141 3971 T142 1472 T144 1
auto[1] auto[2] auto[2] 63989 1 T32 568 T36 836 T141 2857
auto[1] auto[2] auto[3] 288961 1 T32 2556 T36 3635 T141 13133
auto[1] auto[3] auto[0] 3748275 1 T37 89251 T39 70175 T41 1812
auto[1] auto[3] auto[1] 596695 1 T37 9058 T39 6931 T41 8278
auto[1] auto[3] auto[2] 633101 1 T37 8971 T39 6978 T41 7428
auto[1] auto[3] auto[3] 1311009 1 T37 901 T39 692 T41 33408

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