Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1037
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
82.37 82.37 95.67 95.67 80.21 80.21 90.43 90.43 61.90 61.90 85.31 85.31 94.30 94.30 68.74 68.74 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3526035190
87.19 4.82 97.06 1.39 80.57 0.36 90.43 0.00 90.48 28.57 87.68 2.37 95.18 0.88 68.92 0.18 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2171336753
91.64 4.46 98.28 1.23 86.02 5.45 91.70 1.27 100.00 9.52 92.65 4.98 95.32 0.15 77.51 8.59 /workspace/coverage/default/16.sram_ctrl_stress_all.2476595396
93.93 2.28 98.53 0.25 87.91 1.90 97.80 6.10 100.00 0.00 94.08 1.42 96.35 1.02 82.82 5.30 /workspace/coverage/default/41.sram_ctrl_stress_all.3938142906
94.88 0.95 98.69 0.16 88.74 0.83 98.00 0.21 100.00 0.00 94.79 0.71 96.35 0.00 87.57 4.75 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.174411014
95.58 0.70 98.86 0.16 90.52 1.78 98.76 0.76 100.00 0.00 95.50 0.71 96.93 0.58 88.48 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.1989524746
96.00 0.42 98.86 0.00 90.52 0.00 98.76 0.00 100.00 0.00 95.50 0.00 96.93 0.00 91.41 2.93 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.35847966
96.34 0.34 98.86 0.00 90.52 0.00 98.76 0.00 100.00 0.00 95.50 0.00 96.93 0.00 93.78 2.38 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3881837242
96.52 0.19 98.86 0.00 90.64 0.12 98.76 0.00 100.00 0.00 95.97 0.47 97.66 0.73 93.78 0.00 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3970486578
96.70 0.18 98.86 0.00 90.64 0.00 98.83 0.07 100.00 0.00 95.97 0.00 98.83 1.17 93.78 0.00 /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3919310558
96.87 0.17 99.10 0.25 90.64 0.00 98.83 0.00 100.00 0.00 96.21 0.24 98.98 0.15 94.33 0.55 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.4210745320
97.00 0.13 99.10 0.00 90.64 0.00 98.83 0.00 100.00 0.00 96.21 0.00 98.98 0.00 95.25 0.91 /workspace/coverage/default/8.sram_ctrl_executable.114232377
97.13 0.13 99.18 0.08 90.64 0.00 99.66 0.83 100.00 0.00 96.21 0.00 98.98 0.00 95.25 0.00 /workspace/coverage/default/10.sram_ctrl_ram_cfg.551003559
97.23 0.10 99.18 0.00 90.64 0.00 99.66 0.00 100.00 0.00 96.21 0.00 98.98 0.00 95.98 0.73 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2775751001
97.30 0.06 99.18 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.21 0.00 98.98 0.00 95.98 0.00 /workspace/coverage/default/13.sram_ctrl_alert_test.2462113334
97.35 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.34 0.37 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3198556682
97.40 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4101639862
97.45 0.05 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.07 0.37 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2858180781
97.48 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2304741565
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 98.98 0.00 97.44 0.18 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1857092497
97.52 0.02 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.818021873

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2039000855
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3295769002
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1088595275
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.667224229
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3333749557
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2931516908
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3136322180
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.4043823298
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.597949434
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3689436868
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.604284294
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3700160311
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4206171592
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3139395279
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3945349988
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.681508594
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2819188421
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2915375792
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2180978408
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2614369569
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2886472682
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.740978112
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3635789654
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4086566424
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.359498218
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2609380838
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3126123733
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.640516727
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3749520387
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2050526030
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.312589871
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2846978387
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3578760242
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2503039863
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1877570869
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3903212868
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.688150244
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3234718903
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3979095668
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3255934888
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1735321532
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3493672305
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2223358336
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2950082993
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2612493166
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1597003112
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2049266054
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1676362788
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3784598168
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2098065569
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.4142644704
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3517945971
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.221723386
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.428515037
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.765424813
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3214618414
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3467824779
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.928844255
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2974110275
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2939496243
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2626151157
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1405747836
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3654045375
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.86060543
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1901687652
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1297793032
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.758318209
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2008306013
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2482370215
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2066313296
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3947405120
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3249861413
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3209649726
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.241843929
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3875749160
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3099138836
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1841317962
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1817433889
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.607926815
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1611936671
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3025834369
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2551578528
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1129671625
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2651075030
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2029762974
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.523334552
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3023609514
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3423489378
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4054511032
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3891303208
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1352689477
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.940646122
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.644592678
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1567035744
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3243429422
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1119332869
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1151619755
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.288806045
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1251794318
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.828314258
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3197030539
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3556278443
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3355805822
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.769674832
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3254246012
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.247555933
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.591296928
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2225703490
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4055630668
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.740075561
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.637260175
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2448787020
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3142274500
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4200052721
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2389329078
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1477438723
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2920370942
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.460754177
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2508128204
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2688161463
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.922416547
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3975227071
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4251250505
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2366343578
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3452992485
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3638629345
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.435617622
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2742671906
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3710718544
/workspace/coverage/default/0.sram_ctrl_alert_test.2174238975
/workspace/coverage/default/0.sram_ctrl_bijection.366055948
/workspace/coverage/default/0.sram_ctrl_executable.840824510
/workspace/coverage/default/0.sram_ctrl_max_throughput.4173953611
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2545969378
/workspace/coverage/default/0.sram_ctrl_mem_walk.1436190616
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2240015082
/workspace/coverage/default/0.sram_ctrl_partial_access.528782022
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.256565565
/workspace/coverage/default/0.sram_ctrl_ram_cfg.619606863
/workspace/coverage/default/0.sram_ctrl_regwen.4245150083
/workspace/coverage/default/0.sram_ctrl_sec_cm.2287594613
/workspace/coverage/default/0.sram_ctrl_smoke.3710547426
/workspace/coverage/default/0.sram_ctrl_stress_all.2084178437
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1294030795
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3066319534
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.719848599
/workspace/coverage/default/1.sram_ctrl_alert_test.3002244794
/workspace/coverage/default/1.sram_ctrl_bijection.2617274466
/workspace/coverage/default/1.sram_ctrl_executable.1027871546
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1540907635
/workspace/coverage/default/1.sram_ctrl_max_throughput.3030344962
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.494816229
/workspace/coverage/default/1.sram_ctrl_mem_walk.4249311297
/workspace/coverage/default/1.sram_ctrl_multiple_keys.905095783
/workspace/coverage/default/1.sram_ctrl_partial_access.2970194866
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1010366363
/workspace/coverage/default/1.sram_ctrl_regwen.2934485399
/workspace/coverage/default/1.sram_ctrl_sec_cm.2041684176
/workspace/coverage/default/1.sram_ctrl_smoke.1555115230
/workspace/coverage/default/1.sram_ctrl_stress_all.1743943736
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.705937810
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1562552932
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1055969269
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1551604049
/workspace/coverage/default/10.sram_ctrl_alert_test.2284915300
/workspace/coverage/default/10.sram_ctrl_bijection.3807072085
/workspace/coverage/default/10.sram_ctrl_executable.1834031940
/workspace/coverage/default/10.sram_ctrl_lc_escalation.921504277
/workspace/coverage/default/10.sram_ctrl_max_throughput.763609461
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1970435464
/workspace/coverage/default/10.sram_ctrl_mem_walk.2163741654
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3795151633
/workspace/coverage/default/10.sram_ctrl_partial_access.2121692386
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1197936943
/workspace/coverage/default/10.sram_ctrl_regwen.327618903
/workspace/coverage/default/10.sram_ctrl_smoke.3590471217
/workspace/coverage/default/10.sram_ctrl_stress_all.2917107090
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3577923836
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2665786488
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.76470335
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1210044604
/workspace/coverage/default/11.sram_ctrl_alert_test.4246624446
/workspace/coverage/default/11.sram_ctrl_bijection.2178098220
/workspace/coverage/default/11.sram_ctrl_executable.743547866
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1581390338
/workspace/coverage/default/11.sram_ctrl_max_throughput.1423382835
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.518906099
/workspace/coverage/default/11.sram_ctrl_mem_walk.851259832
/workspace/coverage/default/11.sram_ctrl_multiple_keys.958459042
/workspace/coverage/default/11.sram_ctrl_partial_access.3782214356
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2044787066
/workspace/coverage/default/11.sram_ctrl_ram_cfg.40439619
/workspace/coverage/default/11.sram_ctrl_regwen.2908207779
/workspace/coverage/default/11.sram_ctrl_smoke.3411110858
/workspace/coverage/default/11.sram_ctrl_stress_all.2531933503
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3264816687
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1395729876
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4125120961
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.426609879
/workspace/coverage/default/12.sram_ctrl_alert_test.2087035754
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/workspace/coverage/default/42.sram_ctrl_mem_walk.3525077836
/workspace/coverage/default/42.sram_ctrl_multiple_keys.507833169
/workspace/coverage/default/42.sram_ctrl_partial_access.1934350190
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.970032713
/workspace/coverage/default/42.sram_ctrl_ram_cfg.280226254
/workspace/coverage/default/42.sram_ctrl_regwen.3019201753
/workspace/coverage/default/42.sram_ctrl_smoke.1364894124
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.4006385457
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2815270043
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3976133348
/workspace/coverage/default/43.sram_ctrl_alert_test.2538740954
/workspace/coverage/default/43.sram_ctrl_bijection.3118015534
/workspace/coverage/default/43.sram_ctrl_executable.502581694
/workspace/coverage/default/43.sram_ctrl_lc_escalation.329658429
/workspace/coverage/default/43.sram_ctrl_max_throughput.2310573399
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3164844002
/workspace/coverage/default/43.sram_ctrl_mem_walk.3806833577
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1548399187
/workspace/coverage/default/43.sram_ctrl_partial_access.3681512180
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1581459201
/workspace/coverage/default/43.sram_ctrl_ram_cfg.348732433
/workspace/coverage/default/43.sram_ctrl_regwen.2591449523
/workspace/coverage/default/43.sram_ctrl_smoke.2491783250
/workspace/coverage/default/43.sram_ctrl_stress_all.3088828124
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.4037497509
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2632347133
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1163242100
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3903814369
/workspace/coverage/default/44.sram_ctrl_alert_test.4245958079
/workspace/coverage/default/44.sram_ctrl_bijection.2795839401
/workspace/coverage/default/44.sram_ctrl_executable.268343115
/workspace/coverage/default/44.sram_ctrl_lc_escalation.382992696
/workspace/coverage/default/44.sram_ctrl_max_throughput.3233541305
/workspace/coverage/default/44.sram_ctrl_mem_walk.1862121966
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2784838787
/workspace/coverage/default/44.sram_ctrl_partial_access.2067431404
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1494907982
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2753465728
/workspace/coverage/default/44.sram_ctrl_regwen.877273987
/workspace/coverage/default/44.sram_ctrl_smoke.1931442809
/workspace/coverage/default/44.sram_ctrl_stress_all.2610677919
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3034611890
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3636889780
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2648151542
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4120574059
/workspace/coverage/default/45.sram_ctrl_alert_test.3278104507
/workspace/coverage/default/45.sram_ctrl_bijection.4256730367
/workspace/coverage/default/45.sram_ctrl_executable.3487125716
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3263710670
/workspace/coverage/default/45.sram_ctrl_max_throughput.3497068036
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.75916838
/workspace/coverage/default/45.sram_ctrl_mem_walk.1099611125
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1110801251
/workspace/coverage/default/45.sram_ctrl_partial_access.3242147354
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2891414277
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2709147330
/workspace/coverage/default/45.sram_ctrl_regwen.1931367111
/workspace/coverage/default/45.sram_ctrl_smoke.1901683611
/workspace/coverage/default/45.sram_ctrl_stress_all.1344506523
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1418558678
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2866885480
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1742597466
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1470288156
/workspace/coverage/default/46.sram_ctrl_alert_test.3721484436
/workspace/coverage/default/46.sram_ctrl_bijection.1389647290
/workspace/coverage/default/46.sram_ctrl_executable.3984761952
/workspace/coverage/default/46.sram_ctrl_lc_escalation.496354361
/workspace/coverage/default/46.sram_ctrl_max_throughput.1291773644
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1151601015
/workspace/coverage/default/46.sram_ctrl_mem_walk.1333394358
/workspace/coverage/default/46.sram_ctrl_multiple_keys.178944151
/workspace/coverage/default/46.sram_ctrl_partial_access.4243972262
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1042871940
/workspace/coverage/default/46.sram_ctrl_ram_cfg.48063185
/workspace/coverage/default/46.sram_ctrl_regwen.2487474385
/workspace/coverage/default/46.sram_ctrl_smoke.2597995772
/workspace/coverage/default/46.sram_ctrl_stress_all.1686205848
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.19075546
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2712537734
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2469877437
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1613373118
/workspace/coverage/default/47.sram_ctrl_alert_test.2120651242
/workspace/coverage/default/47.sram_ctrl_bijection.1601625359
/workspace/coverage/default/47.sram_ctrl_executable.120379754
/workspace/coverage/default/47.sram_ctrl_lc_escalation.996165423
/workspace/coverage/default/47.sram_ctrl_max_throughput.1424326178
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2452725983
/workspace/coverage/default/47.sram_ctrl_mem_walk.1229695131
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3584334781
/workspace/coverage/default/47.sram_ctrl_partial_access.2357383064
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.787316689
/workspace/coverage/default/47.sram_ctrl_ram_cfg.379490598
/workspace/coverage/default/47.sram_ctrl_regwen.161679364
/workspace/coverage/default/47.sram_ctrl_smoke.1144291588
/workspace/coverage/default/47.sram_ctrl_stress_all.3433267935
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3898089688
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.623888721
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2462773170
/workspace/coverage/default/48.sram_ctrl_alert_test.1220361189
/workspace/coverage/default/48.sram_ctrl_bijection.2827080731
/workspace/coverage/default/48.sram_ctrl_executable.2589296294
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3639091889
/workspace/coverage/default/48.sram_ctrl_max_throughput.3459224160
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.174890561
/workspace/coverage/default/48.sram_ctrl_mem_walk.3180349377
/workspace/coverage/default/48.sram_ctrl_multiple_keys.556273697
/workspace/coverage/default/48.sram_ctrl_partial_access.1918709218
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.266997744
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1382086892
/workspace/coverage/default/48.sram_ctrl_smoke.2171951996
/workspace/coverage/default/48.sram_ctrl_stress_all.1726612558
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2727636035
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.870379303
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.322975388
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1621013536
/workspace/coverage/default/49.sram_ctrl_alert_test.2983574510
/workspace/coverage/default/49.sram_ctrl_bijection.3779628096
/workspace/coverage/default/49.sram_ctrl_executable.4085806186
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1220310805
/workspace/coverage/default/49.sram_ctrl_max_throughput.651249457
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2605848416
/workspace/coverage/default/49.sram_ctrl_mem_walk.264460902
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1127504529
/workspace/coverage/default/49.sram_ctrl_partial_access.1019895841
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.273488759
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4136156005
/workspace/coverage/default/49.sram_ctrl_regwen.15995878
/workspace/coverage/default/49.sram_ctrl_smoke.3290149930
/workspace/coverage/default/49.sram_ctrl_stress_all.1910521056
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2181182831
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2635385752
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3240363812
/workspace/coverage/default/5.sram_ctrl_alert_test.54178049
/workspace/coverage/default/5.sram_ctrl_bijection.2228590690
/workspace/coverage/default/5.sram_ctrl_executable.3278499357
/workspace/coverage/default/5.sram_ctrl_lc_escalation.397761868
/workspace/coverage/default/5.sram_ctrl_max_throughput.2088021733
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3411569309
/workspace/coverage/default/5.sram_ctrl_mem_walk.3421322972
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1993453711
/workspace/coverage/default/5.sram_ctrl_partial_access.1194221735
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1302987136
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1441205246
/workspace/coverage/default/5.sram_ctrl_regwen.2435803037
/workspace/coverage/default/5.sram_ctrl_smoke.2927875985
/workspace/coverage/default/5.sram_ctrl_stress_all.3076043189
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3562085098
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1398291063
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2311597942
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2526088852
/workspace/coverage/default/6.sram_ctrl_alert_test.1328634477
/workspace/coverage/default/6.sram_ctrl_bijection.3239297010
/workspace/coverage/default/6.sram_ctrl_executable.2512054684
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1178569276
/workspace/coverage/default/6.sram_ctrl_max_throughput.1628042110
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1828849409
/workspace/coverage/default/6.sram_ctrl_mem_walk.3798503603
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2709789012
/workspace/coverage/default/6.sram_ctrl_partial_access.1484837438
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3944803639
/workspace/coverage/default/6.sram_ctrl_ram_cfg.952126265
/workspace/coverage/default/6.sram_ctrl_regwen.2193555706
/workspace/coverage/default/6.sram_ctrl_smoke.1234008520
/workspace/coverage/default/6.sram_ctrl_stress_all.1731077004
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3792964510
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1297737611
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.992082395
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3623276708
/workspace/coverage/default/7.sram_ctrl_alert_test.1014875913
/workspace/coverage/default/7.sram_ctrl_bijection.1837600413
/workspace/coverage/default/7.sram_ctrl_executable.1997426892
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2710316558
/workspace/coverage/default/7.sram_ctrl_max_throughput.1294124607
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2910268245
/workspace/coverage/default/7.sram_ctrl_mem_walk.178998532
/workspace/coverage/default/7.sram_ctrl_multiple_keys.255390617
/workspace/coverage/default/7.sram_ctrl_partial_access.1429073600
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.235545521
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3026959256
/workspace/coverage/default/7.sram_ctrl_regwen.1145127512
/workspace/coverage/default/7.sram_ctrl_smoke.2125383488
/workspace/coverage/default/7.sram_ctrl_stress_all.457897535
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3270365993
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4112235700
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2520581090
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.267375252
/workspace/coverage/default/8.sram_ctrl_alert_test.646318212
/workspace/coverage/default/8.sram_ctrl_bijection.933099592
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1256082345
/workspace/coverage/default/8.sram_ctrl_max_throughput.1464082083
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.575137088
/workspace/coverage/default/8.sram_ctrl_mem_walk.1705090042
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2419640318
/workspace/coverage/default/8.sram_ctrl_partial_access.390933339
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2533617364
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1390400419
/workspace/coverage/default/8.sram_ctrl_regwen.3345982281
/workspace/coverage/default/8.sram_ctrl_smoke.1185393632
/workspace/coverage/default/8.sram_ctrl_stress_all.291114425
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3342502396
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2154217377
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2749840920
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2099848473
/workspace/coverage/default/9.sram_ctrl_alert_test.1619351058
/workspace/coverage/default/9.sram_ctrl_bijection.2206830289
/workspace/coverage/default/9.sram_ctrl_executable.1968881276
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3929908511
/workspace/coverage/default/9.sram_ctrl_max_throughput.1302086639
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4061262701
/workspace/coverage/default/9.sram_ctrl_mem_walk.1164908044
/workspace/coverage/default/9.sram_ctrl_multiple_keys.58385078
/workspace/coverage/default/9.sram_ctrl_partial_access.1161831987
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2091333542
/workspace/coverage/default/9.sram_ctrl_ram_cfg.351803739
/workspace/coverage/default/9.sram_ctrl_regwen.529668317
/workspace/coverage/default/9.sram_ctrl_smoke.1308482542
/workspace/coverage/default/9.sram_ctrl_stress_all.776008395
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1978641121
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1795567233
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3674143551



Total test records in report: 1037
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3526035190 Jul 12 06:05:44 PM PDT 24 Jul 12 06:08:10 PM PDT 24 1049035942 ps
T2 /workspace/coverage/default/21.sram_ctrl_regwen.1604828415 Jul 12 06:01:41 PM PDT 24 Jul 12 06:13:01 PM PDT 24 12472151414 ps
T3 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.4225280243 Jul 12 06:03:30 PM PDT 24 Jul 12 06:28:47 PM PDT 24 61774404711 ps
T8 /workspace/coverage/default/43.sram_ctrl_max_throughput.2310573399 Jul 12 06:04:41 PM PDT 24 Jul 12 06:04:50 PM PDT 24 718510437 ps
T4 /workspace/coverage/default/4.sram_ctrl_partial_access.3718721254 Jul 12 06:00:36 PM PDT 24 Jul 12 06:00:43 PM PDT 24 968386833 ps
T9 /workspace/coverage/default/26.sram_ctrl_alert_test.829702669 Jul 12 06:02:11 PM PDT 24 Jul 12 06:02:13 PM PDT 24 15319218 ps
T10 /workspace/coverage/default/41.sram_ctrl_stress_all.3938142906 Jul 12 06:04:24 PM PDT 24 Jul 12 07:02:29 PM PDT 24 262444912634 ps
T11 /workspace/coverage/default/37.sram_ctrl_alert_test.505739656 Jul 12 06:03:55 PM PDT 24 Jul 12 06:03:56 PM PDT 24 124274005 ps
T12 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.2722049382 Jul 12 06:01:25 PM PDT 24 Jul 12 06:17:27 PM PDT 24 62175946606 ps
T13 /workspace/coverage/default/6.sram_ctrl_max_throughput.1628042110 Jul 12 06:00:40 PM PDT 24 Jul 12 06:01:19 PM PDT 24 744969013 ps
T14 /workspace/coverage/default/31.sram_ctrl_alert_test.2948759003 Jul 12 06:02:51 PM PDT 24 Jul 12 06:02:52 PM PDT 24 28767560 ps
T37 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.1541054115 Jul 12 06:02:25 PM PDT 24 Jul 12 06:07:59 PM PDT 24 6586723128 ps
T18 /workspace/coverage/default/16.sram_ctrl_bijection.1561071103 Jul 12 06:01:09 PM PDT 24 Jul 12 06:28:13 PM PDT 24 138347648161 ps
T39 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1875973996 Jul 12 06:00:28 PM PDT 24 Jul 12 06:04:59 PM PDT 24 17336082980 ps
T40 /workspace/coverage/default/1.sram_ctrl_mem_walk.4249311297 Jul 12 06:00:23 PM PDT 24 Jul 12 06:05:49 PM PDT 24 28747031984 ps
T23 /workspace/coverage/default/40.sram_ctrl_ram_cfg.3635283937 Jul 12 06:04:11 PM PDT 24 Jul 12 06:04:15 PM PDT 24 1530928993 ps
T41 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.165834270 Jul 12 06:04:19 PM PDT 24 Jul 12 06:07:46 PM PDT 24 16174788452 ps
T50 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.433270437 Jul 12 06:01:13 PM PDT 24 Jul 12 06:01:32 PM PDT 24 1447101642 ps
T59 /workspace/coverage/default/10.sram_ctrl_mem_walk.2163741654 Jul 12 06:00:58 PM PDT 24 Jul 12 06:05:30 PM PDT 24 15767174516 ps
T42 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.1503470056 Jul 12 06:01:53 PM PDT 24 Jul 12 06:14:02 PM PDT 24 13140003137 ps
T82 /workspace/coverage/default/37.sram_ctrl_partial_access.4026180178 Jul 12 06:03:48 PM PDT 24 Jul 12 06:04:58 PM PDT 24 1841762072 ps
T43 /workspace/coverage/default/30.sram_ctrl_mem_walk.1074056852 Jul 12 06:02:44 PM PDT 24 Jul 12 06:05:30 PM PDT 24 7218058325 ps
T5 /workspace/coverage/default/21.sram_ctrl_lc_escalation.1762639497 Jul 12 06:01:40 PM PDT 24 Jul 12 06:03:20 PM PDT 24 55355839978 ps
T101 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.1398291063 Jul 12 06:00:38 PM PDT 24 Jul 12 06:04:05 PM PDT 24 5002070826 ps
T24 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3783141537 Jul 12 06:01:54 PM PDT 24 Jul 12 06:01:58 PM PDT 24 2110393524 ps
T38 /workspace/coverage/default/20.sram_ctrl_mem_walk.838723453 Jul 12 06:01:35 PM PDT 24 Jul 12 06:07:21 PM PDT 24 51260384981 ps
T102 /workspace/coverage/default/13.sram_ctrl_alert_test.2462113334 Jul 12 06:01:01 PM PDT 24 Jul 12 06:01:04 PM PDT 24 28083536 ps
T19 /workspace/coverage/default/35.sram_ctrl_regwen.1805440362 Jul 12 06:03:31 PM PDT 24 Jul 12 06:39:27 PM PDT 24 16831456014 ps
T20 /workspace/coverage/default/27.sram_ctrl_regwen.4214742555 Jul 12 06:02:16 PM PDT 24 Jul 12 06:27:39 PM PDT 24 71457398706 ps
T150 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1944126531 Jul 12 06:08:48 PM PDT 24 Jul 12 06:10:11 PM PDT 24 3037831779 ps
T147 /workspace/coverage/default/43.sram_ctrl_multiple_keys.1548399187 Jul 12 06:04:40 PM PDT 24 Jul 12 06:22:00 PM PDT 24 72182418104 ps
T46 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.2515204305 Jul 12 06:04:16 PM PDT 24 Jul 12 06:05:39 PM PDT 24 14930546198 ps
T6 /workspace/coverage/default/16.sram_ctrl_stress_all.2476595396 Jul 12 06:01:12 PM PDT 24 Jul 12 06:42:37 PM PDT 24 42708903694 ps
T108 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.4210745320 Jul 12 06:01:08 PM PDT 24 Jul 12 06:06:58 PM PDT 24 9562182648 ps
T63 /workspace/coverage/default/46.sram_ctrl_regwen.2487474385 Jul 12 06:05:07 PM PDT 24 Jul 12 06:22:22 PM PDT 24 8358011829 ps
T64 /workspace/coverage/default/17.sram_ctrl_regwen.4022101101 Jul 12 06:01:12 PM PDT 24 Jul 12 06:25:04 PM PDT 24 80042766503 ps
T151 /workspace/coverage/default/43.sram_ctrl_partial_access.3681512180 Jul 12 06:04:37 PM PDT 24 Jul 12 06:04:51 PM PDT 24 3408109981 ps
T21 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.35847966 Jul 12 06:04:38 PM PDT 24 Jul 12 06:06:55 PM PDT 24 7425632083 ps
T72 /workspace/coverage/default/8.sram_ctrl_regwen.3345982281 Jul 12 06:00:48 PM PDT 24 Jul 12 06:06:08 PM PDT 24 89070079375 ps
T152 /workspace/coverage/default/32.sram_ctrl_alert_test.2627844366 Jul 12 06:03:08 PM PDT 24 Jul 12 06:03:10 PM PDT 24 14824859 ps
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T153 /workspace/coverage/default/10.sram_ctrl_partial_access.2121692386 Jul 12 06:00:53 PM PDT 24 Jul 12 06:02:19 PM PDT 24 1249992834 ps
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T154 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1742597466 Jul 12 06:05:00 PM PDT 24 Jul 12 06:07:06 PM PDT 24 12872465520 ps
T155 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.385378792 Jul 12 06:03:54 PM PDT 24 Jul 12 06:07:01 PM PDT 24 2792502652 ps
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T145 /workspace/coverage/default/2.sram_ctrl_regwen.4060905066 Jul 12 06:00:28 PM PDT 24 Jul 12 06:38:05 PM PDT 24 23091665549 ps
T157 /workspace/coverage/default/27.sram_ctrl_partial_access.4284172769 Jul 12 06:02:16 PM PDT 24 Jul 12 06:03:24 PM PDT 24 3231002837 ps
T109 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1302987136 Jul 12 06:00:48 PM PDT 24 Jul 12 06:08:15 PM PDT 24 71382173260 ps
T158 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.992082395 Jul 12 06:00:55 PM PDT 24 Jul 12 06:03:03 PM PDT 24 3228544863 ps
T89 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.4139380070 Jul 12 06:00:27 PM PDT 24 Jul 12 06:15:23 PM PDT 24 57019713896 ps
T52 /workspace/coverage/default/47.sram_ctrl_mem_walk.1229695131 Jul 12 06:05:24 PM PDT 24 Jul 12 06:08:05 PM PDT 24 7209756382 ps
T7 /workspace/coverage/default/37.sram_ctrl_lc_escalation.2788611968 Jul 12 06:03:49 PM PDT 24 Jul 12 06:05:02 PM PDT 24 48650101260 ps
T90 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.2145257474 Jul 12 06:01:54 PM PDT 24 Jul 12 06:03:13 PM PDT 24 4112235265 ps
T110 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.836988454 Jul 12 06:02:02 PM PDT 24 Jul 12 06:08:36 PM PDT 24 50291872863 ps
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T146 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1857092497 Jul 12 06:00:30 PM PDT 24 Jul 12 06:01:15 PM PDT 24 10794906187 ps
T91 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1828849409 Jul 12 06:00:57 PM PDT 24 Jul 12 06:03:26 PM PDT 24 4757361265 ps
T92 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.995097994 Jul 12 06:04:32 PM PDT 24 Jul 12 06:05:58 PM PDT 24 5453421941 ps
T159 /workspace/coverage/default/32.sram_ctrl_multiple_keys.1584550231 Jul 12 06:02:52 PM PDT 24 Jul 12 06:09:22 PM PDT 24 12365550247 ps
T160 /workspace/coverage/default/33.sram_ctrl_bijection.930057887 Jul 12 06:03:11 PM PDT 24 Jul 12 06:25:40 PM PDT 24 63135741434 ps
T161 /workspace/coverage/default/28.sram_ctrl_max_throughput.1718197951 Jul 12 06:02:24 PM PDT 24 Jul 12 06:05:05 PM PDT 24 10874389000 ps
T148 /workspace/coverage/default/37.sram_ctrl_regwen.1856188872 Jul 12 06:03:53 PM PDT 24 Jul 12 06:12:47 PM PDT 24 22287074946 ps
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T163 /workspace/coverage/default/26.sram_ctrl_bijection.1896017940 Jul 12 06:02:12 PM PDT 24 Jul 12 06:37:01 PM PDT 24 89306050558 ps
T164 /workspace/coverage/default/29.sram_ctrl_alert_test.942557424 Jul 12 06:02:36 PM PDT 24 Jul 12 06:02:38 PM PDT 24 15902859 ps
T124 /workspace/coverage/default/49.sram_ctrl_lc_escalation.1220310805 Jul 12 06:05:37 PM PDT 24 Jul 12 06:06:59 PM PDT 24 48389318223 ps
T47 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.2171336753 Jul 12 06:04:53 PM PDT 24 Jul 12 06:07:39 PM PDT 24 23155742701 ps
T165 /workspace/coverage/default/43.sram_ctrl_alert_test.2538740954 Jul 12 06:04:47 PM PDT 24 Jul 12 06:04:48 PM PDT 24 28535023 ps
T166 /workspace/coverage/default/42.sram_ctrl_partial_access.1934350190 Jul 12 06:04:31 PM PDT 24 Jul 12 06:04:59 PM PDT 24 1791716248 ps
T111 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1676376664 Jul 12 06:02:12 PM PDT 24 Jul 12 06:06:21 PM PDT 24 17811058370 ps
T167 /workspace/coverage/default/22.sram_ctrl_max_throughput.2013517439 Jul 12 06:01:49 PM PDT 24 Jul 12 06:02:05 PM PDT 24 9776197186 ps
T168 /workspace/coverage/default/33.sram_ctrl_partial_access.3395125176 Jul 12 06:03:08 PM PDT 24 Jul 12 06:03:18 PM PDT 24 1601015582 ps
T22 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2541425404 Jul 12 06:03:30 PM PDT 24 Jul 12 06:03:37 PM PDT 24 358353450 ps
T117 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3929908511 Jul 12 06:00:46 PM PDT 24 Jul 12 06:01:03 PM PDT 24 2820176070 ps
T118 /workspace/coverage/default/14.sram_ctrl_regwen.347259608 Jul 12 06:01:04 PM PDT 24 Jul 12 06:13:38 PM PDT 24 6706028331 ps
T119 /workspace/coverage/default/46.sram_ctrl_lc_escalation.496354361 Jul 12 06:05:09 PM PDT 24 Jul 12 06:06:09 PM PDT 24 19663230653 ps
T120 /workspace/coverage/default/33.sram_ctrl_alert_test.2682355230 Jul 12 06:03:17 PM PDT 24 Jul 12 06:03:19 PM PDT 24 46200125 ps
T121 /workspace/coverage/default/7.sram_ctrl_bijection.1837600413 Jul 12 06:00:47 PM PDT 24 Jul 12 06:43:19 PM PDT 24 876991932604 ps
T122 /workspace/coverage/default/40.sram_ctrl_regwen.1222398688 Jul 12 06:04:08 PM PDT 24 Jul 12 06:08:59 PM PDT 24 5603921655 ps
T123 /workspace/coverage/default/28.sram_ctrl_regwen.863445854 Jul 12 06:02:24 PM PDT 24 Jul 12 06:21:24 PM PDT 24 30484126078 ps
T48 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.677512281 Jul 12 06:01:14 PM PDT 24 Jul 12 06:02:44 PM PDT 24 5342413919 ps
T15 /workspace/coverage/default/4.sram_ctrl_sec_cm.1989524746 Jul 12 06:00:40 PM PDT 24 Jul 12 06:00:43 PM PDT 24 294312405 ps
T28 /workspace/coverage/default/3.sram_ctrl_alert_test.1492926643 Jul 12 06:00:50 PM PDT 24 Jul 12 06:00:52 PM PDT 24 19933207 ps
T29 /workspace/coverage/default/19.sram_ctrl_partial_access.3290398191 Jul 12 06:01:34 PM PDT 24 Jul 12 06:01:41 PM PDT 24 696500299 ps
T30 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.2605848416 Jul 12 06:05:46 PM PDT 24 Jul 12 06:06:54 PM PDT 24 4178841365 ps
T31 /workspace/coverage/default/17.sram_ctrl_bijection.1044440001 Jul 12 06:01:11 PM PDT 24 Jul 12 06:35:17 PM PDT 24 345461016033 ps
T32 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3881837242 Jul 12 06:04:08 PM PDT 24 Jul 12 06:10:19 PM PDT 24 29866273645 ps
T33 /workspace/coverage/default/41.sram_ctrl_smoke.1097076008 Jul 12 06:04:17 PM PDT 24 Jul 12 06:04:34 PM PDT 24 824793479 ps
T34 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.575137088 Jul 12 06:00:47 PM PDT 24 Jul 12 06:03:26 PM PDT 24 10208056624 ps
T35 /workspace/coverage/default/49.sram_ctrl_smoke.3290149930 Jul 12 06:05:36 PM PDT 24 Jul 12 06:06:38 PM PDT 24 2412871685 ps
T36 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2533617364 Jul 12 06:00:46 PM PDT 24 Jul 12 06:10:12 PM PDT 24 306418512543 ps
T169 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.4058228524 Jul 12 06:04:18 PM PDT 24 Jul 12 06:05:33 PM PDT 24 1499690673 ps
T103 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.3194405801 Jul 12 06:04:01 PM PDT 24 Jul 12 06:22:33 PM PDT 24 24899061870 ps
T149 /workspace/coverage/default/15.sram_ctrl_mem_walk.1552370491 Jul 12 06:01:08 PM PDT 24 Jul 12 06:05:21 PM PDT 24 3946223953 ps
T49 /workspace/coverage/default/34.sram_ctrl_mem_walk.1767875490 Jul 12 06:03:26 PM PDT 24 Jul 12 06:06:26 PM PDT 24 43135348477 ps
T170 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1055969269 Jul 12 06:00:20 PM PDT 24 Jul 12 06:01:16 PM PDT 24 792347515 ps
T171 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.1328454613 Jul 12 06:02:30 PM PDT 24 Jul 12 06:05:09 PM PDT 24 16926864645 ps
T141 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.3313923404 Jul 12 06:02:43 PM PDT 24 Jul 12 06:10:48 PM PDT 24 22316191650 ps
T16 /workspace/coverage/default/1.sram_ctrl_sec_cm.2041684176 Jul 12 06:00:23 PM PDT 24 Jul 12 06:00:28 PM PDT 24 581168820 ps
T142 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2858180781 Jul 12 06:00:23 PM PDT 24 Jul 12 06:08:46 PM PDT 24 39236612387 ps
T172 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2181182831 Jul 12 06:05:37 PM PDT 24 Jul 12 06:09:49 PM PDT 24 4147097765 ps
T173 /workspace/coverage/default/25.sram_ctrl_bijection.2143875312 Jul 12 06:02:01 PM PDT 24 Jul 12 06:44:22 PM PDT 24 289881492949 ps
T174 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.719848599 Jul 12 06:00:24 PM PDT 24 Jul 12 06:11:49 PM PDT 24 6712148984 ps
T25 /workspace/coverage/default/10.sram_ctrl_ram_cfg.551003559 Jul 12 06:00:56 PM PDT 24 Jul 12 06:01:02 PM PDT 24 1398117635 ps
T175 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2882979322 Jul 12 06:03:17 PM PDT 24 Jul 12 06:09:25 PM PDT 24 6003297699 ps
T176 /workspace/coverage/default/47.sram_ctrl_partial_access.2357383064 Jul 12 06:05:23 PM PDT 24 Jul 12 06:05:46 PM PDT 24 14925099021 ps
T177 /workspace/coverage/default/21.sram_ctrl_max_throughput.5014185 Jul 12 06:01:38 PM PDT 24 Jul 12 06:02:35 PM PDT 24 1494828259 ps
T178 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.2181280415 Jul 12 06:01:09 PM PDT 24 Jul 12 06:04:09 PM PDT 24 7626601507 ps
T179 /workspace/coverage/default/49.sram_ctrl_executable.4085806186 Jul 12 06:05:39 PM PDT 24 Jul 12 06:25:28 PM PDT 24 75075692747 ps
T139 /workspace/coverage/default/17.sram_ctrl_executable.4021724567 Jul 12 06:01:15 PM PDT 24 Jul 12 06:11:07 PM PDT 24 17080011244 ps
T180 /workspace/coverage/default/35.sram_ctrl_ram_cfg.2690229624 Jul 12 06:03:34 PM PDT 24 Jul 12 06:03:38 PM PDT 24 707833002 ps
T181 /workspace/coverage/default/20.sram_ctrl_partial_access.1201479916 Jul 12 06:01:39 PM PDT 24 Jul 12 06:02:05 PM PDT 24 665233803 ps
T182 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2518227922 Jul 12 06:04:22 PM PDT 24 Jul 12 06:04:26 PM PDT 24 1968700446 ps
T183 /workspace/coverage/default/0.sram_ctrl_executable.840824510 Jul 12 06:00:20 PM PDT 24 Jul 12 06:04:30 PM PDT 24 8572108071 ps
T184 /workspace/coverage/default/36.sram_ctrl_mem_walk.1365583997 Jul 12 06:03:39 PM PDT 24 Jul 12 06:05:46 PM PDT 24 2018788139 ps
T185 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1294030795 Jul 12 06:00:25 PM PDT 24 Jul 12 06:03:32 PM PDT 24 13152180649 ps
T144 /workspace/coverage/default/35.sram_ctrl_multiple_keys.3109278770 Jul 12 06:03:32 PM PDT 24 Jul 12 06:19:50 PM PDT 24 47557575212 ps
T186 /workspace/coverage/default/12.sram_ctrl_alert_test.2087035754 Jul 12 06:01:01 PM PDT 24 Jul 12 06:01:04 PM PDT 24 11643521 ps
T187 /workspace/coverage/default/9.sram_ctrl_bijection.2206830289 Jul 12 06:00:50 PM PDT 24 Jul 12 06:14:02 PM PDT 24 50024615304 ps
T188 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2428668334 Jul 12 06:03:15 PM PDT 24 Jul 12 06:28:39 PM PDT 24 135740880027 ps
T189 /workspace/coverage/default/48.sram_ctrl_lc_escalation.3639091889 Jul 12 06:05:30 PM PDT 24 Jul 12 06:06:34 PM PDT 24 35122877318 ps
T65 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3342502396 Jul 12 06:01:00 PM PDT 24 Jul 12 06:01:19 PM PDT 24 345529744 ps
T66 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1961675938 Jul 12 06:02:09 PM PDT 24 Jul 12 06:02:35 PM PDT 24 624434459 ps
T190 /workspace/coverage/default/15.sram_ctrl_partial_access.1991762153 Jul 12 06:01:09 PM PDT 24 Jul 12 06:02:27 PM PDT 24 15222262735 ps
T191 /workspace/coverage/default/27.sram_ctrl_executable.280350539 Jul 12 06:02:16 PM PDT 24 Jul 12 06:11:16 PM PDT 24 40503447740 ps
T192 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3286759820 Jul 12 06:02:46 PM PDT 24 Jul 12 06:04:31 PM PDT 24 3318975735 ps
T193 /workspace/coverage/default/25.sram_ctrl_smoke.2036742376 Jul 12 06:02:00 PM PDT 24 Jul 12 06:02:55 PM PDT 24 776806564 ps
T194 /workspace/coverage/default/47.sram_ctrl_stress_all.3433267935 Jul 12 06:05:30 PM PDT 24 Jul 12 06:49:57 PM PDT 24 20560225884 ps
T195 /workspace/coverage/default/29.sram_ctrl_smoke.3989788924 Jul 12 06:02:29 PM PDT 24 Jul 12 06:03:43 PM PDT 24 4577157788 ps
T196 /workspace/coverage/default/37.sram_ctrl_smoke.3542700846 Jul 12 06:03:47 PM PDT 24 Jul 12 06:05:16 PM PDT 24 2317578241 ps
T197 /workspace/coverage/default/41.sram_ctrl_partial_access.2625367975 Jul 12 06:04:16 PM PDT 24 Jul 12 06:04:46 PM PDT 24 12398656782 ps
T198 /workspace/coverage/default/24.sram_ctrl_max_throughput.1169578596 Jul 12 06:01:55 PM PDT 24 Jul 12 06:02:47 PM PDT 24 3068547399 ps
T199 /workspace/coverage/default/46.sram_ctrl_alert_test.3721484436 Jul 12 06:05:14 PM PDT 24 Jul 12 06:05:15 PM PDT 24 21785058 ps
T143 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.970032713 Jul 12 06:04:32 PM PDT 24 Jul 12 06:11:14 PM PDT 24 64826193532 ps
T200 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1436597345 Jul 12 06:03:32 PM PDT 24 Jul 12 06:09:11 PM PDT 24 9217371401 ps
T201 /workspace/coverage/default/3.sram_ctrl_stress_all.40614943 Jul 12 06:00:29 PM PDT 24 Jul 12 07:53:12 PM PDT 24 570486569436 ps
T202 /workspace/coverage/default/20.sram_ctrl_lc_escalation.411681045 Jul 12 06:01:33 PM PDT 24 Jul 12 06:02:36 PM PDT 24 16904746728 ps
T203 /workspace/coverage/default/0.sram_ctrl_regwen.4245150083 Jul 12 06:00:22 PM PDT 24 Jul 12 06:09:39 PM PDT 24 15885220229 ps
T204 /workspace/coverage/default/36.sram_ctrl_ram_cfg.1839243450 Jul 12 06:03:40 PM PDT 24 Jul 12 06:03:44 PM PDT 24 349949128 ps
T205 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.2758055189 Jul 12 06:04:17 PM PDT 24 Jul 12 06:13:01 PM PDT 24 10843917642 ps
T206 /workspace/coverage/default/10.sram_ctrl_bijection.3807072085 Jul 12 06:00:59 PM PDT 24 Jul 12 06:42:27 PM PDT 24 144869615355 ps
T207 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3674143551 Jul 12 06:00:55 PM PDT 24 Jul 12 06:03:18 PM PDT 24 3868614449 ps
T208 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2866885480 Jul 12 06:04:54 PM PDT 24 Jul 12 06:08:44 PM PDT 24 3886159567 ps
T209 /workspace/coverage/default/19.sram_ctrl_executable.3115320653 Jul 12 06:01:24 PM PDT 24 Jul 12 06:04:06 PM PDT 24 6127312541 ps
T210 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1316307780 Jul 12 06:04:08 PM PDT 24 Jul 12 06:04:55 PM PDT 24 952538331 ps
T211 /workspace/coverage/default/24.sram_ctrl_stress_all.2141928457 Jul 12 06:01:59 PM PDT 24 Jul 12 08:14:42 PM PDT 24 791024124590 ps
T212 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1993453711 Jul 12 06:00:35 PM PDT 24 Jul 12 06:12:50 PM PDT 24 19802122357 ps
T213 /workspace/coverage/default/40.sram_ctrl_bijection.1055529615 Jul 12 06:04:10 PM PDT 24 Jul 12 06:35:05 PM PDT 24 522356321156 ps
T214 /workspace/coverage/default/14.sram_ctrl_mem_walk.2070600684 Jul 12 06:01:04 PM PDT 24 Jul 12 06:03:12 PM PDT 24 13164656303 ps
T67 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1439810522 Jul 12 06:02:35 PM PDT 24 Jul 12 06:02:52 PM PDT 24 1105477973 ps
T68 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1864456726 Jul 12 06:00:39 PM PDT 24 Jul 12 06:01:00 PM PDT 24 1970764296 ps
T215 /workspace/coverage/default/3.sram_ctrl_smoke.937370881 Jul 12 06:00:35 PM PDT 24 Jul 12 06:00:49 PM PDT 24 1872052003 ps
T216 /workspace/coverage/default/29.sram_ctrl_bijection.2431871923 Jul 12 06:02:35 PM PDT 24 Jul 12 06:40:45 PM PDT 24 524597615213 ps
T217 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.2096397644 Jul 12 06:02:58 PM PDT 24 Jul 12 06:21:47 PM PDT 24 43847047405 ps
T218 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.1621013536 Jul 12 06:05:36 PM PDT 24 Jul 12 06:15:42 PM PDT 24 246571848343 ps
T219 /workspace/coverage/default/7.sram_ctrl_multiple_keys.255390617 Jul 12 06:00:43 PM PDT 24 Jul 12 06:14:59 PM PDT 24 34803990075 ps
T220 /workspace/coverage/default/32.sram_ctrl_mem_walk.1895110216 Jul 12 06:03:00 PM PDT 24 Jul 12 06:08:22 PM PDT 24 14124966993 ps
T221 /workspace/coverage/default/25.sram_ctrl_stress_all.3311696561 Jul 12 06:02:10 PM PDT 24 Jul 12 07:24:51 PM PDT 24 214991963111 ps
T222 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3910564386 Jul 12 06:03:40 PM PDT 24 Jul 12 06:05:45 PM PDT 24 797556865 ps
T223 /workspace/coverage/default/49.sram_ctrl_regwen.15995878 Jul 12 06:05:38 PM PDT 24 Jul 12 06:13:36 PM PDT 24 37892422437 ps
T224 /workspace/coverage/default/11.sram_ctrl_regwen.2908207779 Jul 12 06:00:52 PM PDT 24 Jul 12 06:41:49 PM PDT 24 17590647830 ps
T225 /workspace/coverage/default/4.sram_ctrl_alert_test.2533675529 Jul 12 06:00:50 PM PDT 24 Jul 12 06:00:52 PM PDT 24 32773561 ps
T226 /workspace/coverage/default/35.sram_ctrl_lc_escalation.3245614137 Jul 12 06:03:31 PM PDT 24 Jul 12 06:04:30 PM PDT 24 25553229652 ps
T227 /workspace/coverage/default/8.sram_ctrl_stress_all.291114425 Jul 12 06:00:46 PM PDT 24 Jul 12 08:25:10 PM PDT 24 399188828133 ps
T228 /workspace/coverage/default/16.sram_ctrl_mem_walk.1274034300 Jul 12 06:01:08 PM PDT 24 Jul 12 06:06:21 PM PDT 24 10716570708 ps
T229 /workspace/coverage/default/46.sram_ctrl_partial_access.4243972262 Jul 12 06:05:07 PM PDT 24 Jul 12 06:06:06 PM PDT 24 3238748926 ps
T230 /workspace/coverage/default/9.sram_ctrl_partial_access.1161831987 Jul 12 06:00:44 PM PDT 24 Jul 12 06:03:17 PM PDT 24 1749028893 ps
T231 /workspace/coverage/default/32.sram_ctrl_regwen.181612924 Jul 12 06:02:58 PM PDT 24 Jul 12 06:21:06 PM PDT 24 14058947880 ps
T232 /workspace/coverage/default/39.sram_ctrl_max_throughput.3326569384 Jul 12 06:04:01 PM PDT 24 Jul 12 06:04:27 PM PDT 24 1442567858 ps
T233 /workspace/coverage/default/24.sram_ctrl_lc_escalation.80291786 Jul 12 06:01:58 PM PDT 24 Jul 12 06:03:37 PM PDT 24 86649967342 ps
T234 /workspace/coverage/default/16.sram_ctrl_alert_test.4092154258 Jul 12 06:01:14 PM PDT 24 Jul 12 06:01:16 PM PDT 24 17803487 ps
T235 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.4112235700 Jul 12 06:00:56 PM PDT 24 Jul 12 06:05:04 PM PDT 24 4832395879 ps
T236 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1615588166 Jul 12 06:01:05 PM PDT 24 Jul 12 06:04:24 PM PDT 24 11033169541 ps
T237 /workspace/coverage/default/22.sram_ctrl_multiple_keys.3711047018 Jul 12 06:01:40 PM PDT 24 Jul 12 06:08:52 PM PDT 24 42029468734 ps
T238 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.2749356431 Jul 12 06:01:40 PM PDT 24 Jul 12 06:19:28 PM PDT 24 17081632495 ps
T69 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3601816632 Jul 12 06:03:31 PM PDT 24 Jul 12 06:03:44 PM PDT 24 367435350 ps
T239 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1395729876 Jul 12 06:00:56 PM PDT 24 Jul 12 06:04:09 PM PDT 24 13700045070 ps
T240 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4125120961 Jul 12 06:00:54 PM PDT 24 Jul 12 06:01:26 PM PDT 24 768764151 ps
T241 /workspace/coverage/default/15.sram_ctrl_lc_escalation.817712145 Jul 12 06:01:06 PM PDT 24 Jul 12 06:03:02 PM PDT 24 93334416698 ps
T242 /workspace/coverage/default/26.sram_ctrl_lc_escalation.1986357894 Jul 12 06:02:11 PM PDT 24 Jul 12 06:02:26 PM PDT 24 2243231457 ps
T243 /workspace/coverage/default/29.sram_ctrl_ram_cfg.2810276217 Jul 12 06:02:37 PM PDT 24 Jul 12 06:02:41 PM PDT 24 344038302 ps
T244 /workspace/coverage/default/22.sram_ctrl_ram_cfg.4077199677 Jul 12 06:01:49 PM PDT 24 Jul 12 06:01:53 PM PDT 24 357174404 ps
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T248 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.235545521 Jul 12 06:04:42 PM PDT 24 Jul 12 06:10:50 PM PDT 24 26423639902 ps
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T280 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.3841196807 Jul 12 06:01:12 PM PDT 24 Jul 12 06:04:43 PM PDT 24 54620678088 ps
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T298 /workspace/coverage/default/29.sram_ctrl_partial_access.3625944768 Jul 12 06:02:36 PM PDT 24 Jul 12 06:02:49 PM PDT 24 741767498 ps
T299 /workspace/coverage/default/38.sram_ctrl_partial_access.2335017869 Jul 12 06:03:58 PM PDT 24 Jul 12 06:04:21 PM PDT 24 1933582908 ps
T300 /workspace/coverage/default/13.sram_ctrl_smoke.1182919127 Jul 12 06:01:06 PM PDT 24 Jul 12 06:04:01 PM PDT 24 1334617774 ps
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T302 /workspace/coverage/default/34.sram_ctrl_partial_access.623471575 Jul 12 06:03:15 PM PDT 24 Jul 12 06:03:49 PM PDT 24 671997337 ps
T303 /workspace/coverage/default/36.sram_ctrl_alert_test.990845780 Jul 12 06:03:41 PM PDT 24 Jul 12 06:03:43 PM PDT 24 11158428 ps
T304 /workspace/coverage/default/38.sram_ctrl_smoke.782050749 Jul 12 06:03:55 PM PDT 24 Jul 12 06:05:53 PM PDT 24 2708294889 ps
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T306 /workspace/coverage/default/6.sram_ctrl_lc_escalation.1178569276 Jul 12 06:00:55 PM PDT 24 Jul 12 06:01:33 PM PDT 24 5880453745 ps
T307 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3292852134 Jul 12 06:01:48 PM PDT 24 Jul 12 06:08:32 PM PDT 24 26846072000 ps
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