Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
97.99	99.19	94.27	99.72	100.00	96.03	99.12	97.62

Total tests in report: 1035

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
70.85	70.85	92.23	92.23	69.67	69.67	84.71	84.71	33.33	33.33	81.99	81.99	93.42	93.42	40.59	40.59	/workspace/coverage/default/49.sram_ctrl_lc_escalation.3151069273
87.96	17.11	97.30	5.07	83.77	14.10	92.91	8.20	80.95	47.62	89.81	7.82	96.05	2.63	74.95	34.37	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2004627845
91.54	3.57	98.28	0.98	84.24	0.47	94.56	1.65	100.00	19.05	91.47	1.66	97.08	1.02	75.14	0.18	/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2895449892
93.84	2.30	98.53	0.25	87.44	3.20	97.31	2.75	100.00	0.00	94.08	2.61	97.08	0.00	82.45	7.31	/workspace/coverage/default/47.sram_ctrl_regwen.3939504301
94.82	0.98	98.69	0.16	88.27	0.83	97.52	0.21	100.00	0.00	94.79	0.71	97.08	0.00	87.39	4.94	/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4278883427
95.43	0.61	98.94	0.25	88.27	0.00	97.52	0.00	100.00	0.00	95.02	0.24	97.22	0.15	91.04	3.66	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3778487318
96.00	0.57	99.10	0.16	90.05	1.78	97.93	0.41	100.00	0.00	95.73	0.71	97.81	0.58	91.41	0.37	/workspace/coverage/default/0.sram_ctrl_sec_cm.1624634570
96.47	0.46	99.10	0.00	90.17	0.12	97.93	0.00	100.00	0.00	95.73	0.00	97.81	0.00	94.52	3.11	/workspace/coverage/default/34.sram_ctrl_stress_all.1461183094
96.66	0.20	99.10	0.00	90.52	0.36	98.42	0.48	100.00	0.00	95.73	0.00	97.81	0.00	95.06	0.55	/workspace/coverage/default/42.sram_ctrl_alert_test.181894987
96.86	0.20	99.10	0.00	90.52	0.00	98.48	0.07	100.00	0.00	95.73	0.00	99.12	1.32	95.06	0.00	/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.471169024
96.99	0.13	99.18	0.08	90.52	0.00	99.31	0.83	100.00	0.00	95.73	0.00	99.12	0.00	95.06	0.00	/workspace/coverage/default/18.sram_ctrl_ram_cfg.2821239536
97.11	0.11	99.18	0.00	90.64	0.12	99.52	0.21	100.00	0.00	96.21	0.47	99.12	0.00	95.06	0.00	/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2475876490
97.21	0.10	99.18	0.00	90.64	0.00	99.52	0.00	100.00	0.00	96.21	0.00	99.12	0.00	95.80	0.73	/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1188589026
97.31	0.10	99.18	0.00	90.64	0.00	99.66	0.14	100.00	0.00	96.21	0.00	99.12	0.00	96.34	0.55	/workspace/coverage/default/18.sram_ctrl_executable.236320970
97.39	0.08	99.18	0.00	90.64	0.00	99.66	0.00	100.00	0.00	96.21	0.00	99.12	0.00	96.89	0.55	/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3056865466
97.45	0.06	99.18	0.00	90.88	0.24	99.66	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.07	0.18	/workspace/coverage/default/43.sram_ctrl_stress_all.2666929340
97.47	0.03	99.18	0.00	90.88	0.00	99.66	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.26	0.18	/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1492827988
97.50	0.03	99.18	0.00	90.88	0.00	99.66	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.44	0.18	/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2862694770
97.52	0.03	99.18	0.00	90.88	0.00	99.66	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.62	0.18	/workspace/coverage/default/15.sram_ctrl_multiple_keys.3885761463
97.54	0.02	99.18	0.00	91.00	0.12	99.66	0.00	100.00	0.00	96.21	0.00	99.12	0.00	97.62	0.00	/workspace/coverage/default/2.sram_ctrl_regwen.3654624362
97.55	0.01	99.18	0.00	91.00	0.00	99.72	0.07	100.00	0.00	96.21	0.00	99.12	0.00	97.62	0.00	/workspace/coverage/default/0.sram_ctrl_executable.1022726727

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2279107422
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1924058991
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1894502409
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3533676044
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.328428645
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1955215339
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.558739468
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3351559281
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1893845234
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1613716896
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2547226170
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2964479106
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1319766285
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3288126663
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.798721561
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2937152226
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3003012536
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3279489374
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2063842319
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3563458130
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3194653515
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3070262726
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1832103943
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2063202819
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.202607070
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.97784969
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.892288072
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2073293266
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.805483916
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3466332013
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.866931269
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3737215805
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2697501938
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2672748474
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4182665679
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.246183099
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2148083020
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3275301156
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.742667053
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1432925791
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1045651029
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1594031474
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1097590126
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.697470095
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3621619224
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1418393948
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1059222737
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3181111843
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2517215250
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2277833684
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.666713077
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.4052517621
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3166524960
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1056128947
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.217328933
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.888301775
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1922107003
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2669183774
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3040806114
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.640183663
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2457757727
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1395910319
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1345899114
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.4016437604
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1514172613
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.990844671
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3998920190
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3493276487
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1858555391
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2217447687
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2922839930
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2907997685
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3151606899
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1309153453
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1307136275
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.221637780
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3132892510
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2245662218
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.4127883056
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2091887545
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.591955845
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2880949753
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2861856296
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3126889575
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.481239555
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3792113419
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1556001058
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2551666471
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2886314985
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2881547673
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2735341360
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.97153320
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2949754297
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2605749805
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2782242263
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.4255000751
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2482719705
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2832296508
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1288917993
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3535264276
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3440858290
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.36899094
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.945792650
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.920845046
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1535031727
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1348132517
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.652000482
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4198294081
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2031260800
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3518903940
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3212593579
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4279013161
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.4156251201
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.504915078
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.869732284
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2557087036
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3084043508
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1849315922
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4112310038
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2387363652
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2925013968
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.356496324
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1621607565
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4067857554
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3313675575
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.711032866
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2957700188
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3608911075
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3376137929
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2573189807
/workspace/coverage/default/0.sram_ctrl_alert_test.857988870
/workspace/coverage/default/0.sram_ctrl_bijection.2913101467
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1718751470
/workspace/coverage/default/0.sram_ctrl_max_throughput.1722385188
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1928590483
/workspace/coverage/default/0.sram_ctrl_mem_walk.79625575
/workspace/coverage/default/0.sram_ctrl_multiple_keys.366371122
/workspace/coverage/default/0.sram_ctrl_partial_access.3318241585
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3885688862
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1129407156
/workspace/coverage/default/0.sram_ctrl_regwen.138784644
/workspace/coverage/default/0.sram_ctrl_smoke.2689197974
/workspace/coverage/default/0.sram_ctrl_stress_all.810094035
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2216865095
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2945456913
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3657839506
/workspace/coverage/default/1.sram_ctrl_alert_test.3139613410
/workspace/coverage/default/1.sram_ctrl_bijection.461136885
/workspace/coverage/default/1.sram_ctrl_executable.1946900326
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1005253604
/workspace/coverage/default/1.sram_ctrl_max_throughput.1908517670
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1149661809
/workspace/coverage/default/1.sram_ctrl_mem_walk.3760111500
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4234680310
/workspace/coverage/default/1.sram_ctrl_partial_access.403363473
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1666554462
/workspace/coverage/default/1.sram_ctrl_ram_cfg.420006541
/workspace/coverage/default/1.sram_ctrl_regwen.2148109166
/workspace/coverage/default/1.sram_ctrl_sec_cm.3250105445
/workspace/coverage/default/1.sram_ctrl_smoke.1591377507
/workspace/coverage/default/1.sram_ctrl_stress_all.1232024181
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.68090798
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1928302462
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.905080067
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3157375652
/workspace/coverage/default/10.sram_ctrl_alert_test.1989750163
/workspace/coverage/default/10.sram_ctrl_bijection.4051851135
/workspace/coverage/default/10.sram_ctrl_executable.2570451499
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1863873543
/workspace/coverage/default/10.sram_ctrl_max_throughput.3417366762
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.226709045
/workspace/coverage/default/10.sram_ctrl_mem_walk.2555468269
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3541038110
/workspace/coverage/default/10.sram_ctrl_partial_access.2923581878
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1773151057
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2527736000
/workspace/coverage/default/10.sram_ctrl_regwen.277992183
/workspace/coverage/default/10.sram_ctrl_smoke.2883593763
/workspace/coverage/default/10.sram_ctrl_stress_all.4077026213
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2496802199
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2259838653
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.139570301
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3790510718
/workspace/coverage/default/11.sram_ctrl_alert_test.290456088
/workspace/coverage/default/11.sram_ctrl_bijection.3103388870
/workspace/coverage/default/11.sram_ctrl_executable.2894222201
/workspace/coverage/default/11.sram_ctrl_lc_escalation.205905066
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/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1557392995
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.534276475
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.2232329072
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.463484231
/workspace/coverage/default/42.sram_ctrl_bijection.3943774592
/workspace/coverage/default/42.sram_ctrl_executable.3014750323
/workspace/coverage/default/42.sram_ctrl_lc_escalation.4185081049
/workspace/coverage/default/42.sram_ctrl_max_throughput.2654757831
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2742388805
/workspace/coverage/default/42.sram_ctrl_mem_walk.1151014551
/workspace/coverage/default/42.sram_ctrl_multiple_keys.169931180
/workspace/coverage/default/42.sram_ctrl_partial_access.810704225
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4007538029
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2788827174
/workspace/coverage/default/42.sram_ctrl_regwen.2149893893
/workspace/coverage/default/42.sram_ctrl_smoke.3171907210
/workspace/coverage/default/42.sram_ctrl_stress_all.197766967
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3583269063
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.2012596440
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3678588540
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2881976987
/workspace/coverage/default/43.sram_ctrl_alert_test.946139155
/workspace/coverage/default/43.sram_ctrl_bijection.1404876840
/workspace/coverage/default/43.sram_ctrl_executable.139473517
/workspace/coverage/default/43.sram_ctrl_lc_escalation.4199366980
/workspace/coverage/default/43.sram_ctrl_max_throughput.1746055656
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.4026259101
/workspace/coverage/default/43.sram_ctrl_mem_walk.3482453209
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2057342237
/workspace/coverage/default/43.sram_ctrl_partial_access.128443510
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4080487779
/workspace/coverage/default/43.sram_ctrl_regwen.487216715
/workspace/coverage/default/43.sram_ctrl_smoke.1976931512
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1376614942
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.139097672
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2847045492
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3349295707
/workspace/coverage/default/44.sram_ctrl_alert_test.2477219032
/workspace/coverage/default/44.sram_ctrl_bijection.1606889180
/workspace/coverage/default/44.sram_ctrl_executable.879381803
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2965674899
/workspace/coverage/default/44.sram_ctrl_max_throughput.1599514269
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2187662112
/workspace/coverage/default/44.sram_ctrl_mem_walk.3305898671
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3101910617
/workspace/coverage/default/44.sram_ctrl_partial_access.4127565750
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3088486374
/workspace/coverage/default/44.sram_ctrl_ram_cfg.4129699656
/workspace/coverage/default/44.sram_ctrl_regwen.547028328
/workspace/coverage/default/44.sram_ctrl_smoke.1951396530
/workspace/coverage/default/44.sram_ctrl_stress_all.3774604378
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1388954153
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.28006804
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4226245685
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3276623521
/workspace/coverage/default/45.sram_ctrl_alert_test.2578715499
/workspace/coverage/default/45.sram_ctrl_bijection.910446045
/workspace/coverage/default/45.sram_ctrl_executable.1308872680
/workspace/coverage/default/45.sram_ctrl_lc_escalation.51809570
/workspace/coverage/default/45.sram_ctrl_max_throughput.3514120894
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2251331566
/workspace/coverage/default/45.sram_ctrl_mem_walk.1291225119
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4145078396
/workspace/coverage/default/45.sram_ctrl_partial_access.3219631103
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.555150504
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1769825792
/workspace/coverage/default/45.sram_ctrl_regwen.3694966331
/workspace/coverage/default/45.sram_ctrl_smoke.3129366680
/workspace/coverage/default/45.sram_ctrl_stress_all.2704654326
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3671927005
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1213924069
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1881997564
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3425328832
/workspace/coverage/default/46.sram_ctrl_alert_test.1056272471
/workspace/coverage/default/46.sram_ctrl_bijection.2772000905
/workspace/coverage/default/46.sram_ctrl_executable.272938667
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1115333692
/workspace/coverage/default/46.sram_ctrl_max_throughput.2512734619
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4026459866
/workspace/coverage/default/46.sram_ctrl_mem_walk.1656800656
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1490935624
/workspace/coverage/default/46.sram_ctrl_partial_access.3565214795
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.910334177
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3139261966
/workspace/coverage/default/46.sram_ctrl_regwen.3109106146
/workspace/coverage/default/46.sram_ctrl_smoke.2586832905
/workspace/coverage/default/46.sram_ctrl_stress_all.2715588878
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1084766987
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.751360258
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1313645466
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1787237923
/workspace/coverage/default/47.sram_ctrl_alert_test.3012322301
/workspace/coverage/default/47.sram_ctrl_bijection.3521098351
/workspace/coverage/default/47.sram_ctrl_executable.3954529581
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2984513333
/workspace/coverage/default/47.sram_ctrl_max_throughput.3061043339
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.618531447
/workspace/coverage/default/47.sram_ctrl_mem_walk.1195977794
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1511735099
/workspace/coverage/default/47.sram_ctrl_partial_access.1652290325
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.629659773
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1403083980
/workspace/coverage/default/47.sram_ctrl_smoke.3815280657
/workspace/coverage/default/47.sram_ctrl_stress_all.2928922609
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1048671463
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3964974314
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.479211439
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4008749863
/workspace/coverage/default/48.sram_ctrl_alert_test.587818102
/workspace/coverage/default/48.sram_ctrl_bijection.1398827609
/workspace/coverage/default/48.sram_ctrl_executable.2717072727
/workspace/coverage/default/48.sram_ctrl_lc_escalation.768159283
/workspace/coverage/default/48.sram_ctrl_max_throughput.1380347751
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3747963728
/workspace/coverage/default/48.sram_ctrl_mem_walk.1481307500
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2570184992
/workspace/coverage/default/48.sram_ctrl_partial_access.1288512138
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1565024595
/workspace/coverage/default/48.sram_ctrl_ram_cfg.683502407
/workspace/coverage/default/48.sram_ctrl_regwen.640816451
/workspace/coverage/default/48.sram_ctrl_smoke.3089213581
/workspace/coverage/default/48.sram_ctrl_stress_all.25915772
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1833339819
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1491486035
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.4157340359
/workspace/coverage/default/49.sram_ctrl_alert_test.2896214256
/workspace/coverage/default/49.sram_ctrl_bijection.1446093813
/workspace/coverage/default/49.sram_ctrl_executable.886354103
/workspace/coverage/default/49.sram_ctrl_max_throughput.1211783830
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4085873610
/workspace/coverage/default/49.sram_ctrl_mem_walk.3390143528
/workspace/coverage/default/49.sram_ctrl_multiple_keys.9159394
/workspace/coverage/default/49.sram_ctrl_partial_access.1310728605
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1816360112
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2987568890
/workspace/coverage/default/49.sram_ctrl_regwen.1738777430
/workspace/coverage/default/49.sram_ctrl_smoke.723144126
/workspace/coverage/default/49.sram_ctrl_stress_all.2954145736
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1851292722
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.278712801
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2444070058
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1705319748
/workspace/coverage/default/5.sram_ctrl_alert_test.1277215695
/workspace/coverage/default/5.sram_ctrl_bijection.2662105305
/workspace/coverage/default/5.sram_ctrl_executable.4044549077
/workspace/coverage/default/5.sram_ctrl_lc_escalation.755424836
/workspace/coverage/default/5.sram_ctrl_max_throughput.680706862
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3881841258
/workspace/coverage/default/5.sram_ctrl_mem_walk.3060828291
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2874686750
/workspace/coverage/default/5.sram_ctrl_partial_access.1127613940
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3610650891
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3025274902
/workspace/coverage/default/5.sram_ctrl_regwen.2569855419
/workspace/coverage/default/5.sram_ctrl_smoke.1280403257
/workspace/coverage/default/5.sram_ctrl_stress_all.3702282411
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.531912359
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2597105740
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2839993286
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.25804758
/workspace/coverage/default/6.sram_ctrl_alert_test.3615073877
/workspace/coverage/default/6.sram_ctrl_bijection.2613387830
/workspace/coverage/default/6.sram_ctrl_executable.3372200980
/workspace/coverage/default/6.sram_ctrl_lc_escalation.792910681
/workspace/coverage/default/6.sram_ctrl_max_throughput.2733415970
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.785464524
/workspace/coverage/default/6.sram_ctrl_mem_walk.925200004
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1020937900
/workspace/coverage/default/6.sram_ctrl_partial_access.1858008500
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.342699772
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2140644053
/workspace/coverage/default/6.sram_ctrl_regwen.2937260809
/workspace/coverage/default/6.sram_ctrl_smoke.2166886299
/workspace/coverage/default/6.sram_ctrl_stress_all.1420341612
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3959057587
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.437763603
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.483046165
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1463935235
/workspace/coverage/default/7.sram_ctrl_alert_test.2891646924
/workspace/coverage/default/7.sram_ctrl_bijection.2156566371
/workspace/coverage/default/7.sram_ctrl_executable.3635380333
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2702377592
/workspace/coverage/default/7.sram_ctrl_max_throughput.508622285
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1293181618
/workspace/coverage/default/7.sram_ctrl_mem_walk.2368348635
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1798208993
/workspace/coverage/default/7.sram_ctrl_partial_access.341134541
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1251904877
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1285743603
/workspace/coverage/default/7.sram_ctrl_regwen.2582710800
/workspace/coverage/default/7.sram_ctrl_smoke.2120286420
/workspace/coverage/default/7.sram_ctrl_stress_all.750499902
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3698022761
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3111256060
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1130508900
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1661591295
/workspace/coverage/default/8.sram_ctrl_alert_test.1233311949
/workspace/coverage/default/8.sram_ctrl_bijection.1548423106
/workspace/coverage/default/8.sram_ctrl_executable.972371494
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2031563211
/workspace/coverage/default/8.sram_ctrl_max_throughput.1626007851
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3003432140
/workspace/coverage/default/8.sram_ctrl_mem_walk.4089574988
/workspace/coverage/default/8.sram_ctrl_multiple_keys.352213757
/workspace/coverage/default/8.sram_ctrl_partial_access.3485364387
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.320696217
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2238768503
/workspace/coverage/default/8.sram_ctrl_regwen.463342512
/workspace/coverage/default/8.sram_ctrl_smoke.107796686
/workspace/coverage/default/8.sram_ctrl_stress_all.1172687249
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1551807207
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2876963305
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1414598579
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1559456852
/workspace/coverage/default/9.sram_ctrl_alert_test.927489263
/workspace/coverage/default/9.sram_ctrl_bijection.3132234078
/workspace/coverage/default/9.sram_ctrl_executable.3918134834
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2425824809
/workspace/coverage/default/9.sram_ctrl_max_throughput.1724044708
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.295913375
/workspace/coverage/default/9.sram_ctrl_mem_walk.404251215
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1487469522
/workspace/coverage/default/9.sram_ctrl_partial_access.2521214789
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4086139746
/workspace/coverage/default/9.sram_ctrl_ram_cfg.4244406765
/workspace/coverage/default/9.sram_ctrl_regwen.3293914488
/workspace/coverage/default/9.sram_ctrl_smoke.1529524095
/workspace/coverage/default/9.sram_ctrl_stress_all.3658782065
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1422076954
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1739636536
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1913343416

Total test records in report: 1035

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/29.sram_ctrl_alert_test.1767755961	Jul 20 06:14:38 PM PDT 24	Jul 20 06:14:39 PM PDT 24	21446836 ps
T2	/workspace/coverage/default/24.sram_ctrl_regwen.768829281	Jul 20 06:13:55 PM PDT 24	Jul 20 06:26:06 PM PDT 24	40696042671 ps
T3	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.3348691779	Jul 20 06:12:36 PM PDT 24	Jul 20 06:15:31 PM PDT 24	2936734290 ps
T4	/workspace/coverage/default/27.sram_ctrl_access_during_key_req.1377666152	Jul 20 06:14:19 PM PDT 24	Jul 20 06:17:34 PM PDT 24	3818317631 ps
T5	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3778487318	Jul 20 06:16:26 PM PDT 24	Jul 20 06:20:35 PM PDT 24	25675542056 ps
T6	/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3156663737	Jul 20 06:13:43 PM PDT 24	Jul 20 06:17:17 PM PDT 24	30806112540 ps
T10	/workspace/coverage/default/1.sram_ctrl_multiple_keys.4234680310	Jul 20 06:12:23 PM PDT 24	Jul 20 06:23:09 PM PDT 24	4156664028 ps
T11	/workspace/coverage/default/47.sram_ctrl_regwen.3939504301	Jul 20 06:17:17 PM PDT 24	Jul 20 06:29:51 PM PDT 24	19530725111 ps
T7	/workspace/coverage/default/49.sram_ctrl_lc_escalation.3151069273	Jul 20 06:17:42 PM PDT 24	Jul 20 06:18:32 PM PDT 24	36824410782 ps
T12	/workspace/coverage/default/18.sram_ctrl_multiple_keys.3840183175	Jul 20 06:13:05 PM PDT 24	Jul 20 06:25:26 PM PDT 24	9472046805 ps
T44	/workspace/coverage/default/3.sram_ctrl_partial_access.157357379	Jul 20 06:12:36 PM PDT 24	Jul 20 06:12:51 PM PDT 24	4131767809 ps
T29	/workspace/coverage/default/24.sram_ctrl_executable.4035431262	Jul 20 06:13:53 PM PDT 24	Jul 20 06:27:48 PM PDT 24	79776894542 ps
T45	/workspace/coverage/default/28.sram_ctrl_partial_access.936320711	Jul 20 06:14:19 PM PDT 24	Jul 20 06:14:44 PM PDT 24	649588044 ps
T27	/workspace/coverage/default/19.sram_ctrl_mem_walk.3240650848	Jul 20 06:13:29 PM PDT 24	Jul 20 06:18:55 PM PDT 24	13829434900 ps
T18	/workspace/coverage/default/27.sram_ctrl_bijection.2820308353	Jul 20 06:14:11 PM PDT 24	Jul 20 06:43:52 PM PDT 24	156927481960 ps
T59	/workspace/coverage/default/1.sram_ctrl_executable.1946900326	Jul 20 06:12:35 PM PDT 24	Jul 20 06:25:30 PM PDT 24	13703430023 ps
T60	/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.597373536	Jul 20 06:12:52 PM PDT 24	Jul 20 06:13:02 PM PDT 24	1396217255 ps
T61	/workspace/coverage/default/48.sram_ctrl_partial_access.1288512138	Jul 20 06:17:23 PM PDT 24	Jul 20 06:17:42 PM PDT 24	2393846365 ps
T25	/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2004627845	Jul 20 06:17:24 PM PDT 24	Jul 20 06:18:18 PM PDT 24	1874573646 ps
T46	/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2895449892	Jul 20 06:15:40 PM PDT 24	Jul 20 06:17:15 PM PDT 24	2939245941 ps
T26	/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2999649040	Jul 20 06:15:19 PM PDT 24	Jul 20 06:15:30 PM PDT 24	3975834930 ps
T28	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1388954153	Jul 20 06:16:55 PM PDT 24	Jul 20 06:17:05 PM PDT 24	662087770 ps
T54	/workspace/coverage/default/29.sram_ctrl_mem_walk.1042975387	Jul 20 06:14:36 PM PDT 24	Jul 20 06:17:19 PM PDT 24	7357194344 ps
T68	/workspace/coverage/default/10.sram_ctrl_executable.2570451499	Jul 20 06:12:53 PM PDT 24	Jul 20 06:32:33 PM PDT 24	33116076209 ps
T69	/workspace/coverage/default/3.sram_ctrl_max_throughput.1627598050	Jul 20 06:12:36 PM PDT 24	Jul 20 06:15:06 PM PDT 24	2834037469 ps
T8	/workspace/coverage/default/3.sram_ctrl_lc_escalation.1620987185	Jul 20 06:12:36 PM PDT 24	Jul 20 06:13:30 PM PDT 24	49163300381 ps
T70	/workspace/coverage/default/14.sram_ctrl_regwen.3514382835	Jul 20 06:13:01 PM PDT 24	Jul 20 06:38:58 PM PDT 24	3774845221 ps
T30	/workspace/coverage/default/3.sram_ctrl_ram_cfg.2505496840	Jul 20 06:12:33 PM PDT 24	Jul 20 06:12:37 PM PDT 24	363105655 ps
T144	/workspace/coverage/default/23.sram_ctrl_max_throughput.368872530	Jul 20 06:13:44 PM PDT 24	Jul 20 06:14:40 PM PDT 24	2898992553 ps
T145	/workspace/coverage/default/6.sram_ctrl_max_throughput.2733415970	Jul 20 06:12:44 PM PDT 24	Jul 20 06:13:31 PM PDT 24	735691941 ps
T9	/workspace/coverage/default/30.sram_ctrl_lc_escalation.2378849169	Jul 20 06:14:45 PM PDT 24	Jul 20 06:15:35 PM PDT 24	9036527149 ps
T146	/workspace/coverage/default/21.sram_ctrl_bijection.1815224340	Jul 20 06:13:29 PM PDT 24	Jul 20 06:46:01 PM PDT 24	398809171388 ps
T147	/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3878100629	Jul 20 06:15:00 PM PDT 24	Jul 20 06:15:07 PM PDT 24	696844681 ps
T93	/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2742388805	Jul 20 06:16:29 PM PDT 24	Jul 20 06:17:35 PM PDT 24	975850728 ps
T148	/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.905080067	Jul 20 06:12:33 PM PDT 24	Jul 20 06:12:54 PM PDT 24	926259306 ps
T149	/workspace/coverage/default/45.sram_ctrl_bijection.910446045	Jul 20 06:17:00 PM PDT 24	Jul 20 06:40:19 PM PDT 24	59965524569 ps
T47	/workspace/coverage/default/24.sram_ctrl_access_during_key_req.2068661800	Jul 20 06:13:54 PM PDT 24	Jul 20 06:35:34 PM PDT 24	45730248938 ps
T150	/workspace/coverage/default/14.sram_ctrl_smoke.1086633610	Jul 20 06:13:05 PM PDT 24	Jul 20 06:13:35 PM PDT 24	1228468175 ps
T143	/workspace/coverage/default/13.sram_ctrl_executable.1785087701	Jul 20 06:13:00 PM PDT 24	Jul 20 06:21:18 PM PDT 24	16719983397 ps
T116	/workspace/coverage/default/6.sram_ctrl_stress_pipeline.437763603	Jul 20 06:12:43 PM PDT 24	Jul 20 06:17:52 PM PDT 24	19005851077 ps
T55	/workspace/coverage/default/35.sram_ctrl_mem_walk.2726472490	Jul 20 06:15:26 PM PDT 24	Jul 20 06:18:00 PM PDT 24	5976680247 ps
T151	/workspace/coverage/default/26.sram_ctrl_max_throughput.3574404292	Jul 20 06:14:09 PM PDT 24	Jul 20 06:14:30 PM PDT 24	816008451 ps
T56	/workspace/coverage/default/33.sram_ctrl_mem_walk.1658074075	Jul 20 06:15:09 PM PDT 24	Jul 20 06:20:21 PM PDT 24	13872536400 ps
T13	/workspace/coverage/default/28.sram_ctrl_alert_test.927052817	Jul 20 06:14:28 PM PDT 24	Jul 20 06:14:29 PM PDT 24	24211453 ps
T117	/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4007538029	Jul 20 06:16:27 PM PDT 24	Jul 20 06:26:03 PM PDT 24	101439235334 ps
T139	/workspace/coverage/default/19.sram_ctrl_executable.4217863689	Jul 20 06:13:23 PM PDT 24	Jul 20 06:21:22 PM PDT 24	24501561991 ps
T152	/workspace/coverage/default/7.sram_ctrl_smoke.2120286420	Jul 20 06:12:43 PM PDT 24	Jul 20 06:13:25 PM PDT 24	1476784844 ps
T118	/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1213924069	Jul 20 06:16:53 PM PDT 24	Jul 20 06:21:34 PM PDT 24	7899543388 ps
T153	/workspace/coverage/default/10.sram_ctrl_bijection.4051851135	Jul 20 06:12:51 PM PDT 24	Jul 20 06:29:41 PM PDT 24	260441762522 ps
T154	/workspace/coverage/default/15.sram_ctrl_multiple_keys.3885761463	Jul 20 06:13:00 PM PDT 24	Jul 20 06:24:16 PM PDT 24	61109295913 ps
T57	/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1851292722	Jul 20 06:17:43 PM PDT 24	Jul 20 06:18:51 PM PDT 24	5171443090 ps
T53	/workspace/coverage/default/16.sram_ctrl_mem_walk.4188529818	Jul 20 06:13:08 PM PDT 24	Jul 20 06:16:12 PM PDT 24	34582047509 ps
T119	/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2010529692	Jul 20 06:13:08 PM PDT 24	Jul 20 06:22:15 PM PDT 24	60030699423 ps
T22	/workspace/coverage/default/31.sram_ctrl_lc_escalation.493098614	Jul 20 06:14:54 PM PDT 24	Jul 20 06:16:27 PM PDT 24	15076391007 ps
T155	/workspace/coverage/default/12.sram_ctrl_executable.1789499262	Jul 20 06:13:00 PM PDT 24	Jul 20 06:19:48 PM PDT 24	15867832410 ps
T156	/workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2778425234	Jul 20 06:15:30 PM PDT 24	Jul 20 06:16:33 PM PDT 24	5323823798 ps
T48	/workspace/coverage/default/21.sram_ctrl_access_during_key_req.399203219	Jul 20 06:13:38 PM PDT 24	Jul 20 06:16:10 PM PDT 24	7380749425 ps
T157	/workspace/coverage/default/24.sram_ctrl_bijection.2797375469	Jul 20 06:13:56 PM PDT 24	Jul 20 06:35:26 PM PDT 24	316838640892 ps
T158	/workspace/coverage/default/40.sram_ctrl_max_throughput.587017386	Jul 20 06:16:12 PM PDT 24	Jul 20 06:18:15 PM PDT 24	770669078 ps
T120	/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4086139746	Jul 20 06:12:50 PM PDT 24	Jul 20 06:23:03 PM PDT 24	115372723161 ps
T14	/workspace/coverage/default/15.sram_ctrl_alert_test.208239353	Jul 20 06:12:57 PM PDT 24	Jul 20 06:12:59 PM PDT 24	94154967 ps
T159	/workspace/coverage/default/40.sram_ctrl_smoke.3477871655	Jul 20 06:16:01 PM PDT 24	Jul 20 06:16:13 PM PDT 24	856640130 ps
T160	/workspace/coverage/default/3.sram_ctrl_bijection.1323314428	Jul 20 06:12:36 PM PDT 24	Jul 20 06:50:05 PM PDT 24	32837810497 ps
T121	/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.4276828602	Jul 20 06:14:33 PM PDT 24	Jul 20 06:21:22 PM PDT 24	27964991225 ps
T161	/workspace/coverage/default/34.sram_ctrl_stress_pipeline.455676585	Jul 20 06:15:12 PM PDT 24	Jul 20 06:20:32 PM PDT 24	8359924375 ps
T162	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1454473408	Jul 20 06:16:09 PM PDT 24	Jul 20 06:17:16 PM PDT 24	1577479852 ps
T163	/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.483046165	Jul 20 06:12:49 PM PDT 24	Jul 20 06:15:21 PM PDT 24	833773592 ps
T164	/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3908483298	Jul 20 06:14:14 PM PDT 24	Jul 20 06:19:01 PM PDT 24	10961037235 ps
T140	/workspace/coverage/default/32.sram_ctrl_executable.2375851841	Jul 20 06:14:59 PM PDT 24	Jul 20 06:23:49 PM PDT 24	25573493779 ps
T165	/workspace/coverage/default/5.sram_ctrl_bijection.2662105305	Jul 20 06:12:47 PM PDT 24	Jul 20 06:26:49 PM PDT 24	50550306554 ps
T166	/workspace/coverage/default/42.sram_ctrl_alert_test.181894987	Jul 20 06:16:27 PM PDT 24	Jul 20 06:16:29 PM PDT 24	21568319 ps
T23	/workspace/coverage/default/34.sram_ctrl_stress_all.1461183094	Jul 20 06:15:20 PM PDT 24	Jul 20 07:41:41 PM PDT 24	906851547886 ps
T94	/workspace/coverage/default/43.sram_ctrl_access_during_key_req.2881976987	Jul 20 06:16:34 PM PDT 24	Jul 20 06:28:43 PM PDT 24	11840623794 ps
T142	/workspace/coverage/default/8.sram_ctrl_stress_all.1172687249	Jul 20 06:12:48 PM PDT 24	Jul 20 07:09:02 PM PDT 24	42664665254 ps
T167	/workspace/coverage/default/12.sram_ctrl_max_throughput.4026197471	Jul 20 06:12:54 PM PDT 24	Jul 20 06:13:37 PM PDT 24	736870663 ps
T24	/workspace/coverage/default/42.sram_ctrl_lc_escalation.4185081049	Jul 20 06:16:27 PM PDT 24	Jul 20 06:17:29 PM PDT 24	11167098825 ps
T168	/workspace/coverage/default/39.sram_ctrl_bijection.1986575518	Jul 20 06:15:57 PM PDT 24	Jul 20 06:30:29 PM PDT 24	64979866995 ps
T169	/workspace/coverage/default/4.sram_ctrl_max_throughput.3210232454	Jul 20 06:12:44 PM PDT 24	Jul 20 06:14:40 PM PDT 24	3226792728 ps
T79	/workspace/coverage/default/18.sram_ctrl_stress_all.1188271330	Jul 20 06:13:11 PM PDT 24	Jul 20 08:08:20 PM PDT 24	108364476769 ps
T170	/workspace/coverage/default/31.sram_ctrl_partial_access.2125156930	Jul 20 06:14:46 PM PDT 24	Jul 20 06:17:17 PM PDT 24	2590567177 ps
T74	/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1557392995	Jul 20 06:16:23 PM PDT 24	Jul 20 06:16:34 PM PDT 24	321162381 ps
T171	/workspace/coverage/default/43.sram_ctrl_alert_test.946139155	Jul 20 06:16:39 PM PDT 24	Jul 20 06:16:40 PM PDT 24	25640232 ps
T58	/workspace/coverage/default/44.sram_ctrl_mem_walk.3305898671	Jul 20 06:17:01 PM PDT 24	Jul 20 06:22:36 PM PDT 24	14257651517 ps
T95	/workspace/coverage/default/29.sram_ctrl_mem_partial_access.3435578891	Jul 20 06:14:36 PM PDT 24	Jul 20 06:15:53 PM PDT 24	18191375865 ps
T138	/workspace/coverage/default/22.sram_ctrl_regwen.3349397513	Jul 20 06:13:38 PM PDT 24	Jul 20 06:19:27 PM PDT 24	2684408696 ps
T172	/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1064917933	Jul 20 06:13:24 PM PDT 24	Jul 20 06:19:15 PM PDT 24	151358732682 ps
T173	/workspace/coverage/default/37.sram_ctrl_stress_pipeline.4134016587	Jul 20 06:15:42 PM PDT 24	Jul 20 06:17:48 PM PDT 24	3782302182 ps
T174	/workspace/coverage/default/5.sram_ctrl_lc_escalation.755424836	Jul 20 06:12:50 PM PDT 24	Jul 20 06:13:14 PM PDT 24	3933179104 ps
T175	/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3354770329	Jul 20 06:13:54 PM PDT 24	Jul 20 06:18:33 PM PDT 24	20650499820 ps
T176	/workspace/coverage/default/44.sram_ctrl_lc_escalation.2965674899	Jul 20 06:16:43 PM PDT 24	Jul 20 06:17:07 PM PDT 24	3427882727 ps
T177	/workspace/coverage/default/40.sram_ctrl_stress_pipeline.1753723778	Jul 20 06:16:01 PM PDT 24	Jul 20 06:21:21 PM PDT 24	13077974123 ps
T178	/workspace/coverage/default/39.sram_ctrl_smoke.1393404173	Jul 20 06:15:56 PM PDT 24	Jul 20 06:17:00 PM PDT 24	759641208 ps
T179	/workspace/coverage/default/37.sram_ctrl_executable.44004142	Jul 20 06:15:39 PM PDT 24	Jul 20 06:34:30 PM PDT 24	10041556155 ps
T180	/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2627597437	Jul 20 06:12:55 PM PDT 24	Jul 20 06:15:56 PM PDT 24	3291017314 ps
T31	/workspace/coverage/default/33.sram_ctrl_ram_cfg.1680366179	Jul 20 06:15:09 PM PDT 24	Jul 20 06:15:14 PM PDT 24	2793732648 ps
T19	/workspace/coverage/default/44.sram_ctrl_regwen.547028328	Jul 20 06:16:43 PM PDT 24	Jul 20 06:27:26 PM PDT 24	3301962811 ps
T181	/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.948508577	Jul 20 06:13:02 PM PDT 24	Jul 20 06:13:24 PM PDT 24	3909933325 ps
T182	/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2400299250	Jul 20 06:15:10 PM PDT 24	Jul 20 06:15:17 PM PDT 24	1376406028 ps
T183	/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3969698519	Jul 20 06:15:34 PM PDT 24	Jul 20 06:20:32 PM PDT 24	12280907456 ps
T184	/workspace/coverage/default/26.sram_ctrl_multiple_keys.3473453978	Jul 20 06:14:14 PM PDT 24	Jul 20 06:49:04 PM PDT 24	69906609719 ps
T126	/workspace/coverage/default/2.sram_ctrl_lc_escalation.2464049505	Jul 20 06:12:35 PM PDT 24	Jul 20 06:13:29 PM PDT 24	15951203078 ps
T185	/workspace/coverage/default/12.sram_ctrl_smoke.3700853159	Jul 20 06:13:00 PM PDT 24	Jul 20 06:15:28 PM PDT 24	5291832238 ps
T186	/workspace/coverage/default/46.sram_ctrl_max_throughput.2512734619	Jul 20 06:17:03 PM PDT 24	Jul 20 06:18:51 PM PDT 24	4242659985 ps
T187	/workspace/coverage/default/38.sram_ctrl_executable.3272515728	Jul 20 06:15:51 PM PDT 24	Jul 20 06:29:14 PM PDT 24	11867973551 ps
T188	/workspace/coverage/default/45.sram_ctrl_lc_escalation.51809570	Jul 20 06:17:01 PM PDT 24	Jul 20 06:17:39 PM PDT 24	12354127420 ps
T189	/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3633629775	Jul 20 06:14:09 PM PDT 24	Jul 20 06:18:04 PM PDT 24	60259509182 ps
T96	/workspace/coverage/default/31.sram_ctrl_access_during_key_req.1418153320	Jul 20 06:14:52 PM PDT 24	Jul 20 06:19:55 PM PDT 24	3909355600 ps
T52	/workspace/coverage/default/23.sram_ctrl_mem_partial_access.1600812548	Jul 20 06:13:53 PM PDT 24	Jul 20 06:15:22 PM PDT 24	12759144012 ps
T97	/workspace/coverage/default/39.sram_ctrl_access_during_key_req.4004848791	Jul 20 06:16:00 PM PDT 24	Jul 20 06:27:32 PM PDT 24	43572682062 ps
T109	/workspace/coverage/default/48.sram_ctrl_access_during_key_req.4008749863	Jul 20 06:17:23 PM PDT 24	Jul 20 06:35:04 PM PDT 24	145719782208 ps
T141	/workspace/coverage/default/0.sram_ctrl_executable.1022726727	Jul 20 06:12:24 PM PDT 24	Jul 20 06:28:03 PM PDT 24	14345184328 ps
T190	/workspace/coverage/default/1.sram_ctrl_lc_escalation.1005253604	Jul 20 06:12:34 PM PDT 24	Jul 20 06:12:57 PM PDT 24	14432694281 ps
T191	/workspace/coverage/default/21.sram_ctrl_executable.1193480492	Jul 20 06:13:44 PM PDT 24	Jul 20 06:44:37 PM PDT 24	82001505528 ps
T192	/workspace/coverage/default/31.sram_ctrl_bijection.2196371004	Jul 20 06:14:45 PM PDT 24	Jul 20 06:50:10 PM PDT 24	29474504213 ps
T193	/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.211199207	Jul 20 06:15:11 PM PDT 24	Jul 20 06:15:21 PM PDT 24	2719193930 ps
T194	/workspace/coverage/default/30.sram_ctrl_mem_walk.1198294178	Jul 20 06:14:43 PM PDT 24	Jul 20 06:19:54 PM PDT 24	27629817800 ps
T195	/workspace/coverage/default/33.sram_ctrl_bijection.39817857	Jul 20 06:15:01 PM PDT 24	Jul 20 06:31:03 PM PDT 24	85034534410 ps
T196	/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1739636536	Jul 20 06:12:46 PM PDT 24	Jul 20 06:17:03 PM PDT 24	26096201154 ps
T197	/workspace/coverage/default/17.sram_ctrl_smoke.1386565699	Jul 20 06:13:06 PM PDT 24	Jul 20 06:13:22 PM PDT 24	1055328493 ps
T198	/workspace/coverage/default/7.sram_ctrl_lc_escalation.2702377592	Jul 20 06:12:47 PM PDT 24	Jul 20 06:14:05 PM PDT 24	12765877435 ps
T199	/workspace/coverage/default/37.sram_ctrl_smoke.3672590491	Jul 20 06:15:43 PM PDT 24	Jul 20 06:17:21 PM PDT 24	3237921227 ps
T200	/workspace/coverage/default/40.sram_ctrl_regwen.281231970	Jul 20 06:16:07 PM PDT 24	Jul 20 06:19:08 PM PDT 24	2679865328 ps
T201	/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3203920638	Jul 20 06:13:00 PM PDT 24	Jul 20 06:15:11 PM PDT 24	4050397886 ps
T202	/workspace/coverage/default/3.sram_ctrl_stress_all.708394628	Jul 20 06:12:30 PM PDT 24	Jul 20 07:38:55 PM PDT 24	523913783193 ps
T203	/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1076422581	Jul 20 06:15:50 PM PDT 24	Jul 20 06:18:50 PM PDT 24	11552097226 ps
T204	/workspace/coverage/default/18.sram_ctrl_executable.236320970	Jul 20 06:13:21 PM PDT 24	Jul 20 06:43:12 PM PDT 24	25327934023 ps
T205	/workspace/coverage/default/17.sram_ctrl_partial_access.39847292	Jul 20 06:13:05 PM PDT 24	Jul 20 06:15:46 PM PDT 24	937676346 ps
T206	/workspace/coverage/default/16.sram_ctrl_partial_access.3779116482	Jul 20 06:12:59 PM PDT 24	Jul 20 06:13:05 PM PDT 24	364998631 ps
T207	/workspace/coverage/default/21.sram_ctrl_mem_walk.1859103117	Jul 20 06:13:37 PM PDT 24	Jul 20 06:18:53 PM PDT 24	14584669544 ps
T208	/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1553385971	Jul 20 06:13:07 PM PDT 24	Jul 20 06:15:03 PM PDT 24	1562694115 ps
T209	/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1913343416	Jul 20 06:12:50 PM PDT 24	Jul 20 06:12:59 PM PDT 24	3197001984 ps
T110	/workspace/coverage/default/28.sram_ctrl_access_during_key_req.946561229	Jul 20 06:14:28 PM PDT 24	Jul 20 06:28:45 PM PDT 24	27047593906 ps
T210	/workspace/coverage/default/48.sram_ctrl_max_throughput.1380347751	Jul 20 06:17:20 PM PDT 24	Jul 20 06:19:16 PM PDT 24	799489828 ps
T32	/workspace/coverage/default/28.sram_ctrl_ram_cfg.1618415882	Jul 20 06:14:26 PM PDT 24	Jul 20 06:14:29 PM PDT 24	366046320 ps
T78	/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3107754093	Jul 20 06:13:29 PM PDT 24	Jul 20 06:14:01 PM PDT 24	8206821182 ps
T211	/workspace/coverage/default/34.sram_ctrl_partial_access.2307430077	Jul 20 06:15:12 PM PDT 24	Jul 20 06:15:34 PM PDT 24	895021689 ps
T62	/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2271373434	Jul 20 06:15:47 PM PDT 24	Jul 20 06:17:03 PM PDT 24	1149736929 ps
T212	/workspace/coverage/default/2.sram_ctrl_mem_walk.3655380088	Jul 20 06:12:34 PM PDT 24	Jul 20 06:18:04 PM PDT 24	21640676574 ps
T213	/workspace/coverage/default/3.sram_ctrl_smoke.1848790867	Jul 20 06:12:34 PM PDT 24	Jul 20 06:15:08 PM PDT 24	1880924451 ps
T214	/workspace/coverage/default/49.sram_ctrl_partial_access.1310728605	Jul 20 06:17:42 PM PDT 24	Jul 20 06:17:59 PM PDT 24	5967737718 ps
T215	/workspace/coverage/default/16.sram_ctrl_bijection.1263569171	Jul 20 06:12:59 PM PDT 24	Jul 20 07:03:40 PM PDT 24	689375859579 ps
T216	/workspace/coverage/default/11.sram_ctrl_smoke.3295614037	Jul 20 06:12:56 PM PDT 24	Jul 20 06:13:16 PM PDT 24	1574590155 ps
T217	/workspace/coverage/default/43.sram_ctrl_max_throughput.1746055656	Jul 20 06:16:24 PM PDT 24	Jul 20 06:17:48 PM PDT 24	819312022 ps
T218	/workspace/coverage/default/35.sram_ctrl_partial_access.922279142	Jul 20 06:15:16 PM PDT 24	Jul 20 06:15:23 PM PDT 24	437312549 ps
T63	/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3910613701	Jul 20 06:13:07 PM PDT 24	Jul 20 06:14:03 PM PDT 24	6173812076 ps
T111	/workspace/coverage/default/40.sram_ctrl_access_during_key_req.220202741	Jul 20 06:16:11 PM PDT 24	Jul 20 06:23:53 PM PDT 24	28734271186 ps
T219	/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2187662112	Jul 20 06:16:52 PM PDT 24	Jul 20 06:18:12 PM PDT 24	33643963623 ps
T220	/workspace/coverage/default/20.sram_ctrl_ram_cfg.3869855218	Jul 20 06:13:29 PM PDT 24	Jul 20 06:13:34 PM PDT 24	1350885119 ps
T49	/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2475876490	Jul 20 06:12:44 PM PDT 24	Jul 20 06:16:33 PM PDT 24	2842145466 ps
T221	/workspace/coverage/default/33.sram_ctrl_executable.1076384629	Jul 20 06:15:09 PM PDT 24	Jul 20 06:24:55 PM PDT 24	35710118863 ps
T64	/workspace/coverage/default/22.sram_ctrl_mem_partial_access.4067255677	Jul 20 06:13:45 PM PDT 24	Jul 20 06:16:19 PM PDT 24	2439760445 ps
T222	/workspace/coverage/default/28.sram_ctrl_stress_pipeline.4276322080	Jul 20 06:14:17 PM PDT 24	Jul 20 06:19:18 PM PDT 24	7882209047 ps
T137	/workspace/coverage/default/23.sram_ctrl_regwen.2535904092	Jul 20 06:13:45 PM PDT 24	Jul 20 06:37:30 PM PDT 24	209269765091 ps
T223	/workspace/coverage/default/26.sram_ctrl_regwen.3820282484	Jul 20 06:14:13 PM PDT 24	Jul 20 06:31:20 PM PDT 24	60394123210 ps
T224	/workspace/coverage/default/22.sram_ctrl_access_during_key_req.3760634305	Jul 20 06:13:37 PM PDT 24	Jul 20 06:18:31 PM PDT 24	4387679957 ps
T225	/workspace/coverage/default/23.sram_ctrl_stress_all.3496663595	Jul 20 06:13:56 PM PDT 24	Jul 20 08:29:15 PM PDT 24	405784246142 ps
T226	/workspace/coverage/default/39.sram_ctrl_max_throughput.3809720535	Jul 20 06:15:59 PM PDT 24	Jul 20 06:16:39 PM PDT 24	759046416 ps
T227	/workspace/coverage/default/44.sram_ctrl_bijection.1606889180	Jul 20 06:16:35 PM PDT 24	Jul 20 06:44:24 PM PDT 24	43521057589 ps
T228	/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2272189949	Jul 20 06:15:51 PM PDT 24	Jul 20 06:20:12 PM PDT 24	20609434567 ps
T229	/workspace/coverage/default/1.sram_ctrl_smoke.1591377507	Jul 20 06:12:28 PM PDT 24	Jul 20 06:12:46 PM PDT 24	1053803771 ps
T20	/workspace/coverage/default/45.sram_ctrl_regwen.3694966331	Jul 20 06:16:54 PM PDT 24	Jul 20 06:36:28 PM PDT 24	19145343262 ps
T230	/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1491486035	Jul 20 06:17:23 PM PDT 24	Jul 20 06:19:35 PM PDT 24	4895955433 ps
T231	/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.2232329072	Jul 20 06:16:18 PM PDT 24	Jul 20 06:18:53 PM PDT 24	3574044017 ps
T232	/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3349295707	Jul 20 06:16:43 PM PDT 24	Jul 20 06:33:54 PM PDT 24	35561820386 ps
T233	/workspace/coverage/default/9.sram_ctrl_bijection.3132234078	Jul 20 06:12:50 PM PDT 24	Jul 20 06:41:29 PM PDT 24	138246007369 ps
T21	/workspace/coverage/default/25.sram_ctrl_regwen.3238054208	Jul 20 06:13:59 PM PDT 24	Jul 20 06:28:54 PM PDT 24	81647846710 ps
T234	/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4026459866	Jul 20 06:17:08 PM PDT 24	Jul 20 06:18:26 PM PDT 24	13176747846 ps
T235	/workspace/coverage/default/27.sram_ctrl_executable.4060093731	Jul 20 06:14:19 PM PDT 24	Jul 20 06:26:01 PM PDT 24	21256288348 ps
T236	/workspace/coverage/default/43.sram_ctrl_stress_all.2666929340	Jul 20 06:16:36 PM PDT 24	Jul 20 07:40:25 PM PDT 24	985830857795 ps
T237	/workspace/coverage/default/48.sram_ctrl_lc_escalation.768159283	Jul 20 06:17:28 PM PDT 24	Jul 20 06:18:14 PM PDT 24	24601086141 ps
T238	/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.3802089059	Jul 20 06:15:39 PM PDT 24	Jul 20 06:17:09 PM PDT 24	3163338997 ps
T239	/workspace/coverage/default/9.sram_ctrl_ram_cfg.4244406765	Jul 20 06:12:47 PM PDT 24	Jul 20 06:12:52 PM PDT 24	1170495706 ps
T240	/workspace/coverage/default/38.sram_ctrl_regwen.3711602680	Jul 20 06:15:53 PM PDT 24	Jul 20 06:35:37 PM PDT 24	144389726877 ps
T241	/workspace/coverage/default/13.sram_ctrl_bijection.1171300615	Jul 20 06:13:03 PM PDT 24	Jul 20 06:47:06 PM PDT 24	96199481602 ps
T242	/workspace/coverage/default/26.sram_ctrl_bijection.1312840453	Jul 20 06:14:07 PM PDT 24	Jul 20 06:24:03 PM PDT 24	32806826465 ps
T65	/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2251331566	Jul 20 06:17:06 PM PDT 24	Jul 20 06:18:24 PM PDT 24	1571158509 ps
T243	/workspace/coverage/default/48.sram_ctrl_regwen.640816451	Jul 20 06:17:24 PM PDT 24	Jul 20 06:19:30 PM PDT 24	2722662791 ps
T66	/workspace/coverage/default/35.sram_ctrl_mem_partial_access.813539905	Jul 20 06:15:26 PM PDT 24	Jul 20 06:18:20 PM PDT 24	29051618676 ps
T244	/workspace/coverage/default/41.sram_ctrl_smoke.396176274	Jul 20 06:16:09 PM PDT 24	Jul 20 06:17:17 PM PDT 24	816072645 ps
T245	/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2597105740	Jul 20 06:12:43 PM PDT 24	Jul 20 06:17:27 PM PDT 24	15586232111 ps
T67	/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.257264080	Jul 20 06:15:38 PM PDT 24	Jul 20 06:18:53 PM PDT 24	1361983691 ps
T246	/workspace/coverage/default/35.sram_ctrl_regwen.793005111	Jul 20 06:15:23 PM PDT 24	Jul 20 06:20:52 PM PDT 24	5109403590 ps
T247	/workspace/coverage/default/47.sram_ctrl_alert_test.3012322301	Jul 20 06:17:14 PM PDT 24	Jul 20 06:17:15 PM PDT 24	45310298 ps
T248	/workspace/coverage/default/29.sram_ctrl_stress_pipeline.2740955159	Jul 20 06:14:36 PM PDT 24	Jul 20 06:20:11 PM PDT 24	4697600887 ps
T249	/workspace/coverage/default/37.sram_ctrl_multiple_keys.17208983	Jul 20 06:15:43 PM PDT 24	Jul 20 06:23:33 PM PDT 24	11052156294 ps
T250	/workspace/coverage/default/4.sram_ctrl_executable.2708389581	Jul 20 06:12:36 PM PDT 24	Jul 20 06:27:27 PM PDT 24	22953311300 ps
T251	/workspace/coverage/default/13.sram_ctrl_access_during_key_req.671673453	Jul 20 06:12:58 PM PDT 24	Jul 20 06:24:36 PM PDT 24	12585047714 ps
T252	/workspace/coverage/default/4.sram_ctrl_stress_all.3839243046	Jul 20 06:12:43 PM PDT 24	Jul 20 07:39:18 PM PDT 24	1050587133867 ps
T50	/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3956372412	Jul 20 06:12:31 PM PDT 24	Jul 20 06:12:59 PM PDT 24	978471710 ps
T253	/workspace/coverage/default/38.sram_ctrl_smoke.183256213	Jul 20 06:15:50 PM PDT 24	Jul 20 06:15:57 PM PDT 24	2672818718 ps
T254	/workspace/coverage/default/47.sram_ctrl_stress_all.2928922609	Jul 20 06:17:13 PM PDT 24	Jul 20 07:23:51 PM PDT 24	116887540114 ps
T255	/workspace/coverage/default/3.sram_ctrl_mem_walk.3846049948	Jul 20 06:12:37 PM PDT 24	Jul 20 06:17:43 PM PDT 24	5256371181 ps
T256	/workspace/coverage/default/10.sram_ctrl_alert_test.1989750163	Jul 20 06:12:49 PM PDT 24	Jul 20 06:12:51 PM PDT 24	33500500 ps
T257	/workspace/coverage/default/5.sram_ctrl_mem_walk.3060828291	Jul 20 06:12:43 PM PDT 24	Jul 20 06:18:14 PM PDT 24	28263987787 ps
T258	/workspace/coverage/default/22.sram_ctrl_lc_escalation.3976337126	Jul 20 06:13:35 PM PDT 24	Jul 20 06:14:23 PM PDT 24	6368472165 ps
T259	/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.531912359	Jul 20 06:12:44 PM PDT 24	Jul 20 06:13:44 PM PDT 24	1751926401 ps
T260	/workspace/coverage/default/6.sram_ctrl_partial_access.1858008500	Jul 20 06:12:46 PM PDT 24	Jul 20 06:13:12 PM PDT 24	1416315752 ps
T261	/workspace/coverage/default/29.sram_ctrl_regwen.3174177608	Jul 20 06:14:34 PM PDT 24	Jul 20 06:25:30 PM PDT 24	70356613307 ps
T262	/workspace/coverage/default/46.sram_ctrl_mem_walk.1656800656	Jul 20 06:17:08 PM PDT 24	Jul 20 06:19:16 PM PDT 24	2061755440 ps
T263	/workspace/coverage/default/2.sram_ctrl_regwen.3654624362	Jul 20 06:12:34 PM PDT 24	Jul 20 06:27:41 PM PDT 24	85261172989 ps
T264	/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3678588540	Jul 20 06:16:28 PM PDT 24	Jul 20 06:18:30 PM PDT 24	804898597 ps
T51	/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1958732420	Jul 20 06:14:30 PM PDT 24	Jul 20 06:15:18 PM PDT 24	3437726876 ps
T265	/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.555150504	Jul 20 06:16:51 PM PDT 24	Jul 20 06:22:22 PM PDT 24	27041436498 ps
T266	/workspace/coverage/default/6.sram_ctrl_multiple_keys.1020937900	Jul 20 06:12:44 PM PDT 24	Jul 20 06:19:48 PM PDT 24	16850236928 ps
T267	/workspace/coverage/default/4.sram_ctrl_lc_escalation.449391680	Jul 20 06:12:34 PM PDT 24	Jul 20 06:14:17 PM PDT 24	141828902222 ps
T268	/workspace/coverage/default/47.sram_ctrl_ram_cfg.1403083980	Jul 20 06:17:15 PM PDT 24	Jul 20 06:17:19 PM PDT 24	348118933 ps
T269	/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.341166238	Jul 20 06:15:10 PM PDT 24	Jul 20 06:22:41 PM PDT 24	28335657678 ps
T270	/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3696297093	Jul 20 06:12:47 PM PDT 24	Jul 20 06:14:58 PM PDT 24	769327741 ps
T271	/workspace/coverage/default/8.sram_ctrl_regwen.463342512	Jul 20 06:12:48 PM PDT 24	Jul 20 06:30:31 PM PDT 24	112565759556 ps
T272	/workspace/coverage/default/45.sram_ctrl_partial_access.3219631103	Jul 20 06:16:52 PM PDT 24	Jul 20 06:17:00 PM PDT 24	4844689096 ps
T273	/workspace/coverage/default/1.sram_ctrl_max_throughput.1908517670	Jul 20 06:12:33 PM PDT 24	Jul 20 06:12:50 PM PDT 24	1387001221 ps
T274	/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.4218765499	Jul 20 06:13:44 PM PDT 24	Jul 20 06:14:47 PM PDT 24	9297090372 ps
T275	/workspace/coverage/default/42.sram_ctrl_executable.3014750323	Jul 20 06:16:28 PM PDT 24	Jul 20 06:27:18 PM PDT 24	8715124105 ps
T123	/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.4028681816	Jul 20 06:13:18 PM PDT 24	Jul 20 06:13:33 PM PDT 24	696495690 ps
T276	/workspace/coverage/default/29.sram_ctrl_access_during_key_req.2596119674	Jul 20 06:14:37 PM PDT 24	Jul 20 06:27:34 PM PDT 24	20887541386 ps
T277	/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3739438457	Jul 20 06:13:45 PM PDT 24	Jul 20 06:14:07 PM PDT 24	3385727628 ps
T278	/workspace/coverage/default/39.sram_ctrl_multiple_keys.2648321819	Jul 20 06:15:57 PM PDT 24	Jul 20 06:29:09 PM PDT 24	28943507315 ps
T279	/workspace/coverage/default/8.sram_ctrl_partial_access.3485364387	Jul 20 06:12:42 PM PDT 24	Jul 20 06:13:01 PM PDT 24	571761547 ps
T280	/workspace/coverage/default/37.sram_ctrl_mem_walk.2079664498	Jul 20 06:15:43 PM PDT 24	Jul 20 06:20:52 PM PDT 24	14378529469 ps
T281	/workspace/coverage/default/11.sram_ctrl_alert_test.290456088	Jul 20 06:12:53 PM PDT 24	Jul 20 06:12:55 PM PDT 24	29187473 ps
T282	/workspace/coverage/default/36.sram_ctrl_alert_test.755817444	Jul 20 06:15:42 PM PDT 24	Jul 20 06:15:44 PM PDT 24	62163503 ps
T283	/workspace/coverage/default/29.sram_ctrl_lc_escalation.3452523814	Jul 20 06:14:35 PM PDT 24	Jul 20 06:15:25 PM PDT 24	8705668769 ps
T284	/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2444070058	Jul 20 06:17:42 PM PDT 24	Jul 20 06:19:17 PM PDT 24	2205373076 ps
T285	/workspace/coverage/default/31.sram_ctrl_mem_partial_access.4276992159	Jul 20 06:14:49 PM PDT 24	Jul 20 06:16:08 PM PDT 24	5484870382 ps
T124	/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2409682166	Jul 20 06:12:54 PM PDT 24	Jul 20 06:13:21 PM PDT 24	1289559790 ps
T286	/workspace/coverage/default/21.sram_ctrl_multiple_keys.2043332025	Jul 20 06:13:29 PM PDT 24	Jul 20 06:17:09 PM PDT 24	6895305669 ps
T287	/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.420380949	Jul 20 06:14:44 PM PDT 24	Jul 20 06:23:54 PM PDT 24	48967951296 ps
T288	/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3964974314	Jul 20 06:17:08 PM PDT 24	Jul 20 06:21:44 PM PDT 24	3996089655 ps
T289	/workspace/coverage/default/45.sram_ctrl_executable.1308872680	Jul 20 06:17:02 PM PDT 24	Jul 20 06:38:34 PM PDT 24	75435664096 ps
T290	/workspace/coverage/default/30.sram_ctrl_smoke.59911253	Jul 20 06:14:34 PM PDT 24	Jul 20 06:14:41 PM PDT 24	2710512649 ps
T291	/workspace/coverage/default/24.sram_ctrl_partial_access.1646831201	Jul 20 06:13:54 PM PDT 24	Jul 20 06:14:16 PM PDT 24	2846070851 ps
T292	/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3425328832	Jul 20 06:17:01 PM PDT 24	Jul 20 06:18:47 PM PDT 24	2506976589 ps
T293	/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.4245519614	Jul 20 06:15:28 PM PDT 24	Jul 20 06:16:08 PM PDT 24	1069444176 ps
T294	/workspace/coverage/default/34.sram_ctrl_smoke.4278327807	Jul 20 06:15:13 PM PDT 24	Jul 20 06:15:20 PM PDT 24	425919579 ps
T295	/workspace/coverage/default/37.sram_ctrl_bijection.231538603	Jul 20 06:15:40 PM PDT 24	Jul 20 06:31:57 PM PDT 24	57706904012 ps
T296	/workspace/coverage/default/43.sram_ctrl_smoke.1976931512	Jul 20 06:16:28 PM PDT 24	Jul 20 06:18:32 PM PDT 24	1917265038 ps
T297	/workspace/coverage/default/33.sram_ctrl_access_during_key_req.581985122	Jul 20 06:15:12 PM PDT 24	Jul 20 06:24:40 PM PDT 24	7014094993 ps
T298	/workspace/coverage/default/0.sram_ctrl_lc_escalation.1718751470	Jul 20 06:12:27 PM PDT 24	Jul 20 06:13:27 PM PDT 24	9230064064 ps
T299	/workspace/coverage/default/43.sram_ctrl_lc_escalation.4199366980	Jul 20 06:16:26 PM PDT 24	Jul 20 06:17:40 PM PDT 24	12550785427 ps
T300	/workspace/coverage/default/49.sram_ctrl_stress_all.2954145736	Jul 20 06:17:40 PM PDT 24	Jul 20 07:29:15 PM PDT 24	214741210061 ps
T301	/workspace/coverage/default/38.sram_ctrl_stress_all.1112397788	Jul 20 06:15:52 PM PDT 24	Jul 20 06:16:56 PM PDT 24	11628662715 ps
T302	/workspace/coverage/default/2.sram_ctrl_executable.2780415908	Jul 20 06:12:36 PM PDT 24	Jul 20 06:29:42 PM PDT 24	41306350677 ps
T303	/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.2721643050	Jul 20 06:12:34 PM PDT 24	Jul 20 06:20:10 PM PDT 24	75530401088 ps
T304	/workspace/coverage/default/32.sram_ctrl_stress_pipeline.3582759073	Jul 20 06:14:54 PM PDT 24	Jul 20 06:17:22 PM PDT 24	6411419367 ps
T305	/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1705319748	Jul 20 06:12:43 PM PDT 24	Jul 20 06:17:54 PM PDT 24	46615529653 ps
T306	/workspace/coverage/default/34.sram_ctrl_lc_escalation.3114870819	Jul 20 06:15:18 PM PDT 24	Jul 20 06:16:15 PM PDT 24	14908577129 ps
T307	/workspace/coverage/default/45.sram_ctrl_stress_all.2704654326	Jul 20 06:17:02 PM PDT 24	Jul 20 07:53:56 PM PDT 24	332939240314 ps
T308	/workspace/coverage/default/48.sram_ctrl_mem_walk.1481307500	Jul 20 06:17:23 PM PDT 24	Jul 20 06:20:02 PM PDT 24	16474001074 ps
T309	/workspace/coverage/default/35.sram_ctrl_ram_cfg.87658718	Jul 20 06:15:26 PM PDT 24	Jul 20 06:15:30 PM PDT 24	2832921768 ps
T310	/workspace/coverage/default/25.sram_ctrl_mem_walk.2619032629	Jul 20 06:14:05 PM PDT 24	Jul 20 06:19:24 PM PDT 24	10500734429 ps