Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.97 99.19 94.27 99.72 100.00 96.03 99.12 97.44


Total tests in report: 1032
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
67.80 67.80 91.58 91.58 75.24 75.24 64.50 64.50 23.81 23.81 81.28 81.28 93.42 93.42 44.79 44.79 /workspace/coverage/default/44.sram_ctrl_regwen.3459630283
86.80 19.00 97.06 5.48 84.95 9.72 69.87 5.37 90.48 66.67 90.76 9.48 95.32 1.90 79.16 34.37 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.706642776
91.20 4.40 97.63 0.57 85.43 0.47 96.32 26.45 90.48 0.00 91.94 1.18 96.35 1.02 80.26 1.10 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1908589846
94.09 2.89 98.94 1.31 88.63 3.20 97.93 1.62 100.00 9.52 95.02 3.08 96.93 0.58 81.17 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.3928114587
95.01 0.93 99.10 0.16 89.69 1.07 98.21 0.28 100.00 0.00 95.97 0.95 96.93 0.00 85.19 4.02 /workspace/coverage/default/48.sram_ctrl_stress_all.1171216429
95.73 0.71 99.10 0.00 90.28 0.59 98.21 0.00 100.00 0.00 95.97 0.00 96.93 0.00 89.58 4.39 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2006136648
96.22 0.49 99.10 0.00 90.28 0.00 98.21 0.00 100.00 0.00 95.97 0.00 97.08 0.15 92.87 3.29 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.739858792
96.57 0.36 99.10 0.00 90.52 0.24 98.42 0.21 100.00 0.00 96.21 0.24 97.08 0.00 94.70 1.83 /workspace/coverage/default/11.sram_ctrl_regwen.3992596675
96.77 0.20 99.10 0.00 90.52 0.00 98.48 0.07 100.00 0.00 96.21 0.00 98.39 1.32 94.70 0.00 /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.864252802
96.96 0.18 99.10 0.00 90.52 0.00 98.48 0.00 100.00 0.00 96.21 0.00 98.39 0.00 95.98 1.28 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.339144631
97.09 0.14 99.18 0.08 90.52 0.00 99.38 0.90 100.00 0.00 96.21 0.00 98.39 0.00 95.98 0.00 /workspace/coverage/default/21.sram_ctrl_ram_cfg.4069088759
97.23 0.13 99.18 0.00 90.52 0.00 99.38 0.00 100.00 0.00 96.21 0.00 99.12 0.73 96.16 0.18 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.710904254
97.32 0.10 99.18 0.00 90.64 0.12 99.38 0.00 100.00 0.00 96.21 0.00 99.12 0.00 96.71 0.55 /workspace/coverage/default/22.sram_ctrl_stress_all.1511505983
97.39 0.07 99.18 0.00 91.00 0.36 99.52 0.14 100.00 0.00 96.21 0.00 99.12 0.00 96.71 0.00 /workspace/coverage/default/32.sram_ctrl_alert_test.2907299314
97.44 0.05 99.18 0.00 91.00 0.00 99.52 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.37 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.586061892
97.47 0.03 99.18 0.00 91.00 0.00 99.72 0.21 100.00 0.00 96.21 0.00 99.12 0.00 97.07 0.00 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2246704448
97.50 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3932952588
97.52 0.03 99.18 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.21 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2600746021

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2621710220
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.376696154
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2315458435
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3918432828
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.754003815
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.954848092
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2225192632
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.420470169
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2866814531
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.670391321
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1923343489
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4085062246
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1657906497
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1521921945
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3072384861
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.443083175
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1070609687
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.969384879
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2027193481
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3772875506
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1492915313
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1339643422
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1703943701
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2057421773
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.318876864
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4279963871
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2621123099
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1087625711
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.406519306
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3987527831
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.991715754
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1866346540
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1796585320
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1412499397
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2303779218
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3107851370
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3471778349
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1980749024
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3899287793
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2128806706
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1028710528
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2544890206
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1504577865
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2879016402
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3846580773
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2225008451
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2342618987
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3805035563
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.868848602
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3577587332
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2415976754
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1224272820
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2729679007
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3460178575
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1745011513
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3854193034
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3310046227
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1471990737
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2733914150
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.553993150
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.285181954
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2644734656
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3327449117
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4042925868
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1513945685
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.580311236
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.104935130
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2578481025
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3205997634
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3960615225
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.321746295
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3655597647
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3027449217
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.588675629
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2278953113
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1685863702
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4015552028
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2799880172
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3515199765
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3071090206
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2534023163
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2921561341
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3960937739
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1049775443
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2749486228
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.988925793
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.4281474128
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2130988049
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1934411871
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4205094634
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2416452903
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.427515163
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2147144296
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4006161542
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4057577215
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2499908520
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.980446893
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4272496355
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.483705188
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2564933415
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2755708318
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2402869000
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1126211110
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2181298824
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.4285598829
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3423592720
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3804395692
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2131987286
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.861574566
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1972044837
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4200853182
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2182622008
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2494469608
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.556863535
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1912160348
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1638955112
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3045928168
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3169721766
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1881235569
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2372815423
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.758582446
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1627254025
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3287310339
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2095985317
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2222626365
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.806080253
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1494113918
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2272652855
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3016576575
/workspace/coverage/default/0.sram_ctrl_alert_test.2283630163
/workspace/coverage/default/0.sram_ctrl_bijection.1549162057
/workspace/coverage/default/0.sram_ctrl_executable.3935570187
/workspace/coverage/default/0.sram_ctrl_lc_escalation.435847287
/workspace/coverage/default/0.sram_ctrl_max_throughput.1158730191
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2770235351
/workspace/coverage/default/0.sram_ctrl_mem_walk.2961386916
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1788519167
/workspace/coverage/default/0.sram_ctrl_partial_access.2746437170
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2352504119
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3423180977
/workspace/coverage/default/0.sram_ctrl_regwen.1879657682
/workspace/coverage/default/0.sram_ctrl_sec_cm.2817789897
/workspace/coverage/default/0.sram_ctrl_smoke.1310930037
/workspace/coverage/default/0.sram_ctrl_stress_all.2688244125
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3721404430
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.713605184
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2695166122
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2100999267
/workspace/coverage/default/1.sram_ctrl_alert_test.444985806
/workspace/coverage/default/1.sram_ctrl_bijection.3473081767
/workspace/coverage/default/1.sram_ctrl_executable.3978730187
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1492141277
/workspace/coverage/default/1.sram_ctrl_max_throughput.1017444888
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2696930467
/workspace/coverage/default/1.sram_ctrl_mem_walk.2043846024
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1990025049
/workspace/coverage/default/1.sram_ctrl_partial_access.1161169854
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1804331314
/workspace/coverage/default/1.sram_ctrl_ram_cfg.935910389
/workspace/coverage/default/1.sram_ctrl_regwen.2443933172
/workspace/coverage/default/1.sram_ctrl_sec_cm.3349169428
/workspace/coverage/default/1.sram_ctrl_smoke.1416838936
/workspace/coverage/default/1.sram_ctrl_stress_all.3857663528
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3457502965
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1255996904
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1088802020
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3230860718
/workspace/coverage/default/10.sram_ctrl_alert_test.3441746229
/workspace/coverage/default/10.sram_ctrl_bijection.2798734034
/workspace/coverage/default/10.sram_ctrl_executable.464150342
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3287181122
/workspace/coverage/default/10.sram_ctrl_max_throughput.1299051291
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2063509542
/workspace/coverage/default/10.sram_ctrl_mem_walk.234769800
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1335558197
/workspace/coverage/default/10.sram_ctrl_partial_access.2440932961
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1162516548
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3103730589
/workspace/coverage/default/10.sram_ctrl_regwen.1152058325
/workspace/coverage/default/10.sram_ctrl_smoke.1352416260
/workspace/coverage/default/10.sram_ctrl_stress_all.4215650885
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.712514779
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2638556466
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1030145833
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2192011062
/workspace/coverage/default/11.sram_ctrl_alert_test.660074526
/workspace/coverage/default/11.sram_ctrl_bijection.3267096390
/workspace/coverage/default/11.sram_ctrl_executable.1957613934
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3780279798
/workspace/coverage/default/11.sram_ctrl_max_throughput.4098636418
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1271389315
/workspace/coverage/default/11.sram_ctrl_mem_walk.3070530409
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2655266899
/workspace/coverage/default/11.sram_ctrl_partial_access.2121680162
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2396185119
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1045382318
/workspace/coverage/default/11.sram_ctrl_smoke.2253286938
/workspace/coverage/default/11.sram_ctrl_stress_all.799547196
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2065617960
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3286241628
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1047144817
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1329512643
/workspace/coverage/default/12.sram_ctrl_alert_test.2346847384
/workspace/coverage/default/12.sram_ctrl_bijection.3247146047
/workspace/coverage/default/12.sram_ctrl_executable.2796653820
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3613411390
/workspace/coverage/default/12.sram_ctrl_max_throughput.857505001
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2336985730
/workspace/coverage/default/12.sram_ctrl_mem_walk.1445814119
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/workspace/coverage/default/43.sram_ctrl_executable.3346083887
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1686635331
/workspace/coverage/default/43.sram_ctrl_max_throughput.2254508988
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.4058550528
/workspace/coverage/default/43.sram_ctrl_mem_walk.2042022097
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2024192230
/workspace/coverage/default/43.sram_ctrl_partial_access.2321026673
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.755354875
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2415480106
/workspace/coverage/default/43.sram_ctrl_regwen.363038258
/workspace/coverage/default/43.sram_ctrl_smoke.336796632
/workspace/coverage/default/43.sram_ctrl_stress_all.2581477925
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2585478885
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.280564810
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2563723402
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2686582873
/workspace/coverage/default/44.sram_ctrl_alert_test.2492231169
/workspace/coverage/default/44.sram_ctrl_bijection.2010981934
/workspace/coverage/default/44.sram_ctrl_executable.1399608050
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1511091868
/workspace/coverage/default/44.sram_ctrl_max_throughput.1670227172
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3959015113
/workspace/coverage/default/44.sram_ctrl_mem_walk.4285926690
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1449052954
/workspace/coverage/default/44.sram_ctrl_partial_access.4235087391
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3404960968
/workspace/coverage/default/44.sram_ctrl_ram_cfg.4166502071
/workspace/coverage/default/44.sram_ctrl_smoke.414118758
/workspace/coverage/default/44.sram_ctrl_stress_all.1881413153
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1290022056
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2215562794
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.552893508
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.611761789
/workspace/coverage/default/45.sram_ctrl_alert_test.935475616
/workspace/coverage/default/45.sram_ctrl_bijection.357716626
/workspace/coverage/default/45.sram_ctrl_executable.1383236020
/workspace/coverage/default/45.sram_ctrl_lc_escalation.135811058
/workspace/coverage/default/45.sram_ctrl_max_throughput.4175496104
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.248376229
/workspace/coverage/default/45.sram_ctrl_mem_walk.1094528950
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3516977207
/workspace/coverage/default/45.sram_ctrl_partial_access.4140612760
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2350652430
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1896030790
/workspace/coverage/default/45.sram_ctrl_regwen.1930897450
/workspace/coverage/default/45.sram_ctrl_smoke.3962903981
/workspace/coverage/default/45.sram_ctrl_stress_all.943015979
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2430626551
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2252114889
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2351748300
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1684195144
/workspace/coverage/default/46.sram_ctrl_alert_test.3849229885
/workspace/coverage/default/46.sram_ctrl_bijection.3203237482
/workspace/coverage/default/46.sram_ctrl_executable.1062557933
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1221847974
/workspace/coverage/default/46.sram_ctrl_max_throughput.957024189
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.114376654
/workspace/coverage/default/46.sram_ctrl_mem_walk.4131023511
/workspace/coverage/default/46.sram_ctrl_multiple_keys.500289836
/workspace/coverage/default/46.sram_ctrl_partial_access.3384194418
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.408808134
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1691477609
/workspace/coverage/default/46.sram_ctrl_regwen.2827479939
/workspace/coverage/default/46.sram_ctrl_smoke.37893565
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3554305695
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.35702804
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.212600750
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3900191879
/workspace/coverage/default/47.sram_ctrl_alert_test.2788768458
/workspace/coverage/default/47.sram_ctrl_bijection.511174828
/workspace/coverage/default/47.sram_ctrl_executable.2223642973
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1465551595
/workspace/coverage/default/47.sram_ctrl_max_throughput.29751944
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.242188757
/workspace/coverage/default/47.sram_ctrl_mem_walk.600971968
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1732327853
/workspace/coverage/default/47.sram_ctrl_partial_access.2369343715
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2934700542
/workspace/coverage/default/47.sram_ctrl_ram_cfg.56681133
/workspace/coverage/default/47.sram_ctrl_regwen.147743582
/workspace/coverage/default/47.sram_ctrl_smoke.455513589
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2460703230
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.338254507
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.969182614
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1602407692
/workspace/coverage/default/48.sram_ctrl_alert_test.951195946
/workspace/coverage/default/48.sram_ctrl_bijection.20951608
/workspace/coverage/default/48.sram_ctrl_executable.113233816
/workspace/coverage/default/48.sram_ctrl_lc_escalation.618922791
/workspace/coverage/default/48.sram_ctrl_max_throughput.37973538
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2827879592
/workspace/coverage/default/48.sram_ctrl_mem_walk.2399210730
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2153416166
/workspace/coverage/default/48.sram_ctrl_partial_access.1718358879
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.698061308
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1409360389
/workspace/coverage/default/48.sram_ctrl_regwen.958490552
/workspace/coverage/default/48.sram_ctrl_smoke.1450224643
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.777151272
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.4289931044
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1697406724
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1261093173
/workspace/coverage/default/49.sram_ctrl_alert_test.837122925
/workspace/coverage/default/49.sram_ctrl_bijection.1003909741
/workspace/coverage/default/49.sram_ctrl_executable.96199872
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2244483852
/workspace/coverage/default/49.sram_ctrl_max_throughput.934479177
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.807214023
/workspace/coverage/default/49.sram_ctrl_mem_walk.232369969
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3784141308
/workspace/coverage/default/49.sram_ctrl_partial_access.478688628
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2562349164
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1454097965
/workspace/coverage/default/49.sram_ctrl_regwen.2953526459
/workspace/coverage/default/49.sram_ctrl_smoke.3224985198
/workspace/coverage/default/49.sram_ctrl_stress_all.3804885026
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4047425165
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.357272854
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2822176394
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2822469526
/workspace/coverage/default/5.sram_ctrl_alert_test.3447067786
/workspace/coverage/default/5.sram_ctrl_bijection.2546106829
/workspace/coverage/default/5.sram_ctrl_executable.28613065
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1039022522
/workspace/coverage/default/5.sram_ctrl_max_throughput.3324693173
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3209052455
/workspace/coverage/default/5.sram_ctrl_mem_walk.486042930
/workspace/coverage/default/5.sram_ctrl_multiple_keys.791336848
/workspace/coverage/default/5.sram_ctrl_partial_access.2551039494
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2551175308
/workspace/coverage/default/5.sram_ctrl_ram_cfg.918315651
/workspace/coverage/default/5.sram_ctrl_regwen.27034525
/workspace/coverage/default/5.sram_ctrl_smoke.4074783993
/workspace/coverage/default/5.sram_ctrl_stress_all.2181612437
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4125476339
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.4115135106
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3339603785
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.239204541
/workspace/coverage/default/6.sram_ctrl_alert_test.2545845526
/workspace/coverage/default/6.sram_ctrl_bijection.583929424
/workspace/coverage/default/6.sram_ctrl_executable.1626456454
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2059994698
/workspace/coverage/default/6.sram_ctrl_max_throughput.950060162
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.434636698
/workspace/coverage/default/6.sram_ctrl_mem_walk.1529405088
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3952114734
/workspace/coverage/default/6.sram_ctrl_partial_access.3771166857
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1314961331
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3412590418
/workspace/coverage/default/6.sram_ctrl_regwen.3765746575
/workspace/coverage/default/6.sram_ctrl_smoke.4254312789
/workspace/coverage/default/6.sram_ctrl_stress_all.780111247
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.424431326
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.715255178
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3386421611
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.108597107
/workspace/coverage/default/7.sram_ctrl_alert_test.2294602068
/workspace/coverage/default/7.sram_ctrl_bijection.2774530367
/workspace/coverage/default/7.sram_ctrl_executable.565917659
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3919223412
/workspace/coverage/default/7.sram_ctrl_max_throughput.1110904527
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4270653965
/workspace/coverage/default/7.sram_ctrl_mem_walk.1527231299
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4113622094
/workspace/coverage/default/7.sram_ctrl_partial_access.164884062
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.894781772
/workspace/coverage/default/7.sram_ctrl_ram_cfg.305878354
/workspace/coverage/default/7.sram_ctrl_regwen.2553525949
/workspace/coverage/default/7.sram_ctrl_smoke.521169261
/workspace/coverage/default/7.sram_ctrl_stress_all.1637745108
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2560745650
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2163655024
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.568070305
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.462775868
/workspace/coverage/default/8.sram_ctrl_alert_test.1461412786
/workspace/coverage/default/8.sram_ctrl_bijection.4189406583
/workspace/coverage/default/8.sram_ctrl_executable.1488674119
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2557983378
/workspace/coverage/default/8.sram_ctrl_max_throughput.3051866879
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.15540194
/workspace/coverage/default/8.sram_ctrl_mem_walk.346074652
/workspace/coverage/default/8.sram_ctrl_multiple_keys.757795657
/workspace/coverage/default/8.sram_ctrl_partial_access.3116617253
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.237168556
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3243346324
/workspace/coverage/default/8.sram_ctrl_regwen.1077744431
/workspace/coverage/default/8.sram_ctrl_smoke.4082645420
/workspace/coverage/default/8.sram_ctrl_stress_all.1788125351
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2875696969
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2084214475
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3829364501
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1241894332
/workspace/coverage/default/9.sram_ctrl_alert_test.761917089
/workspace/coverage/default/9.sram_ctrl_bijection.3344298149
/workspace/coverage/default/9.sram_ctrl_executable.3306324851
/workspace/coverage/default/9.sram_ctrl_lc_escalation.305311913
/workspace/coverage/default/9.sram_ctrl_max_throughput.1684528851
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3199470975
/workspace/coverage/default/9.sram_ctrl_mem_walk.4055058752
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1613143608
/workspace/coverage/default/9.sram_ctrl_partial_access.1163030481
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2047235700
/workspace/coverage/default/9.sram_ctrl_ram_cfg.948641956
/workspace/coverage/default/9.sram_ctrl_regwen.2298506608
/workspace/coverage/default/9.sram_ctrl_smoke.3103544228
/workspace/coverage/default/9.sram_ctrl_stress_all.4188158592
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1916051460
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2722322066
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.728297868



Total test records in report: 1032
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/44.sram_ctrl_regwen.3459630283 Jul 24 07:31:11 PM PDT 24 Jul 24 07:35:56 PM PDT 24 44182225341 ps
T2 /workspace/coverage/default/26.sram_ctrl_alert_test.1679184579 Jul 24 07:22:31 PM PDT 24 Jul 24 07:22:31 PM PDT 24 32300224 ps
T3 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1804331314 Jul 24 07:18:13 PM PDT 24 Jul 24 07:25:30 PM PDT 24 6613100456 ps
T8 /workspace/coverage/default/21.sram_ctrl_ram_cfg.4069088759 Jul 24 07:21:30 PM PDT 24 Jul 24 07:21:33 PM PDT 24 1409936903 ps
T4 /workspace/coverage/default/7.sram_ctrl_smoke.521169261 Jul 24 07:18:43 PM PDT 24 Jul 24 07:18:57 PM PDT 24 4226289701 ps
T9 /workspace/coverage/default/3.sram_ctrl_alert_test.2607602623 Jul 24 07:18:18 PM PDT 24 Jul 24 07:18:19 PM PDT 24 20033621 ps
T10 /workspace/coverage/default/13.sram_ctrl_smoke.3023840965 Jul 24 07:19:40 PM PDT 24 Jul 24 07:19:53 PM PDT 24 4290488509 ps
T11 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1908589846 Jul 24 07:21:35 PM PDT 24 Jul 24 07:30:57 PM PDT 24 15776106496 ps
T12 /workspace/coverage/default/42.sram_ctrl_ram_cfg.435251574 Jul 24 07:30:50 PM PDT 24 Jul 24 07:30:54 PM PDT 24 1472402835 ps
T13 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.831604719 Jul 24 07:30:41 PM PDT 24 Jul 24 07:33:09 PM PDT 24 2553835091 ps
T42 /workspace/coverage/default/42.sram_ctrl_mem_walk.2502808518 Jul 24 07:30:51 PM PDT 24 Jul 24 07:35:39 PM PDT 24 10724204128 ps
T28 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.30143097 Jul 24 07:30:39 PM PDT 24 Jul 24 07:31:21 PM PDT 24 1473356494 ps
T18 /workspace/coverage/default/38.sram_ctrl_regwen.1814825194 Jul 24 07:30:20 PM PDT 24 Jul 24 07:44:37 PM PDT 24 29557584906 ps
T29 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2964084745 Jul 24 07:23:54 PM PDT 24 Jul 24 07:26:51 PM PDT 24 5407549366 ps
T46 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3072863275 Jul 24 07:30:26 PM PDT 24 Jul 24 07:31:57 PM PDT 24 29720693663 ps
T30 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1409360389 Jul 24 07:31:43 PM PDT 24 Jul 24 07:31:47 PM PDT 24 350133484 ps
T19 /workspace/coverage/default/11.sram_ctrl_regwen.3992596675 Jul 24 07:19:28 PM PDT 24 Jul 24 07:32:04 PM PDT 24 9115287643 ps
T58 /workspace/coverage/default/3.sram_ctrl_partial_access.1677996606 Jul 24 07:18:14 PM PDT 24 Jul 24 07:18:22 PM PDT 24 6905562811 ps
T59 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1255858523 Jul 24 07:30:36 PM PDT 24 Jul 24 07:30:42 PM PDT 24 697093174 ps
T27 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2350652430 Jul 24 07:31:12 PM PDT 24 Jul 24 07:35:15 PM PDT 24 10862505761 ps
T49 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3179441734 Jul 24 07:30:20 PM PDT 24 Jul 24 07:32:50 PM PDT 24 27135159638 ps
T114 /workspace/coverage/default/29.sram_ctrl_max_throughput.2336983364 Jul 24 07:23:03 PM PDT 24 Jul 24 07:24:23 PM PDT 24 778539668 ps
T24 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.710904254 Jul 24 07:22:16 PM PDT 24 Jul 24 07:27:09 PM PDT 24 6679014337 ps
T20 /workspace/coverage/default/46.sram_ctrl_bijection.3203237482 Jul 24 07:31:24 PM PDT 24 Jul 24 08:12:50 PM PDT 24 152556150832 ps
T43 /workspace/coverage/default/29.sram_ctrl_regwen.1978124612 Jul 24 07:23:02 PM PDT 24 Jul 24 07:40:42 PM PDT 24 20959933838 ps
T21 /workspace/coverage/default/16.sram_ctrl_regwen.2403901457 Jul 24 07:20:16 PM PDT 24 Jul 24 07:23:06 PM PDT 24 5350440393 ps
T14 /workspace/coverage/default/32.sram_ctrl_alert_test.2907299314 Jul 24 07:23:36 PM PDT 24 Jul 24 07:23:37 PM PDT 24 40039678 ps
T76 /workspace/coverage/default/19.sram_ctrl_partial_access.219878359 Jul 24 07:20:47 PM PDT 24 Jul 24 07:20:52 PM PDT 24 1408369042 ps
T77 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.502621227 Jul 24 07:20:56 PM PDT 24 Jul 24 07:27:34 PM PDT 24 36806612401 ps
T66 /workspace/coverage/default/12.sram_ctrl_bijection.3247146047 Jul 24 07:19:34 PM PDT 24 Jul 24 07:38:49 PM PDT 24 80372474098 ps
T78 /workspace/coverage/default/47.sram_ctrl_partial_access.2369343715 Jul 24 07:31:25 PM PDT 24 Jul 24 07:31:32 PM PDT 24 1966003421 ps
T25 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2065617960 Jul 24 07:19:27 PM PDT 24 Jul 24 07:19:43 PM PDT 24 2288537502 ps
T87 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2614543163 Jul 24 07:22:32 PM PDT 24 Jul 24 07:27:44 PM PDT 24 12347578356 ps
T133 /workspace/coverage/default/48.sram_ctrl_executable.113233816 Jul 24 07:31:39 PM PDT 24 Jul 24 07:34:40 PM PDT 24 7038320222 ps
T135 /workspace/coverage/default/10.sram_ctrl_bijection.2798734034 Jul 24 07:19:09 PM PDT 24 Jul 24 07:47:29 PM PDT 24 95729536550 ps
T104 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.739858792 Jul 24 07:20:41 PM PDT 24 Jul 24 07:28:27 PM PDT 24 22005573024 ps
T136 /workspace/coverage/default/4.sram_ctrl_partial_access.4048825876 Jul 24 07:18:23 PM PDT 24 Jul 24 07:18:37 PM PDT 24 421198831 ps
T70 /workspace/coverage/default/39.sram_ctrl_regwen.2187676324 Jul 24 07:30:26 PM PDT 24 Jul 24 07:41:18 PM PDT 24 3761279961 ps
T26 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.706642776 Jul 24 07:22:55 PM PDT 24 Jul 24 07:23:53 PM PDT 24 2057018674 ps
T137 /workspace/coverage/default/1.sram_ctrl_smoke.1416838936 Jul 24 07:18:04 PM PDT 24 Jul 24 07:19:03 PM PDT 24 1520695898 ps
T54 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.2527057094 Jul 24 07:21:43 PM PDT 24 Jul 24 07:24:32 PM PDT 24 33495316687 ps
T138 /workspace/coverage/default/20.sram_ctrl_bijection.2818188263 Jul 24 07:21:16 PM PDT 24 Jul 24 07:47:58 PM PDT 24 90717481881 ps
T139 /workspace/coverage/default/15.sram_ctrl_multiple_keys.4256775090 Jul 24 07:20:05 PM PDT 24 Jul 24 07:37:03 PM PDT 24 33916258874 ps
T52 /workspace/coverage/default/31.sram_ctrl_mem_walk.1031179499 Jul 24 07:23:28 PM PDT 24 Jul 24 07:29:11 PM PDT 24 98496707572 ps
T44 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.3846787000 Jul 24 07:18:09 PM PDT 24 Jul 24 07:19:06 PM PDT 24 6903062218 ps
T55 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1290022056 Jul 24 07:31:13 PM PDT 24 Jul 24 07:33:50 PM PDT 24 4575112132 ps
T105 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.3320367522 Jul 24 07:22:32 PM PDT 24 Jul 24 07:27:39 PM PDT 24 9514300245 ps
T79 /workspace/coverage/default/41.sram_ctrl_regwen.3648854714 Jul 24 07:30:39 PM PDT 24 Jul 24 07:45:26 PM PDT 24 47586279961 ps
T56 /workspace/coverage/default/24.sram_ctrl_mem_walk.1037099581 Jul 24 07:21:56 PM PDT 24 Jul 24 07:27:23 PM PDT 24 28222363652 ps
T45 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2192011062 Jul 24 07:19:21 PM PDT 24 Jul 24 07:28:48 PM PDT 24 85983673509 ps
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T140 /workspace/coverage/default/32.sram_ctrl_partial_access.69076898 Jul 24 07:23:27 PM PDT 24 Jul 24 07:24:43 PM PDT 24 1211053448 ps
T71 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2875696969 Jul 24 07:18:55 PM PDT 24 Jul 24 07:19:27 PM PDT 24 4041740941 ps
T126 /workspace/coverage/default/9.sram_ctrl_executable.3306324851 Jul 24 07:19:01 PM PDT 24 Jul 24 07:31:36 PM PDT 24 19819154656 ps
T141 /workspace/coverage/default/21.sram_ctrl_multiple_keys.578851225 Jul 24 07:21:19 PM PDT 24 Jul 24 07:22:52 PM PDT 24 5825970161 ps
T142 /workspace/coverage/default/37.sram_ctrl_max_throughput.2641897524 Jul 24 07:24:31 PM PDT 24 Jul 24 07:25:33 PM PDT 24 752302680 ps
T143 /workspace/coverage/default/28.sram_ctrl_partial_access.2094486443 Jul 24 07:22:51 PM PDT 24 Jul 24 07:23:09 PM PDT 24 2646579711 ps
T144 /workspace/coverage/default/40.sram_ctrl_partial_access.4151640605 Jul 24 07:30:27 PM PDT 24 Jul 24 07:30:46 PM PDT 24 905300363 ps
T145 /workspace/coverage/default/22.sram_ctrl_smoke.1033908802 Jul 24 07:21:23 PM PDT 24 Jul 24 07:21:33 PM PDT 24 381932302 ps
T146 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2584283810 Jul 24 07:21:25 PM PDT 24 Jul 24 07:23:14 PM PDT 24 772604238 ps
T57 /workspace/coverage/default/39.sram_ctrl_mem_walk.2639724662 Jul 24 07:30:29 PM PDT 24 Jul 24 07:35:32 PM PDT 24 5477925479 ps
T93 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2686582873 Jul 24 07:31:13 PM PDT 24 Jul 24 07:46:01 PM PDT 24 13095590992 ps
T147 /workspace/coverage/default/27.sram_ctrl_ram_cfg.156688482 Jul 24 07:22:38 PM PDT 24 Jul 24 07:22:41 PM PDT 24 1250708329 ps
T148 /workspace/coverage/default/7.sram_ctrl_multiple_keys.4113622094 Jul 24 07:18:41 PM PDT 24 Jul 24 07:29:19 PM PDT 24 6377542245 ps
T149 /workspace/coverage/default/40.sram_ctrl_max_throughput.3933573546 Jul 24 07:30:26 PM PDT 24 Jul 24 07:31:34 PM PDT 24 3163516568 ps
T150 /workspace/coverage/default/25.sram_ctrl_multiple_keys.4155088986 Jul 24 07:22:10 PM PDT 24 Jul 24 07:33:34 PM PDT 24 7899734092 ps
T106 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.237168556 Jul 24 07:18:50 PM PDT 24 Jul 24 07:27:51 PM PDT 24 9550344494 ps
T151 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1255996904 Jul 24 07:18:03 PM PDT 24 Jul 24 07:22:18 PM PDT 24 8822159354 ps
T152 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3618353068 Jul 24 07:30:23 PM PDT 24 Jul 24 07:30:27 PM PDT 24 1989467171 ps
T127 /workspace/coverage/default/34.sram_ctrl_executable.2217499827 Jul 24 07:23:54 PM PDT 24 Jul 24 07:35:48 PM PDT 24 25831156540 ps
T153 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3441019607 Jul 24 07:18:25 PM PDT 24 Jul 24 07:24:23 PM PDT 24 59218134472 ps
T154 /workspace/coverage/default/14.sram_ctrl_partial_access.3528043388 Jul 24 07:20:01 PM PDT 24 Jul 24 07:20:59 PM PDT 24 1502766196 ps
T155 /workspace/coverage/default/33.sram_ctrl_max_throughput.460281650 Jul 24 07:23:48 PM PDT 24 Jul 24 07:23:54 PM PDT 24 2777844775 ps
T156 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1468138095 Jul 24 07:21:49 PM PDT 24 Jul 24 07:22:06 PM PDT 24 724061194 ps
T157 /workspace/coverage/default/19.sram_ctrl_max_throughput.997938559 Jul 24 07:20:56 PM PDT 24 Jul 24 07:21:04 PM PDT 24 1834914759 ps
T94 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2889248760 Jul 24 07:19:48 PM PDT 24 Jul 24 07:20:16 PM PDT 24 20149276084 ps
T158 /workspace/coverage/default/43.sram_ctrl_partial_access.2321026673 Jul 24 07:31:03 PM PDT 24 Jul 24 07:31:48 PM PDT 24 2870572819 ps
T159 /workspace/coverage/default/18.sram_ctrl_alert_test.3249817902 Jul 24 07:20:47 PM PDT 24 Jul 24 07:20:48 PM PDT 24 57897474 ps
T160 /workspace/coverage/default/39.sram_ctrl_multiple_keys.2746036041 Jul 24 07:30:20 PM PDT 24 Jul 24 07:44:32 PM PDT 24 16376726543 ps
T161 /workspace/coverage/default/10.sram_ctrl_multiple_keys.1335558197 Jul 24 07:19:03 PM PDT 24 Jul 24 07:28:01 PM PDT 24 60981153169 ps
T162 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2252114889 Jul 24 07:31:13 PM PDT 24 Jul 24 07:35:03 PM PDT 24 16284786147 ps
T163 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.4279771957 Jul 24 07:18:11 PM PDT 24 Jul 24 07:22:42 PM PDT 24 9271350397 ps
T72 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4125476339 Jul 24 07:18:36 PM PDT 24 Jul 24 07:19:10 PM PDT 24 1093932857 ps
T128 /workspace/coverage/default/23.sram_ctrl_executable.1038774887 Jul 24 07:21:41 PM PDT 24 Jul 24 07:39:20 PM PDT 24 18301906259 ps
T164 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3242527814 Jul 24 07:21:43 PM PDT 24 Jul 24 07:21:48 PM PDT 24 4212466411 ps
T6 /workspace/coverage/default/1.sram_ctrl_lc_escalation.1492141277 Jul 24 07:18:14 PM PDT 24 Jul 24 07:19:02 PM PDT 24 35906982965 ps
T165 /workspace/coverage/default/3.sram_ctrl_bijection.4205436985 Jul 24 07:18:17 PM PDT 24 Jul 24 07:51:36 PM PDT 24 29546530824 ps
T166 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3760042280 Jul 24 07:21:35 PM PDT 24 Jul 24 07:23:56 PM PDT 24 5119325359 ps
T95 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3932811153 Jul 24 07:18:17 PM PDT 24 Jul 24 07:44:37 PM PDT 24 16267007654 ps
T129 /workspace/coverage/default/44.sram_ctrl_executable.1399608050 Jul 24 07:31:13 PM PDT 24 Jul 24 07:49:38 PM PDT 24 15077512228 ps
T167 /workspace/coverage/default/29.sram_ctrl_partial_access.3074849356 Jul 24 07:22:54 PM PDT 24 Jul 24 07:23:11 PM PDT 24 4995711032 ps
T168 /workspace/coverage/default/26.sram_ctrl_multiple_keys.2093316347 Jul 24 07:22:15 PM PDT 24 Jul 24 07:43:38 PM PDT 24 37195308969 ps
T7 /workspace/coverage/default/23.sram_ctrl_stress_all.3983885617 Jul 24 07:21:51 PM PDT 24 Jul 24 07:48:22 PM PDT 24 501960819851 ps
T169 /workspace/coverage/default/44.sram_ctrl_partial_access.4235087391 Jul 24 07:31:11 PM PDT 24 Jul 24 07:33:11 PM PDT 24 3481396176 ps
T170 /workspace/coverage/default/33.sram_ctrl_executable.1453268205 Jul 24 07:23:47 PM PDT 24 Jul 24 07:33:04 PM PDT 24 56394686007 ps
T53 /workspace/coverage/default/8.sram_ctrl_mem_walk.346074652 Jul 24 07:18:55 PM PDT 24 Jul 24 07:21:58 PM PDT 24 41412975492 ps
T73 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2585478885 Jul 24 07:31:17 PM PDT 24 Jul 24 07:31:31 PM PDT 24 2008363063 ps
T171 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2822176394 Jul 24 07:31:41 PM PDT 24 Jul 24 07:31:47 PM PDT 24 2666602842 ps
T172 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.728297868 Jul 24 07:19:04 PM PDT 24 Jul 24 07:21:10 PM PDT 24 802289340 ps
T173 /workspace/coverage/default/28.sram_ctrl_bijection.1478747451 Jul 24 07:22:49 PM PDT 24 Jul 24 07:34:12 PM PDT 24 86482837379 ps
T174 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.455117380 Jul 24 07:20:56 PM PDT 24 Jul 24 07:21:08 PM PDT 24 2762966602 ps
T60 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.15540194 Jul 24 07:18:56 PM PDT 24 Jul 24 07:21:40 PM PDT 24 24114038174 ps
T175 /workspace/coverage/default/23.sram_ctrl_bijection.1117280584 Jul 24 07:21:43 PM PDT 24 Jul 24 07:59:20 PM PDT 24 96725094945 ps
T176 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3132564930 Jul 24 07:23:28 PM PDT 24 Jul 24 07:24:00 PM PDT 24 1512870659 ps
T177 /workspace/coverage/default/42.sram_ctrl_partial_access.445044575 Jul 24 07:30:49 PM PDT 24 Jul 24 07:31:14 PM PDT 24 5940931454 ps
T178 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3900191879 Jul 24 07:31:26 PM PDT 24 Jul 24 07:55:14 PM PDT 24 57952274860 ps
T179 /workspace/coverage/default/30.sram_ctrl_smoke.467598373 Jul 24 07:23:10 PM PDT 24 Jul 24 07:23:26 PM PDT 24 16380599206 ps
T130 /workspace/coverage/default/48.sram_ctrl_stress_all.1171216429 Jul 24 07:31:43 PM PDT 24 Jul 24 08:49:09 PM PDT 24 77974275850 ps
T180 /workspace/coverage/default/33.sram_ctrl_bijection.3309030652 Jul 24 07:24:20 PM PDT 24 Jul 24 08:04:07 PM PDT 24 168303761684 ps
T181 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.1261093173 Jul 24 07:31:45 PM PDT 24 Jul 24 07:47:41 PM PDT 24 39646799745 ps
T182 /workspace/coverage/default/10.sram_ctrl_regwen.1152058325 Jul 24 07:19:14 PM PDT 24 Jul 24 07:23:17 PM PDT 24 2122066025 ps
T183 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3120842974 Jul 24 07:20:00 PM PDT 24 Jul 24 07:20:04 PM PDT 24 1354311579 ps
T184 /workspace/coverage/default/0.sram_ctrl_bijection.1549162057 Jul 24 07:17:57 PM PDT 24 Jul 24 07:38:46 PM PDT 24 203154098777 ps
T185 /workspace/coverage/default/46.sram_ctrl_regwen.2827479939 Jul 24 07:31:23 PM PDT 24 Jul 24 07:37:32 PM PDT 24 5993244379 ps
T186 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1271389315 Jul 24 07:19:31 PM PDT 24 Jul 24 07:22:16 PM PDT 24 4661825423 ps
T134 /workspace/coverage/default/28.sram_ctrl_stress_all.2221660644 Jul 24 07:22:52 PM PDT 24 Jul 24 08:51:54 PM PDT 24 147822826486 ps
T187 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.2085812979 Jul 24 07:23:59 PM PDT 24 Jul 24 07:30:36 PM PDT 24 3654786295 ps
T188 /workspace/coverage/default/32.sram_ctrl_mem_walk.1704684561 Jul 24 07:23:39 PM PDT 24 Jul 24 07:26:13 PM PDT 24 6919967876 ps
T131 /workspace/coverage/default/18.sram_ctrl_regwen.4284401816 Jul 24 07:20:42 PM PDT 24 Jul 24 07:27:37 PM PDT 24 2772313111 ps
T132 /workspace/coverage/default/13.sram_ctrl_executable.112198276 Jul 24 07:19:47 PM PDT 24 Jul 24 07:33:51 PM PDT 24 30926134298 ps
T189 /workspace/coverage/default/0.sram_ctrl_regwen.1879657682 Jul 24 07:18:03 PM PDT 24 Jul 24 07:25:16 PM PDT 24 6726963010 ps
T190 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1047144817 Jul 24 07:19:21 PM PDT 24 Jul 24 07:19:29 PM PDT 24 1408150710 ps
T191 /workspace/coverage/default/26.sram_ctrl_bijection.425487034 Jul 24 07:22:16 PM PDT 24 Jul 24 08:02:10 PM PDT 24 105842754833 ps
T61 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2246704448 Jul 24 07:22:00 PM PDT 24 Jul 24 07:22:29 PM PDT 24 2445941634 ps
T192 /workspace/coverage/default/28.sram_ctrl_max_throughput.1550558984 Jul 24 07:22:49 PM PDT 24 Jul 24 07:22:59 PM PDT 24 2957728078 ps
T193 /workspace/coverage/default/14.sram_ctrl_mem_walk.2975582923 Jul 24 07:19:59 PM PDT 24 Jul 24 07:24:56 PM PDT 24 11175274662 ps
T15 /workspace/coverage/default/4.sram_ctrl_sec_cm.3928114587 Jul 24 07:18:23 PM PDT 24 Jul 24 07:18:26 PM PDT 24 389259623 ps
T33 /workspace/coverage/default/43.sram_ctrl_bijection.954914365 Jul 24 07:31:01 PM PDT 24 Jul 24 08:09:30 PM PDT 24 31771274038 ps
T34 /workspace/coverage/default/8.sram_ctrl_stress_all.1788125351 Jul 24 07:18:56 PM PDT 24 Jul 24 09:41:23 PM PDT 24 737777423346 ps
T35 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.3342635206 Jul 24 07:20:10 PM PDT 24 Jul 24 07:22:54 PM PDT 24 23074090500 ps
T36 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1602407692 Jul 24 07:31:44 PM PDT 24 Jul 24 07:54:31 PM PDT 24 77455916717 ps
T37 /workspace/coverage/default/19.sram_ctrl_ram_cfg.2360454441 Jul 24 07:20:55 PM PDT 24 Jul 24 07:20:58 PM PDT 24 696895068 ps
T38 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.4115135106 Jul 24 07:18:31 PM PDT 24 Jul 24 07:21:31 PM PDT 24 6765873362 ps
T39 /workspace/coverage/default/10.sram_ctrl_partial_access.2440932961 Jul 24 07:19:08 PM PDT 24 Jul 24 07:20:47 PM PDT 24 1073805145 ps
T40 /workspace/coverage/default/35.sram_ctrl_alert_test.2131762792 Jul 24 07:24:22 PM PDT 24 Jul 24 07:24:23 PM PDT 24 13449822 ps
T41 /workspace/coverage/default/48.sram_ctrl_alert_test.951195946 Jul 24 07:31:44 PM PDT 24 Jul 24 07:31:45 PM PDT 24 41725635 ps
T194 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.3777369935 Jul 24 07:22:15 PM PDT 24 Jul 24 07:25:13 PM PDT 24 13579875438 ps
T195 /workspace/coverage/default/25.sram_ctrl_bijection.2435364326 Jul 24 07:22:06 PM PDT 24 Jul 24 07:33:19 PM PDT 24 42915220210 ps
T196 /workspace/coverage/default/5.sram_ctrl_mem_walk.486042930 Jul 24 07:18:35 PM PDT 24 Jul 24 07:21:03 PM PDT 24 5270300949 ps
T197 /workspace/coverage/default/19.sram_ctrl_alert_test.463492624 Jul 24 07:21:02 PM PDT 24 Jul 24 07:21:03 PM PDT 24 23749010 ps
T198 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3301921288 Jul 24 07:23:40 PM PDT 24 Jul 24 07:28:38 PM PDT 24 10219100753 ps
T199 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.107523932 Jul 24 07:18:21 PM PDT 24 Jul 24 07:22:19 PM PDT 24 5076514756 ps
T74 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.777151272 Jul 24 07:31:41 PM PDT 24 Jul 24 07:32:03 PM PDT 24 602685211 ps
T200 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1455636109 Jul 24 07:23:02 PM PDT 24 Jul 24 07:27:26 PM PDT 24 12261469409 ps
T201 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3572662954 Jul 24 07:19:47 PM PDT 24 Jul 24 07:20:11 PM PDT 24 2564381367 ps
T202 /workspace/coverage/default/29.sram_ctrl_alert_test.2727770954 Jul 24 07:23:12 PM PDT 24 Jul 24 07:23:13 PM PDT 24 17842380 ps
T203 /workspace/coverage/default/1.sram_ctrl_executable.3978730187 Jul 24 07:18:09 PM PDT 24 Jul 24 07:25:47 PM PDT 24 22196865883 ps
T204 /workspace/coverage/default/34.sram_ctrl_alert_test.2737624099 Jul 24 07:24:02 PM PDT 24 Jul 24 07:24:03 PM PDT 24 13510464 ps
T205 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2181290356 Jul 24 07:22:55 PM PDT 24 Jul 24 07:26:30 PM PDT 24 13104309659 ps
T206 /workspace/coverage/default/49.sram_ctrl_ram_cfg.1454097965 Jul 24 07:31:39 PM PDT 24 Jul 24 07:31:43 PM PDT 24 1397968602 ps
T75 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1632926540 Jul 24 07:22:39 PM PDT 24 Jul 24 07:22:51 PM PDT 24 1193895815 ps
T207 /workspace/coverage/default/46.sram_ctrl_ram_cfg.1691477609 Jul 24 07:31:21 PM PDT 24 Jul 24 07:31:26 PM PDT 24 5562439551 ps
T208 /workspace/coverage/default/45.sram_ctrl_max_throughput.4175496104 Jul 24 07:31:18 PM PDT 24 Jul 24 07:32:15 PM PDT 24 746591191 ps
T209 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.1503482213 Jul 24 07:20:43 PM PDT 24 Jul 24 07:21:05 PM PDT 24 11910762335 ps
T210 /workspace/coverage/default/11.sram_ctrl_max_throughput.4098636418 Jul 24 07:19:20 PM PDT 24 Jul 24 07:20:54 PM PDT 24 2930430626 ps
T211 /workspace/coverage/default/37.sram_ctrl_smoke.391669698 Jul 24 07:24:31 PM PDT 24 Jul 24 07:24:50 PM PDT 24 4985065255 ps
T212 /workspace/coverage/default/27.sram_ctrl_mem_walk.2901837848 Jul 24 07:22:40 PM PDT 24 Jul 24 07:24:47 PM PDT 24 4709971180 ps
T213 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2730988526 Jul 24 07:22:47 PM PDT 24 Jul 24 07:23:36 PM PDT 24 30505280335 ps
T214 /workspace/coverage/default/20.sram_ctrl_ram_cfg.3069666811 Jul 24 07:21:25 PM PDT 24 Jul 24 07:21:29 PM PDT 24 1530514791 ps
T22 /workspace/coverage/default/27.sram_ctrl_lc_escalation.2058349516 Jul 24 07:22:40 PM PDT 24 Jul 24 07:23:34 PM PDT 24 33449740304 ps
T215 /workspace/coverage/default/42.sram_ctrl_smoke.2035357940 Jul 24 07:30:49 PM PDT 24 Jul 24 07:31:00 PM PDT 24 744167701 ps
T216 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.4143379526 Jul 24 07:19:35 PM PDT 24 Jul 24 07:23:53 PM PDT 24 10376062799 ps
T217 /workspace/coverage/default/25.sram_ctrl_ram_cfg.2007151816 Jul 24 07:22:15 PM PDT 24 Jul 24 07:22:19 PM PDT 24 360502396 ps
T218 /workspace/coverage/default/42.sram_ctrl_regwen.3194569201 Jul 24 07:30:54 PM PDT 24 Jul 24 07:47:12 PM PDT 24 41705913283 ps
T219 /workspace/coverage/default/12.sram_ctrl_alert_test.2346847384 Jul 24 07:19:41 PM PDT 24 Jul 24 07:19:41 PM PDT 24 16595936 ps
T23 /workspace/coverage/default/3.sram_ctrl_lc_escalation.168471308 Jul 24 07:18:19 PM PDT 24 Jul 24 07:20:09 PM PDT 24 63543152828 ps
T220 /workspace/coverage/default/32.sram_ctrl_stress_all.1462640381 Jul 24 07:23:38 PM PDT 24 Jul 24 08:15:33 PM PDT 24 34407092234 ps
T221 /workspace/coverage/default/31.sram_ctrl_ram_cfg.1887181525 Jul 24 07:23:30 PM PDT 24 Jul 24 07:23:34 PM PDT 24 1344587737 ps
T222 /workspace/coverage/default/49.sram_ctrl_regwen.2953526459 Jul 24 07:31:45 PM PDT 24 Jul 24 07:32:27 PM PDT 24 4316690518 ps
T223 /workspace/coverage/default/26.sram_ctrl_executable.4072980340 Jul 24 07:22:23 PM PDT 24 Jul 24 07:30:41 PM PDT 24 9896285901 ps
T224 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.552893508 Jul 24 07:31:18 PM PDT 24 Jul 24 07:31:44 PM PDT 24 11775520353 ps
T225 /workspace/coverage/default/4.sram_ctrl_ram_cfg.3201398786 Jul 24 07:18:23 PM PDT 24 Jul 24 07:18:27 PM PDT 24 4801217815 ps
T226 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3471145669 Jul 24 07:30:27 PM PDT 24 Jul 24 07:36:27 PM PDT 24 11284784369 ps
T227 /workspace/coverage/default/22.sram_ctrl_partial_access.2491954756 Jul 24 07:21:36 PM PDT 24 Jul 24 07:24:03 PM PDT 24 1973005192 ps
T228 /workspace/coverage/default/22.sram_ctrl_stress_all.1511505983 Jul 24 07:21:36 PM PDT 24 Jul 24 08:12:36 PM PDT 24 32936437010 ps
T229 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.711460372 Jul 24 07:20:09 PM PDT 24 Jul 24 07:20:27 PM PDT 24 1996214741 ps
T230 /workspace/coverage/default/0.sram_ctrl_stress_all.2688244125 Jul 24 07:18:04 PM PDT 24 Jul 24 08:05:09 PM PDT 24 166123344589 ps
T231 /workspace/coverage/default/33.sram_ctrl_regwen.3430681018 Jul 24 07:23:45 PM PDT 24 Jul 24 07:26:03 PM PDT 24 34105550730 ps
T62 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.2891276207 Jul 24 07:18:16 PM PDT 24 Jul 24 07:19:31 PM PDT 24 1431806557 ps
T232 /workspace/coverage/default/30.sram_ctrl_executable.3320239631 Jul 24 07:23:11 PM PDT 24 Jul 24 07:42:04 PM PDT 24 66262831316 ps
T233 /workspace/coverage/default/43.sram_ctrl_multiple_keys.2024192230 Jul 24 07:31:03 PM PDT 24 Jul 24 07:46:58 PM PDT 24 36261034983 ps
T234 /workspace/coverage/default/32.sram_ctrl_lc_escalation.1010505291 Jul 24 07:23:37 PM PDT 24 Jul 24 07:24:50 PM PDT 24 60207516688 ps
T235 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2112578288 Jul 24 07:18:17 PM PDT 24 Jul 24 07:18:37 PM PDT 24 2155621635 ps
T236 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.4118294180 Jul 24 07:23:37 PM PDT 24 Jul 24 07:23:57 PM PDT 24 1668387133 ps
T237 /workspace/coverage/default/32.sram_ctrl_smoke.3101704525 Jul 24 07:23:33 PM PDT 24 Jul 24 07:23:46 PM PDT 24 889936543 ps
T238 /workspace/coverage/default/13.sram_ctrl_alert_test.4285134223 Jul 24 07:19:53 PM PDT 24 Jul 24 07:19:54 PM PDT 24 11970772 ps
T239 /workspace/coverage/default/24.sram_ctrl_lc_escalation.2305497643 Jul 24 07:21:59 PM PDT 24 Jul 24 07:22:33 PM PDT 24 6030440324 ps
T240 /workspace/coverage/default/3.sram_ctrl_multiple_keys.2486260546 Jul 24 07:18:20 PM PDT 24 Jul 24 07:36:55 PM PDT 24 24111997031 ps
T241 /workspace/coverage/default/5.sram_ctrl_executable.28613065 Jul 24 07:18:31 PM PDT 24 Jul 24 07:28:43 PM PDT 24 18426881745 ps
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T247 /workspace/coverage/default/14.sram_ctrl_alert_test.1077748382 Jul 24 07:20:07 PM PDT 24 Jul 24 07:20:08 PM PDT 24 17038804 ps
T248 /workspace/coverage/default/43.sram_ctrl_ram_cfg.2415480106 Jul 24 07:31:05 PM PDT 24 Jul 24 07:31:09 PM PDT 24 1198953938 ps
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T292 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3199470975 Jul 24 07:19:02 PM PDT 24 Jul 24 07:21:44 PM PDT 24 5041497245 ps
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T294 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3339603785 Jul 24 07:18:31 PM PDT 24 Jul 24 07:18:38 PM PDT 24 5575662883 ps
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T296 /workspace/coverage/default/39.sram_ctrl_partial_access.1801148269 Jul 24 07:30:22 PM PDT 24 Jul 24 07:30:47 PM PDT 24 5120643429 ps
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T299 /workspace/coverage/default/1.sram_ctrl_stress_all.3857663528 Jul 24 07:18:10 PM PDT 24 Jul 24 08:42:58 PM PDT 24 68435970497 ps
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